HPM SDK
HPMicro Software Development Kit
hpm_soc_ip.h
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1 /*
2  * Copyright (c) 2021-2025 HPMicro
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  *
6  */
7 
8 
9 #ifndef HPM_SOC_IP_H
10 #define HPM_SOC_IP_H
11 
12 
13 #include "hpm_common.h"
14 
15 #include "hpm_gpio_regs.h"
16 /* Address of GPIO instances */
17 /* FGPIO base address */
18 #define HPM_FGPIO_BASE (0xC0000UL)
19 /* FGPIO base pointer */
20 #define HPM_FGPIO ((GPIO_Type *) HPM_FGPIO_BASE)
21 /* GPIO0 base address */
22 #define HPM_GPIO0_BASE (0xF00D0000UL)
23 /* GPIO0 base pointer */
24 #define HPM_GPIO0 ((GPIO_Type *) HPM_GPIO0_BASE)
25 /* PGPIO base address */
26 #define HPM_PGPIO_BASE (0xF411C000UL)
27 /* PGPIO base pointer */
28 #define HPM_PGPIO ((GPIO_Type *) HPM_PGPIO_BASE)
29 
30 /* Address of DM instances */
31 /* DM base address */
32 #define HPM_DM_BASE (0x30000000UL)
33 
34 #include "hpm_plic_regs.h"
35 /* Address of PLIC instances */
36 /* PLIC base address */
37 #define HPM_PLIC_BASE (0xE4000000UL)
38 /* PLIC base pointer */
39 #define HPM_PLIC ((PLIC_Type *) HPM_PLIC_BASE)
40 
41 #include "hpm_mchtmr_regs.h"
42 /* Address of MCHTMR instances */
43 /* MCHTMR base address */
44 #define HPM_MCHTMR_BASE (0xE6000000UL)
45 /* MCHTMR base pointer */
46 #define HPM_MCHTMR ((MCHTMR_Type *) HPM_MCHTMR_BASE)
47 
48 #include "hpm_plic_sw_regs.h"
49 /* Address of PLICSW instances */
50 /* PLICSW base address */
51 #define HPM_PLICSW_BASE (0xE6400000UL)
52 /* PLICSW base pointer */
53 #define HPM_PLICSW ((PLIC_SW_Type *) HPM_PLICSW_BASE)
54 
55 #include "hpm_gptmr_regs.h"
56 /* Address of GPTMR instances */
57 /* GPTMR0 base address */
58 #define HPM_GPTMR0_BASE (0xF0000000UL)
59 /* GPTMR0 base pointer */
60 #define HPM_GPTMR0 ((GPTMR_Type *) HPM_GPTMR0_BASE)
61 /* GPTMR1 base address */
62 #define HPM_GPTMR1_BASE (0xF0004000UL)
63 /* GPTMR1 base pointer */
64 #define HPM_GPTMR1 ((GPTMR_Type *) HPM_GPTMR1_BASE)
65 /* GPTMR2 base address */
66 #define HPM_GPTMR2_BASE (0xF0008000UL)
67 /* GPTMR2 base pointer */
68 #define HPM_GPTMR2 ((GPTMR_Type *) HPM_GPTMR2_BASE)
69 /* GPTMR3 base address */
70 #define HPM_GPTMR3_BASE (0xF000C000UL)
71 /* GPTMR3 base pointer */
72 #define HPM_GPTMR3 ((GPTMR_Type *) HPM_GPTMR3_BASE)
73 /* PTMR base address */
74 #define HPM_PTMR_BASE (0xF4120000UL)
75 /* PTMR base pointer */
76 #define HPM_PTMR ((GPTMR_Type *) HPM_PTMR_BASE)
77 
78 #include "hpm_uart_regs.h"
79 /* Address of UART instances */
80 /* UART0 base address */
81 #define HPM_UART0_BASE (0xF0040000UL)
82 /* UART0 base pointer */
83 #define HPM_UART0 ((UART_Type *) HPM_UART0_BASE)
84 /* UART1 base address */
85 #define HPM_UART1_BASE (0xF0044000UL)
86 /* UART1 base pointer */
87 #define HPM_UART1 ((UART_Type *) HPM_UART1_BASE)
88 /* UART2 base address */
89 #define HPM_UART2_BASE (0xF0048000UL)
90 /* UART2 base pointer */
91 #define HPM_UART2 ((UART_Type *) HPM_UART2_BASE)
92 /* UART3 base address */
93 #define HPM_UART3_BASE (0xF004C000UL)
94 /* UART3 base pointer */
95 #define HPM_UART3 ((UART_Type *) HPM_UART3_BASE)
96 /* UART4 base address */
97 #define HPM_UART4_BASE (0xF0050000UL)
98 /* UART4 base pointer */
99 #define HPM_UART4 ((UART_Type *) HPM_UART4_BASE)
100 /* UART5 base address */
101 #define HPM_UART5_BASE (0xF0054000UL)
102 /* UART5 base pointer */
103 #define HPM_UART5 ((UART_Type *) HPM_UART5_BASE)
104 /* UART6 base address */
105 #define HPM_UART6_BASE (0xF0058000UL)
106 /* UART6 base pointer */
107 #define HPM_UART6 ((UART_Type *) HPM_UART6_BASE)
108 /* UART7 base address */
109 #define HPM_UART7_BASE (0xF005C000UL)
110 /* UART7 base pointer */
111 #define HPM_UART7 ((UART_Type *) HPM_UART7_BASE)
112 /* PUART base address */
113 #define HPM_PUART_BASE (0xF4124000UL)
114 /* PUART base pointer */
115 #define HPM_PUART ((UART_Type *) HPM_PUART_BASE)
116 
117 #include "hpm_i2c_regs.h"
118 /* Address of I2C instances */
119 /* I2C0 base address */
120 #define HPM_I2C0_BASE (0xF0060000UL)
121 /* I2C0 base pointer */
122 #define HPM_I2C0 ((I2C_Type *) HPM_I2C0_BASE)
123 /* I2C1 base address */
124 #define HPM_I2C1_BASE (0xF0064000UL)
125 /* I2C1 base pointer */
126 #define HPM_I2C1 ((I2C_Type *) HPM_I2C1_BASE)
127 /* I2C2 base address */
128 #define HPM_I2C2_BASE (0xF0068000UL)
129 /* I2C2 base pointer */
130 #define HPM_I2C2 ((I2C_Type *) HPM_I2C2_BASE)
131 /* I2C3 base address */
132 #define HPM_I2C3_BASE (0xF006C000UL)
133 /* I2C3 base pointer */
134 #define HPM_I2C3 ((I2C_Type *) HPM_I2C3_BASE)
135 
136 #include "hpm_spi_regs.h"
137 /* Address of SPI instances */
138 /* SPI0 base address */
139 #define HPM_SPI0_BASE (0xF0070000UL)
140 /* SPI0 base pointer */
141 #define HPM_SPI0 ((SPI_Type *) HPM_SPI0_BASE)
142 /* SPI1 base address */
143 #define HPM_SPI1_BASE (0xF0074000UL)
144 /* SPI1 base pointer */
145 #define HPM_SPI1 ((SPI_Type *) HPM_SPI1_BASE)
146 /* SPI2 base address */
147 #define HPM_SPI2_BASE (0xF0078000UL)
148 /* SPI2 base pointer */
149 #define HPM_SPI2 ((SPI_Type *) HPM_SPI2_BASE)
150 /* SPI3 base address */
151 #define HPM_SPI3_BASE (0xF007C000UL)
152 /* SPI3 base pointer */
153 #define HPM_SPI3 ((SPI_Type *) HPM_SPI3_BASE)
154 
155 #include "hpm_crc_regs.h"
156 /* Address of CRC instances */
157 /* CRC base address */
158 #define HPM_CRC_BASE (0xF0080000UL)
159 /* CRC base pointer */
160 #define HPM_CRC ((CRC_Type *) HPM_CRC_BASE)
161 
162 #include "hpm_tsns_regs.h"
163 /* Address of TSNS instances */
164 /* TSNS base address */
165 #define HPM_TSNS_BASE (0xF0090000UL)
166 /* TSNS base pointer */
167 #define HPM_TSNS ((TSNS_Type *) HPM_TSNS_BASE)
168 
169 #include "hpm_mbx_regs.h"
170 /* Address of MBX instances */
171 /* MBX0A base address */
172 #define HPM_MBX0A_BASE (0xF00A0000UL)
173 /* MBX0A base pointer */
174 #define HPM_MBX0A ((MBX_Type *) HPM_MBX0A_BASE)
175 /* MBX0B base address */
176 #define HPM_MBX0B_BASE (0xF00A4000UL)
177 /* MBX0B base pointer */
178 #define HPM_MBX0B ((MBX_Type *) HPM_MBX0B_BASE)
179 
180 #include "hpm_ewdg_regs.h"
181 /* Address of EWDG instances */
182 /* EWDG0 base address */
183 #define HPM_EWDG0_BASE (0xF00B0000UL)
184 /* EWDG0 base pointer */
185 #define HPM_EWDG0 ((EWDG_Type *) HPM_EWDG0_BASE)
186 /* EWDG1 base address */
187 #define HPM_EWDG1_BASE (0xF00B4000UL)
188 /* EWDG1 base pointer */
189 #define HPM_EWDG1 ((EWDG_Type *) HPM_EWDG1_BASE)
190 /* PEWDG base address */
191 #define HPM_PEWDG_BASE (0xF4128000UL)
192 /* PEWDG base pointer */
193 #define HPM_PEWDG ((EWDG_Type *) HPM_PEWDG_BASE)
194 
195 #include "hpm_dmamux_regs.h"
196 /* Address of DMAMUX instances */
197 /* DMAMUX base address */
198 #define HPM_DMAMUX_BASE (0xF00C4000UL)
199 /* DMAMUX base pointer */
200 #define HPM_DMAMUX ((DMAMUX_Type *) HPM_DMAMUX_BASE)
201 
202 #include "hpm_dmav2_regs.h"
203 /* Address of DMAV2 instances */
204 /* HDMA base address */
205 #define HPM_HDMA_BASE (0xF00C8000UL)
206 /* HDMA base pointer */
207 #define HPM_HDMA ((DMAV2_Type *) HPM_HDMA_BASE)
208 
209 #include "hpm_gpiom_regs.h"
210 /* Address of GPIOM instances */
211 /* GPIOM base address */
212 #define HPM_GPIOM_BASE (0xF00D8000UL)
213 /* GPIOM base pointer */
214 #define HPM_GPIOM ((GPIOM_Type *) HPM_GPIOM_BASE)
215 
216 #include "hpm_mcan_regs.h"
217 /* Address of MCAN instances */
218 /* MCAN0 base address */
219 #define HPM_MCAN0_BASE (0xF0280000UL)
220 /* MCAN0 base pointer */
221 #define HPM_MCAN0 ((MCAN_Type *) HPM_MCAN0_BASE)
222 /* MCAN1 base address */
223 #define HPM_MCAN1_BASE (0xF0284000UL)
224 /* MCAN1 base pointer */
225 #define HPM_MCAN1 ((MCAN_Type *) HPM_MCAN1_BASE)
226 /* MCAN2 base address */
227 #define HPM_MCAN2_BASE (0xF0288000UL)
228 /* MCAN2 base pointer */
229 #define HPM_MCAN2 ((MCAN_Type *) HPM_MCAN2_BASE)
230 /* MCAN3 base address */
231 #define HPM_MCAN3_BASE (0xF028C000UL)
232 /* MCAN3 base pointer */
233 #define HPM_MCAN3 ((MCAN_Type *) HPM_MCAN3_BASE)
234 
235 #include "hpm_ptpc_regs.h"
236 /* Address of PTPC instances */
237 /* PTPC base address */
238 #define HPM_PTPC_BASE (0xF02FC000UL)
239 /* PTPC base pointer */
240 #define HPM_PTPC ((PTPC_Type *) HPM_PTPC_BASE)
241 
242 #include "hpm_qeiv2_regs.h"
243 /* Address of QEIV2 instances */
244 /* QEI0 base address */
245 #define HPM_QEI0_BASE (0xF0300000UL)
246 /* QEI0 base pointer */
247 #define HPM_QEI0 ((QEIV2_Type *) HPM_QEI0_BASE)
248 /* QEI1 base address */
249 #define HPM_QEI1_BASE (0xF0304000UL)
250 /* QEI1 base pointer */
251 #define HPM_QEI1 ((QEIV2_Type *) HPM_QEI1_BASE)
252 
253 #include "hpm_qeo_regs.h"
254 /* Address of QEO instances */
255 /* QEO0 base address */
256 #define HPM_QEO0_BASE (0xF0308000UL)
257 /* QEO0 base pointer */
258 #define HPM_QEO0 ((QEO_Type *) HPM_QEO0_BASE)
259 /* QEO1 base address */
260 #define HPM_QEO1_BASE (0xF030C000UL)
261 /* QEO1 base pointer */
262 #define HPM_QEO1 ((QEO_Type *) HPM_QEO1_BASE)
263 
264 #include "hpm_mmc_regs.h"
265 /* Address of MMC instances */
266 /* MMC0 base address */
267 #define HPM_MMC0_BASE (0xF0310000UL)
268 /* MMC0 base pointer */
269 #define HPM_MMC0 ((MMC_Type *) HPM_MMC0_BASE)
270 /* MMC1 base address */
271 #define HPM_MMC1_BASE (0xF0314000UL)
272 /* MMC1 base pointer */
273 #define HPM_MMC1 ((MMC_Type *) HPM_MMC1_BASE)
274 
275 #include "hpm_pwm_regs.h"
276 /* Address of PWM instances */
277 /* PWM0 base address */
278 #define HPM_PWM0_BASE (0xF0318000UL)
279 /* PWM0 base pointer */
280 #define HPM_PWM0 ((PWM_Type *) HPM_PWM0_BASE)
281 /* PWM1 base address */
282 #define HPM_PWM1_BASE (0xF031C000UL)
283 /* PWM1 base pointer */
284 #define HPM_PWM1 ((PWM_Type *) HPM_PWM1_BASE)
285 
286 #include "hpm_rdc_regs.h"
287 /* Address of RDC instances */
288 /* RDC base address */
289 #define HPM_RDC_BASE (0xF0320000UL)
290 /* RDC base pointer */
291 #define HPM_RDC ((RDC_Type *) HPM_RDC_BASE)
292 
293 #include "hpm_plb_regs.h"
294 /* Address of PLB instances */
295 /* PLB base address */
296 #define HPM_PLB_BASE (0xF0324000UL)
297 /* PLB base pointer */
298 #define HPM_PLB ((PLB_Type *) HPM_PLB_BASE)
299 
300 #include "hpm_synt_regs.h"
301 /* Address of SYNT instances */
302 /* SYNT base address */
303 #define HPM_SYNT_BASE (0xF0328000UL)
304 /* SYNT base pointer */
305 #define HPM_SYNT ((SYNT_Type *) HPM_SYNT_BASE)
306 
307 #include "hpm_sei_regs.h"
308 /* Address of SEI instances */
309 /* SEI base address */
310 #define HPM_SEI_BASE (0xF032C000UL)
311 /* SEI base pointer */
312 #define HPM_SEI ((SEI_Type *) HPM_SEI_BASE)
313 
314 #include "hpm_trgm_regs.h"
315 /* Address of TRGM instances */
316 /* TRGM0 base address */
317 #define HPM_TRGM0_BASE (0xF033C000UL)
318 /* TRGM0 base pointer */
319 #define HPM_TRGM0 ((TRGM_Type *) HPM_TRGM0_BASE)
320 
321 #include "hpm_usb_regs.h"
322 /* Address of USB instances */
323 /* USB0 base address */
324 #define HPM_USB0_BASE (0xF300C000UL)
325 /* USB0 base pointer */
326 #define HPM_USB0 ((USB_Type *) HPM_USB0_BASE)
327 
328 #include "hpm_sdp_regs.h"
329 /* Address of SDP instances */
330 /* SDP base address */
331 #define HPM_SDP_BASE (0xF3040000UL)
332 /* SDP base pointer */
333 #define HPM_SDP ((SDP_Type *) HPM_SDP_BASE)
334 
335 #include "hpm_sec_regs.h"
336 /* Address of SEC instances */
337 /* SEC base address */
338 #define HPM_SEC_BASE (0xF3044000UL)
339 /* SEC base pointer */
340 #define HPM_SEC ((SEC_Type *) HPM_SEC_BASE)
341 
342 #include "hpm_mon_regs.h"
343 /* Address of MON instances */
344 /* MON base address */
345 #define HPM_MON_BASE (0xF3048000UL)
346 /* MON base pointer */
347 #define HPM_MON ((MON_Type *) HPM_MON_BASE)
348 
349 #include "hpm_rng_regs.h"
350 /* Address of RNG instances */
351 /* RNG base address */
352 #define HPM_RNG_BASE (0xF304C000UL)
353 /* RNG base pointer */
354 #define HPM_RNG ((RNG_Type *) HPM_RNG_BASE)
355 
356 #include "hpm_otp_regs.h"
357 /* Address of OTP instances */
358 /* OTP base address */
359 #define HPM_OTP_BASE (0xF3050000UL)
360 /* OTP base pointer */
361 #define HPM_OTP ((OTP_Type *) HPM_OTP_BASE)
362 
363 #include "hpm_keym_regs.h"
364 /* Address of KEYM instances */
365 /* KEYM base address */
366 #define HPM_KEYM_BASE (0xF3054000UL)
367 /* KEYM base pointer */
368 #define HPM_KEYM ((KEYM_Type *) HPM_KEYM_BASE)
369 
370 #include "hpm_adc16_regs.h"
371 /* Address of ADC16 instances */
372 /* ADC0 base address */
373 #define HPM_ADC0_BASE (0xF3080000UL)
374 /* ADC0 base pointer */
375 #define HPM_ADC0 ((ADC16_Type *) HPM_ADC0_BASE)
376 /* ADC1 base address */
377 #define HPM_ADC1_BASE (0xF3084000UL)
378 /* ADC1 base pointer */
379 #define HPM_ADC1 ((ADC16_Type *) HPM_ADC1_BASE)
380 
381 #include "hpm_dac_regs.h"
382 /* Address of DAC instances */
383 /* DAC0 base address */
384 #define HPM_DAC0_BASE (0xF3090000UL)
385 /* DAC0 base pointer */
386 #define HPM_DAC0 ((DAC_Type *) HPM_DAC0_BASE)
387 /* DAC1 base address */
388 #define HPM_DAC1_BASE (0xF3094000UL)
389 /* DAC1 base pointer */
390 #define HPM_DAC1 ((DAC_Type *) HPM_DAC1_BASE)
391 
392 #include "hpm_opamp_regs.h"
393 /* Address of OPAMP instances */
394 /* OPAMP0 base address */
395 #define HPM_OPAMP0_BASE (0xF30A0000UL)
396 /* OPAMP0 base pointer */
397 #define HPM_OPAMP0 ((OPAMP_Type *) HPM_OPAMP0_BASE)
398 /* OPAMP1 base address */
399 #define HPM_OPAMP1_BASE (0xF30A4000UL)
400 /* OPAMP1 base pointer */
401 #define HPM_OPAMP1 ((OPAMP_Type *) HPM_OPAMP1_BASE)
402 
403 #include "hpm_acmp_regs.h"
404 /* Address of ACMP instances */
405 /* ACMP base address */
406 #define HPM_ACMP_BASE (0xF30B0000UL)
407 /* ACMP base pointer */
408 #define HPM_ACMP ((ACMP_Type *) HPM_ACMP_BASE)
409 
410 #include "hpm_sysctl_regs.h"
411 /* Address of SYSCTL instances */
412 /* SYSCTL base address */
413 #define HPM_SYSCTL_BASE (0xF4000000UL)
414 /* SYSCTL base pointer */
415 #define HPM_SYSCTL ((SYSCTL_Type *) HPM_SYSCTL_BASE)
416 
417 #include "hpm_ioc_regs.h"
418 /* Address of IOC instances */
419 /* IOC base address */
420 #define HPM_IOC_BASE (0xF4040000UL)
421 /* IOC base pointer */
422 #define HPM_IOC ((IOC_Type *) HPM_IOC_BASE)
423 /* PIOC base address */
424 #define HPM_PIOC_BASE (0xF4118000UL)
425 /* PIOC base pointer */
426 #define HPM_PIOC ((IOC_Type *) HPM_PIOC_BASE)
427 
428 #include "hpm_pllctlv2_regs.h"
429 /* Address of PLLCTLV2 instances */
430 /* PLLCTLV2 base address */
431 #define HPM_PLLCTLV2_BASE (0xF40C0000UL)
432 /* PLLCTLV2 base pointer */
433 #define HPM_PLLCTLV2 ((PLLCTLV2_Type *) HPM_PLLCTLV2_BASE)
434 
435 #include "hpm_ppor_regs.h"
436 /* Address of PPOR instances */
437 /* PPOR base address */
438 #define HPM_PPOR_BASE (0xF4100000UL)
439 /* PPOR base pointer */
440 #define HPM_PPOR ((PPOR_Type *) HPM_PPOR_BASE)
441 
442 #include "hpm_pcfg_regs.h"
443 /* Address of PCFG instances */
444 /* PCFG base address */
445 #define HPM_PCFG_BASE (0xF4104000UL)
446 /* PCFG base pointer */
447 #define HPM_PCFG ((PCFG_Type *) HPM_PCFG_BASE)
448 
449 #include "hpm_pgpr_regs.h"
450 /* Address of PGPR instances */
451 /* PGPR0 base address */
452 #define HPM_PGPR0_BASE (0xF4110000UL)
453 /* PGPR0 base pointer */
454 #define HPM_PGPR0 ((PGPR_Type *) HPM_PGPR0_BASE)
455 /* PGPR1 base address */
456 #define HPM_PGPR1_BASE (0xF4114000UL)
457 /* PGPR1 base pointer */
458 #define HPM_PGPR1 ((PGPR_Type *) HPM_PGPR1_BASE)
459 
460 #include "hpm_pdgo_regs.h"
461 /* Address of PDGO instances */
462 /* PDGO base address */
463 #define HPM_PDGO_BASE (0xF4134000UL)
464 /* PDGO base pointer */
465 #define HPM_PDGO ((PDGO_Type *) HPM_PDGO_BASE)
466 
467 
468 #endif /* HPM_SOC_IP_H */
469