latest/api_doc/HPM5E00_2HPM5E3Y_2hpm__iomux_8h_source.html

/*

 * Copyright (c) 2021-2025 HPMicro

 *

 * SPDX-License-Identifier: BSD-3-Clause

 *

 */


#ifndef HPM_IOMUX_H

#define HPM_IOMUX_H


/* IOC_PA00_FUNC_CTL function mux definitions */

#define IOC_PA00_FUNC_CTL_GPIO_A_00            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PA00_FUNC_CTL_GPTMR1_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PA00_FUNC_CTL_UART0_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PA00_FUNC_CTL_MCAN0_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PA00_FUNC_CTL_PWM0_P_0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PA00_FUNC_CTL_TRGM_P_00            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PA00_FUNC_CTL_SYSCTL_CLK_OBS_0     IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)


/* IOC_PA01_FUNC_CTL function mux definitions */

#define IOC_PA01_FUNC_CTL_GPIO_A_01            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PA01_FUNC_CTL_GPTMR1_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PA01_FUNC_CTL_UART0_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PA01_FUNC_CTL_MCAN0_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PA01_FUNC_CTL_PWM0_P_1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PA01_FUNC_CTL_TRGM_P_01            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PA01_FUNC_CTL_SYSCTL_CLK_OBS_2     IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)


/* IOC_PA02_FUNC_CTL function mux definitions */

#define IOC_PA02_FUNC_CTL_GPIO_A_02            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PA02_FUNC_CTL_GPTMR1_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PA02_FUNC_CTL_UART0_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PA02_FUNC_CTL_UART0_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)

#define IOC_PA02_FUNC_CTL_I2C2_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)

#define IOC_PA02_FUNC_CTL_MCAN0_STBY           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PA02_FUNC_CTL_PWM0_P_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PA02_FUNC_CTL_TRGM_P_02            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PA02_FUNC_CTL_SYSCTL_CLK_OBS_1     IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)


/* IOC_PA03_FUNC_CTL function mux definitions */

#define IOC_PA03_FUNC_CTL_GPIO_A_03            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PA03_FUNC_CTL_GPTMR1_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PA03_FUNC_CTL_UART0_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)

#define IOC_PA03_FUNC_CTL_I2C2_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)

#define IOC_PA03_FUNC_CTL_MCAN1_STBY           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PA03_FUNC_CTL_PWM0_P_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PA03_FUNC_CTL_TRGM_P_03            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PA03_FUNC_CTL_SYSCTL_CLK_OBS_3     IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)


/* IOC_PA04_FUNC_CTL function mux definitions */

#define IOC_PA04_FUNC_CTL_GPIO_A_04            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PA04_FUNC_CTL_UART1_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)

#define IOC_PA04_FUNC_CTL_SPI1_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PA04_FUNC_CTL_MCAN1_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PA04_FUNC_CTL_PWM0_P_4             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PA04_FUNC_CTL_TRGM_P_04            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PA04_FUNC_CTL_JTAG_TDO             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)


/* IOC_PA05_FUNC_CTL function mux definitions */

#define IOC_PA05_FUNC_CTL_GPIO_A_05            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PA05_FUNC_CTL_GPTMR1_COMP_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PA05_FUNC_CTL_UART1_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PA05_FUNC_CTL_UART1_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)

#define IOC_PA05_FUNC_CTL_SPI1_CS_0            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PA05_FUNC_CTL_MCAN1_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PA05_FUNC_CTL_PWM0_P_5             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PA05_FUNC_CTL_TRGM_P_05            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PA05_FUNC_CTL_JTAG_TDI             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)


/* IOC_PA06_FUNC_CTL function mux definitions */

#define IOC_PA06_FUNC_CTL_GPIO_A_06            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PA06_FUNC_CTL_GPTMR0_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PA06_FUNC_CTL_UART1_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PA06_FUNC_CTL_I2C3_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)

#define IOC_PA06_FUNC_CTL_SPI1_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PA06_FUNC_CTL_PWM0_P_6             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PA06_FUNC_CTL_TRGM_P_06            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PA06_FUNC_CTL_JTAG_TCK             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)


/* IOC_PA07_FUNC_CTL function mux definitions */

#define IOC_PA07_FUNC_CTL_GPIO_A_07            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PA07_FUNC_CTL_GPTMR0_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PA07_FUNC_CTL_UART1_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PA07_FUNC_CTL_I2C3_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)

#define IOC_PA07_FUNC_CTL_SPI1_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PA07_FUNC_CTL_PWM0_P_7             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PA07_FUNC_CTL_TRGM_P_07            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PA07_FUNC_CTL_JTAG_TMS             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)


/* IOC_PA08_FUNC_CTL function mux definitions */

#define IOC_PA08_FUNC_CTL_GPIO_A_08            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PA08_FUNC_CTL_GPTMR0_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PA08_FUNC_CTL_UART2_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PA08_FUNC_CTL_I2C0_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)

#define IOC_PA08_FUNC_CTL_MCAN2_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PA08_FUNC_CTL_PWM1_P_0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PA08_FUNC_CTL_TRGM_P_08            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PA08_FUNC_CTL_JTAG_TRST            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)


/* IOC_PA09_FUNC_CTL function mux definitions */

#define IOC_PA09_FUNC_CTL_GPIO_A_09            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PA09_FUNC_CTL_GPTMR0_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PA09_FUNC_CTL_UART2_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PA09_FUNC_CTL_I2C0_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)

#define IOC_PA09_FUNC_CTL_MCAN2_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PA09_FUNC_CTL_ESC0_REFCK           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PA09_FUNC_CTL_PWM1_P_1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PA09_FUNC_CTL_TRGM_P_09            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)


/* IOC_PA16_FUNC_CTL function mux definitions */

#define IOC_PA16_FUNC_CTL_GPIO_A_16            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PA16_FUNC_CTL_GPTMR3_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PA16_FUNC_CTL_UART4_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PA16_FUNC_CTL_ESC0_P0_RXDV         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PA16_FUNC_CTL_QEO1_A               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)

#define IOC_PA16_FUNC_CTL_SDM0_DAT_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(23)

#define IOC_PA16_FUNC_CTL_EUI0_CK              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(26)


/* IOC_PA17_FUNC_CTL function mux definitions */

#define IOC_PA17_FUNC_CTL_GPIO_A_17            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PA17_FUNC_CTL_GPTMR3_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PA17_FUNC_CTL_UART4_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PA17_FUNC_CTL_ESC0_P0_RXD_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PA17_FUNC_CTL_QEO1_B               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)

#define IOC_PA17_FUNC_CTL_SDM0_CLK_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(23)

#define IOC_PA17_FUNC_CTL_EUI0_SH              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(26)


/* IOC_PA18_FUNC_CTL function mux definitions */

#define IOC_PA18_FUNC_CTL_GPIO_A_18            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PA18_FUNC_CTL_GPTMR3_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PA18_FUNC_CTL_UART4_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PA18_FUNC_CTL_UART4_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)

#define IOC_PA18_FUNC_CTL_ESC0_P0_RXD_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PA18_FUNC_CTL_QEO1_Z               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)

#define IOC_PA18_FUNC_CTL_SDM0_DAT_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(23)

#define IOC_PA18_FUNC_CTL_EUI0_DI              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(26)


/* IOC_PA19_FUNC_CTL function mux definitions */

#define IOC_PA19_FUNC_CTL_GPIO_A_19            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PA19_FUNC_CTL_GPTMR3_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PA19_FUNC_CTL_UART4_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)

#define IOC_PA19_FUNC_CTL_SPI3_CS_3            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PA19_FUNC_CTL_ESC0_P0_RXD_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PA19_FUNC_CTL_SDM0_CLK_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(23)

#define IOC_PA19_FUNC_CTL_EUI0_DO              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(26)


/* IOC_PA20_FUNC_CTL function mux definitions */

#define IOC_PA20_FUNC_CTL_GPIO_A_20            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PA20_FUNC_CTL_UART5_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)

#define IOC_PA20_FUNC_CTL_SPI2_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PA20_FUNC_CTL_ESC0_P0_RXD_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PA20_FUNC_CTL_SDM0_DAT_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(23)


/* IOC_PA21_FUNC_CTL function mux definitions */

#define IOC_PA21_FUNC_CTL_GPIO_A_21            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PA21_FUNC_CTL_GPTMR3_COMP_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PA21_FUNC_CTL_UART5_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PA21_FUNC_CTL_UART5_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)

#define IOC_PA21_FUNC_CTL_SPI2_CS_0            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PA21_FUNC_CTL_ESC0_P0_RXCK         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PA21_FUNC_CTL_QEO0_Z               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)

#define IOC_PA21_FUNC_CTL_SDM0_CLK_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(23)

#define IOC_PA21_FUNC_CTL_OWR0_DAT             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(26)


/* IOC_PA22_FUNC_CTL function mux definitions */

#define IOC_PA22_FUNC_CTL_GPIO_A_22            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PA22_FUNC_CTL_GPTMR2_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PA22_FUNC_CTL_UART5_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PA22_FUNC_CTL_SPI2_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PA22_FUNC_CTL_ETH0_TXER            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PA22_FUNC_CTL_QEO0_B               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)

#define IOC_PA22_FUNC_CTL_SDM0_DAT_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(23)

#define IOC_PA22_FUNC_CTL_OWR1_DAT             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(26)


/* IOC_PA23_FUNC_CTL function mux definitions */

#define IOC_PA23_FUNC_CTL_GPIO_A_23            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PA23_FUNC_CTL_GPTMR2_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PA23_FUNC_CTL_UART5_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PA23_FUNC_CTL_SPI2_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PA23_FUNC_CTL_ESC0_P0_RXER         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PA23_FUNC_CTL_ETH0_RXER            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PA23_FUNC_CTL_QEO0_A               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)

#define IOC_PA23_FUNC_CTL_SDM0_CLK_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(23)


/* IOC_PA24_FUNC_CTL function mux definitions */

#define IOC_PA24_FUNC_CTL_GPIO_A_24            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PA24_FUNC_CTL_GPTMR2_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PA24_FUNC_CTL_UART6_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PA24_FUNC_CTL_SPI3_CS_2            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PA24_FUNC_CTL_ESC0_P0_TXCK         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)


/* IOC_PA25_FUNC_CTL function mux definitions */

#define IOC_PA25_FUNC_CTL_GPIO_A_25            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PA25_FUNC_CTL_GPTMR2_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PA25_FUNC_CTL_UART6_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PA25_FUNC_CTL_SPI3_CS_1            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PA25_FUNC_CTL_ESC0_P0_TXD_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PA25_FUNC_CTL_ESC0_CTR_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)


/* IOC_PA26_FUNC_CTL function mux definitions */

#define IOC_PA26_FUNC_CTL_GPIO_A_26            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PA26_FUNC_CTL_GPTMR2_COMP_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PA26_FUNC_CTL_UART6_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PA26_FUNC_CTL_UART6_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)

#define IOC_PA26_FUNC_CTL_SPI3_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PA26_FUNC_CTL_ESC0_P0_TXD_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PA26_FUNC_CTL_QEI1_H1              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)

#define IOC_PA26_FUNC_CTL_EWDG0_RST            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)


/* IOC_PA27_FUNC_CTL function mux definitions */

#define IOC_PA27_FUNC_CTL_GPIO_A_27            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PA27_FUNC_CTL_UART6_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)

#define IOC_PA27_FUNC_CTL_SPI3_CS_0            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PA27_FUNC_CTL_ESC0_P0_TXD_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PA27_FUNC_CTL_QEI1_F               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)


/* IOC_PA28_FUNC_CTL function mux definitions */

#define IOC_PA28_FUNC_CTL_GPIO_A_28            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PA28_FUNC_CTL_UART7_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)

#define IOC_PA28_FUNC_CTL_SPI3_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PA28_FUNC_CTL_ESC0_P0_TXD_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PA28_FUNC_CTL_ESC0_CTR_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PA28_FUNC_CTL_QEI1_H0              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)


/* IOC_PA29_FUNC_CTL function mux definitions */

#define IOC_PA29_FUNC_CTL_GPIO_A_29            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PA29_FUNC_CTL_GPTMR3_COMP_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PA29_FUNC_CTL_UART7_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PA29_FUNC_CTL_UART7_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)

#define IOC_PA29_FUNC_CTL_SPI3_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PA29_FUNC_CTL_ESC0_P0_TXEN         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PA29_FUNC_CTL_QEI1_Z               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)


/* IOC_PA30_FUNC_CTL function mux definitions */

#define IOC_PA30_FUNC_CTL_GPIO_A_30            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PA30_FUNC_CTL_UART7_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PA30_FUNC_CTL_SPI3_DAT2            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PA30_FUNC_CTL_ESC0_MDIO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PA30_FUNC_CTL_ETH0_MDIO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PA30_FUNC_CTL_QEI1_A               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)


/* IOC_PA31_FUNC_CTL function mux definitions */

#define IOC_PA31_FUNC_CTL_GPIO_A_31            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PA31_FUNC_CTL_GPTMR2_COMP_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PA31_FUNC_CTL_UART7_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PA31_FUNC_CTL_SPI3_DAT3            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PA31_FUNC_CTL_ESC0_MDC             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PA31_FUNC_CTL_ETH0_MDC             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PA31_FUNC_CTL_QEI1_B               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)


/* IOC_PB00_FUNC_CTL function mux definitions */

#define IOC_PB00_FUNC_CTL_GPIO_B_00            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PB00_FUNC_CTL_MCAN0_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PB00_FUNC_CTL_ESC0_P0_RXDV         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PB00_FUNC_CTL_PWM0_P_0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PB00_FUNC_CTL_TRGM_P_00            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PB00_FUNC_CTL_ETH0_RXDV            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PB00_FUNC_CTL_QEO1_A               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)


/* IOC_PB01_FUNC_CTL function mux definitions */

#define IOC_PB01_FUNC_CTL_GPIO_B_01            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PB01_FUNC_CTL_MCAN0_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PB01_FUNC_CTL_ESC0_P0_RXD_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PB01_FUNC_CTL_PWM0_P_1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PB01_FUNC_CTL_TRGM_P_01            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PB01_FUNC_CTL_ETH0_RXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PB01_FUNC_CTL_QEO1_B               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)


/* IOC_PB02_FUNC_CTL function mux definitions */

#define IOC_PB02_FUNC_CTL_GPIO_B_02            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PB02_FUNC_CTL_I2C2_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)

#define IOC_PB02_FUNC_CTL_MCAN0_STBY           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PB02_FUNC_CTL_ESC0_P0_RXD_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PB02_FUNC_CTL_PWM0_P_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PB02_FUNC_CTL_TRGM_P_02            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PB02_FUNC_CTL_ETH0_RXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PB02_FUNC_CTL_QEI0_H1              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)

#define IOC_PB02_FUNC_CTL_QEO1_Z               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)


/* IOC_PB03_FUNC_CTL function mux definitions */

#define IOC_PB03_FUNC_CTL_GPIO_B_03            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PB03_FUNC_CTL_I2C2_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)

#define IOC_PB03_FUNC_CTL_MCAN1_STBY           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PB03_FUNC_CTL_ESC0_P0_RXD_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PB03_FUNC_CTL_PWM0_P_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PB03_FUNC_CTL_TRGM_P_03            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PB03_FUNC_CTL_ETH0_RXD_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PB03_FUNC_CTL_QEI0_F               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)


/* IOC_PB04_FUNC_CTL function mux definitions */

#define IOC_PB04_FUNC_CTL_GPIO_B_04            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PB04_FUNC_CTL_MCAN1_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PB04_FUNC_CTL_ESC0_P0_RXD_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PB04_FUNC_CTL_PWM0_P_4             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PB04_FUNC_CTL_TRGM_P_04            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PB04_FUNC_CTL_ETH0_RXD_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PB04_FUNC_CTL_QEI0_H0              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)


/* IOC_PB05_FUNC_CTL function mux definitions */

#define IOC_PB05_FUNC_CTL_GPIO_B_05            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PB05_FUNC_CTL_MCAN1_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PB05_FUNC_CTL_ESC0_P0_RXCK         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PB05_FUNC_CTL_PWM0_P_5             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PB05_FUNC_CTL_TRGM_P_05            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PB05_FUNC_CTL_ETH0_RXCK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PB05_FUNC_CTL_QEI0_Z               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)

#define IOC_PB05_FUNC_CTL_QEO0_Z               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)


/* IOC_PB06_FUNC_CTL function mux definitions */

#define IOC_PB06_FUNC_CTL_GPIO_B_06            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PB06_FUNC_CTL_I2C3_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)

#define IOC_PB06_FUNC_CTL_ESC0_P0_TXCK         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PB06_FUNC_CTL_PWM0_P_6             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PB06_FUNC_CTL_TRGM_P_06            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PB06_FUNC_CTL_ETH0_TXCK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PB06_FUNC_CTL_QEI0_B               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)

#define IOC_PB06_FUNC_CTL_QEO0_B               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)


/* IOC_PB07_FUNC_CTL function mux definitions */

#define IOC_PB07_FUNC_CTL_GPIO_B_07            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PB07_FUNC_CTL_I2C3_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)

#define IOC_PB07_FUNC_CTL_ESC0_P0_TXD_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PB07_FUNC_CTL_PWM0_P_7             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PB07_FUNC_CTL_TRGM_P_07            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PB07_FUNC_CTL_ETH0_TXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PB07_FUNC_CTL_QEI0_A               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)

#define IOC_PB07_FUNC_CTL_QEO0_A               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)


/* IOC_PB08_FUNC_CTL function mux definitions */

#define IOC_PB08_FUNC_CTL_GPIO_B_08            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PB08_FUNC_CTL_I2C0_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)

#define IOC_PB08_FUNC_CTL_MCAN2_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PB08_FUNC_CTL_ESC0_P0_TXD_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PB08_FUNC_CTL_PWM1_P_0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PB08_FUNC_CTL_TRGM_P_08            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PB08_FUNC_CTL_ETH0_TXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)


/* IOC_PB09_FUNC_CTL function mux definitions */

#define IOC_PB09_FUNC_CTL_GPIO_B_09            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PB09_FUNC_CTL_I2C0_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)

#define IOC_PB09_FUNC_CTL_MCAN2_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PB09_FUNC_CTL_ESC0_P0_TXD_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PB09_FUNC_CTL_PWM1_P_1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PB09_FUNC_CTL_TRGM_P_09            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PB09_FUNC_CTL_ETH0_TXD_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)


/* IOC_PB10_FUNC_CTL function mux definitions */

#define IOC_PB10_FUNC_CTL_GPIO_B_10            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PB10_FUNC_CTL_MCAN2_STBY           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PB10_FUNC_CTL_ESC0_P0_TXD_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PB10_FUNC_CTL_PWM1_P_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PB10_FUNC_CTL_TRGM_P_10            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PB10_FUNC_CTL_ETH0_TXD_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)


/* IOC_PB11_FUNC_CTL function mux definitions */

#define IOC_PB11_FUNC_CTL_GPIO_B_11            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PB11_FUNC_CTL_ESC0_P0_TXEN         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PB11_FUNC_CTL_PWM1_P_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PB11_FUNC_CTL_TRGM_P_11            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PB11_FUNC_CTL_ETH0_TXEN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)


/* IOC_PB24_FUNC_CTL function mux definitions */

#define IOC_PB24_FUNC_CTL_GPIO_B_24            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PB24_FUNC_CTL_ESC0_CTR_4           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PB24_FUNC_CTL_XPI0_CA_CS1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)

#define IOC_PB24_FUNC_CTL_SDM0_CLK_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(23)

#define IOC_PB24_FUNC_CTL_ETH0_EVTI_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(25)

#define IOC_PB24_FUNC_CTL_ESC0_EVTI_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(27)


/* IOC_PB25_FUNC_CTL function mux definitions */

#define IOC_PB25_FUNC_CTL_GPIO_B_25            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PB25_FUNC_CTL_ESC0_CTR_5           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PB25_FUNC_CTL_XPI0_CA_DQS          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)

#define IOC_PB25_FUNC_CTL_SDM0_DAT_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(23)

#define IOC_PB25_FUNC_CTL_ETH0_EVTO_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(25)

#define IOC_PB25_FUNC_CTL_ESC0_EVTO_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(27)


/* IOC_PB26_FUNC_CTL function mux definitions */

#define IOC_PB26_FUNC_CTL_GPIO_B_26            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PB26_FUNC_CTL_ESC0_CTR_6           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PB26_FUNC_CTL_XPI0_CA_D_2          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)

#define IOC_PB26_FUNC_CTL_QEI1_H1              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)

#define IOC_PB26_FUNC_CTL_SDM0_CLK_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(23)

#define IOC_PB26_FUNC_CTL_ETH0_EVTI_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(25)

#define IOC_PB26_FUNC_CTL_EUI1_CK              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(26)

#define IOC_PB26_FUNC_CTL_ESC0_EVTI_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(27)


/* IOC_PB27_FUNC_CTL function mux definitions */

#define IOC_PB27_FUNC_CTL_GPIO_B_27            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PB27_FUNC_CTL_ESC0_CTR_7           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PB27_FUNC_CTL_XPI0_CA_D_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)

#define IOC_PB27_FUNC_CTL_QEI1_F               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)

#define IOC_PB27_FUNC_CTL_SDM0_DAT_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(23)

#define IOC_PB27_FUNC_CTL_EUI1_SH              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(26)


/* IOC_PB28_FUNC_CTL function mux definitions */

#define IOC_PB28_FUNC_CTL_GPIO_B_28            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PB28_FUNC_CTL_ESC0_CTR_8           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PB28_FUNC_CTL_XPI0_CA_D_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)

#define IOC_PB28_FUNC_CTL_QEI1_H0              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)

#define IOC_PB28_FUNC_CTL_SDM0_CLK_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(23)

#define IOC_PB28_FUNC_CTL_EUI1_DI              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(26)


/* IOC_PB29_FUNC_CTL function mux definitions */

#define IOC_PB29_FUNC_CTL_GPIO_B_29            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PB29_FUNC_CTL_XPI0_CA_SCLK         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)

#define IOC_PB29_FUNC_CTL_QEI1_Z               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)

#define IOC_PB29_FUNC_CTL_SDM0_DAT_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(23)

#define IOC_PB29_FUNC_CTL_ETH0_EVTO_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(25)

#define IOC_PB29_FUNC_CTL_EUI1_DO              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(26)

#define IOC_PB29_FUNC_CTL_ESC0_EVTO_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(27)


/* IOC_PB30_FUNC_CTL function mux definitions */

#define IOC_PB30_FUNC_CTL_GPIO_B_30            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PB30_FUNC_CTL_ESC0_CTR_7           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PB30_FUNC_CTL_XPI0_CA_CS0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)

#define IOC_PB30_FUNC_CTL_QEI1_A               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)

#define IOC_PB30_FUNC_CTL_SDM0_CLK_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(23)


/* IOC_PB31_FUNC_CTL function mux definitions */

#define IOC_PB31_FUNC_CTL_GPIO_B_31            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PB31_FUNC_CTL_ESC0_CTR_8           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PB31_FUNC_CTL_XPI0_CA_D_3          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)

#define IOC_PB31_FUNC_CTL_QEI1_B               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)

#define IOC_PB31_FUNC_CTL_SDM0_DAT_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(23)


/* IOC_PC00_FUNC_CTL function mux definitions */

#define IOC_PC00_FUNC_CTL_GPIO_C_00            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PC00_FUNC_CTL_GPTMR1_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PC00_FUNC_CTL_UART0_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PC00_FUNC_CTL_MCAN0_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PC00_FUNC_CTL_ESC0_GPI_63          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PC00_FUNC_CTL_ESC0_GPO_00          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PC00_FUNC_CTL_PPI0_DQ_24           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PC00_FUNC_CTL_XPI0_CB_CS0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)

#define IOC_PC00_FUNC_CTL_PWM0_P_0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PC00_FUNC_CTL_TRGM_P_00            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PC00_FUNC_CTL_ESC0_GPI_15          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PC00_FUNC_CTL_OWR0_DAT             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(26)


/* IOC_PC01_FUNC_CTL function mux definitions */

#define IOC_PC01_FUNC_CTL_GPIO_C_01            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PC01_FUNC_CTL_GPTMR1_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PC01_FUNC_CTL_UART0_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PC01_FUNC_CTL_MCAN0_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PC01_FUNC_CTL_ESC0_GPI_62          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PC01_FUNC_CTL_ESC0_GPO_01          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PC01_FUNC_CTL_PPI0_DQ_25           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PC01_FUNC_CTL_XPI0_CB_D_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)

#define IOC_PC01_FUNC_CTL_PWM0_P_1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PC01_FUNC_CTL_TRGM_P_01            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PC01_FUNC_CTL_ESC0_GPI_14          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PC01_FUNC_CTL_OWR1_DAT             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(26)


/* IOC_PC02_FUNC_CTL function mux definitions */

#define IOC_PC02_FUNC_CTL_GPIO_C_02            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PC02_FUNC_CTL_GPTMR1_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PC02_FUNC_CTL_UART0_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PC02_FUNC_CTL_UART0_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)

#define IOC_PC02_FUNC_CTL_I2C2_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)

#define IOC_PC02_FUNC_CTL_MCAN0_STBY           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PC02_FUNC_CTL_ESC0_GPI_61          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PC02_FUNC_CTL_ESC0_GPO_02          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PC02_FUNC_CTL_PPI0_DQ_22           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PC02_FUNC_CTL_XPI0_CB_D_2          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)

#define IOC_PC02_FUNC_CTL_PWM0_P_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PC02_FUNC_CTL_TRGM_P_02            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PC02_FUNC_CTL_ESC0_GPI_13          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PC02_FUNC_CTL_QEI0_H1              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)


/* IOC_PC03_FUNC_CTL function mux definitions */

#define IOC_PC03_FUNC_CTL_GPIO_C_03            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PC03_FUNC_CTL_GPTMR1_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PC03_FUNC_CTL_UART0_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)

#define IOC_PC03_FUNC_CTL_I2C2_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)

#define IOC_PC03_FUNC_CTL_SPI1_CS_3            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PC03_FUNC_CTL_MCAN1_STBY           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PC03_FUNC_CTL_ESC0_GPI_60          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PC03_FUNC_CTL_ESC0_GPO_03          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PC03_FUNC_CTL_PPI0_DQ_26           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PC03_FUNC_CTL_XPI0_CB_D_3          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)

#define IOC_PC03_FUNC_CTL_PWM0_P_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PC03_FUNC_CTL_TRGM_P_03            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PC03_FUNC_CTL_ESC0_GPI_12          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PC03_FUNC_CTL_QEI0_F               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)


/* IOC_PC04_FUNC_CTL function mux definitions */

#define IOC_PC04_FUNC_CTL_GPIO_C_04            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PC04_FUNC_CTL_UART1_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)

#define IOC_PC04_FUNC_CTL_SPI0_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PC04_FUNC_CTL_MCAN1_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PC04_FUNC_CTL_ESC0_GPI_59          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PC04_FUNC_CTL_ESC0_GPO_04          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PC04_FUNC_CTL_PPI0_DQ_27           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PC04_FUNC_CTL_XPI0_CB_SCLK         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)

#define IOC_PC04_FUNC_CTL_PWM0_P_4             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PC04_FUNC_CTL_TRGM_P_04            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PC04_FUNC_CTL_ESC0_GPI_11          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PC04_FUNC_CTL_QEI0_H0              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)


/* IOC_PC05_FUNC_CTL function mux definitions */

#define IOC_PC05_FUNC_CTL_GPIO_C_05            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PC05_FUNC_CTL_GPTMR1_COMP_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PC05_FUNC_CTL_UART1_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PC05_FUNC_CTL_UART1_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)

#define IOC_PC05_FUNC_CTL_SPI0_CS_0            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PC05_FUNC_CTL_MCAN1_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PC05_FUNC_CTL_ESC0_GPI_58          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PC05_FUNC_CTL_ESC0_GPO_05          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PC05_FUNC_CTL_PPI0_DQ_28           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PC05_FUNC_CTL_XPI0_CA_CS0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)

#define IOC_PC05_FUNC_CTL_PWM0_P_5             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PC05_FUNC_CTL_TRGM_P_05            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PC05_FUNC_CTL_ESC0_GPI_10          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PC05_FUNC_CTL_QEI0_Z               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)

#define IOC_PC05_FUNC_CTL_QEO0_Z               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)


/* IOC_PC06_FUNC_CTL function mux definitions */

#define IOC_PC06_FUNC_CTL_GPIO_C_06            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PC06_FUNC_CTL_GPTMR0_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PC06_FUNC_CTL_UART1_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PC06_FUNC_CTL_I2C3_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)

#define IOC_PC06_FUNC_CTL_SPI0_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PC06_FUNC_CTL_ESC0_GPI_57          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PC06_FUNC_CTL_ESC0_GPO_06          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PC06_FUNC_CTL_PPI0_DQ_29           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PC06_FUNC_CTL_XPI0_CA_D_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)

#define IOC_PC06_FUNC_CTL_PWM0_P_6             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PC06_FUNC_CTL_TRGM_P_06            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PC06_FUNC_CTL_ESC0_GPI_09          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PC06_FUNC_CTL_QEI0_B               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)

#define IOC_PC06_FUNC_CTL_QEO0_B               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)


/* IOC_PC07_FUNC_CTL function mux definitions */

#define IOC_PC07_FUNC_CTL_GPIO_C_07            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PC07_FUNC_CTL_GPTMR0_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PC07_FUNC_CTL_UART1_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PC07_FUNC_CTL_I2C3_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)

#define IOC_PC07_FUNC_CTL_SPI0_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PC07_FUNC_CTL_ESC0_GPI_56          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PC07_FUNC_CTL_ESC0_GPO_07          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PC07_FUNC_CTL_PPI0_DQ_30           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PC07_FUNC_CTL_XPI0_CA_D_3          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)

#define IOC_PC07_FUNC_CTL_PWM0_P_7             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PC07_FUNC_CTL_TRGM_P_07            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PC07_FUNC_CTL_ESC0_GPI_08          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PC07_FUNC_CTL_QEI0_A               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)

#define IOC_PC07_FUNC_CTL_QEO0_A               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)


/* IOC_PC08_FUNC_CTL function mux definitions */

#define IOC_PC08_FUNC_CTL_GPIO_C_08            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PC08_FUNC_CTL_GPTMR0_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PC08_FUNC_CTL_UART2_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PC08_FUNC_CTL_I2C0_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)

#define IOC_PC08_FUNC_CTL_SPI1_CS_2            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PC08_FUNC_CTL_MCAN2_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PC08_FUNC_CTL_ESC0_GPI_55          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PC08_FUNC_CTL_ESC0_GPO_08          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PC08_FUNC_CTL_PPI0_DQ_31           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PC08_FUNC_CTL_XPI0_CA_SCLK         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)

#define IOC_PC08_FUNC_CTL_PWM1_P_0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PC08_FUNC_CTL_TRGM_P_08            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PC08_FUNC_CTL_ESC0_GPI_07          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)


/* IOC_PC09_FUNC_CTL function mux definitions */

#define IOC_PC09_FUNC_CTL_GPIO_C_09            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PC09_FUNC_CTL_GPTMR0_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PC09_FUNC_CTL_UART2_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PC09_FUNC_CTL_I2C0_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)

#define IOC_PC09_FUNC_CTL_SPI1_CS_1            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PC09_FUNC_CTL_MCAN2_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PC09_FUNC_CTL_ESC0_GPI_54          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PC09_FUNC_CTL_ESC0_GPO_09          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PC09_FUNC_CTL_PPI0_DQ_23           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PC09_FUNC_CTL_XPI0_CB_CS1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)

#define IOC_PC09_FUNC_CTL_PWM1_P_1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PC09_FUNC_CTL_TRGM_P_09            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PC09_FUNC_CTL_ESC0_GPI_06          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PC09_FUNC_CTL_QEI1_H1              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)

#define IOC_PC09_FUNC_CTL_ESC0_CTR_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(27)


/* IOC_PC10_FUNC_CTL function mux definitions */

#define IOC_PC10_FUNC_CTL_GPIO_C_10            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PC10_FUNC_CTL_GPTMR0_COMP_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PC10_FUNC_CTL_UART2_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PC10_FUNC_CTL_UART2_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)

#define IOC_PC10_FUNC_CTL_SPI1_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PC10_FUNC_CTL_MCAN2_STBY           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PC10_FUNC_CTL_ESC0_GPI_53          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PC10_FUNC_CTL_ESC0_GPO_10          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PC10_FUNC_CTL_PPI0_DQ_20           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PC10_FUNC_CTL_XPI0_CB_D_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)

#define IOC_PC10_FUNC_CTL_PWM1_P_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PC10_FUNC_CTL_TRGM_P_10            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PC10_FUNC_CTL_ESC0_GPI_05          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PC10_FUNC_CTL_QEI1_F               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)

#define IOC_PC10_FUNC_CTL_ESC0_CTR_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(27)


/* IOC_PC11_FUNC_CTL function mux definitions */

#define IOC_PC11_FUNC_CTL_GPIO_C_11            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PC11_FUNC_CTL_UART2_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)

#define IOC_PC11_FUNC_CTL_SPI1_CS_0            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PC11_FUNC_CTL_ESC0_GPI_52          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PC11_FUNC_CTL_ESC0_GPO_11          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PC11_FUNC_CTL_PPI0_DQ_21           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PC11_FUNC_CTL_XPI0_CB_DQS          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)

#define IOC_PC11_FUNC_CTL_PWM1_P_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PC11_FUNC_CTL_TRGM_P_11            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PC11_FUNC_CTL_ESC0_GPI_04          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PC11_FUNC_CTL_QEI1_H0              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)

#define IOC_PC11_FUNC_CTL_ESC0_CTR_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(27)


/* IOC_PC12_FUNC_CTL function mux definitions */

#define IOC_PC12_FUNC_CTL_GPIO_C_12            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PC12_FUNC_CTL_UART3_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)

#define IOC_PC12_FUNC_CTL_I2C1_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)

#define IOC_PC12_FUNC_CTL_SPI1_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PC12_FUNC_CTL_ESC0_GPI_51          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PC12_FUNC_CTL_ESC0_GPO_12          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PC12_FUNC_CTL_PPI0_DM_2            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PC12_FUNC_CTL_XPI0_CA_D_2          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)

#define IOC_PC12_FUNC_CTL_PWM1_P_4             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PC12_FUNC_CTL_TRGM_P_12            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PC12_FUNC_CTL_ESC0_GPI_03          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PC12_FUNC_CTL_QEI1_Z               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)

#define IOC_PC12_FUNC_CTL_QEO1_Z               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)

#define IOC_PC12_FUNC_CTL_ESC0_CTR_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(27)


/* IOC_PC13_FUNC_CTL function mux definitions */

#define IOC_PC13_FUNC_CTL_GPIO_C_13            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PC13_FUNC_CTL_GPTMR1_COMP_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PC13_FUNC_CTL_UART3_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PC13_FUNC_CTL_UART3_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)

#define IOC_PC13_FUNC_CTL_I2C1_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)

#define IOC_PC13_FUNC_CTL_SPI1_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PC13_FUNC_CTL_MCAN3_STBY           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PC13_FUNC_CTL_ESC0_GPI_50          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PC13_FUNC_CTL_ESC0_GPO_13          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PC13_FUNC_CTL_PPI0_DQ_18           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PC13_FUNC_CTL_XPI0_CA_CS1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)

#define IOC_PC13_FUNC_CTL_PWM1_P_5             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PC13_FUNC_CTL_TRGM_P_13            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PC13_FUNC_CTL_ESC0_GPI_02          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PC13_FUNC_CTL_QEI1_A               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)

#define IOC_PC13_FUNC_CTL_QEO1_A               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)

#define IOC_PC13_FUNC_CTL_ESC0_CTR_4           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(27)


/* IOC_PC14_FUNC_CTL function mux definitions */

#define IOC_PC14_FUNC_CTL_GPIO_C_14            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PC14_FUNC_CTL_UART3_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PC14_FUNC_CTL_SPI1_DAT2            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PC14_FUNC_CTL_MCAN3_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PC14_FUNC_CTL_ESC0_GPI_49          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PC14_FUNC_CTL_ESC0_GPO_14          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PC14_FUNC_CTL_PPI0_DQ_19           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PC14_FUNC_CTL_PWM1_P_6             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PC14_FUNC_CTL_TRGM_P_14            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PC14_FUNC_CTL_ESC0_GPI_01          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PC14_FUNC_CTL_QEI1_B               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)

#define IOC_PC14_FUNC_CTL_QEO1_B               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)

#define IOC_PC14_FUNC_CTL_ESC0_CTR_5           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(27)


/* IOC_PC15_FUNC_CTL function mux definitions */

#define IOC_PC15_FUNC_CTL_GPIO_C_15            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PC15_FUNC_CTL_GPTMR0_COMP_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PC15_FUNC_CTL_UART3_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PC15_FUNC_CTL_SPI1_DAT3            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PC15_FUNC_CTL_MCAN3_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PC15_FUNC_CTL_ESC0_GPI_48          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PC15_FUNC_CTL_ESC0_GPO_15          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PC15_FUNC_CTL_PPI0_DM_3            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PC15_FUNC_CTL_XPI0_CA_D_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)

#define IOC_PC15_FUNC_CTL_PWM1_P_7             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PC15_FUNC_CTL_TRGM_P_15            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PC15_FUNC_CTL_ESC0_GPI_00          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PC15_FUNC_CTL_ESC0_CTR_6           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(27)


/* IOC_PC16_FUNC_CTL function mux definitions */

#define IOC_PC16_FUNC_CTL_GPIO_C_16            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PC16_FUNC_CTL_GPTMR3_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PC16_FUNC_CTL_UART4_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PC16_FUNC_CTL_ESC0_GPI_47          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PC16_FUNC_CTL_ESC0_GPO_16          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PC16_FUNC_CTL_PPI0_DQ_16           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PC16_FUNC_CTL_XPI0_CA_DQS          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)

#define IOC_PC16_FUNC_CTL_ESC0_CTR_7           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(27)


/* IOC_PC17_FUNC_CTL function mux definitions */

#define IOC_PC17_FUNC_CTL_GPIO_C_17            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PC17_FUNC_CTL_GPTMR3_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PC17_FUNC_CTL_UART4_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PC17_FUNC_CTL_ESC0_GPI_46          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PC17_FUNC_CTL_ESC0_GPO_17          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PC17_FUNC_CTL_PPI0_DQ_17           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PC17_FUNC_CTL_ESC0_CTR_8           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(27)


/* IOC_PC18_FUNC_CTL function mux definitions */

#define IOC_PC18_FUNC_CTL_GPIO_C_18            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PC18_FUNC_CTL_GPTMR3_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PC18_FUNC_CTL_UART4_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PC18_FUNC_CTL_UART4_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)

#define IOC_PC18_FUNC_CTL_ESC0_GPI_45          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PC18_FUNC_CTL_ESC0_GPO_18          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PC18_FUNC_CTL_PPI0_DQ_04           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PC18_FUNC_CTL_ESC0_CTR_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)


/* IOC_PC19_FUNC_CTL function mux definitions */

#define IOC_PC19_FUNC_CTL_GPIO_C_19            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PC19_FUNC_CTL_GPTMR3_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PC19_FUNC_CTL_UART4_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)

#define IOC_PC19_FUNC_CTL_SPI2_CS_3            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PC19_FUNC_CTL_ESC0_GPI_44          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PC19_FUNC_CTL_ESC0_GPO_19          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PC19_FUNC_CTL_PPI0_DQ_05           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PC19_FUNC_CTL_ESC0_CTR_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)


/* IOC_PC20_FUNC_CTL function mux definitions */

#define IOC_PC20_FUNC_CTL_GPIO_C_20            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PC20_FUNC_CTL_UART5_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)

#define IOC_PC20_FUNC_CTL_SPI3_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PC20_FUNC_CTL_ESC0_GPI_43          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PC20_FUNC_CTL_ESC0_GPO_20          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PC20_FUNC_CTL_PPI0_DQ_06           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PC20_FUNC_CTL_ESC0_CTR_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)


/* IOC_PC21_FUNC_CTL function mux definitions */

#define IOC_PC21_FUNC_CTL_GPIO_C_21            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PC21_FUNC_CTL_GPTMR3_COMP_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PC21_FUNC_CTL_UART5_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PC21_FUNC_CTL_UART5_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)

#define IOC_PC21_FUNC_CTL_SPI3_CS_0            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PC21_FUNC_CTL_ESC0_GPI_42          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PC21_FUNC_CTL_ESC0_GPO_21          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PC21_FUNC_CTL_PPI0_DQ_07           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PC21_FUNC_CTL_ESC0_CTR_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PC21_FUNC_CTL_QEO1_Z               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)


/* IOC_PC22_FUNC_CTL function mux definitions */

#define IOC_PC22_FUNC_CTL_GPIO_C_22            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PC22_FUNC_CTL_GPTMR2_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PC22_FUNC_CTL_UART5_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PC22_FUNC_CTL_SPI3_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PC22_FUNC_CTL_ESC0_GPI_41          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PC22_FUNC_CTL_ESC0_GPO_22          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PC22_FUNC_CTL_PPI0_CTR_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PC22_FUNC_CTL_QEO1_B               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)


/* IOC_PC23_FUNC_CTL function mux definitions */

#define IOC_PC23_FUNC_CTL_GPIO_C_23            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PC23_FUNC_CTL_GPTMR2_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PC23_FUNC_CTL_UART5_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PC23_FUNC_CTL_SPI3_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PC23_FUNC_CTL_ESC0_GPI_40          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PC23_FUNC_CTL_ESC0_GPO_23          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PC23_FUNC_CTL_PPI0_DQ_08           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PC23_FUNC_CTL_QEO1_A               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)


/* IOC_PC24_FUNC_CTL function mux definitions */

#define IOC_PC24_FUNC_CTL_GPIO_C_24            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PC24_FUNC_CTL_GPTMR2_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PC24_FUNC_CTL_UART6_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PC24_FUNC_CTL_SPI2_CS_2            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PC24_FUNC_CTL_ESC0_GPI_39          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PC24_FUNC_CTL_ESC0_GPO_24          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PC24_FUNC_CTL_PPI0_DQ_09           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)


/* IOC_PC25_FUNC_CTL function mux definitions */

#define IOC_PC25_FUNC_CTL_GPIO_C_25            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PC25_FUNC_CTL_GPTMR2_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PC25_FUNC_CTL_UART6_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PC25_FUNC_CTL_SPI2_CS_1            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PC25_FUNC_CTL_ESC0_GPI_38          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PC25_FUNC_CTL_ESC0_GPO_25          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PC25_FUNC_CTL_PPI0_DQ_11           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)


/* IOC_PC26_FUNC_CTL function mux definitions */

#define IOC_PC26_FUNC_CTL_GPIO_C_26            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PC26_FUNC_CTL_GPTMR2_COMP_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PC26_FUNC_CTL_UART6_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PC26_FUNC_CTL_UART6_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)

#define IOC_PC26_FUNC_CTL_SPI2_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PC26_FUNC_CTL_ESC0_GPI_37          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PC26_FUNC_CTL_ESC0_GPO_26          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PC26_FUNC_CTL_PPI0_DQ_12           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PC26_FUNC_CTL_QEI1_H1              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)


/* IOC_PC27_FUNC_CTL function mux definitions */

#define IOC_PC27_FUNC_CTL_GPIO_C_27            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PC27_FUNC_CTL_UART6_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)

#define IOC_PC27_FUNC_CTL_SPI2_CS_0            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PC27_FUNC_CTL_ESC0_GPI_36          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PC27_FUNC_CTL_ESC0_GPO_27          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PC27_FUNC_CTL_PPI0_CTR_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PC27_FUNC_CTL_ESC0_CTR_4           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PC27_FUNC_CTL_QEI1_F               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)


/* IOC_PC28_FUNC_CTL function mux definitions */

#define IOC_PC28_FUNC_CTL_GPIO_C_28            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PC28_FUNC_CTL_UART7_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)

#define IOC_PC28_FUNC_CTL_SPI2_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PC28_FUNC_CTL_ESC0_GPI_35          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PC28_FUNC_CTL_ESC0_GPO_28          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PC28_FUNC_CTL_PPI0_DM_0            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PC28_FUNC_CTL_ESC0_CTR_5           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PC28_FUNC_CTL_QEI1_H0              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)


/* IOC_PC29_FUNC_CTL function mux definitions */

#define IOC_PC29_FUNC_CTL_GPIO_C_29            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PC29_FUNC_CTL_GPTMR3_COMP_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PC29_FUNC_CTL_UART7_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PC29_FUNC_CTL_UART7_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)

#define IOC_PC29_FUNC_CTL_SPI2_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PC29_FUNC_CTL_ESC0_GPI_34          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PC29_FUNC_CTL_ESC0_GPO_29          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PC29_FUNC_CTL_PPI0_CLK             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PC29_FUNC_CTL_ESC0_CTR_6           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PC29_FUNC_CTL_QEI1_Z               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)

#define IOC_PC29_FUNC_CTL_SOC_REF0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)


/* IOC_PC30_FUNC_CTL function mux definitions */

#define IOC_PC30_FUNC_CTL_GPIO_C_30            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PC30_FUNC_CTL_UART7_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PC30_FUNC_CTL_SPI2_DAT2            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PC30_FUNC_CTL_ESC0_GPI_33          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PC30_FUNC_CTL_ESC0_GPO_30          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PC30_FUNC_CTL_PPI0_CS_0            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PC30_FUNC_CTL_ESC0_CTR_7           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PC30_FUNC_CTL_QEI1_A               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)

#define IOC_PC30_FUNC_CTL_SOC_REF1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)


/* IOC_PC31_FUNC_CTL function mux definitions */

#define IOC_PC31_FUNC_CTL_GPIO_C_31            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PC31_FUNC_CTL_GPTMR2_COMP_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PC31_FUNC_CTL_UART7_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PC31_FUNC_CTL_SPI2_DAT3            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PC31_FUNC_CTL_ESC0_GPI_32          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PC31_FUNC_CTL_ESC0_GPO_31          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PC31_FUNC_CTL_PPI0_CS_1            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PC31_FUNC_CTL_ESC0_CTR_8           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PC31_FUNC_CTL_QEI1_B               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)


/* IOC_PD00_FUNC_CTL function mux definitions */

#define IOC_PD00_FUNC_CTL_GPIO_D_00            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PD00_FUNC_CTL_MCAN0_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PD00_FUNC_CTL_ESC0_GPI_31          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PD00_FUNC_CTL_ESC0_GPO_32          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PD00_FUNC_CTL_PPI0_DQ_02           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PD00_FUNC_CTL_PWM0_P_0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PD00_FUNC_CTL_TRGM_P_00            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PD00_FUNC_CTL_ESC0_REFCK           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PD00_FUNC_CTL_ESC0_CTR_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(27)


/* IOC_PD01_FUNC_CTL function mux definitions */

#define IOC_PD01_FUNC_CTL_GPIO_D_01            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PD01_FUNC_CTL_MCAN0_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PD01_FUNC_CTL_ESC0_GPI_30          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PD01_FUNC_CTL_ESC0_GPO_33          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PD01_FUNC_CTL_PPI0_DQ_03           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PD01_FUNC_CTL_PWM0_P_1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PD01_FUNC_CTL_TRGM_P_01            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PD01_FUNC_CTL_ESC0_REFCK           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PD01_FUNC_CTL_ESC0_CTR_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(27)


/* IOC_PD02_FUNC_CTL function mux definitions */

#define IOC_PD02_FUNC_CTL_GPIO_D_02            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PD02_FUNC_CTL_I2C2_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)

#define IOC_PD02_FUNC_CTL_MCAN0_STBY           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PD02_FUNC_CTL_ESC0_GPI_29          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PD02_FUNC_CTL_ESC0_GPO_34          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PD02_FUNC_CTL_PPI0_DQ_00           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PD02_FUNC_CTL_PWM0_P_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PD02_FUNC_CTL_TRGM_P_02            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PD02_FUNC_CTL_ESC0_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PD02_FUNC_CTL_QEI0_H1              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)

#define IOC_PD02_FUNC_CTL_EWDG1_RST            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)

#define IOC_PD02_FUNC_CTL_ESC0_CTR_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(27)


/* IOC_PD03_FUNC_CTL function mux definitions */

#define IOC_PD03_FUNC_CTL_GPIO_D_03            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PD03_FUNC_CTL_I2C2_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)

#define IOC_PD03_FUNC_CTL_MCAN1_STBY           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PD03_FUNC_CTL_ESC0_GPI_28          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PD03_FUNC_CTL_ESC0_GPO_35          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PD03_FUNC_CTL_PPI0_DQ_01           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PD03_FUNC_CTL_PWM0_P_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PD03_FUNC_CTL_TRGM_P_03            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PD03_FUNC_CTL_ESC0_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PD03_FUNC_CTL_QEI0_F               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)

#define IOC_PD03_FUNC_CTL_ESC0_CTR_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(27)


/* IOC_PD04_FUNC_CTL function mux definitions */

#define IOC_PD04_FUNC_CTL_GPIO_D_04            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PD04_FUNC_CTL_MCAN1_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PD04_FUNC_CTL_ESC0_GPI_27          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PD04_FUNC_CTL_ESC0_GPO_36          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PD04_FUNC_CTL_PPI0_DQ_10           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PD04_FUNC_CTL_PWM0_P_4             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PD04_FUNC_CTL_TRGM_P_04            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PD04_FUNC_CTL_QEI0_H0              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)

#define IOC_PD04_FUNC_CTL_ESC0_CTR_4           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(27)


/* IOC_PD05_FUNC_CTL function mux definitions */

#define IOC_PD05_FUNC_CTL_GPIO_D_05            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PD05_FUNC_CTL_MCAN1_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PD05_FUNC_CTL_ESC0_GPI_26          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PD05_FUNC_CTL_ESC0_GPO_37          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PD05_FUNC_CTL_PPI0_DQ_13           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PD05_FUNC_CTL_PWM0_P_5             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PD05_FUNC_CTL_TRGM_P_05            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PD05_FUNC_CTL_QEI0_Z               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)

#define IOC_PD05_FUNC_CTL_QEO0_Z               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)

#define IOC_PD05_FUNC_CTL_ESC0_CTR_5           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(27)


/* IOC_PD06_FUNC_CTL function mux definitions */

#define IOC_PD06_FUNC_CTL_GPIO_D_06            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PD06_FUNC_CTL_I2C3_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)

#define IOC_PD06_FUNC_CTL_ESC0_GPI_25          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PD06_FUNC_CTL_ESC0_GPO_38          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PD06_FUNC_CTL_PPI0_DQ_14           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PD06_FUNC_CTL_PWM0_P_6             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PD06_FUNC_CTL_TRGM_P_06            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PD06_FUNC_CTL_QEI0_B               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)

#define IOC_PD06_FUNC_CTL_QEO0_B               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)

#define IOC_PD06_FUNC_CTL_ESC0_CTR_6           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(27)


/* IOC_PD07_FUNC_CTL function mux definitions */

#define IOC_PD07_FUNC_CTL_GPIO_D_07            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PD07_FUNC_CTL_I2C3_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)

#define IOC_PD07_FUNC_CTL_ESC0_GPI_24          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PD07_FUNC_CTL_ESC0_GPO_39          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PD07_FUNC_CTL_PPI0_CTR_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PD07_FUNC_CTL_PWM0_P_7             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PD07_FUNC_CTL_TRGM_P_07            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PD07_FUNC_CTL_QEI0_A               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)

#define IOC_PD07_FUNC_CTL_QEO0_A               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)

#define IOC_PD07_FUNC_CTL_ESC0_CTR_7           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(27)


/* IOC_PD08_FUNC_CTL function mux definitions */

#define IOC_PD08_FUNC_CTL_GPIO_D_08            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PD08_FUNC_CTL_I2C0_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)

#define IOC_PD08_FUNC_CTL_MCAN2_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PD08_FUNC_CTL_ESC0_GPI_23          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PD08_FUNC_CTL_ESC0_GPO_40          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PD08_FUNC_CTL_PPI0_CS_3            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PD08_FUNC_CTL_PWM1_P_0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PD08_FUNC_CTL_TRGM_P_08            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PD08_FUNC_CTL_ESC0_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PD08_FUNC_CTL_ESC0_CTR_8           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(27)


/* IOC_PD09_FUNC_CTL function mux definitions */

#define IOC_PD09_FUNC_CTL_GPIO_D_09            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PD09_FUNC_CTL_I2C0_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)

#define IOC_PD09_FUNC_CTL_MCAN2_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PD09_FUNC_CTL_ESC0_GPI_22          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PD09_FUNC_CTL_ESC0_GPO_41          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PD09_FUNC_CTL_PWM1_P_1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PD09_FUNC_CTL_TRGM_P_09            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PD09_FUNC_CTL_ESC0_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)


/* IOC_PD10_FUNC_CTL function mux definitions */

#define IOC_PD10_FUNC_CTL_GPIO_D_10            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PD10_FUNC_CTL_MCAN2_STBY           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PD10_FUNC_CTL_ESC0_GPI_21          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PD10_FUNC_CTL_ESC0_GPO_42          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PD10_FUNC_CTL_PPI0_CTR_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PD10_FUNC_CTL_PWM1_P_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PD10_FUNC_CTL_TRGM_P_10            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)


/* IOC_PD11_FUNC_CTL function mux definitions */

#define IOC_PD11_FUNC_CTL_GPIO_D_11            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PD11_FUNC_CTL_ESC0_GPI_20          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PD11_FUNC_CTL_ESC0_GPO_43          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PD11_FUNC_CTL_PPI0_CS_2            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PD11_FUNC_CTL_PWM1_P_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PD11_FUNC_CTL_TRGM_P_11            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)


/* IOC_PD12_FUNC_CTL function mux definitions */

#define IOC_PD12_FUNC_CTL_GPIO_D_12            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PD12_FUNC_CTL_I2C1_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)

#define IOC_PD12_FUNC_CTL_ESC0_GPI_19          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PD12_FUNC_CTL_ESC0_GPO_44          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PD12_FUNC_CTL_PPI0_DQ_15           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PD12_FUNC_CTL_PWM1_P_4             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PD12_FUNC_CTL_TRGM_P_12            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)


/* IOC_PD13_FUNC_CTL function mux definitions */

#define IOC_PD13_FUNC_CTL_GPIO_D_13            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PD13_FUNC_CTL_I2C1_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)

#define IOC_PD13_FUNC_CTL_MCAN3_STBY           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PD13_FUNC_CTL_ESC0_GPI_18          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PD13_FUNC_CTL_ESC0_GPO_45          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PD13_FUNC_CTL_PPI0_DM_1            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PD13_FUNC_CTL_PWM1_P_5             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PD13_FUNC_CTL_TRGM_P_13            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)


/* IOC_PD14_FUNC_CTL function mux definitions */

#define IOC_PD14_FUNC_CTL_GPIO_D_14            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PD14_FUNC_CTL_MCAN3_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PD14_FUNC_CTL_ESC0_GPI_17          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PD14_FUNC_CTL_ESC0_GPO_46          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PD14_FUNC_CTL_PPI0_DQ_08           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PD14_FUNC_CTL_PWM1_P_6             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PD14_FUNC_CTL_TRGM_P_14            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PD14_FUNC_CTL_ESC0_REFCK           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PD14_FUNC_CTL_SYSCTL_CLK_OBS_3     IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)


/* IOC_PD15_FUNC_CTL function mux definitions */

#define IOC_PD15_FUNC_CTL_GPIO_D_15            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PD15_FUNC_CTL_MCAN3_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PD15_FUNC_CTL_ESC0_GPI_16          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PD15_FUNC_CTL_ESC0_GPO_47          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PD15_FUNC_CTL_PPI0_DM_1            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PD15_FUNC_CTL_PWM1_P_7             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PD15_FUNC_CTL_TRGM_P_15            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PD15_FUNC_CTL_ESC0_REFCK           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PD15_FUNC_CTL_SYSCTL_CLK_OBS_2     IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)


/* IOC_PD16_FUNC_CTL function mux definitions */

#define IOC_PD16_FUNC_CTL_GPIO_D_16            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PD16_FUNC_CTL_ESC0_GPI_15          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PD16_FUNC_CTL_ESC0_GPO_48          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PD16_FUNC_CTL_PPI0_DQ_10           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PD16_FUNC_CTL_ESC0_GPO_00          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PD16_FUNC_CTL_SYSCTL_CLK_OBS_0     IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)

#define IOC_PD16_FUNC_CTL_ESC0_P2_RXDV         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(27)


/* IOC_PD17_FUNC_CTL function mux definitions */

#define IOC_PD17_FUNC_CTL_GPIO_D_17            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PD17_FUNC_CTL_ESC0_GPI_14          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PD17_FUNC_CTL_ESC0_GPO_49          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PD17_FUNC_CTL_PPI0_DQ_09           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PD17_FUNC_CTL_ESC0_GPO_01          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PD17_FUNC_CTL_SYSCTL_CLK_OBS_1     IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)

#define IOC_PD17_FUNC_CTL_ESC0_P2_RXD_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(27)


/* IOC_PD18_FUNC_CTL function mux definitions */

#define IOC_PD18_FUNC_CTL_GPIO_D_18            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PD18_FUNC_CTL_ESC0_GPI_13          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PD18_FUNC_CTL_ESC0_GPO_50          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PD18_FUNC_CTL_PPI0_DQ_12           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PD18_FUNC_CTL_ESC0_GPO_02          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PD18_FUNC_CTL_ESC0_P2_RXD_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(27)


/* IOC_PD19_FUNC_CTL function mux definitions */

#define IOC_PD19_FUNC_CTL_GPIO_D_19            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PD19_FUNC_CTL_ESC0_GPI_12          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PD19_FUNC_CTL_ESC0_GPO_51          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PD19_FUNC_CTL_PPI0_DQ_11           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PD19_FUNC_CTL_ESC0_GPO_03          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PD19_FUNC_CTL_ESC0_P2_RXD_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(27)


/* IOC_PD20_FUNC_CTL function mux definitions */

#define IOC_PD20_FUNC_CTL_GPIO_D_20            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PD20_FUNC_CTL_ESC0_GPI_11          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PD20_FUNC_CTL_ESC0_GPO_52          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PD20_FUNC_CTL_PPI0_DQ_14           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PD20_FUNC_CTL_ESC0_GPO_04          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PD20_FUNC_CTL_ESC0_P2_RXD_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(27)


/* IOC_PD21_FUNC_CTL function mux definitions */

#define IOC_PD21_FUNC_CTL_GPIO_D_21            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PD21_FUNC_CTL_ESC0_GPI_10          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PD21_FUNC_CTL_ESC0_GPO_53          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PD21_FUNC_CTL_PPI0_DQ_13           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PD21_FUNC_CTL_ESC0_GPO_05          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PD21_FUNC_CTL_QEO1_Z               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)

#define IOC_PD21_FUNC_CTL_ESC0_P2_RXCK         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(27)


/* IOC_PD22_FUNC_CTL function mux definitions */

#define IOC_PD22_FUNC_CTL_GPIO_D_22            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PD22_FUNC_CTL_ESC0_GPI_09          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PD22_FUNC_CTL_ESC0_GPO_54          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PD22_FUNC_CTL_PPI0_DQ_15           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PD22_FUNC_CTL_ESC0_GPO_06          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PD22_FUNC_CTL_QEO1_B               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)

#define IOC_PD22_FUNC_CTL_ESC0_P2_RXER         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(27)


/* IOC_PD23_FUNC_CTL function mux definitions */

#define IOC_PD23_FUNC_CTL_GPIO_D_23            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PD23_FUNC_CTL_ESC0_GPI_08          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PD23_FUNC_CTL_ESC0_GPO_55          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PD23_FUNC_CTL_PPI0_DM_0            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PD23_FUNC_CTL_ESC0_GPO_07          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PD23_FUNC_CTL_QEO1_A               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)

#define IOC_PD23_FUNC_CTL_ESC0_P2_TXCK         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(27)


/* IOC_PD24_FUNC_CTL function mux definitions */

#define IOC_PD24_FUNC_CTL_GPIO_D_24            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PD24_FUNC_CTL_ESC0_GPI_07          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PD24_FUNC_CTL_ESC0_GPO_56          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PD24_FUNC_CTL_PPI0_DQ_06           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PD24_FUNC_CTL_ESC0_GPO_08          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PD24_FUNC_CTL_SDM0_DAT_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(23)

#define IOC_PD24_FUNC_CTL_ESC0_P2_TXD_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(27)


/* IOC_PD25_FUNC_CTL function mux definitions */

#define IOC_PD25_FUNC_CTL_GPIO_D_25            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PD25_FUNC_CTL_ESC0_GPI_06          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PD25_FUNC_CTL_ESC0_GPO_57          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PD25_FUNC_CTL_PPI0_DQ_07           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PD25_FUNC_CTL_ESC0_GPO_09          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PD25_FUNC_CTL_SDM0_CLK_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(23)

#define IOC_PD25_FUNC_CTL_OWR0_DAT             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(26)

#define IOC_PD25_FUNC_CTL_ESC0_P2_TXD_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(27)


/* IOC_PD26_FUNC_CTL function mux definitions */

#define IOC_PD26_FUNC_CTL_GPIO_D_26            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PD26_FUNC_CTL_ESC0_GPI_05          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PD26_FUNC_CTL_ESC0_GPO_58          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PD26_FUNC_CTL_PPI0_DQ_05           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PD26_FUNC_CTL_ESC0_GPO_10          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PD26_FUNC_CTL_QEI1_H1              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)

#define IOC_PD26_FUNC_CTL_SDM0_CLK_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(23)

#define IOC_PD26_FUNC_CTL_OWR1_DAT             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(26)

#define IOC_PD26_FUNC_CTL_ESC0_P2_TXD_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(27)


/* IOC_PD27_FUNC_CTL function mux definitions */

#define IOC_PD27_FUNC_CTL_GPIO_D_27            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PD27_FUNC_CTL_ESC0_GPI_04          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PD27_FUNC_CTL_ESC0_GPO_59          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PD27_FUNC_CTL_PPI0_DQ_04           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PD27_FUNC_CTL_ESC0_GPO_11          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PD27_FUNC_CTL_QEI1_F               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)

#define IOC_PD27_FUNC_CTL_SDM0_DAT_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(23)

#define IOC_PD27_FUNC_CTL_ESC0_P2_TXD_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(27)


/* IOC_PD28_FUNC_CTL function mux definitions */

#define IOC_PD28_FUNC_CTL_GPIO_D_28            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PD28_FUNC_CTL_ESC0_GPI_03          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PD28_FUNC_CTL_ESC0_GPO_60          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PD28_FUNC_CTL_PPI0_DQ_03           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PD28_FUNC_CTL_ESC0_GPO_12          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PD28_FUNC_CTL_QEI1_H0              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)

#define IOC_PD28_FUNC_CTL_SDM0_CLK_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(23)

#define IOC_PD28_FUNC_CTL_ESC0_P2_TXEN         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(27)


/* IOC_PD29_FUNC_CTL function mux definitions */

#define IOC_PD29_FUNC_CTL_GPIO_D_29            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PD29_FUNC_CTL_ESC0_GPI_02          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PD29_FUNC_CTL_ESC0_GPO_61          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PD29_FUNC_CTL_PPI0_DQ_02           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PD29_FUNC_CTL_ESC0_GPO_13          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PD29_FUNC_CTL_QEI1_Z               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)

#define IOC_PD29_FUNC_CTL_SDM0_DAT_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(23)

#define IOC_PD29_FUNC_CTL_ESC0_REFCK           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(27)


/* IOC_PD30_FUNC_CTL function mux definitions */

#define IOC_PD30_FUNC_CTL_GPIO_D_30            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PD30_FUNC_CTL_ESC0_GPI_01          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PD30_FUNC_CTL_ESC0_GPO_62          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PD30_FUNC_CTL_PPI0_DQ_01           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PD30_FUNC_CTL_ESC0_GPO_14          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PD30_FUNC_CTL_QEI1_A               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)

#define IOC_PD30_FUNC_CTL_SDM0_CLK_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(23)

#define IOC_PD30_FUNC_CTL_ESC0_MDIO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(27)


/* IOC_PD31_FUNC_CTL function mux definitions */

#define IOC_PD31_FUNC_CTL_GPIO_D_31            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PD31_FUNC_CTL_ESC0_GPI_00          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(10)

#define IOC_PD31_FUNC_CTL_ESC0_GPO_63          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PD31_FUNC_CTL_PPI0_DQ_00           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PD31_FUNC_CTL_ESC0_GPO_15          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PD31_FUNC_CTL_QEI1_B               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)

#define IOC_PD31_FUNC_CTL_SDM0_DAT_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(23)

#define IOC_PD31_FUNC_CTL_ESC0_MDC             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(27)


/* IOC_PE00_FUNC_CTL function mux definitions */

#define IOC_PE00_FUNC_CTL_GPIO_E_00            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PE00_FUNC_CTL_GPTMR1_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PE00_FUNC_CTL_UART0_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PE00_FUNC_CTL_MCAN0_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PE00_FUNC_CTL_ESC0_CTR_4           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PE00_FUNC_CTL_PPI0_CTR_4           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PE00_FUNC_CTL_PWM0_P_0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PE00_FUNC_CTL_TRGM_P_00            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PE00_FUNC_CTL_QEO1_A               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)

#define IOC_PE00_FUNC_CTL_USB0_ID              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)

#define IOC_PE00_FUNC_CTL_ETH0_EVTO_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(25)

#define IOC_PE00_FUNC_CTL_ESC0_EVTO_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(27)


/* IOC_PE01_FUNC_CTL function mux definitions */

#define IOC_PE01_FUNC_CTL_GPIO_E_01            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PE01_FUNC_CTL_GPTMR1_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PE01_FUNC_CTL_UART0_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PE01_FUNC_CTL_MCAN0_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PE01_FUNC_CTL_ESC0_CTR_5           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PE01_FUNC_CTL_PPI0_CTR_5           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PE01_FUNC_CTL_PWM0_P_1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PE01_FUNC_CTL_TRGM_P_01            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PE01_FUNC_CTL_QEO1_B               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)

#define IOC_PE01_FUNC_CTL_USB0_PWR             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)


/* IOC_PE02_FUNC_CTL function mux definitions */

#define IOC_PE02_FUNC_CTL_GPIO_E_02            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PE02_FUNC_CTL_GPTMR1_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PE02_FUNC_CTL_UART0_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PE02_FUNC_CTL_UART0_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)

#define IOC_PE02_FUNC_CTL_I2C2_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)

#define IOC_PE02_FUNC_CTL_MCAN0_STBY           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PE02_FUNC_CTL_ESC0_CTR_6           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PE02_FUNC_CTL_PPI0_CTR_6           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PE02_FUNC_CTL_PWM0_P_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PE02_FUNC_CTL_TRGM_P_02            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PE02_FUNC_CTL_QEO1_Z               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)


/* IOC_PE03_FUNC_CTL function mux definitions */

#define IOC_PE03_FUNC_CTL_GPIO_E_03            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PE03_FUNC_CTL_GPTMR1_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PE03_FUNC_CTL_UART0_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)

#define IOC_PE03_FUNC_CTL_I2C2_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)

#define IOC_PE03_FUNC_CTL_MCAN1_STBY           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PE03_FUNC_CTL_ESC0_CTR_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PE03_FUNC_CTL_PPI0_CTR_7           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(13)

#define IOC_PE03_FUNC_CTL_PWM0_P_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PE03_FUNC_CTL_TRGM_P_03            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PE03_FUNC_CTL_USB0_OC              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)


/* IOC_PE04_FUNC_CTL function mux definitions */

#define IOC_PE04_FUNC_CTL_GPIO_E_04            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PE04_FUNC_CTL_UART1_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)

#define IOC_PE04_FUNC_CTL_MCAN1_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PE04_FUNC_CTL_ESC0_CTR_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PE04_FUNC_CTL_PWM0_P_4             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PE04_FUNC_CTL_TRGM_P_04            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PE04_FUNC_CTL_ETH0_COL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PE04_FUNC_CTL_ETH0_EVTI_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(25)

#define IOC_PE04_FUNC_CTL_ESC0_EVTI_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(27)


/* IOC_PE05_FUNC_CTL function mux definitions */

#define IOC_PE05_FUNC_CTL_GPIO_E_05            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PE05_FUNC_CTL_GPTMR1_COMP_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PE05_FUNC_CTL_UART1_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PE05_FUNC_CTL_UART1_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)

#define IOC_PE05_FUNC_CTL_MCAN1_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PE05_FUNC_CTL_ESC0_CTR_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PE05_FUNC_CTL_PWM0_P_5             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PE05_FUNC_CTL_TRGM_P_05            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PE05_FUNC_CTL_ETH0_CRS             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)


/* IOC_PF00_FUNC_CTL function mux definitions */

#define IOC_PF00_FUNC_CTL_GPIO_F_00            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PF00_FUNC_CTL_MCAN0_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PF00_FUNC_CTL_ESC0_MDC             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PF00_FUNC_CTL_PWM0_P_0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PF00_FUNC_CTL_TRGM_P_00            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PF00_FUNC_CTL_ETH0_MDC             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PF00_FUNC_CTL_QEO1_A               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)


/* IOC_PF01_FUNC_CTL function mux definitions */

#define IOC_PF01_FUNC_CTL_GPIO_F_01            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PF01_FUNC_CTL_MCAN0_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PF01_FUNC_CTL_ESC0_MDIO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PF01_FUNC_CTL_PWM0_P_1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PF01_FUNC_CTL_TRGM_P_01            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PF01_FUNC_CTL_ETH0_MDIO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PF01_FUNC_CTL_QEO1_B               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)


/* IOC_PF02_FUNC_CTL function mux definitions */

#define IOC_PF02_FUNC_CTL_GPIO_F_02            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PF02_FUNC_CTL_I2C2_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)

#define IOC_PF02_FUNC_CTL_MCAN0_STBY           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PF02_FUNC_CTL_ESC0_P1_TXCK         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PF02_FUNC_CTL_PWM0_P_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PF02_FUNC_CTL_TRGM_P_02            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PF02_FUNC_CTL_ETH0_TXCK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PF02_FUNC_CTL_QEI0_H1              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)

#define IOC_PF02_FUNC_CTL_QEO1_Z               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)

#define IOC_PF02_FUNC_CTL_EUI0_CK              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(26)


/* IOC_PF03_FUNC_CTL function mux definitions */

#define IOC_PF03_FUNC_CTL_GPIO_F_03            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PF03_FUNC_CTL_I2C2_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)

#define IOC_PF03_FUNC_CTL_MCAN1_STBY           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PF03_FUNC_CTL_ESC0_P1_TXD_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PF03_FUNC_CTL_PWM0_P_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PF03_FUNC_CTL_TRGM_P_03            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PF03_FUNC_CTL_ETH0_TXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PF03_FUNC_CTL_QEI0_F               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)

#define IOC_PF03_FUNC_CTL_EUI0_SH              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(26)


/* IOC_PF04_FUNC_CTL function mux definitions */

#define IOC_PF04_FUNC_CTL_GPIO_F_04            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PF04_FUNC_CTL_MCAN1_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PF04_FUNC_CTL_ESC0_P1_TXD_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PF04_FUNC_CTL_PWM0_P_4             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PF04_FUNC_CTL_TRGM_P_04            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PF04_FUNC_CTL_ETH0_TXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PF04_FUNC_CTL_QEI0_H0              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)

#define IOC_PF04_FUNC_CTL_EUI0_DI              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(26)


/* IOC_PF05_FUNC_CTL function mux definitions */

#define IOC_PF05_FUNC_CTL_GPIO_F_05            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PF05_FUNC_CTL_MCAN1_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PF05_FUNC_CTL_ESC0_P1_TXD_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PF05_FUNC_CTL_PWM0_P_5             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PF05_FUNC_CTL_TRGM_P_05            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PF05_FUNC_CTL_ETH0_TXD_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PF05_FUNC_CTL_QEI0_Z               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)

#define IOC_PF05_FUNC_CTL_QEO0_Z               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)

#define IOC_PF05_FUNC_CTL_EUI0_DO              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(26)


/* IOC_PF06_FUNC_CTL function mux definitions */

#define IOC_PF06_FUNC_CTL_GPIO_F_06            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PF06_FUNC_CTL_I2C3_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)

#define IOC_PF06_FUNC_CTL_ESC0_P1_TXD_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PF06_FUNC_CTL_PWM0_P_6             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PF06_FUNC_CTL_TRGM_P_06            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PF06_FUNC_CTL_ETH0_TXD_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PF06_FUNC_CTL_QEI0_B               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)

#define IOC_PF06_FUNC_CTL_QEO0_B               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)


/* IOC_PF07_FUNC_CTL function mux definitions */

#define IOC_PF07_FUNC_CTL_GPIO_F_07            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PF07_FUNC_CTL_I2C3_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)

#define IOC_PF07_FUNC_CTL_ESC0_P1_TXEN         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PF07_FUNC_CTL_PWM0_P_7             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PF07_FUNC_CTL_TRGM_P_07            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PF07_FUNC_CTL_ETH0_TXEN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PF07_FUNC_CTL_QEI0_A               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)

#define IOC_PF07_FUNC_CTL_QEO0_A               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)


/* IOC_PF08_FUNC_CTL function mux definitions */

#define IOC_PF08_FUNC_CTL_GPIO_F_08            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PF08_FUNC_CTL_I2C0_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)

#define IOC_PF08_FUNC_CTL_MCAN2_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PF08_FUNC_CTL_ESC0_P1_RXDV         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PF08_FUNC_CTL_PWM1_P_0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PF08_FUNC_CTL_TRGM_P_08            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PF08_FUNC_CTL_ETH0_RXDV            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PF08_FUNC_CTL_EUI1_CK              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(26)


/* IOC_PF09_FUNC_CTL function mux definitions */

#define IOC_PF09_FUNC_CTL_GPIO_F_09            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PF09_FUNC_CTL_I2C0_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)

#define IOC_PF09_FUNC_CTL_MCAN2_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PF09_FUNC_CTL_ESC0_P1_RXD_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PF09_FUNC_CTL_PWM1_P_1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PF09_FUNC_CTL_TRGM_P_09            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PF09_FUNC_CTL_ETH0_RXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PF09_FUNC_CTL_EUI1_SH              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(26)


/* IOC_PF10_FUNC_CTL function mux definitions */

#define IOC_PF10_FUNC_CTL_GPIO_F_10            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PF10_FUNC_CTL_MCAN2_STBY           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PF10_FUNC_CTL_ESC0_P1_RXD_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PF10_FUNC_CTL_PWM1_P_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PF10_FUNC_CTL_TRGM_P_10            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PF10_FUNC_CTL_ETH0_RXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PF10_FUNC_CTL_EUI1_DI              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(26)


/* IOC_PF11_FUNC_CTL function mux definitions */

#define IOC_PF11_FUNC_CTL_GPIO_F_11            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PF11_FUNC_CTL_ESC0_P1_RXD_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PF11_FUNC_CTL_PWM1_P_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PF11_FUNC_CTL_TRGM_P_11            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PF11_FUNC_CTL_ETH0_RXD_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PF11_FUNC_CTL_EUI1_DO              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(26)


/* IOC_PF12_FUNC_CTL function mux definitions */

#define IOC_PF12_FUNC_CTL_GPIO_F_12            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PF12_FUNC_CTL_I2C1_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)

#define IOC_PF12_FUNC_CTL_ESC0_P1_RXD_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PF12_FUNC_CTL_PWM1_P_4             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PF12_FUNC_CTL_TRGM_P_12            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PF12_FUNC_CTL_ETH0_RXD_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PF12_FUNC_CTL_OWR0_DAT             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(26)


/* IOC_PF13_FUNC_CTL function mux definitions */

#define IOC_PF13_FUNC_CTL_GPIO_F_13            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PF13_FUNC_CTL_I2C1_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)

#define IOC_PF13_FUNC_CTL_MCAN3_STBY           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PF13_FUNC_CTL_ESC0_P1_RXCK         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PF13_FUNC_CTL_PWM1_P_5             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PF13_FUNC_CTL_TRGM_P_13            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PF13_FUNC_CTL_ETH0_RXCK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PF13_FUNC_CTL_OWR1_DAT             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(26)


/* IOC_PF14_FUNC_CTL function mux definitions */

#define IOC_PF14_FUNC_CTL_GPIO_F_14            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PF14_FUNC_CTL_MCAN3_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PF14_FUNC_CTL_ESC0_P1_RXER         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PF14_FUNC_CTL_PWM1_P_6             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PF14_FUNC_CTL_TRGM_P_14            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PF14_FUNC_CTL_ETH0_RXER            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)


/* IOC_PF15_FUNC_CTL function mux definitions */

#define IOC_PF15_FUNC_CTL_GPIO_F_15            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PF15_FUNC_CTL_MCAN3_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PF15_FUNC_CTL_PWM1_P_7             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)

#define IOC_PF15_FUNC_CTL_TRGM_P_15            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)

#define IOC_PF15_FUNC_CTL_ETH0_TXER            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)


/* IOC_PF16_FUNC_CTL function mux definitions */

#define IOC_PF16_FUNC_CTL_GPIO_F_16            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PF16_FUNC_CTL_SDM0_DAT_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(23)


/* IOC_PF17_FUNC_CTL function mux definitions */

#define IOC_PF17_FUNC_CTL_GPIO_F_17            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PF17_FUNC_CTL_SDM0_CLK_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(23)


/* IOC_PF18_FUNC_CTL function mux definitions */

#define IOC_PF18_FUNC_CTL_GPIO_F_18            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PF18_FUNC_CTL_SDM0_DAT_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(23)

#define IOC_PF18_FUNC_CTL_USB0_PWR             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)

#define IOC_PF18_FUNC_CTL_ETH0_EVTO_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(25)

#define IOC_PF18_FUNC_CTL_ESC0_EVTO_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(27)


/* IOC_PF19_FUNC_CTL function mux definitions */

#define IOC_PF19_FUNC_CTL_GPIO_F_19            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PF19_FUNC_CTL_SDM0_CLK_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(23)

#define IOC_PF19_FUNC_CTL_USB0_PWR             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)


/* IOC_PF20_FUNC_CTL function mux definitions */

#define IOC_PF20_FUNC_CTL_GPIO_F_20            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PF20_FUNC_CTL_SDM0_DAT_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(23)

#define IOC_PF20_FUNC_CTL_USB0_OC              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)

#define IOC_PF20_FUNC_CTL_ETH0_EVTO_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(25)

#define IOC_PF20_FUNC_CTL_ESC0_EVTO_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(27)


/* IOC_PF21_FUNC_CTL function mux definitions */

#define IOC_PF21_FUNC_CTL_GPIO_F_21            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PF21_FUNC_CTL_SDM0_DAT_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(23)

#define IOC_PF21_FUNC_CTL_USB0_ID              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)

#define IOC_PF21_FUNC_CTL_ETH0_EVTI_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(25)

#define IOC_PF21_FUNC_CTL_ESC0_EVTI_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(27)


/* IOC_PF22_FUNC_CTL function mux definitions */

#define IOC_PF22_FUNC_CTL_GPIO_F_22            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PF22_FUNC_CTL_SDM0_CLK_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(23)

#define IOC_PF22_FUNC_CTL_USB0_ID              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)

#define IOC_PF22_FUNC_CTL_ETH0_EVTI_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(25)

#define IOC_PF22_FUNC_CTL_ESC0_EVTI_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(27)


/* IOC_PF23_FUNC_CTL function mux definitions */

#define IOC_PF23_FUNC_CTL_GPIO_F_23            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PF23_FUNC_CTL_SDM0_CLK_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(23)

#define IOC_PF23_FUNC_CTL_USB0_OC              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)


/* IOC_PF24_FUNC_CTL function mux definitions */

#define IOC_PF24_FUNC_CTL_GPIO_F_24            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PF24_FUNC_CTL_SDM0_DAT_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(23)


/* IOC_PF25_FUNC_CTL function mux definitions */

#define IOC_PF25_FUNC_CTL_GPIO_F_25            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PF25_FUNC_CTL_SDM0_CLK_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(23)


/* IOC_PF26_FUNC_CTL function mux definitions */

#define IOC_PF26_FUNC_CTL_GPIO_F_26            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PF26_FUNC_CTL_SDM0_DAT_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(23)


/* IOC_PF27_FUNC_CTL function mux definitions */

#define IOC_PF27_FUNC_CTL_GPIO_F_27            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PF27_FUNC_CTL_SDM0_CLK_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(23)


/* IOC_PF28_FUNC_CTL function mux definitions */

#define IOC_PF28_FUNC_CTL_GPIO_F_28            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PF28_FUNC_CTL_SDM0_DAT_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(23)


/* IOC_PF29_FUNC_CTL function mux definitions */

#define IOC_PF29_FUNC_CTL_GPIO_F_29            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PF29_FUNC_CTL_SDM0_DAT_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(23)


/* IOC_PF30_FUNC_CTL function mux definitions */

#define IOC_PF30_FUNC_CTL_GPIO_F_30            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PF30_FUNC_CTL_SDM0_CLK_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(23)


/* IOC_PF31_FUNC_CTL function mux definitions */

#define IOC_PF31_FUNC_CTL_GPIO_F_31            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PF31_FUNC_CTL_SDM0_CLK_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(23)


/* IOC_PV00_FUNC_CTL function mux definitions */

#define IOC_PV00_FUNC_CTL_GPIO_V_00            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PV00_FUNC_CTL_GPTMR1_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PV00_FUNC_CTL_UART0_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PV00_FUNC_CTL_MCAN0_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PV00_FUNC_CTL_ESC0_P0_RXDV         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)


/* IOC_PV01_FUNC_CTL function mux definitions */

#define IOC_PV01_FUNC_CTL_GPIO_V_01            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PV01_FUNC_CTL_GPTMR1_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PV01_FUNC_CTL_UART0_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PV01_FUNC_CTL_MCAN0_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PV01_FUNC_CTL_ESC0_P0_RXD_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)


/* IOC_PV02_FUNC_CTL function mux definitions */

#define IOC_PV02_FUNC_CTL_GPIO_V_02            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PV02_FUNC_CTL_GPTMR1_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PV02_FUNC_CTL_UART0_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PV02_FUNC_CTL_UART0_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)

#define IOC_PV02_FUNC_CTL_I2C2_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)

#define IOC_PV02_FUNC_CTL_MCAN0_STBY           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PV02_FUNC_CTL_ESC0_P0_RXD_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)


/* IOC_PV03_FUNC_CTL function mux definitions */

#define IOC_PV03_FUNC_CTL_GPIO_V_03            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PV03_FUNC_CTL_GPTMR1_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PV03_FUNC_CTL_UART0_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)

#define IOC_PV03_FUNC_CTL_I2C2_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)

#define IOC_PV03_FUNC_CTL_SPI1_CS_3            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PV03_FUNC_CTL_MCAN1_STBY           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PV03_FUNC_CTL_ESC0_P0_RXD_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)


/* IOC_PV04_FUNC_CTL function mux definitions */

#define IOC_PV04_FUNC_CTL_GPIO_V_04            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PV04_FUNC_CTL_UART1_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)

#define IOC_PV04_FUNC_CTL_SPI0_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PV04_FUNC_CTL_MCAN1_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PV04_FUNC_CTL_ESC0_P0_RXD_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)


/* IOC_PV05_FUNC_CTL function mux definitions */

#define IOC_PV05_FUNC_CTL_GPIO_V_05            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PV05_FUNC_CTL_GPTMR1_COMP_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PV05_FUNC_CTL_UART1_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PV05_FUNC_CTL_UART1_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)

#define IOC_PV05_FUNC_CTL_SPI0_CS_0            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PV05_FUNC_CTL_MCAN1_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PV05_FUNC_CTL_ESC0_P0_RXCK         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)


/* IOC_PV06_FUNC_CTL function mux definitions */

#define IOC_PV06_FUNC_CTL_GPIO_V_06            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PV06_FUNC_CTL_GPTMR0_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PV06_FUNC_CTL_UART1_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PV06_FUNC_CTL_I2C3_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)

#define IOC_PV06_FUNC_CTL_SPI0_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PV06_FUNC_CTL_ESC0_P0_TXCK         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)


/* IOC_PV07_FUNC_CTL function mux definitions */

#define IOC_PV07_FUNC_CTL_GPIO_V_07            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PV07_FUNC_CTL_GPTMR0_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PV07_FUNC_CTL_UART1_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PV07_FUNC_CTL_I2C3_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)

#define IOC_PV07_FUNC_CTL_SPI0_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PV07_FUNC_CTL_ESC0_P0_TXD_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)


/* IOC_PV08_FUNC_CTL function mux definitions */

#define IOC_PV08_FUNC_CTL_GPIO_V_08            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PV08_FUNC_CTL_GPTMR0_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PV08_FUNC_CTL_UART2_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PV08_FUNC_CTL_I2C0_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)

#define IOC_PV08_FUNC_CTL_SPI1_CS_2            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PV08_FUNC_CTL_MCAN2_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PV08_FUNC_CTL_ESC0_P0_TXD_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)


/* IOC_PV09_FUNC_CTL function mux definitions */

#define IOC_PV09_FUNC_CTL_GPIO_V_09            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PV09_FUNC_CTL_GPTMR0_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PV09_FUNC_CTL_UART2_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PV09_FUNC_CTL_I2C0_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)

#define IOC_PV09_FUNC_CTL_SPI1_CS_1            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PV09_FUNC_CTL_MCAN2_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PV09_FUNC_CTL_ESC0_P0_TXD_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)


/* IOC_PV10_FUNC_CTL function mux definitions */

#define IOC_PV10_FUNC_CTL_GPIO_V_10            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PV10_FUNC_CTL_GPTMR0_COMP_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PV10_FUNC_CTL_UART2_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PV10_FUNC_CTL_UART2_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)

#define IOC_PV10_FUNC_CTL_SPI1_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PV10_FUNC_CTL_MCAN2_STBY           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PV10_FUNC_CTL_ESC0_P0_TXD_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)


/* IOC_PV11_FUNC_CTL function mux definitions */

#define IOC_PV11_FUNC_CTL_GPIO_V_11            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PV11_FUNC_CTL_UART2_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)

#define IOC_PV11_FUNC_CTL_SPI1_CS_0            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PV11_FUNC_CTL_ESC0_P0_TXEN         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)


/* IOC_PV12_FUNC_CTL function mux definitions */

#define IOC_PV12_FUNC_CTL_GPIO_V_12            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PV12_FUNC_CTL_SPI1_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PV12_FUNC_CTL_ESC0_CTR_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)


/* IOC_PV15_FUNC_CTL function mux definitions */

#define IOC_PV15_FUNC_CTL_GPIO_V_15            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PV15_FUNC_CTL_GPTMR0_COMP_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PV15_FUNC_CTL_SPI1_DAT3            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PV15_FUNC_CTL_ESC0_P0_RXER         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)


/* IOC_PW00_FUNC_CTL function mux definitions */

#define IOC_PW00_FUNC_CTL_GPIO_W_00            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PW00_FUNC_CTL_MCAN0_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PW00_FUNC_CTL_ESC0_P1_RXDV         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PW00_FUNC_CTL_ETH0_RXDV            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)


/* IOC_PW01_FUNC_CTL function mux definitions */

#define IOC_PW01_FUNC_CTL_GPIO_W_01            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PW01_FUNC_CTL_MCAN0_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PW01_FUNC_CTL_ESC0_P1_RXD_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PW01_FUNC_CTL_ETH0_RXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)


/* IOC_PW02_FUNC_CTL function mux definitions */

#define IOC_PW02_FUNC_CTL_GPIO_W_02            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PW02_FUNC_CTL_MCAN0_STBY           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PW02_FUNC_CTL_ESC0_P1_RXD_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PW02_FUNC_CTL_ETH0_RXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)


/* IOC_PW03_FUNC_CTL function mux definitions */

#define IOC_PW03_FUNC_CTL_GPIO_W_03            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PW03_FUNC_CTL_MCAN1_STBY           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PW03_FUNC_CTL_ESC0_P1_RXD_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PW03_FUNC_CTL_ETH0_RXD_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)


/* IOC_PW04_FUNC_CTL function mux definitions */

#define IOC_PW04_FUNC_CTL_GPIO_W_04            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PW04_FUNC_CTL_MCAN1_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PW04_FUNC_CTL_ESC0_P1_RXD_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PW04_FUNC_CTL_ETH0_RXD_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)


/* IOC_PW05_FUNC_CTL function mux definitions */

#define IOC_PW05_FUNC_CTL_GPIO_W_05            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PW05_FUNC_CTL_MCAN1_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PW05_FUNC_CTL_ESC0_P1_RXCK         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PW05_FUNC_CTL_ETH0_RXCK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)


/* IOC_PW06_FUNC_CTL function mux definitions */

#define IOC_PW06_FUNC_CTL_GPIO_W_06            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PW06_FUNC_CTL_ESC0_P1_TXCK         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PW06_FUNC_CTL_ETH0_TXCK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)


/* IOC_PW07_FUNC_CTL function mux definitions */

#define IOC_PW07_FUNC_CTL_GPIO_W_07            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PW07_FUNC_CTL_ESC0_P1_TXD_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PW07_FUNC_CTL_ETH0_TXD_0           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)


/* IOC_PW08_FUNC_CTL function mux definitions */

#define IOC_PW08_FUNC_CTL_GPIO_W_08            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PW08_FUNC_CTL_MCAN2_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PW08_FUNC_CTL_ESC0_P1_TXD_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PW08_FUNC_CTL_ETH0_TXD_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)


/* IOC_PW09_FUNC_CTL function mux definitions */

#define IOC_PW09_FUNC_CTL_GPIO_W_09            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PW09_FUNC_CTL_MCAN2_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PW09_FUNC_CTL_ESC0_P1_TXD_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PW09_FUNC_CTL_ETH0_TXD_2           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)


/* IOC_PW10_FUNC_CTL function mux definitions */

#define IOC_PW10_FUNC_CTL_GPIO_W_10            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PW10_FUNC_CTL_MCAN2_STBY           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)

#define IOC_PW10_FUNC_CTL_ESC0_P1_TXD_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PW10_FUNC_CTL_ETH0_TXD_3           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)


/* IOC_PW11_FUNC_CTL function mux definitions */

#define IOC_PW11_FUNC_CTL_GPIO_W_11            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PW11_FUNC_CTL_ESC0_P1_TXEN         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PW11_FUNC_CTL_ETH0_TXEN            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)


/* IOC_PW12_FUNC_CTL function mux definitions */

#define IOC_PW12_FUNC_CTL_GPIO_W_12            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PW12_FUNC_CTL_ESC0_CTR_1           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PW12_FUNC_CTL_ETH0_RXER            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)


/* IOC_PW15_FUNC_CTL function mux definitions */

#define IOC_PW15_FUNC_CTL_GPIO_W_15            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PW15_FUNC_CTL_ESC0_P1_RXER         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PW15_FUNC_CTL_ETH0_CRS             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)


/* IOC_PW16_FUNC_CTL function mux definitions */

#define IOC_PW16_FUNC_CTL_GPIO_W_16            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PW16_FUNC_CTL_ESC0_CTR_6           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PW16_FUNC_CTL_ETH0_MDIO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)


/* IOC_PW17_FUNC_CTL function mux definitions */

#define IOC_PW17_FUNC_CTL_GPIO_W_17            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PW17_FUNC_CTL_ESC0_CTR_7           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PW17_FUNC_CTL_ETH0_MDC             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)


/* IOC_PW20_FUNC_CTL function mux definitions */

#define IOC_PW20_FUNC_CTL_GPIO_W_20            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PW20_FUNC_CTL_ESC0_REFCK           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PW20_FUNC_CTL_ETH0_TXER            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PW20_FUNC_CTL_SOC_REF0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)


/* IOC_PW21_FUNC_CTL function mux definitions */

#define IOC_PW21_FUNC_CTL_GPIO_W_21            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PW21_FUNC_CTL_ESC0_REFCK           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(11)

#define IOC_PW21_FUNC_CTL_ETH0_COL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)

#define IOC_PW21_FUNC_CTL_SOC_REF1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)


/* IOC_PX00_FUNC_CTL function mux definitions */

#define IOC_PX00_FUNC_CTL_GPIO_X_00            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PX00_FUNC_CTL_GPTMR3_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PX00_FUNC_CTL_UART4_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PX00_FUNC_CTL_XPI0_CB_DQS          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)


/* IOC_PX01_FUNC_CTL function mux definitions */

#define IOC_PX01_FUNC_CTL_GPIO_X_01            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PX01_FUNC_CTL_GPTMR3_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PX01_FUNC_CTL_UART4_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PX01_FUNC_CTL_XPI0_CA_D_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)


/* IOC_PX02_FUNC_CTL function mux definitions */

#define IOC_PX02_FUNC_CTL_GPIO_X_02            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PX02_FUNC_CTL_GPTMR3_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PX02_FUNC_CTL_UART4_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PX02_FUNC_CTL_UART4_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)

#define IOC_PX02_FUNC_CTL_XPI0_CA_SCLK         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)


/* IOC_PX03_FUNC_CTL function mux definitions */

#define IOC_PX03_FUNC_CTL_GPIO_X_03            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PX03_FUNC_CTL_GPTMR3_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PX03_FUNC_CTL_UART4_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)

#define IOC_PX03_FUNC_CTL_XPI0_CA_D_3          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)


/* IOC_PX04_FUNC_CTL function mux definitions */

#define IOC_PX04_FUNC_CTL_GPIO_X_04            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PX04_FUNC_CTL_UART5_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)

#define IOC_PX04_FUNC_CTL_SPI3_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PX04_FUNC_CTL_XPI0_CA_DQS          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)


/* IOC_PX05_FUNC_CTL function mux definitions */

#define IOC_PX05_FUNC_CTL_GPIO_X_05            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PX05_FUNC_CTL_GPTMR3_COMP_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PX05_FUNC_CTL_UART5_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PX05_FUNC_CTL_UART5_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)

#define IOC_PX05_FUNC_CTL_SPI3_CS_0            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PX05_FUNC_CTL_XPI0_CA_CS0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)


/* IOC_PX06_FUNC_CTL function mux definitions */

#define IOC_PX06_FUNC_CTL_GPIO_X_06            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PX06_FUNC_CTL_GPTMR2_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PX06_FUNC_CTL_UART5_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PX06_FUNC_CTL_SPI3_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PX06_FUNC_CTL_XPI0_CA_D_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)


/* IOC_PX07_FUNC_CTL function mux definitions */

#define IOC_PX07_FUNC_CTL_GPIO_X_07            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)

#define IOC_PX07_FUNC_CTL_GPTMR2_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)

#define IOC_PX07_FUNC_CTL_UART5_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)

#define IOC_PX07_FUNC_CTL_SPI3_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)

#define IOC_PX07_FUNC_CTL_XPI0_CA_D_2          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)


#endif /* HPM_IOMUX_H */