HPM SDK
HPMicro Software Development Kit
hpm_soc_ip.h
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1 /*
2  * Copyright (c) 2021-2025 HPMicro
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  *
6  */
7 
8 
9 #ifndef HPM_SOC_IP_H
10 #define HPM_SOC_IP_H
11 
12 
13 #include "hpm_common.h"
14 
15 #include "hpm_gpio_regs.h"
16 /* Address of GPIO instances */
17 /* FGPIO base address */
18 #define HPM_FGPIO_BASE (0x300000UL)
19 /* FGPIO base pointer */
20 #define HPM_FGPIO ((GPIO_Type *) HPM_FGPIO_BASE)
21 /* GPIO0 base address */
22 #define HPM_GPIO0_BASE (0xF00D0000UL)
23 /* GPIO0 base pointer */
24 #define HPM_GPIO0 ((GPIO_Type *) HPM_GPIO0_BASE)
25 /* GPIO1 base address */
26 #define HPM_GPIO1_BASE (0xF00D4000UL)
27 /* GPIO1 base pointer */
28 #define HPM_GPIO1 ((GPIO_Type *) HPM_GPIO1_BASE)
29 /* PGPIO base address */
30 #define HPM_PGPIO_BASE (0xF411C000UL)
31 /* PGPIO base pointer */
32 #define HPM_PGPIO ((GPIO_Type *) HPM_PGPIO_BASE)
33 
34 /* Address of DM instances */
35 /* DM base address */
36 #define HPM_DM_BASE (0x30000000UL)
37 
38 #include "hpm_plic_regs.h"
39 /* Address of PLIC instances */
40 /* PLIC base address */
41 #define HPM_PLIC_BASE (0xE4000000UL)
42 /* PLIC base pointer */
43 #define HPM_PLIC ((PLIC_Type *) HPM_PLIC_BASE)
44 
45 #include "hpm_mchtmr_regs.h"
46 /* Address of MCHTMR instances */
47 /* MCHTMR base address */
48 #define HPM_MCHTMR_BASE (0xE6000000UL)
49 /* MCHTMR base pointer */
50 #define HPM_MCHTMR ((MCHTMR_Type *) HPM_MCHTMR_BASE)
51 
52 #include "hpm_plic_sw_regs.h"
53 /* Address of PLICSW instances */
54 /* PLICSW base address */
55 #define HPM_PLICSW_BASE (0xE6400000UL)
56 /* PLICSW base pointer */
57 #define HPM_PLICSW ((PLIC_SW_Type *) HPM_PLICSW_BASE)
58 
59 #include "hpm_gptmr_regs.h"
60 /* Address of GPTMR instances */
61 /* GPTMR0 base address */
62 #define HPM_GPTMR0_BASE (0xF0000000UL)
63 /* GPTMR0 base pointer */
64 #define HPM_GPTMR0 ((GPTMR_Type *) HPM_GPTMR0_BASE)
65 /* GPTMR1 base address */
66 #define HPM_GPTMR1_BASE (0xF0004000UL)
67 /* GPTMR1 base pointer */
68 #define HPM_GPTMR1 ((GPTMR_Type *) HPM_GPTMR1_BASE)
69 /* GPTMR2 base address */
70 #define HPM_GPTMR2_BASE (0xF0008000UL)
71 /* GPTMR2 base pointer */
72 #define HPM_GPTMR2 ((GPTMR_Type *) HPM_GPTMR2_BASE)
73 /* GPTMR3 base address */
74 #define HPM_GPTMR3_BASE (0xF000C000UL)
75 /* GPTMR3 base pointer */
76 #define HPM_GPTMR3 ((GPTMR_Type *) HPM_GPTMR3_BASE)
77 /* NTMR0 base address */
78 #define HPM_NTMR0_BASE (0xF1410000UL)
79 /* NTMR0 base pointer */
80 #define HPM_NTMR0 ((GPTMR_Type *) HPM_NTMR0_BASE)
81 /* PTMR base address */
82 #define HPM_PTMR_BASE (0xF4120000UL)
83 /* PTMR base pointer */
84 #define HPM_PTMR ((GPTMR_Type *) HPM_PTMR_BASE)
85 
86 #include "hpm_uart_regs.h"
87 /* Address of UART instances */
88 /* UART0 base address */
89 #define HPM_UART0_BASE (0xF0040000UL)
90 /* UART0 base pointer */
91 #define HPM_UART0 ((UART_Type *) HPM_UART0_BASE)
92 /* UART1 base address */
93 #define HPM_UART1_BASE (0xF0044000UL)
94 /* UART1 base pointer */
95 #define HPM_UART1 ((UART_Type *) HPM_UART1_BASE)
96 /* UART2 base address */
97 #define HPM_UART2_BASE (0xF0048000UL)
98 /* UART2 base pointer */
99 #define HPM_UART2 ((UART_Type *) HPM_UART2_BASE)
100 /* UART3 base address */
101 #define HPM_UART3_BASE (0xF004C000UL)
102 /* UART3 base pointer */
103 #define HPM_UART3 ((UART_Type *) HPM_UART3_BASE)
104 /* UART4 base address */
105 #define HPM_UART4_BASE (0xF0050000UL)
106 /* UART4 base pointer */
107 #define HPM_UART4 ((UART_Type *) HPM_UART4_BASE)
108 /* UART5 base address */
109 #define HPM_UART5_BASE (0xF0054000UL)
110 /* UART5 base pointer */
111 #define HPM_UART5 ((UART_Type *) HPM_UART5_BASE)
112 /* UART6 base address */
113 #define HPM_UART6_BASE (0xF0058000UL)
114 /* UART6 base pointer */
115 #define HPM_UART6 ((UART_Type *) HPM_UART6_BASE)
116 /* UART7 base address */
117 #define HPM_UART7_BASE (0xF005C000UL)
118 /* UART7 base pointer */
119 #define HPM_UART7 ((UART_Type *) HPM_UART7_BASE)
120 /* PUART base address */
121 #define HPM_PUART_BASE (0xF4124000UL)
122 /* PUART base pointer */
123 #define HPM_PUART ((UART_Type *) HPM_PUART_BASE)
124 
125 #include "hpm_i2c_regs.h"
126 /* Address of I2C instances */
127 /* I2C0 base address */
128 #define HPM_I2C0_BASE (0xF0060000UL)
129 /* I2C0 base pointer */
130 #define HPM_I2C0 ((I2C_Type *) HPM_I2C0_BASE)
131 /* I2C1 base address */
132 #define HPM_I2C1_BASE (0xF0064000UL)
133 /* I2C1 base pointer */
134 #define HPM_I2C1 ((I2C_Type *) HPM_I2C1_BASE)
135 /* I2C2 base address */
136 #define HPM_I2C2_BASE (0xF0068000UL)
137 /* I2C2 base pointer */
138 #define HPM_I2C2 ((I2C_Type *) HPM_I2C2_BASE)
139 /* I2C3 base address */
140 #define HPM_I2C3_BASE (0xF006C000UL)
141 /* I2C3 base pointer */
142 #define HPM_I2C3 ((I2C_Type *) HPM_I2C3_BASE)
143 
144 #include "hpm_spi_regs.h"
145 /* Address of SPI instances */
146 /* SPI0 base address */
147 #define HPM_SPI0_BASE (0xF0070000UL)
148 /* SPI0 base pointer */
149 #define HPM_SPI0 ((SPI_Type *) HPM_SPI0_BASE)
150 /* SPI1 base address */
151 #define HPM_SPI1_BASE (0xF0074000UL)
152 /* SPI1 base pointer */
153 #define HPM_SPI1 ((SPI_Type *) HPM_SPI1_BASE)
154 /* SPI2 base address */
155 #define HPM_SPI2_BASE (0xF0078000UL)
156 /* SPI2 base pointer */
157 #define HPM_SPI2 ((SPI_Type *) HPM_SPI2_BASE)
158 /* SPI3 base address */
159 #define HPM_SPI3_BASE (0xF007C000UL)
160 /* SPI3 base pointer */
161 #define HPM_SPI3 ((SPI_Type *) HPM_SPI3_BASE)
162 
163 #include "hpm_crc_regs.h"
164 /* Address of CRC instances */
165 /* CRC base address */
166 #define HPM_CRC_BASE (0xF0080000UL)
167 /* CRC base pointer */
168 #define HPM_CRC ((CRC_Type *) HPM_CRC_BASE)
169 
170 #include "hpm_tsns_regs.h"
171 /* Address of TSNS instances */
172 /* TSNS base address */
173 #define HPM_TSNS_BASE (0xF0090000UL)
174 /* TSNS base pointer */
175 #define HPM_TSNS ((TSNS_Type *) HPM_TSNS_BASE)
176 
177 #include "hpm_mbx_regs.h"
178 /* Address of MBX instances */
179 /* MBX0A base address */
180 #define HPM_MBX0A_BASE (0xF00A0000UL)
181 /* MBX0A base pointer */
182 #define HPM_MBX0A ((MBX_Type *) HPM_MBX0A_BASE)
183 /* MBX0B base address */
184 #define HPM_MBX0B_BASE (0xF00A4000UL)
185 /* MBX0B base pointer */
186 #define HPM_MBX0B ((MBX_Type *) HPM_MBX0B_BASE)
187 /* MBX1A base address */
188 #define HPM_MBX1A_BASE (0xF00A8000UL)
189 /* MBX1A base pointer */
190 #define HPM_MBX1A ((MBX_Type *) HPM_MBX1A_BASE)
191 /* MBX1B base address */
192 #define HPM_MBX1B_BASE (0xF00AC000UL)
193 /* MBX1B base pointer */
194 #define HPM_MBX1B ((MBX_Type *) HPM_MBX1B_BASE)
195 
196 #include "hpm_ewdg_regs.h"
197 /* Address of EWDG instances */
198 /* EWDG0 base address */
199 #define HPM_EWDG0_BASE (0xF00B0000UL)
200 /* EWDG0 base pointer */
201 #define HPM_EWDG0 ((EWDG_Type *) HPM_EWDG0_BASE)
202 /* EWDG1 base address */
203 #define HPM_EWDG1_BASE (0xF00B4000UL)
204 /* EWDG1 base pointer */
205 #define HPM_EWDG1 ((EWDG_Type *) HPM_EWDG1_BASE)
206 /* EWDG2 base address */
207 #define HPM_EWDG2_BASE (0xF00B8000UL)
208 /* EWDG2 base pointer */
209 #define HPM_EWDG2 ((EWDG_Type *) HPM_EWDG2_BASE)
210 /* EWDG3 base address */
211 #define HPM_EWDG3_BASE (0xF00BC000UL)
212 /* EWDG3 base pointer */
213 #define HPM_EWDG3 ((EWDG_Type *) HPM_EWDG3_BASE)
214 /* PEWDG base address */
215 #define HPM_PEWDG_BASE (0xF4128000UL)
216 /* PEWDG base pointer */
217 #define HPM_PEWDG ((EWDG_Type *) HPM_PEWDG_BASE)
218 
219 #include "hpm_dmamux_regs.h"
220 /* Address of DMAMUX instances */
221 /* DMAMUX base address */
222 #define HPM_DMAMUX_BASE (0xF00C4000UL)
223 /* DMAMUX base pointer */
224 #define HPM_DMAMUX ((DMAMUX_Type *) HPM_DMAMUX_BASE)
225 
226 #include "hpm_dmav2_regs.h"
227 /* Address of DMAV2 instances */
228 /* HDMA base address */
229 #define HPM_HDMA_BASE (0xF00C8000UL)
230 /* HDMA base pointer */
231 #define HPM_HDMA ((DMAV2_Type *) HPM_HDMA_BASE)
232 /* XDMA base address */
233 #define HPM_XDMA_BASE (0xF3100000UL)
234 /* XDMA base pointer */
235 #define HPM_XDMA ((DMAV2_Type *) HPM_XDMA_BASE)
236 
237 #include "hpm_ppi_regs.h"
238 /* Address of PPI instances */
239 /* PPI base address */
240 #define HPM_PPI_BASE (0xF00CC000UL)
241 /* PPI base pointer */
242 #define HPM_PPI ((PPI_Type *) HPM_PPI_BASE)
243 
244 #include "hpm_gpiom_regs.h"
245 /* Address of GPIOM instances */
246 /* GPIOM base address */
247 #define HPM_GPIOM_BASE (0xF00D8000UL)
248 /* GPIOM base pointer */
249 #define HPM_GPIOM ((GPIOM_Type *) HPM_GPIOM_BASE)
250 
251 #include "hpm_lobs_regs.h"
252 /* Address of LOBS instances */
253 /* LOBS base address */
254 #define HPM_LOBS_BASE (0xF00DC000UL)
255 /* LOBS base pointer */
256 #define HPM_LOBS ((LOBS_Type *) HPM_LOBS_BASE)
257 
258 #include "hpm_adc16_regs.h"
259 /* Address of ADC16 instances */
260 /* ADC0 base address */
261 #define HPM_ADC0_BASE (0xF0100000UL)
262 /* ADC0 base pointer */
263 #define HPM_ADC0 ((ADC16_Type *) HPM_ADC0_BASE)
264 /* ADC1 base address */
265 #define HPM_ADC1_BASE (0xF0104000UL)
266 /* ADC1 base pointer */
267 #define HPM_ADC1 ((ADC16_Type *) HPM_ADC1_BASE)
268 /* ADC2 base address */
269 #define HPM_ADC2_BASE (0xF0108000UL)
270 /* ADC2 base pointer */
271 #define HPM_ADC2 ((ADC16_Type *) HPM_ADC2_BASE)
272 /* ADC3 base address */
273 #define HPM_ADC3_BASE (0xF010C000UL)
274 /* ADC3 base pointer */
275 #define HPM_ADC3 ((ADC16_Type *) HPM_ADC3_BASE)
276 
277 #include "hpm_dac_regs.h"
278 /* Address of DAC instances */
279 /* DAC0 base address */
280 #define HPM_DAC0_BASE (0xF0120000UL)
281 /* DAC0 base pointer */
282 #define HPM_DAC0 ((DAC_Type *) HPM_DAC0_BASE)
283 /* DAC1 base address */
284 #define HPM_DAC1_BASE (0xF0124000UL)
285 /* DAC1 base pointer */
286 #define HPM_DAC1 ((DAC_Type *) HPM_DAC1_BASE)
287 
288 #include "hpm_acmp_regs.h"
289 /* Address of ACMP instances */
290 /* ACMP0 base address */
291 #define HPM_ACMP0_BASE (0xF0130000UL)
292 /* ACMP0 base pointer */
293 #define HPM_ACMP0 ((ACMP_Type *) HPM_ACMP0_BASE)
294 /* ACMP1 base address */
295 #define HPM_ACMP1_BASE (0xF0134000UL)
296 /* ACMP1 base pointer */
297 #define HPM_ACMP1 ((ACMP_Type *) HPM_ACMP1_BASE)
298 /* ACMP2 base address */
299 #define HPM_ACMP2_BASE (0xF0138000UL)
300 /* ACMP2 base pointer */
301 #define HPM_ACMP2 ((ACMP_Type *) HPM_ACMP2_BASE)
302 /* ACMP3 base address */
303 #define HPM_ACMP3_BASE (0xF013C000UL)
304 /* ACMP3 base pointer */
305 #define HPM_ACMP3 ((ACMP_Type *) HPM_ACMP3_BASE)
306 
307 #include "hpm_i2s_regs.h"
308 /* Address of I2S instances */
309 /* I2S0 base address */
310 #define HPM_I2S0_BASE (0xF0140000UL)
311 /* I2S0 base pointer */
312 #define HPM_I2S0 ((I2S_Type *) HPM_I2S0_BASE)
313 /* I2S1 base address */
314 #define HPM_I2S1_BASE (0xF0144000UL)
315 /* I2S1 base pointer */
316 #define HPM_I2S1 ((I2S_Type *) HPM_I2S1_BASE)
317 
318 #include "hpm_dao_regs.h"
319 /* Address of DAO instances */
320 /* DAO base address */
321 #define HPM_DAO_BASE (0xF0150000UL)
322 /* DAO base pointer */
323 #define HPM_DAO ((DAO_Type *) HPM_DAO_BASE)
324 
325 #include "hpm_pdmlite_regs.h"
326 /* Address of PDMLITE instances */
327 /* PDM base address */
328 #define HPM_PDM_BASE (0xF0154000UL)
329 /* PDM base pointer */
330 #define HPM_PDM ((PDMLITE_Type *) HPM_PDM_BASE)
331 
332 #include "hpm_mcan_regs.h"
333 /* Address of MCAN instances */
334 /* MCAN0 base address */
335 #define HPM_MCAN0_BASE (0xF0300000UL)
336 /* MCAN0 base pointer */
337 #define HPM_MCAN0 ((MCAN_Type *) HPM_MCAN0_BASE)
338 /* MCAN1 base address */
339 #define HPM_MCAN1_BASE (0xF0304000UL)
340 /* MCAN1 base pointer */
341 #define HPM_MCAN1 ((MCAN_Type *) HPM_MCAN1_BASE)
342 /* MCAN2 base address */
343 #define HPM_MCAN2_BASE (0xF0308000UL)
344 /* MCAN2 base pointer */
345 #define HPM_MCAN2 ((MCAN_Type *) HPM_MCAN2_BASE)
346 /* MCAN3 base address */
347 #define HPM_MCAN3_BASE (0xF030C000UL)
348 /* MCAN3 base pointer */
349 #define HPM_MCAN3 ((MCAN_Type *) HPM_MCAN3_BASE)
350 
351 #include "hpm_ptpc_regs.h"
352 /* Address of PTPC instances */
353 /* PTPC base address */
354 #define HPM_PTPC_BASE (0xF037C000UL)
355 /* PTPC base pointer */
356 #define HPM_PTPC ((PTPC_Type *) HPM_PTPC_BASE)
357 
358 #include "hpm_qeiv2_regs.h"
359 /* Address of QEIV2 instances */
360 /* QEI0 base address */
361 #define HPM_QEI0_BASE (0xF0400000UL)
362 /* QEI0 base pointer */
363 #define HPM_QEI0 ((QEIV2_Type *) HPM_QEI0_BASE)
364 /* QEI1 base address */
365 #define HPM_QEI1_BASE (0xF0404000UL)
366 /* QEI1 base pointer */
367 #define HPM_QEI1 ((QEIV2_Type *) HPM_QEI1_BASE)
368 
369 #include "hpm_qeov2_regs.h"
370 /* Address of QEOV2 instances */
371 /* QEO0 base address */
372 #define HPM_QEO0_BASE (0xF0410000UL)
373 /* QEO0 base pointer */
374 #define HPM_QEO0 ((QEOV2_Type *) HPM_QEO0_BASE)
375 /* QEO1 base address */
376 #define HPM_QEO1_BASE (0xF0414000UL)
377 /* QEO1 base pointer */
378 #define HPM_QEO1 ((QEOV2_Type *) HPM_QEO1_BASE)
379 
380 #include "hpm_pwmv2_regs.h"
381 /* Address of PWMV2 instances */
382 /* PWM0 base address */
383 #define HPM_PWM0_BASE (0xF0420000UL)
384 /* PWM0 base pointer */
385 #define HPM_PWM0 ((PWMV2_Type *) HPM_PWM0_BASE)
386 /* PWM1 base address */
387 #define HPM_PWM1_BASE (0xF0424000UL)
388 /* PWM1 base pointer */
389 #define HPM_PWM1 ((PWMV2_Type *) HPM_PWM1_BASE)
390 /* PWM2 base address */
391 #define HPM_PWM2_BASE (0xF0428000UL)
392 /* PWM2 base pointer */
393 #define HPM_PWM2 ((PWMV2_Type *) HPM_PWM2_BASE)
394 /* PWM3 base address */
395 #define HPM_PWM3_BASE (0xF042C000UL)
396 /* PWM3 base pointer */
397 #define HPM_PWM3 ((PWMV2_Type *) HPM_PWM3_BASE)
398 
399 #include "hpm_rdc_regs.h"
400 /* Address of RDC instances */
401 /* RDC0 base address */
402 #define HPM_RDC0_BASE (0xF0440000UL)
403 /* RDC0 base pointer */
404 #define HPM_RDC0 ((RDC_Type *) HPM_RDC0_BASE)
405 
406 #include "hpm_sdm_regs.h"
407 /* Address of SDM instances */
408 /* SDM0 base address */
409 #define HPM_SDM0_BASE (0xF0450000UL)
410 /* SDM0 base pointer */
411 #define HPM_SDM0 ((SDM_Type *) HPM_SDM0_BASE)
412 
413 #include "hpm_plb_regs.h"
414 /* Address of PLB instances */
415 /* PLB base address */
416 #define HPM_PLB_BASE (0xF0460000UL)
417 /* PLB base pointer */
418 #define HPM_PLB ((PLB_Type *) HPM_PLB_BASE)
419 
420 #include "hpm_synt_regs.h"
421 /* Address of SYNT instances */
422 /* SYNT base address */
423 #define HPM_SYNT_BASE (0xF0464000UL)
424 /* SYNT base pointer */
425 #define HPM_SYNT ((SYNT_Type *) HPM_SYNT_BASE)
426 
427 #include "hpm_sei_regs.h"
428 /* Address of SEI instances */
429 /* SEI base address */
430 #define HPM_SEI_BASE (0xF0470000UL)
431 /* SEI base pointer */
432 #define HPM_SEI ((SEI_Type *) HPM_SEI_BASE)
433 
434 #include "hpm_trgm_regs.h"
435 /* Address of TRGM instances */
436 /* TRGM0 base address */
437 #define HPM_TRGM0_BASE (0xF047C000UL)
438 /* TRGM0 base pointer */
439 #define HPM_TRGM0 ((TRGM_Type *) HPM_TRGM0_BASE)
440 
441 #include "hpm_mtgv2_regs.h"
442 /* Address of MTGV2 instances */
443 /* MTG0 base address */
444 #define HPM_MTG0_BASE (0xF0490000UL)
445 /* MTG0 base pointer */
446 #define HPM_MTG0 ((MTGV2_Type *) HPM_MTG0_BASE)
447 
448 #include "hpm_vsc_regs.h"
449 /* Address of VSC instances */
450 /* VSC0 base address */
451 #define HPM_VSC0_BASE (0xF04A0000UL)
452 /* VSC0 base pointer */
453 #define HPM_VSC0 ((VSC_Type *) HPM_VSC0_BASE)
454 
455 #include "hpm_clc_regs.h"
456 /* Address of CLC instances */
457 /* CLC0 base address */
458 #define HPM_CLC0_BASE (0xF04B0000UL)
459 /* CLC0 base pointer */
460 #define HPM_CLC0 ((CLC_Type *) HPM_CLC0_BASE)
461 
462 #include "hpm_enet_regs.h"
463 /* Address of ENET instances */
464 /* ENET0 base address */
465 #define HPM_ENET0_BASE (0xF1400000UL)
466 /* ENET0 base pointer */
467 #define HPM_ENET0 ((ENET_Type *) HPM_ENET0_BASE)
468 
469 #include "hpm_usb_regs.h"
470 /* Address of USB instances */
471 /* USB0 base address */
472 #define HPM_USB0_BASE (0xF1420000UL)
473 /* USB0 base pointer */
474 #define HPM_USB0 ((USB_Type *) HPM_USB0_BASE)
475 
476 #include "hpm_femc_regs.h"
477 /* Address of FEMC instances */
478 /* FEMC base address */
479 #define HPM_FEMC_BASE (0xF300C000UL)
480 /* FEMC base pointer */
481 #define HPM_FEMC ((FEMC_Type *) HPM_FEMC_BASE)
482 
483 #include "hpm_ffa_regs.h"
484 /* Address of FFA instances */
485 /* FFA base address */
486 #define HPM_FFA_BASE (0xF3108000UL)
487 /* FFA base pointer */
488 #define HPM_FFA ((FFA_Type *) HPM_FFA_BASE)
489 
490 #include "hpm_sdp_regs.h"
491 /* Address of SDP instances */
492 /* SDP base address */
493 #define HPM_SDP_BASE (0xF3140000UL)
494 /* SDP base pointer */
495 #define HPM_SDP ((SDP_Type *) HPM_SDP_BASE)
496 
497 #include "hpm_psec_regs.h"
498 /* Address of PSEC instances */
499 /* PSEC base address */
500 #define HPM_PSEC_BASE (0xF3144000UL)
501 /* PSEC base pointer */
502 #define HPM_PSEC ((PSEC_Type *) HPM_PSEC_BASE)
503 
504 #include "hpm_pmon_regs.h"
505 /* Address of PMON instances */
506 /* PMON base address */
507 #define HPM_PMON_BASE (0xF3148000UL)
508 /* PMON base pointer */
509 #define HPM_PMON ((PMON_Type *) HPM_PMON_BASE)
510 
511 #include "hpm_rng_regs.h"
512 /* Address of RNG instances */
513 /* RNG base address */
514 #define HPM_RNG_BASE (0xF314C000UL)
515 /* RNG base pointer */
516 #define HPM_RNG ((RNG_Type *) HPM_RNG_BASE)
517 
518 #include "hpm_keym_regs.h"
519 /* Address of KEYM instances */
520 /* KEYM base address */
521 #define HPM_KEYM_BASE (0xF3154000UL)
522 /* KEYM base pointer */
523 #define HPM_KEYM ((KEYM_Type *) HPM_KEYM_BASE)
524 
525 #include "hpm_otp_regs.h"
526 /* Address of OTP instances */
527 /* OTP base address */
528 #define HPM_OTP_BASE (0xF3158000UL)
529 /* OTP base pointer */
530 #define HPM_OTP ((OTP_Type *) HPM_OTP_BASE)
531 
532 #include "hpm_sysctl_regs.h"
533 /* Address of SYSCTL instances */
534 /* SYSCTL base address */
535 #define HPM_SYSCTL_BASE (0xF4000000UL)
536 /* SYSCTL base pointer */
537 #define HPM_SYSCTL ((SYSCTL_Type *) HPM_SYSCTL_BASE)
538 
539 #include "hpm_ioc_regs.h"
540 /* Address of IOC instances */
541 /* IOC base address */
542 #define HPM_IOC_BASE (0xF4040000UL)
543 /* IOC base pointer */
544 #define HPM_IOC ((IOC_Type *) HPM_IOC_BASE)
545 /* PIOC base address */
546 #define HPM_PIOC_BASE (0xF4118000UL)
547 /* PIOC base pointer */
548 #define HPM_PIOC ((IOC_Type *) HPM_PIOC_BASE)
549 
550 #include "hpm_pllctlv2_regs.h"
551 /* Address of PLLCTLV2 instances */
552 /* PLLCTLV2 base address */
553 #define HPM_PLLCTLV2_BASE (0xF40C0000UL)
554 /* PLLCTLV2 base pointer */
555 #define HPM_PLLCTLV2 ((PLLCTLV2_Type *) HPM_PLLCTLV2_BASE)
556 
557 #include "hpm_ppor_regs.h"
558 /* Address of PPOR instances */
559 /* PPOR base address */
560 #define HPM_PPOR_BASE (0xF4100000UL)
561 /* PPOR base pointer */
562 #define HPM_PPOR ((PPOR_Type *) HPM_PPOR_BASE)
563 
564 #include "hpm_pcfg_regs.h"
565 /* Address of PCFG instances */
566 /* PCFG base address */
567 #define HPM_PCFG_BASE (0xF4104000UL)
568 /* PCFG base pointer */
569 #define HPM_PCFG ((PCFG_Type *) HPM_PCFG_BASE)
570 
571 #include "hpm_pdgo_regs.h"
572 /* Address of PDGO instances */
573 /* PDGO base address */
574 #define HPM_PDGO_BASE (0xF4134000UL)
575 /* PDGO base pointer */
576 #define HPM_PDGO ((PDGO_Type *) HPM_PDGO_BASE)
577 
578 #include "hpm_pgpr_regs.h"
579 /* Address of PGPR instances */
580 /* PGPR0 base address */
581 #define HPM_PGPR0_BASE (0xF4138000UL)
582 /* PGPR0 base pointer */
583 #define HPM_PGPR0 ((PGPR_Type *) HPM_PGPR0_BASE)
584 /* PGPR1 base address */
585 #define HPM_PGPR1_BASE (0xF413C000UL)
586 /* PGPR1 base pointer */
587 #define HPM_PGPR1 ((PGPR_Type *) HPM_PGPR1_BASE)
588 
589 
590 #endif /* HPM_SOC_IP_H */
591