Drivers Examples

• 1. ACMP
  • 1.1. Overview
  • 1.2. Board Setting
  • 1.3. Running the example
• 2. ADC
  • 2.1. ADC12
    • 2.1.1. Overview
    • 2.1.2. Board Setting
    • 2.1.3. Running the example
    • 2.1.4. Note
  • 2.2. ADC16
    • 2.2.1. Overview
    • 2.2.2. Board Setting
    • 2.2.3. Running the example
    • 2.2.4. Note
  • 2.3. ADC16 Temperature
    • 2.3.1. Overview
    • 2.3.2. Board Setting
    • 2.3.3. Running the example
• 3. BGPR Retention
  • 3.1. Overview
  • 3.2. Board Setting
  • 3.3. Running the example
• 4. BUTN
  • 4.1. Overview
  • 4.2. Note
  • 4.3. Board Setting
  • 4.4. Running the example
• 5. CAM_DVP
  • 5.1. Overview
  • 5.2. Board Setting
  • 5.3. Project Setting
  • 5.4. Note
  • 5.5. Running the example
• 6. CAN
  • 6.1. Overview
  • 6.2. Board Setting
  • 6.3. Running the example
    • 6.3.1. Note
• 7. CRC
  • 7.1. Overview
  • 7.2. Board Setting
  • 7.3. Running the example
• 8. DAC
  • 8.1. Overview
  • 8.2. Board Setting
  • 8.3. Running the example
  • 8.4. Note
• 9. DMA
  • 9.1. DMA General Transfer
    • 9.1.1. Overview
    • 9.1.2. Board Setting
    • 9.1.3. Running the example
  • 9.2. DMA Circularly Receives Uart Data
    • 9.2.1. Overview
    • 9.2.2. Board Setting
    • 9.2.3. Running the example
  • 9.3. DMA Use GPTMR Event Transfer
    • 9.3.1. Overview
    • 9.3.2. Board Setting
    • 9.3.3. Notice
    • 9.3.4. Running the example
• 10. DMAV2
  • 10.1. DMAV2 Fixed Burst Transfer and Swap Transfer
    • 10.1.1. Overview
    • 10.1.2. Board Setting
    • 10.1.3. Running the example
  • 10.2. DMAV2 Half Transfer Complete Interrupt
    • 10.2.1. Overview
    • 10.2.2. Board Setting
    • 10.2.3. Running the example
  • 10.3. DMAV2 Circularly Receives Uart Data
    • 10.3.1. Overview
    • 10.3.2. Board Setting
    • 10.3.3. Running the example
• 11. ENET
  • 11.1. PPS Output
    • 11.1.1. Overview
    • 11.1.2. Board Setting
    • 11.1.3. Running the example
  • 11.2. PPS Capture
    • 11.2.1. Overview
    • 11.2.2. Board Setting
    • 11.2.3. Running the example
• 12. EUI
  • 12.1. Overview
  • 12.2. Running the example
  • 12.3. Others
• 13. EWDG
  • 13.1. Overview
  • 13.2. Board Setting
  • 13.3. Running the example
  • 13.4. NOTE
• 14. FEMC
  • 14.1. SDRAM example
    • 14.1.1. Overview
    • 14.1.2. Board Setting
    • 14.1.3. Running the example
  • 14.2. SRAM example
    • 14.2.1. Overview
    • 14.2.2. Board Setting
    • 14.2.3. Running the example
    • 14.2.4. Hint
• 15. FFA
  • 15.1. Overview
  • 15.2. Working Principle
  • 15.3. Hardware Requirements
  • 15.4. Running the example
• 16. GPIO
  • 16.1. Overview
  • 16.2. Board Setting
  • 16.3. Known Issue
  • 16.4. Running the example
  • 16.5. API Usage
    • 16.5.1. IO Initialization
    • 16.5.2. GPIO Controller
• 17. GPIOM
  • 17.1. Overview
  • 17.2. Board Setting
  • 17.3. Running the example
  • 17.4. Tips
• 18. GPTMR
  • 18.1. Overview
  • 18.2. GPTMR Channel Configuration
  • 18.3. Burst Mode
  • 18.4. GPTMR samplse
    • 18.4.1. GPTMR EXTERNAL COUNTER MODE
    • 18.4.2. GPTMR sync counter
    • 18.4.3. GPTMR input captrue
    • 18.4.4. GPTMR MONITOR
    • 18.4.5. GPTMR ONE-SHOT COUNTER MODE
    • 18.4.6. GPTMR output compare
    • 18.4.7. GPTMR generate PWM
    • 18.4.8. GPTMR measure PWM
    • 18.4.9. GPTMR Generates T-Shaped Acceleration and Deceleration Pulses
    • 18.4.10. Timer basic
    • 18.4.11. GPTMR QEI MODE
• 19. GWC
  • 19.1. Overview
  • 19.2. Hardware Configuration
  • 19.3. Running the Program
• 20. Hall
  • 20.1. Overview
  • 20.2. Implementation Details
  • 20.3. Configurations
  • 20.4. Running the Demo
• 21. I2C
  • 21.1. Overview
  • 21.2. I2C Initialization
    • 21.2.1. Master Mode Initialization
    • 21.2.2. Slave Mode Initialization
  • 21.3. I2C Data Transmission
    • 21.3.1. Polling Transfer
    • 21.3.2. Initiate DMA Transfer
  • 21.4. I2C Interrupt
  • 21.5. I2C Samples
    • 21.5.1. i2c_dma_master
    • 21.5.2. i2c_dma_slave
    • 21.5.3. i2c_interrupt_master
    • 21.5.4. i2c_interrupt_slave
    • 21.5.5. i2c_polling_master
    • 21.5.6. i2c_polling_slave
• 22. I2S
  • 22.1. Overview
  • 22.2. I2S Initialization
    • 22.2.1. Master Mode Initialization
    • 22.2.2. Slave Mode Initialization
    • 22.2.3. Multi-line Transfer Configuration
  • 22.3. I2S Data Transfer
    • 22.3.1. Polling Transfer
    • 22.3.2. DMA Transfer
  • 22.4. I2S Interrupts
  • 22.5. Important Notes
  • 22.6. I2S Samples
    • 22.6.1. I2S_DAO_PDM Audio Example
    • 22.6.2. I2S DMA
    • 22.6.3. I2S Interrupt
    • 22.6.4. I2S Master
    • 22.6.5. I2S Slave
    • 22.6.6. DAO_I2S_DMA
• 23. JPEG
  • 23.1. Overview
  • 23.2. Board Setting
  • 23.3. Running the example
• 24. L1 Cache
  • 24.1. Overview
  • 24.2. Port Settings
  • 24.3. Running the example
• 25. LCDC
  • 25.1. Overview
  • 25.2. Board Setting
  • 25.3. Build type
  • 25.4. Running the Example
• 26. LIN
  • 26.1. Overview
  • 26.2. LIN Initialization
    • 26.2.1. Master Mode
    • 26.2.2. Slave Mode
    • 26.2.3. Sleep and Wakeup
  • 26.3. Examples
    • 26.3.1. lin_master
    • 26.3.2. lin_slave
• 27. LOBS
  • 27.1. Overview
  • 27.2. Board Setting
  • 27.3. Running the example
• 28. MBX
  • 28.1. MBX singlecore
    • 28.1.1. Overview
    • 28.1.2. Board Setting
    • 28.1.3. Running the Example
• 29. MCAN
  • 29.1. Overview
  • 29.2. Board Setting
  • 29.3. Running the example
    • 29.3.1. Note:
• 30. MCHTMR
  • 30.1. Overview
  • 30.2. Board Setting
  • 30.3. Running the example
• 31. MIPI_CSI
  • 31.1. Overview
  • 31.2. Hardware Setup
  • 31.3. Project Configuration
  • 31.4. Notes
  • 31.5. Running Phenomenon
• 32. MMC
  • 32.1. MMC_PRED_CLOSE_LOOP
    • 32.1.1. Overview
    • 32.1.2. 硬件设置
    • 32.1.3. Running the example
  • 32.2. MMC_PRED_OPEN_LOOP
    • 32.2.1. Overview
    • 32.2.2. Board Setting
    • 32.2.3. Running the example
• 33. MONO
  • 33.1. Overview
  • 33.2. Board Setting
  • 33.3. Running the example
• 34. MTG
  • 34.1. MTG Trajectory
    • 34.1.1. Overview
    • 34.1.2. Board Setting
    • 34.1.3. Running the example
  • 34.2. MTG QEI ABZ example
    • 34.2.1. Overview
    • 34.2.2. Board Setting
    • 34.2.3. Running the example
  • 34.3. MTG SEI tamagawa example
    • 34.3.1. Overview
    • 34.3.2. Board Setting
    • 34.3.3. Running the example
• 35. MTGV2
  • 35.1. MTGV2 Trajectory
    • 35.1.1. Overview
    • 35.1.2. Board Setting
    • 35.1.3. Running the example
  • 35.2. MTGV2 QEI ABZ example
    • 35.2.1. Overview
    • 35.2.2. Board Setting
    • 35.2.3. Running the example
  • 35.3. MTGV2 SEI tamagawa example
    • 35.3.1. Overview
    • 35.3.2. Board Setting
    • 35.3.3. Running the example
• 36. OPAMP
  • 36.1. Overview
  • 36.2. Board Setting
  • 36.3. Running the example
• 37. 1-Wire
  • 37.1. Overview
  • 37.2. Board Setting
  • 37.3. Background
  • 37.4. Running the example
• 38. PDGO
  • 38.1. Overview
  • 38.2. Board Setting
  • 38.3. Running the example
• 39. PDMA
  • 39.1. Overview
  • 39.2. Board Setting
  • 39.3. Build type
  • 39.4. Running the example
• 40. PLA
  • 40.1. Pulse Output
    • 40.1.1. Overview
    • 40.1.2. Board Setting
    • 40.1.3. Function Description
    • 40.1.4. Running the example
  • 40.2. Tamagawa Encoder Communication
    • 40.2.1. Overview
    • 40.2.2. Board Setting
    • 40.2.3. Software Architecture
    • 40.2.4. Running the example
• 41. PLB
  • 41.1. Filter Output
    • 41.1.1. Overview
    • 41.1.2. Board Setting
    • 41.1.3. Outline Design
    • 41.1.4. Running the example
  • 41.2. Pulse Output
    • 41.2.1. Overview
    • 41.2.2. Configuration
    • 41.2.3. Board Setting
    • 41.2.4. Running the example
  • 41.3. PLB QEI Encoder Example
    • 41.3.1. Overview
    • 41.3.2. Board Setting
    • 41.3.3. Running the example
    • 41.3.4. Notes
• 42. PLIC
  • 42.1. Overview
  • 42.2. Board Setting
  • 42.3. Running the example
• 43. PLLCTL
  • 43.1. PLLCTL
    • 43.1.1. Overview
    • 43.1.2. Board Setting
    • 43.1.3. Running the example
  • 43.2. PLLCTL SPREAD SPECTRUM
    • 43.2.1. Overview
    • 43.2.2. Board Setting
    • 43.2.3. Running the example
• 44. PLLCTLV2
  • 44.1. PLLCTLV2 BASIC
    • 44.1.1. Overview
    • 44.1.2. Board Setting
    • 44.1.3. Running the example
  • 44.2. PLLCTLV2 SPREAD SPECTRUM
    • 44.2.1. Overview
    • 44.2.2. Board Setting
    • 44.2.3. Running the example
• 45. PMP
  • 45.1. Overview
  • 45.2. Board Setting
  • 45.3. Running the example
• 46. PPI
  • 46.1. PPI ASYNC SRAM example
    • 46.1.1. Overview
    • 46.1.2. Board Setting
    • 46.1.3. Cache Configuration Notes
    • 46.1.4. Running the example
  • 46.2. PPI Parallel ADC example
    • 46.2.1. Overview
    • 46.2.2. Board Setting
    • 46.2.3. Running the example
• 47. PPOR
  • 47.1. Overview
  • 47.2. Board Setting
  • 47.3. Running the example
• 48. PTPC
  • 48.1. Overview
  • 48.2. Board Setting
  • 48.3. Running the example
• 49. PWM
  • 49.1. HRPwm Output
    • 49.1.1. Overview
    • 49.1.2. Configurations
    • 49.1.3. Running the Demo
  • 49.2. Pwm Capture
    • 49.2.1. Overiew
    • 49.2.2. Configurations
    • 49.2.3. Details
    • 49.2.4. Main Function Description
    • 49.2.5. Running the Demo
    • 49.2.6. Notes
  • 49.3. PWM Output
    • 49.3.1. Overview
    • 49.3.2. Hardware Requirements
    • 49.3.3. Configuration
    • 49.3.4. Running the Demo
• 50. PWMV2
  • 50.1. Compare Point Matching
    • 50.1.1. Overiew
    • 50.1.2. Configurations
    • 50.1.3. Running the Demo
  • 50.2. Fix Duty Cycle
    • 50.2.1. Overiew
    • 50.2.2. Configurations
    • 50.2.3. Running the Demo
  • 50.3. HRPWM Calibration
    • 50.3.1. Overiew
    • 50.3.2. Configurations
    • 50.3.3. Running the Demo
  • 50.4. The phase shifting of PWM
    • 50.4.1. Overiew
    • 50.4.2. Configurations
    • 50.4.3. Running the Demo
  • 50.5. Pwm Output
    • 50.5.1. Overview
    • 50.5.2. Configurations
    • 50.5.3. Running the Demo
  • 50.6. PWM Synchronous Output
    • 50.6.1. Overiew
    • 50.6.2. Configurations
    • 50.6.3. Running the Demo
• 51. QEI
  • 51.1. Overview
  • 51.2. Configurations
  • 51.3. Running the Demo
• 52. QEIV2
  • 52.1. QEIV2 ABZ Encoder
    • 52.1.1. Overview
    • 52.1.2. Configurations
    • 52.1.3. Running the Demo
  • 52.2. QEIV2 ABZ Encoder Oneshot Mode
    • 52.2.1. Overview
    • 52.2.2. Configurations
    • 52.2.3. Running the Demo
  • 52.3. QEIV2 Sin Mode TOGI
    • 52.3.1. Overview
    • 52.3.2. Configurations
    • 52.3.3. Running the Demo
  • 52.4. QEIV2 Sin/Cos Encoder
    • 52.4.1. Overview
    • 52.4.2. Configurations
    • 52.4.3. Running the Demo
  • 52.5. QEIV2 UVW Encoder
    • 52.5.1. Overview
    • 52.5.2. Configurations
    • 52.5.3. Running the Demo
• 53. QEO
  • 53.1. Overview
  • 53.2. Features
  • 53.3. API Description
    • 53.3.1. Waveform Output APIs
    • 53.3.2. ABZ Output APIs
    • 53.3.3. PWM Output APIs
    • 53.3.4. Position Control APIs
  • 53.4. Examples
    • 53.4.1. QEO_ABZ_OUT
    • 53.4.2. QEO_DAC_OUT
    • 53.4.3. QEO_PWM_OUT
• 54. QEOV2
  • 54.1. Overview
  • 54.2. Features
  • 54.3. API Description
    • 54.3.1. Position Control APIs
    • 54.3.2. ABZ Output APIs
    • 54.3.3. PWM and Waveform Output APIs
  • 54.4. Examples
    • 54.4.1. QEOV2_SEI2ABZ
    • 54.4.2. QEOV2_PWM_OUT
    • 54.4.3. QEOV2_WAVE_OUT
    • 54.4.4. QEOV2_ABZ_OUT
• 55. RDC
  • 55.1. Overview
  • 55.2. Board Setting
  • 55.3. Running the example
• 56. RNG
  • 56.1. Overview
  • 56.2. Board Setting
  • 56.3. Running the example
• 57. RTC
  • 57.1. Overview
  • 57.2. Board Setting
  • 57.3. Running the example
  • 57.4. NOTE
• 58. SDM
  • 58.1. Overview
  • 58.2. Key Features
  • 58.3. SDM Initialization
  • 58.4. Data Filter Configuration
  • 58.5. Amplitude Detector Configuration
  • 58.6. Data Transfer
  • 58.7. Synchronous Sampling
  • 58.8. Sample Workflow
  • 58.9. Hardware Setting
  • 58.10. Notes
  • 58.11. Running the example
    • 58.11.1. 1. SDM sample data in polling mode
    • 58.11.2. 2. SDM amplitude threshold check
    • 58.11.3. 3. SDM sample data in interrupt mode
    • 58.11.4. 4. SDM sample data with sync signal
• 59. SDXC
  • 59.1. eMMC low-level API demo
    • 59.1.1. Overview
    • 59.1.2. Board Setting
    • 59.1.3. Running the example
  • 59.2. SDXC low-level API demo
    • 59.2.1. Overview
    • 59.2.2. Board Setting
    • 59.2.3. Running the example
  • 59.3. SDCard FATFS demo
    • 59.3.1. Overview
    • 59.3.2. Board Setting
    • 59.3.3. Running the example
• 60. SEI
  • 60.1. SEI Master: Connect BISSC Encoder
    • 60.1.1. Overview
    • 60.1.2. configuration
    • 60.1.3. Running the example
  • 60.2. SEI Master: Connect ENDAT Encoder
    • 60.2.1. Overview
    • 60.2.2. configuration
    • 60.2.3. Running the example
  • 60.3. SEI Master: Connect HIPERFACE Encoder
    • 60.3.1. Overview
    • 60.3.2. configuration
    • 60.3.3. Running the example
  • 60.4. SEI Master: Connect NIKON Encoder
    • 60.4.1. Overview
    • 60.4.2. configuration
    • 60.4.3. Running the example
  • 60.5. SEI Master: Connect SSI Encoder
    • 60.5.1. Overview
    • 60.5.2. configuration
    • 60.5.3. Running the example
  • 60.6. SEI Master: Connect TAMAGAWA Encoder
    • 60.6.1. Overview
    • 60.6.2. configuration
    • 60.6.3. Running the example
  • 60.7. SEI Slave: Simulate BISSC Encoder
    • 60.7.1. Overview
    • 60.7.2. configuration
    • 60.7.3. Running the example
  • 60.8. SEI Slave: Simulate ENDAT Encoder
    • 60.8.1. Overview
    • 60.8.2. configuration
    • 60.8.3. Running the example
  • 60.9. SEI Slave: Simulate HIPERFACE Encoder
    • 60.9.1. Overview
    • 60.9.2. Configuration
    • 60.9.3. Running the example
  • 60.10. SEI Slave: Simulate NIKON Encoder
    • 60.10.1. Overview
    • 60.10.2. configuration
    • 60.10.3. Running the example
  • 60.11. SEI Slave: Simulate SSI Encoder
    • 60.11.1. Overview
    • 60.11.2. configuration
    • 60.11.3. Running the example
  • 60.12. SEI Slave: Simulate TAMAGAWA Encoder
    • 60.12.1. Overview
    • 60.12.2. Configuration
    • 60.12.3. Running the example
• 61. SMIX
  • 61.1. SMIX
    • 61.1.1. Overview
    • 61.1.2. Project Configuration
    • 61.1.3. Board Setting
    • 61.1.4. Known Issue
    • 61.1.5. Running the example
  • 61.2. SMIX_DAO
    • 61.2.1. Overview
    • 61.2.2. Workflow
    • 61.2.3. Audio Configuration
    • 61.2.4. Hardware Settings
    • 61.2.5. Known Issues
    • 61.2.6. Running the Example
• 62. SPI
  • 62.1. Overview
  • 62.2. SPI Initialization
    • 62.2.1. SPI SCLK Clock Configuration
    • 62.2.2. SPI Format Configuration
  • 62.3. SPI Data Transmission
  • 62.4. Interrupt
  • 62.5. SPI samples
    • 62.5.1. SPI_DMA_MASTER
    • 62.5.2. SPI_DMA_SLAVE
    • 62.5.3. SPI_INTERRUPT_MASTER
    • 62.5.4. SPI_INTERRUPT_SLAVEINTERRUPT
    • 62.5.5. SPI_MASTER_TRANS_LARGE_AMOUNT_OF_DATA
    • 62.5.6. SPI_POLLING_MASTER
    • 62.5.7. SPI_POLLING_SLAVE
    • 62.5.8. SPI READ SSI ENCODER
• 63. SYNT
  • 63.1. Overview
  • 63.2. Board Setting
  • 63.3. Running the example
• 64. TAMP
  • 64.1. Overview
  • 64.2. Board Setting
  • 64.3. Running the example
• 65. TFA
  • 65.1. Overview
  • 65.2. Hardware Configuration
  • 65.3. Toolchain Requirements
  • 65.4. Running the Program
• 66. TSNS
  • 66.1. Overview
  • 66.2. Board Setting
  • 66.3. Running the example
• 67. UART
  • 67.1. Overview
  • 67.2. UART Initialization
  • 67.3. UART Transmission
    • 67.3.1. Transmission
  • 67.4. UART Reception
    • 67.4.1. Reception
  • 67.5. Hardware Flow Control
    • 67.5.1. CTS Flow Control Implementation
    • 67.5.2. Interrupt
  • 67.6. UART samples
    • 67.6.1. UART_9bit
    • 67.6.2. Use DMA to receive and send UART data
    • 67.6.3. UART hardware rx idle detection
    • 67.6.4. UART Interrupt
    • 67.6.5. UART LIN Master Example
    • 67.6.6. UART LIN Slave Example
    • 67.6.7. UART LIN Slave with Baudrate Adaptive Example
    • 67.6.8. UART_RXLINE_STATUS
    • 67.6.9. UART rx timeout
    • 67.6.10. UART software rx idle detection
    • 67.6.11. UART tomagawa
• 68. VAD
  • 68.1. Overview
  • 68.2. Board Setting
  • 68.3. Known issues
  • 68.4. Running the example
• 69. VSC
  • 69.1. VSC demo
    • 69.1.1. Overview
    • 69.1.2. Board Setting
    • 69.1.3. Running the example
• 70. WDG
  • 70.1. Overview
  • 70.2. Board Setting
  • 70.3. Running the example