hpm_mcan_soc.h

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/*
 * Copyright (c) 2023 HPMicro
 *
 * SPDX-License-Identifier: BSD-3-Clause
 *
 */
 
#ifndef HPM_MCAN_SOC_H
#define HPM_MCAN_SOC_H
 
#include <stdint.h>
#include "hpm_mcan_regs.h"
 
#define MCAN_TSU_EXT_TIMEBASE_SRC_MIN   (0U)
#define MCAN_TSU_EXT_TIMEBASE_SRC_MCAN0 (MCAN_TSU_EXT_TIMEBASE_SRC_MIN)
#define MCAN_TSU_EXT_TIMEBASE_SRC_MCAN1 (1U)
#define MCAN_TSU_EXT_TIMEBASE_SRC_MCAN2 (2U)
#define MCAN_TSU_EXT_TIMEBASE_SRC_MCAN3 (3U)
#define MCAN_TSU_EXT_TIMEBASE_SRC_PTPC  (4U)
#define MCAN_TSU_EXT_TIMEBASE_SRC_MAX   (MCAN_TSU_EXT_TIMEBASE_SRC_PTPC)
 
#ifdef __cpluspus
extern "C" {
#endif
 
static inline void mcan_set_tsu_ext_timebase_src(MCAN_Type *ptr, uint8_t src)
{
    ptr->GLB_CTL = (ptr->GLB_CTL & ~MCAN_GLB_CTL_TSU_TBIN_SEL_MASK) | MCAN_GLB_CTL_TSU_TBIN_SEL_SET(src);
}
 
static inline void mcan_enable_standby_pin(MCAN_Type *ptr)
{
    ptr->GLB_CTL |= MCAN_GLB_CTL_M_CAN_STBY_MASK;
}
 
static inline void mcan_disable_standby_pin(MCAN_Type *ptr)
{
    ptr->GLB_CTL &= ~MCAN_GLB_CTL_M_CAN_STBY_MASK;
}
 
static inline uint32_t mcan_get_ram_base(MCAN_Type *ptr)
{
    return (uint32_t) &ptr->MESSAGE_BUFF[0];
}
 
static inline uint32_t mcan_get_ram_offset(MCAN_Type *ptr)
{
    (void) ptr;
    return 0U;
}
 
static inline uint32_t mcan_get_ram_size(MCAN_Type *ptr)
{
    return sizeof(ptr->MESSAGE_BUFF);
}
 
#ifdef __cpluspus
}
#endif
 
#endif /* HPM_MCAN_SOC_H */