26 #define HPM_XPI0_BASE (0xF3040000UL)
28 #define HPM_XPI0 ((XPI_Type *) HPM_XPI0_BASE)
45 uint32_t peripheral: 8;
59 #define API_BOOT_TAG (0xEBU)
60 #define API_BOOT_SRC_OTP (0U)
61 #define API_BOOT_SRC_PRIMARY (1U)
62 #define API_BOOT_SRC_SERIAL_BOOT (2U)
63 #define API_BOOT_SRC_ISP (3U)
64 #define API_BOOT_PERIPH_AUTO (0U)
65 #define API_BOOT_PERIPH_UART (1U)
66 #define API_BOOT_PERIPH_USBHID (2U)
79 uint32_t (*read_from_shadow)(uint32_t addr);
81 uint32_t (*read_from_ip)(uint32_t addr);
83 hpm_stat_t (*program)(uint32_t addr,
const uint32_t *src, uint32_t num_of_words);
91 hpm_stat_t (*set_configurable_region)(uint32_t start, uint32_t num_of_words);
93 hpm_stat_t (*write_shadow_register)(uint32_t addr, uint32_t data);
113 hpm_stat_t (*update_instr_table)(
XPI_Type *base,
const uint32_t *inst_base, uint32_t seq_idx, uint32_t num);
117 void (*software_reset)(
XPI_Type *base);
121 void (*update_dllcr)(
XPI_Type *base,
122 uint32_t serial_root_clk_freq,
123 uint32_t data_valid_time,
125 uint32_t dly_target);
149 uint16_t *out_status);
202 uint32_t reserved0[3];
245 const uint8_t *input,
249 (*aes_crypt_ctr)(
sdp_aes_ctx_t *aes_ctx, uint8_t *nonce_ctr, uint8_t *input, uint8_t *output, uint32_t length);
253 const uint8_t *nonce,
257 const uint8_t *input,
264 const uint8_t *nonce,
268 const uint8_t *input,
285 hpm_stat_t (*sm4_crypt_ecb)(sdp_sm4_ctx_t *sm4_ctx, sdp_sm4_op_t op, uint32_t len,
const uint8_t *in, uint8_t *out);
287 hpm_stat_t (*sm4_crypt_cbc)(sdp_sm4_ctx_t *sm4_ctx,
291 const uint8_t *input,
295 (*sm4_crypt_ctr)(sdp_sm4_ctx_t *sm4_ctx, uint8_t *nonce_ctr, uint8_t *input, uint8_t *output, uint32_t length);
297 hpm_stat_t (*sm4_ccm_gen_enc)(sdp_sm4_ctx_t *sm4_ctx,
299 const uint8_t *nonce,
303 const uint8_t *input,
308 hpm_stat_t (*sm4_ccm_dec_verify)(sdp_sm4_ctx_t *sm4_ctx,
310 const uint8_t *nonce,
314 const uint8_t *input,
325 const uint32_t version;
327 const char *copyright;
343 #define ROM_API_TABLE_ROOT ((const bootloader_api_table_t *)0x2001FF00U)
381 static const uint32_t s_setup_code[] = {
382 0x300027f3, 0xf6b36719, 0xe68100e7, 0x90738fd9, 0x80823007,
386 void (*callback)(void);
387 const uint32_t *buffer;
389 volatile api_setup_entry_t entry;
390 entry.buffer = &s_setup_code[0];
436 return ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase(base, channel, nor_config, start, length);
452 return ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase_sector(base, channel, nor_config, start);
468 return ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase_sector_nonblocking(base, channel, nor_config, start);
484 return ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase_block(base, channel, nor_config, start);
500 return ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase_block_nonblocking(base, channel, nor_config, start);
528 return ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase_chip_nonblocking(base, channel, nor_config);
548 return ROM_API_TABLE_ROOT->xpi_nor_driver_if->program(base, channel, nor_config, src, dst_addr, length);
569 ->page_program_nonblocking(base, channel, nor_config, src, dst_addr, length);
589 return ROM_API_TABLE_ROOT->xpi_nor_driver_if->read(base, channel, nor_config, dst, start, length);
617 uint32_t property_id,
620 return ROM_API_TABLE_ROOT->xpi_nor_driver_if->get_property(base, nor_cfg, property_id, value);
635 uint16_t *out_status)
637 return ROM_API_TABLE_ROOT->xpi_nor_driver_if->get_status(base, channel, nor_config, addr, out_status);
652 if ((base !=
HPM_XPI0) || ((start & 0xFFF) != 0) || ((len & 0xFFF) != 0)
653 || ((offset & 0xFFF) != 0)) {
656 static const uint8_t k_mc_xpi_remap_config[] = {
657 0x2e, 0x96, 0x23, 0x22, 0xc5, 0x42, 0x23, 0x24,
658 0xd5, 0x42, 0x93, 0xe5, 0x15, 0x00, 0x23, 0x20,
659 0xb5, 0x42, 0x05, 0x45, 0x82, 0x80,
661 typedef bool (*remap_config_cb_t)(
XPI_Type *, uint32_t, uint32_t, uint32_t);
662 remap_config_cb_t cb = (remap_config_cb_t) &k_mc_xpi_remap_config;
663 bool result = cb(base, start, len, offset);
676 static const uint8_t k_mc_xpi_remap_disable[] = {
677 0x83, 0x27, 0x05, 0x42, 0xf9, 0x9b, 0x23, 0x20,
678 0xf5, 0x42, 0x82, 0x80,
680 typedef void (*remap_disable_cb_t)(
XPI_Type *);
681 remap_disable_cb_t cb = (remap_disable_cb_t) &k_mc_xpi_remap_disable;
696 static const uint8_t k_mc_xpi_remap_enabled[] = {
697 0x03, 0x25, 0x05, 0x42, 0x05, 0x89, 0x82, 0x80,
699 typedef bool (*remap_chk_cb_t)(
XPI_Type *);
700 remap_chk_cb_t chk_cb = (remap_chk_cb_t) &k_mc_xpi_remap_enabled;
718 static const uint8_t k_mc_exip_region_config[] = {
719 0x18, 0x4a, 0x9a, 0x05, 0x2e, 0x95, 0x85, 0x67,
720 0xaa, 0x97, 0x23, 0xa4, 0xe7, 0xd0, 0x4c, 0x4a,
721 0x14, 0x42, 0x58, 0x42, 0x23, 0xa6, 0xb7, 0xd0,
722 0x4c, 0x46, 0x36, 0x97, 0x13, 0x77, 0x07, 0xc0,
723 0x23, 0xa2, 0xb7, 0xd0, 0x0c, 0x46, 0x13, 0x67,
724 0x37, 0x00, 0x05, 0x45, 0x23, 0xa0, 0xb7, 0xd0,
725 0x0c, 0x4e, 0x23, 0xaa, 0xb7, 0xd0, 0x50, 0x4e,
726 0x23, 0xa8, 0xc7, 0xd0, 0x23, 0xac, 0xd7, 0xd0,
727 0x23, 0xae, 0xe7, 0xd0, 0x82, 0x80,
730 exip_region_config_cb_t cb = (exip_region_config_cb_t) &k_mc_exip_region_config;
731 cb(base, index, param);
745 static const uint8_t k_mc_exip_region_disable[] = {
746 0x9a, 0x05, 0x2e, 0x95, 0x85, 0x67, 0xaa, 0x97,
747 0x03, 0xa7, 0xc7, 0xd1, 0x75, 0x9b, 0x23, 0xae,
748 0xe7, 0xd0, 0x82, 0x80
750 typedef void (*exip_region_disable_cb_t)(
XPI_Type *, uint32_t);
751 exip_region_disable_cb_t cb = (exip_region_disable_cb_t) &k_mc_exip_region_disable;
764 static const uint8_t k_mc_exip_enable[] = {
765 0x85, 0x67, 0x3e, 0x95, 0x83, 0x27, 0x05, 0xc0,
766 0x37, 0x07, 0x00, 0x80, 0xd9, 0x8f, 0x23, 0x20,
767 0xf5, 0xc0, 0x82, 0x80
769 typedef void (*exip_enable_cb_t)(
XPI_Type *);
770 exip_enable_cb_t cb = (exip_enable_cb_t) &k_mc_exip_enable;
781 static const uint8_t k_mc_exip_disable[] = {
782 0x85, 0x67, 0x3e, 0x95, 0x83, 0x27, 0x05, 0xc0,
783 0x86, 0x07, 0x85, 0x83, 0x23, 0x20, 0xf5, 0xc0,
786 typedef void (*exip_disable_cb_t)(
XPI_Type *);
787 exip_disable_cb_t cb = (exip_disable_cb_t) &k_mc_exip_disable;
861 return ROM_API_TABLE_ROOT->sdp_driver_if->aes_set_key(aes_ctx, key, key_bits, key_idx);
899 return ROM_API_TABLE_ROOT->sdp_driver_if->aes_crypt_cbc(aes_ctx, op, length, iv, in, out);
915 return ROM_API_TABLE_ROOT->sdp_driver_if->sm4_set_key(sm4_ctx, key, key_bits, key_idx);
953 return ROM_API_TABLE_ROOT->sdp_driver_if->sm4_crypt_cbc(sm4_ctx, op, length, iv, in, out);
static hpm_stat_t rom_sdp_memset(sdp_dma_ctx_t *dma_ctx, void *dst, uint8_t pattern, uint32_t length)
SDP memset operation.
Definition: hpm_romapi.h:1011
static hpm_stat_t rom_sdp_aes_crypt_cbc(sdp_aes_ctx_t *aes_ctx, sdp_aes_op_t op, uint32_t length, uint8_t iv[16], const uint8_t *in, uint8_t *out)
SDP AES CBC crypto operation(Encrypt or Decrypt)
Definition: hpm_romapi.h:892
static hpm_stat_t rom_xpi_nor_auto_config(XPI_Type *base, xpi_nor_config_t *config, xpi_nor_config_option_t *cfg_option)
Automatically configure XPI NOR based on cfg_option.
Definition: hpm_romapi.h:599
static hpm_stat_t rom_xpi_nor_init(XPI_Type *base, xpi_nor_config_t *nor_config)
Initialize XPI NOR based on nor_config.
Definition: hpm_romapi.h:416
static hpm_stat_t rom_xpi_nor_read(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t *dst, uint32_t start, uint32_t length)
Read data from specified FLASH address.
Definition: hpm_romapi.h:582
static hpm_stat_t rom_sdp_sm4_crypt_cbc(sdp_sm4_ctx_t *sm4_ctx, sdp_sm4_op_t op, uint32_t length, uint8_t iv[16], const uint8_t *in, uint8_t *out)
SDP SM4 CBC crypto operation(Encrypt or Decrypt)
Definition: hpm_romapi.h:946
static hpm_stat_t rom_xpi_nor_erase_chip_nonblocking(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config)
Erase the whole FLASH in non-blocking way.
Definition: hpm_romapi.h:524
static hpm_stat_t rom_xpi_nor_erase_chip(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config)
Erase the whole FLASH in blocking way.
Definition: hpm_romapi.h:510
static hpm_stat_t rom_sdp_memcpy(sdp_dma_ctx_t *dma_ctx, void *dst, const void *src, uint32_t length)
SDP memcpy operation.
Definition: hpm_romapi.h:998
static hpm_stat_t rom_xpi_nor_erase_block(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t start)
Erase specified FLASH blcok in blocking way.
Definition: hpm_romapi.h:479
static ATTR_RAMFUNC bool rom_xpi_nor_remap_config(XPI_Type *base, uint32_t start, uint32_t len, uint32_t offset)
Configure the XPI Address Remapping Logic.
Definition: hpm_romapi.h:650
static hpm_stat_t rom_sdp_sm4_crypt_ecb(sdp_sm4_ctx_t *sm4_ctx, sdp_sm4_op_t op, uint32_t len, const uint8_t *in, uint8_t *out)
SDP SM4 ECB crypto operation(Encrypt or Decrypt)
Definition: hpm_romapi.h:927
static ATTR_RAMFUNC bool rom_xpi_nor_exip_region_config(XPI_Type *base, uint32_t index, exip_region_param_t *param)
Configure Specified EXiP Region.
Definition: hpm_romapi.h:713
static ATTR_RAMFUNC void rom_xpi_nor_exip_enable(XPI_Type *base)
Enable global EXiP logic.
Definition: hpm_romapi.h:762
static hpm_stat_t rom_sdp_sm4_set_key(sdp_sm4_ctx_t *sm4_ctx, const uint8_t *key, sdp_sm4_key_bits_t key_bits, uint32_t key_idx)
Set SM4 key to SDP.
Definition: hpm_romapi.h:910
static void rom_sdp_init(void)
Initialize SDP IP.
Definition: hpm_romapi.h:835
static hpm_stat_t rom_xpi_nor_page_program_nonblocking(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, const uint32_t *src, uint32_t dst_addr, uint32_t length)
Page-Program data to specified FLASH address in non-blocking way.
Definition: hpm_romapi.h:561
static ATTR_RAMFUNC void rom_xpi_nor_exip_region_disable(XPI_Type *base, uint32_t index)
Disable EXiP Feature on specified EXiP Region.
Definition: hpm_romapi.h:743
static hpm_stat_t rom_xpi_nor_erase_sector_nonblocking(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t start)
Erase specified FLASH sector in non-blocking way.
Definition: hpm_romapi.h:463
static hpm_stat_t rom_xpi_nor_erase(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t start, uint32_t length)
Erase specified FLASH region.
Definition: hpm_romapi.h:430
static hpm_stat_t rom_enter_bootloader(void *ctx)
Eneter specified Boot mode.
Definition: hpm_romapi.h:363
static ATTR_RAMFUNC void rom_xpi_nor_remap_disable(XPI_Type *base)
Disable XPI Remapping logic.
Definition: hpm_romapi.h:674
static hpm_stat_t rom_sdp_aes_set_key(sdp_aes_ctx_t *aes_ctx, const uint8_t *key, sdp_aes_key_bits_t key_bits, uint32_t key_idx)
Set AES key to SDP.
Definition: hpm_romapi.h:856
static void rom_sdp_deinit(void)
De-initialize SDP IP.
Definition: hpm_romapi.h:843
static hpm_stat_t rom_xpi_nor_get_status(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t addr, uint16_t *out_status)
Return the status register value on XPI NOR FLASH.
Definition: hpm_romapi.h:633
static hpm_stat_t rom_xpi_nor_erase_block_nonblocking(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t start)
Erase specified FLASH blcok in non-blocking way.
Definition: hpm_romapi.h:495
static ATTR_RAMFUNC void rom_xpi_nor_exip_disable(XPI_Type *base)
Disable global EXiP logic.
Definition: hpm_romapi.h:779
static hpm_stat_t rom_xpi_nor_program(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, const uint32_t *src, uint32_t dst_addr, uint32_t length)
Program data to specified FLASH address in blocking way.
Definition: hpm_romapi.h:541
static ATTR_RAMFUNC bool rom_xpi_nor_is_remap_enabled(XPI_Type *base)
Check whether XPI Remapping is enabled.
Definition: hpm_romapi.h:694
static hpm_stat_t rom_sdp_hash_finish(sdp_hash_ctx_t *hash_ctx, uint8_t *digest)
HASH finialize.
Definition: hpm_romapi.h:985
static hpm_stat_t rom_sdp_hash_update(sdp_hash_ctx_t *hash_ctx, const uint8_t *data, uint32_t length)
HASH Update.
Definition: hpm_romapi.h:974
static hpm_stat_t rom_sdp_aes_crypt_ecb(sdp_aes_ctx_t *aes_ctx, sdp_aes_op_t op, uint32_t len, const uint8_t *in, uint8_t *out)
SDP AES ECB crypto operation(Encrypt or Decrypt)
Definition: hpm_romapi.h:873
static hpm_stat_t rom_xpi_nor_get_property(XPI_Type *base, xpi_nor_config_t *nor_cfg, uint32_t property_id, uint32_t *value)
Get XPI NOR properties.
Definition: hpm_romapi.h:615
static hpm_stat_t rom_xpi_nor_get_config(XPI_Type *base, xpi_nor_config_t *nor_cfg, xpi_nor_config_option_t *cfg_option)
Get XPI NOR configuration via cfg_option.
Definition: hpm_romapi.h:402
static hpm_stat_t rom_sdp_hash_init(sdp_hash_ctx_t *hash_ctx, sdp_hash_alg_t alg)
HASH initialization.
Definition: hpm_romapi.h:962
static hpm_stat_t rom_xpi_nor_erase_sector(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t start)
Erase specified FLASH sector in blocking way.
Definition: hpm_romapi.h:447
uint32_t hpm_stat_t
Definition: hpm_common.h:119
otp_region_t
OTP region definitions.
Definition: hpm_otp_drv.h:24
otp_lock_option_t
OTP lock options.
Definition: hpm_otp_drv.h:34
static void rom_xpi_nor_api_setup(void)
Setup API Runtime environment on demand.
Definition: hpm_romapi.h:379
#define HPM_XPI0
Definition: hpm_romapi.h:28
#define ROM_API_TABLE_ROOT
Definition: hpm_romapi.h:343
static hpm_stat_t rom_xpi_ram_get_config(XPI_Type *base, xpi_ram_config_t *ram_cfg, xpi_ram_config_option_t *cfg_option)
Get XPI RAM configuration based on cfg_option.
Definition: hpm_romapi.h:807
static hpm_stat_t rom_xpi_ram_init(XPI_Type *base, xpi_ram_config_t *ram_cfg)
Initialize XPI RAM.
Definition: hpm_romapi.h:820
sdp_crypto_op_t
Crypto operation option.
Definition: hpm_sdp_drv.h:44
sdp_crypto_key_bits_t
SDP AES key bit options.
Definition: hpm_sdp_drv.h:29
sdp_hash_alg_t
SDP HASH algorithm definitions.
Definition: hpm_sdp_drv.h:75
xpi_xfer_channel_t
XPI Transfer Channel type definitions.
Definition: hpm_romapi_xpi_def.h:53
uint32_t XPI_Type
XPI_Type definitions for.
Definition: hpm_romapi_xpi_def.h:22
xpi_channel_t
XPI Channel defitions.
Definition: hpm_romapi_xpi_def.h:64
#define fencei()
execute fence.i
Definition: riscv_core.h:88
Bootloader API table.
Definition: hpm_romapi.h:243
const xpi_ram_driver_interface_t * xpi_ram_driver_if
Definition: hpm_romapi.h:337
Definition: hpm_romapi.h:52
OTP driver interface.
Definition: hpm_romapi.h:82
SDP AES context structure.
Definition: hpm_sdp_drv.h:132
SDP DMA context.
Definition: hpm_sdp_drv.h:152
SDP API interface.
Definition: hpm_romapi.h:243
SDP HASH context.
Definition: hpm_sdp_drv.h:159
Definition: hpm_romapi_xpi_soc_def.h:28
XPI configuration structure.
Definition: hpm_romapi_xpi_def.h:160
XPI Device Configuration structure.
Definition: hpm_romapi_xpi_def.h:173
XPI driver interface.
Definition: hpm_romapi.h:110
XPI NOR configuration option The ROM SW can detect the FLASH configuration based on the following str...
Definition: hpm_romapi_xpi_nor_def.h:136
XPI NOR configuration structure.
Definition: hpm_romapi_xpi_nor_def.h:261
XPI NOR driver interface.
Definition: hpm_romapi.h:145
XPI RAM configuration option The ROM SW can detect the FLASH configuration based on the following str...
Definition: hpm_romapi_xpi_ram_def.h:39
XPI RAM configuration structure.
Definition: hpm_romapi_xpi_ram_def.h:152
XPI RAM driver interface.
Definition: hpm_romapi.h:215
uint32_t version
Definition: hpm_romapi.h:217
XPI Xfer context.
Definition: hpm_romapi_xpi_def.h:93
Enter Bootloader API argument.
Definition: hpm_romapi.h:41