HPM SDK
HPMicro Software Development Kit
hpm_romapi.h
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1 /*
2  * Copyright (c) 2021-2023 HPMicro
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  *
6  */
7 
8 #ifndef HPM_ROMAPI_H
9 #define HPM_ROMAPI_H
10 
17 #include "hpm_common.h"
18 #include "hpm_otp_drv.h"
19 #include "hpm_romapi_xpi_def.h"
20 #include "hpm_romapi_xpi_soc_def.h"
21 #include "hpm_romapi_xpi_nor_def.h"
22 #include "hpm_romapi_xpi_ram_def.h"
23 #include "hpm_sdp_drv.h"
24 
25 /* XPI0 base address */
26 #define HPM_XPI0_BASE (0xF3040000UL)
27 /* XPI0 base pointer */
28 #define HPM_XPI0 ((XPI_Type *) HPM_XPI0_BASE)
29 /* XPI1 base address */
30 #define HPM_XPI1_BASE (0xF3044000UL)
31 /* XPI1 base pointer */
32 #define HPM_XPI1 ((XPI_Type *) HPM_XPI1_BASE)
35 /***********************************************************************************************************************
36  *
37  *
38  * Definitions
39  *
40  *
41  **********************************************************************************************************************/
45 typedef union {
46  uint32_t U;
47  struct {
48  uint32_t index: 8;
49  uint32_t peripheral: 8;
50  uint32_t src: 8;
51  uint32_t tag: 8;
52  };
54 
55 /*EXiP Region Parameter */
56 typedef struct {
57  uint32_t start;
58  uint32_t len;
59  uint8_t key[16];
60  uint8_t ctr[8];
62 
63 #define API_BOOT_TAG (0xEBU)
64 #define API_BOOT_SRC_OTP (0U)
65 #define API_BOOT_SRC_PRIMARY (1U)
66 #define API_BOOT_SRC_SERIAL_BOOT (2U)
67 #define API_BOOT_SRC_ISP (3U)
68 #define API_BOOT_PERIPH_AUTO (0U)
69 #define API_BOOT_PERIPH_UART (1U)
70 #define API_BOOT_PERIPH_USBHID (2U)
72 typedef struct {
73  uint32_t _internal[138];
75 
76 
77 #define SM4_ENCRYPT 1
78 #define SM4_DECRYPT 0
79 
80 typedef struct {
81  uint32_t mode;
82  uint32_t _internal[116];
84 
88 typedef struct {
90  uint32_t version;
92  void (*init)(void);
94  void (*deinit)(void);
96  uint32_t (*read_from_shadow)(uint32_t addr);
98  uint32_t (*read_from_ip)(uint32_t addr);
100  hpm_stat_t (*program)(uint32_t addr, const uint32_t *src, uint32_t num_of_words);
102  hpm_stat_t (*reload)(otp_region_t region);
104  hpm_stat_t (*lock)(uint32_t addr, otp_lock_option_t lock_option);
106  hpm_stat_t (*lock_shadow)(uint32_t addr, otp_lock_option_t lock_option);
108  hpm_stat_t (*set_configurable_region)(uint32_t start, uint32_t num_of_words);
110  hpm_stat_t (*write_shadow_register)(uint32_t addr, uint32_t data);
112 
116 typedef struct {
118  uint32_t version;
120  hpm_stat_t (*get_default_config)(xpi_config_t *xpi_config);
122  hpm_stat_t (*get_default_device_config)(xpi_device_config_t *dev_config);
124  hpm_stat_t (*init)(XPI_Type *base, xpi_config_t *xpi_config);
126  hpm_stat_t (*config_ahb_buffer)(XPI_Type *base, xpi_ahb_buffer_cfg_t *ahb_buf_cfg);
128  hpm_stat_t (*config_device)(XPI_Type *base, xpi_device_config_t *dev_cfg, xpi_channel_t channel);
130  hpm_stat_t (*update_instr_table)(XPI_Type *base, const uint32_t *inst_base, uint32_t seq_idx, uint32_t num);
132  hpm_stat_t (*transfer_blocking)(XPI_Type *base, xpi_xfer_ctx_t *xfer);
134  void (*software_reset)(XPI_Type *base);
136  bool (*is_idle)(XPI_Type *base);
138  void (*update_dllcr)(XPI_Type *base,
139  uint32_t serial_root_clk_freq,
140  uint32_t data_valid_time,
141  xpi_channel_t channel,
142  uint32_t dly_target);
144  hpm_stat_t
145  (*get_abs_apb_xfer_addr)(XPI_Type *base, xpi_xfer_channel_t channel, uint32_t in_addr, uint32_t *out_addr);
147 
151 typedef struct {
153  uint32_t version;
155  hpm_stat_t (*get_config)(XPI_Type *base, xpi_nor_config_t *nor_cfg, xpi_nor_config_option_t *cfg_option);
157  hpm_stat_t (*init)(XPI_Type *base, xpi_nor_config_t *nor_config);
159  hpm_stat_t
160  (*enable_write)(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t addr);
162  hpm_stat_t (*get_status)(XPI_Type *base,
163  xpi_xfer_channel_t channel,
164  const xpi_nor_config_t *nor_config,
165  uint32_t addr,
166  uint16_t *out_status);
168  hpm_stat_t
169  (*wait_busy)(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t addr);
171  hpm_stat_t (*erase)(XPI_Type *base,
172  xpi_xfer_channel_t channel,
173  const xpi_nor_config_t *nor_config,
174  uint32_t start,
175  uint32_t length);
177  hpm_stat_t (*erase_chip)(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config);
179  hpm_stat_t
180  (*erase_sector)(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t addr);
182  hpm_stat_t
183  (*erase_block)(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t addr);
185  hpm_stat_t (*program)(XPI_Type *base,
186  xpi_xfer_channel_t channel,
187  const xpi_nor_config_t *nor_config,
188  const uint32_t *src,
189  uint32_t dst_addr,
190  uint32_t length);
192  hpm_stat_t (*read)(XPI_Type *base,
193  xpi_xfer_channel_t channel,
194  const xpi_nor_config_t *nor_config,
195  uint32_t *dst,
196  uint32_t start,
197  uint32_t length);
199  hpm_stat_t (*page_program_nonblocking)(XPI_Type *base,
200  xpi_xfer_channel_t channel,
201  const xpi_nor_config_t *nor_config,
202  const uint32_t *src,
203  uint32_t dst_addr,
204  uint32_t length);
206  hpm_stat_t (*erase_sector_nonblocking)(XPI_Type *base,
207  xpi_xfer_channel_t channel,
208  const xpi_nor_config_t *nor_config,
209  uint32_t addr);
211  hpm_stat_t (*erase_block_nonblocking)(XPI_Type *base,
212  xpi_xfer_channel_t channel,
213  const xpi_nor_config_t *nor_config,
214  uint32_t addr);
216  hpm_stat_t
217  (*erase_chip_nonblocking)(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config);
218 
219  uint32_t reserved0[3];
220 
222  hpm_stat_t (*auto_config)(XPI_Type *base, xpi_nor_config_t *nor_cfg, xpi_nor_config_option_t *cfg_option);
223 
225  hpm_stat_t (*get_property)(XPI_Type *base, xpi_nor_config_t *nor_cfg, uint32_t property_id, uint32_t *value);
226 
228 
232 typedef struct {
234  uint32_t version;
235 
237  hpm_stat_t (*get_config)(XPI_Type *base, xpi_ram_config_t *ram_cfg, xpi_ram_config_option_t *cfg_option);
238 
240  hpm_stat_t (*init)(XPI_Type *base, xpi_ram_config_t *ram_cfg);
242 
246 typedef struct {
248  uint32_t version;
250  hpm_stat_t (*sdp_ip_init)(void);
252  hpm_stat_t (*sdp_ip_deinit)(void);
254  hpm_stat_t (*aes_set_key)(sdp_aes_ctx_t *aes_ctx, const uint8_t *key, sdp_aes_key_bits_t keybits, uint32_t key_idx);
256  hpm_stat_t (*aes_crypt_ecb)(sdp_aes_ctx_t *aes_ctx, sdp_aes_op_t op, uint32_t len, const uint8_t *in, uint8_t *out);
258  hpm_stat_t (*aes_crypt_cbc)(sdp_aes_ctx_t *aes_ctx,
259  sdp_aes_op_t op,
260  uint32_t length,
261  uint8_t iv[16],
262  const uint8_t *input,
263  uint8_t *output);
265  hpm_stat_t
266  (*aes_crypt_ctr)(sdp_aes_ctx_t *aes_ctx, uint8_t *nonce_ctr, uint8_t *input, uint8_t *output, uint32_t length);
268  hpm_stat_t (*aes_ccm_gen_enc)(sdp_aes_ctx_t *aes_ctx,
269  uint32_t input_len,
270  const uint8_t *nonce,
271  uint32_t nonce_len,
272  const uint8_t *aad,
273  uint32_t aad_len,
274  const uint8_t *input,
275  uint8_t *output,
276  uint8_t *tag,
277  uint32_t tag_len);
279  hpm_stat_t (*aes_ccm_dec_verify)(sdp_aes_ctx_t *aes_ctx,
280  uint32_t input_len,
281  const uint8_t *nonce,
282  uint32_t nonce_len,
283  const uint8_t *aad,
284  uint32_t aad_len,
285  const uint8_t *input,
286  uint8_t *output,
287  const uint8_t *tag,
288  uint32_t tag_len);
290  hpm_stat_t (*memcpy)(sdp_dma_ctx_t *dma_ctx, void *dst, const void *src, uint32_t length);
292  hpm_stat_t (*memset)(sdp_dma_ctx_t *dma_ctx, void *dst, uint8_t pattern, uint32_t length);
294  hpm_stat_t (*hash_init)(sdp_hash_ctx_t *hash_ctx, sdp_hash_alg_t alg);
296  hpm_stat_t (*hash_update)(sdp_hash_ctx_t *hash_ctx, const uint8_t *data, uint32_t length);
298  hpm_stat_t (*hash_finish)(sdp_hash_ctx_t *hash_ctx, uint8_t *digest);
300 
301 typedef struct {
303  uint32_t version;
305  hpm_stat_t (*init)(sm3_context_t *ctx);
307  hpm_stat_t (*update)(sm3_context_t *ctx, const void *input, uint32_t len);
309  hpm_stat_t (*finalize)(sm3_context_t *ctx, uint8_t output[32]);
311 
312 typedef struct {
314  uint32_t version;
316  void (*setkey_enc)(sm4_context_t *ctx, const uint8_t key[16]);
318  void (*setkey_dec)(sm4_context_t *ctx, const uint8_t key[16]);
320  hpm_stat_t (*crypt_ecb)(sm4_context_t *ctx, uint32_t mode, uint32_t length, const uint8_t *input, uint8_t *output);
322  hpm_stat_t (*crypt_cbc)(sm4_context_t *ctx, uint32_t mode, uint32_t length, const uint8_t iv[16],
323  const uint8_t *input, uint8_t *output);
325  hpm_stat_t (*crypt_ctr)(sm4_context_t *ctx, uint8_t *nonce_counter, const uint8_t *input,
326  uint8_t *output, uint32_t length);
328  hpm_stat_t (*ccm_gen_enc)(sm4_context_t *ctx, uint32_t input_len, const uint8_t *iv,
329  uint32_t iv_len, const uint8_t *aad, uint32_t aad_len, const uint8_t *input,
330  uint8_t *output, uint8_t *tag, uint32_t tag_len);
332  hpm_stat_t (*ccm_dec_verify)(sm4_context_t *ctx, uint32_t input_len, const uint8_t *iv,
333  uint32_t iv_len, const uint8_t *aad, uint32_t aad_len, const uint8_t *input,
334  uint8_t *output, const uint8_t *tag, uint32_t tag_len);
336 
337 
341 typedef struct {
343  const uint32_t version;
345  const char *copyright;
347  hpm_stat_t (*run_bootloader)(void *arg);
349  const otp_driver_interface_t *otp_driver_if;
351  const xpi_driver_interface_t *xpi_driver_if;
353  const xpi_nor_driver_interface_t *xpi_nor_driver_if;
355  const xpi_ram_driver_interface_t *xpi_ram_driver_if;
357  const sdp_driver_interface_t *sdp_driver_if;
358  const uint32_t reserved0;
359  const sm3_api_interface_t *sm3_api_if; /* SM3 driver interface address */
360  const sm4_api_interface_t *sm4_api_if; /* SM4 driver itnerface address */
362 
364 #define ROM_API_TABLE_ROOT ((const bootloader_api_table_t*)0x2001FF00U)
365 
366 
367 #ifdef __cplusplus
368 extern "C" {
369 #endif
370 
371 /***********************************************************************************************************************
372  *
373  *
374  * Enter bootloader Wrapper
375  *
376  *
377  **********************************************************************************************************************/
378 
384 static inline hpm_stat_t rom_enter_bootloader(void *ctx)
385 {
386  return ROM_API_TABLE_ROOT->run_bootloader(ctx);
387 }
388 
389 /***********************************************************************************************************************
390  *
391  *
392  * XPI NOR Driver Wrapper
393  *
394  *
395  **********************************************************************************************************************/
396 
405  xpi_nor_config_t *nor_cfg,
406  xpi_nor_config_option_t *cfg_option)
407 {
408  return ROM_API_TABLE_ROOT->xpi_nor_driver_if->get_config(base, nor_cfg, cfg_option);
409 }
410 
417 static inline hpm_stat_t rom_xpi_nor_init(XPI_Type *base, xpi_nor_config_t *nor_config)
418 {
419  return ROM_API_TABLE_ROOT->xpi_nor_driver_if->init(base, nor_config);
420 }
421 
432  xpi_xfer_channel_t channel,
433  const xpi_nor_config_t *nor_config,
434  uint32_t start,
435  uint32_t length)
436 {
437  hpm_stat_t status = ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase(base, channel, nor_config, start, length);
438  fencei();
439  return status;
440 }
441 
451  xpi_xfer_channel_t channel,
452  const xpi_nor_config_t *nor_config,
453  uint32_t start)
454 {
455  hpm_stat_t status = ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase_sector(base, channel, nor_config, start);
456  fencei();
457  return status;
458 }
459 
469  xpi_xfer_channel_t channel,
470  const xpi_nor_config_t *nor_config,
471  uint32_t start)
472 {
473  return ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase_sector_nonblocking(base, channel, nor_config, start);
474 }
475 
485  xpi_xfer_channel_t channel,
486  const xpi_nor_config_t *nor_config,
487  uint32_t start)
488 {
489  hpm_stat_t status = ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase_block(base, channel, nor_config, start);
490  fencei();
491  return status;
492 }
493 
503  xpi_xfer_channel_t channel,
504  const xpi_nor_config_t *nor_config,
505  uint32_t start)
506 {
507  return ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase_block_nonblocking(base, channel, nor_config, start);
508 }
509 
518  xpi_xfer_channel_t channel,
519  const xpi_nor_config_t *nor_config)
520 {
521  return ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase_chip(base, channel, nor_config);
522 }
523 
532  xpi_xfer_channel_t channel,
533  const xpi_nor_config_t *nor_config)
534 {
535  hpm_stat_t status = ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase_chip_nonblocking(base, channel, nor_config);
536  fencei();
537  return status;
538 }
539 
551  xpi_xfer_channel_t channel,
552  const xpi_nor_config_t *nor_config,
553  const uint32_t *src,
554  uint32_t dst_addr,
555  uint32_t length)
556 {
557  hpm_stat_t status = ROM_API_TABLE_ROOT->xpi_nor_driver_if->program(base, channel, nor_config, src, dst_addr, length);
558  fencei();
559  return status;
560 }
561 
573  xpi_xfer_channel_t channel,
574  const xpi_nor_config_t *nor_config,
575  const uint32_t *src,
576  uint32_t dst_addr,
577  uint32_t length)
578 {
579  return ROM_API_TABLE_ROOT->xpi_nor_driver_if
580  ->page_program_nonblocking(base, channel, nor_config, src, dst_addr, length);
581 }
582 
594  xpi_xfer_channel_t channel,
595  const xpi_nor_config_t *nor_config,
596  uint32_t *dst,
597  uint32_t start,
598  uint32_t length)
599 {
600  return ROM_API_TABLE_ROOT->xpi_nor_driver_if->read(base, channel, nor_config, dst, start, length);
601 }
602 
611  xpi_nor_config_t *config,
612  xpi_nor_config_option_t *cfg_option)
613 {
614  return ROM_API_TABLE_ROOT->xpi_nor_driver_if->auto_config(base, config, cfg_option);
615 }
616 
626  xpi_nor_config_t *nor_cfg,
627  uint32_t property_id,
628  uint32_t *value)
629 {
630  return ROM_API_TABLE_ROOT->xpi_nor_driver_if->get_property(base, nor_cfg, property_id, value);
631 }
632 
644  xpi_xfer_channel_t channel,
645  const xpi_nor_config_t *nor_config,
646  uint32_t addr,
647  uint16_t *out_status)
648 {
649  return ROM_API_TABLE_ROOT->xpi_nor_driver_if->get_status(base, channel, nor_config, addr, out_status);
650 }
651 
661 ATTR_RAMFUNC
662 static inline bool rom_xpi_nor_remap_config(XPI_Type *base, uint32_t start, uint32_t len, uint32_t offset)
663 {
664  if (((base != HPM_XPI0) && (base != HPM_XPI1)) || ((start & 0xFFF) != 0) || ((len & 0xFFF) != 0)
665  || ((offset & 0xFFF) != 0)) {
666  return false;
667  }
668  static const uint8_t k_mc_xpi_remap_config[] = {
669  0x2e, 0x96, 0x23, 0x22, 0xc5, 0x42, 0x23, 0x24,
670  0xd5, 0x42, 0x93, 0xe5, 0x15, 0x00, 0x23, 0x20,
671  0xb5, 0x42, 0x05, 0x45, 0x82, 0x80,
672  };
673  typedef bool (*remap_config_cb_t)(XPI_Type *, uint32_t, uint32_t, uint32_t);
674  remap_config_cb_t cb = (remap_config_cb_t) &k_mc_xpi_remap_config;
675  bool result = cb(base, start, len, offset);
676  ROM_API_TABLE_ROOT->xpi_driver_if->software_reset(base);
677  fencei();
678  return result;
679 }
680 
685 ATTR_RAMFUNC
686 static inline void rom_xpi_nor_remap_disable(XPI_Type *base)
687 {
688  static const uint8_t k_mc_xpi_remap_disable[] = {
689  0x83, 0x27, 0x05, 0x42, 0xf9, 0x9b, 0x23, 0x20,
690  0xf5, 0x42, 0x82, 0x80,
691  };
692  typedef void (*remap_disable_cb_t)(XPI_Type *);
693  remap_disable_cb_t cb = (remap_disable_cb_t) &k_mc_xpi_remap_disable;
694  cb(base);
695  fencei();
696 }
697 
705 ATTR_RAMFUNC
706 static inline bool rom_xpi_nor_is_remap_enabled(XPI_Type *base)
707 {
708  static const uint8_t k_mc_xpi_remap_enabled[] = {
709  0x03, 0x25, 0x05, 0x42, 0x05, 0x89, 0x82, 0x80,
710  };
711  typedef bool (*remap_chk_cb_t)(XPI_Type *);
712  remap_chk_cb_t chk_cb = (remap_chk_cb_t) &k_mc_xpi_remap_enabled;
713  return chk_cb(base);
714 }
715 
724 ATTR_RAMFUNC
725 static inline bool rom_xpi_nor_exip_region_config(XPI_Type *base, uint32_t index, exip_region_param_t *param)
726 {
727  if (base != HPM_XPI0) {
728  return false;
729  }
730  static const uint8_t k_mc_exip_region_config[] = {
731  0x18, 0x4a, 0x9a, 0x05, 0x2e, 0x95, 0x85, 0x67,
732  0xaa, 0x97, 0x23, 0xa4, 0xe7, 0xd0, 0x4c, 0x4a,
733  0x14, 0x42, 0x58, 0x42, 0x23, 0xa6, 0xb7, 0xd0,
734  0x4c, 0x46, 0x36, 0x97, 0x13, 0x77, 0x07, 0xc0,
735  0x23, 0xa2, 0xb7, 0xd0, 0x0c, 0x46, 0x13, 0x67,
736  0x37, 0x00, 0x05, 0x45, 0x23, 0xa0, 0xb7, 0xd0,
737  0x0c, 0x4e, 0x23, 0xaa, 0xb7, 0xd0, 0x50, 0x4e,
738  0x23, 0xa8, 0xc7, 0xd0, 0x23, 0xac, 0xd7, 0xd0,
739  0x23, 0xae, 0xe7, 0xd0, 0x82, 0x80,
740  };
741  typedef void (*exip_region_config_cb_t)(XPI_Type *, uint32_t, exip_region_param_t *);
742  exip_region_config_cb_t cb = (exip_region_config_cb_t) &k_mc_exip_region_config;
743  cb(base, index, param);
744  ROM_API_TABLE_ROOT->xpi_driver_if->software_reset(base);
745  fencei();
746  return true;
747 }
748 
754 ATTR_RAMFUNC
755 static inline void rom_xpi_nor_exip_region_disable(XPI_Type *base, uint32_t index)
756 {
757  static const uint8_t k_mc_exip_region_disable[] = {
758  0x9a, 0x05, 0x2e, 0x95, 0x85, 0x67, 0xaa, 0x97,
759  0x03, 0xa7, 0xc7, 0xd1, 0x75, 0x9b, 0x23, 0xae,
760  0xe7, 0xd0, 0x82, 0x80
761  };
762  typedef void (*exip_region_disable_cb_t)(XPI_Type *, uint32_t);
763  exip_region_disable_cb_t cb = (exip_region_disable_cb_t) &k_mc_exip_region_disable;
764  cb(base, index);
765  ROM_API_TABLE_ROOT->xpi_driver_if->software_reset(base);
766  fencei();
767 }
768 
773 ATTR_RAMFUNC
774 static inline void rom_xpi_nor_exip_enable(XPI_Type *base)
775 {
776  static const uint8_t k_mc_exip_enable[] = {
777  0x85, 0x67, 0x3e, 0x95, 0x83, 0x27, 0x05, 0xc0,
778  0x37, 0x07, 0x00, 0x80, 0xd9, 0x8f, 0x23, 0x20,
779  0xf5, 0xc0, 0x82, 0x80
780  };
781  typedef void (*exip_enable_cb_t)(XPI_Type *);
782  exip_enable_cb_t cb = (exip_enable_cb_t) &k_mc_exip_enable;
783  cb(base);
784 }
785 
790 ATTR_RAMFUNC
791 static inline void rom_xpi_nor_exip_disable(XPI_Type *base)
792 {
793  static const uint8_t k_mc_exip_disable[] = {
794  0x85, 0x67, 0x3e, 0x95, 0x83, 0x27, 0x05, 0xc0,
795  0x86, 0x07, 0x85, 0x83, 0x23, 0x20, 0xf5, 0xc0,
796  0x82, 0x80
797  };
798  typedef void (*exip_disable_cb_t)(XPI_Type *);
799  exip_disable_cb_t cb = (exip_disable_cb_t) &k_mc_exip_disable;
800  cb(base);
801  ROM_API_TABLE_ROOT->xpi_driver_if->software_reset(base);
802  fencei();
803 }
804 
805 /***********************************************************************************************************************
806  *
807  *
808  * XPI RAM Driver Wrapper
809  *
810  *
811  **********************************************************************************************************************/
820  xpi_ram_config_t *ram_cfg,
821  xpi_ram_config_option_t *cfg_option)
822 {
823  return ROM_API_TABLE_ROOT->xpi_ram_driver_if->get_config(base, ram_cfg, cfg_option);
824 }
825 
832 static inline hpm_stat_t rom_xpi_ram_init(XPI_Type *base, xpi_ram_config_t *ram_cfg)
833 {
834  return ROM_API_TABLE_ROOT->xpi_ram_driver_if->init(base, ram_cfg);
835 }
836 
837 /***********************************************************************************************************************
838  *
839  *
840  * SDP Driver Wrapper
841  *
842  *
843  **********************************************************************************************************************/
847 static inline void rom_sdp_init(void)
848 {
849  ROM_API_TABLE_ROOT->sdp_driver_if->sdp_ip_init();
850 }
851 
855 static inline void rom_sdp_deinit(void)
856 {
857  ROM_API_TABLE_ROOT->sdp_driver_if->sdp_ip_deinit();
858 }
859 
869  const uint8_t *key,
870  sdp_aes_key_bits_t key_bits,
871  uint32_t key_idx)
872 {
873  return ROM_API_TABLE_ROOT->sdp_driver_if->aes_set_key(aes_ctx, key, key_bits, key_idx);
874 }
875 
886  sdp_aes_op_t op,
887  uint32_t len,
888  const uint8_t *in,
889  uint8_t *out)
890 {
891  return ROM_API_TABLE_ROOT->sdp_driver_if->aes_crypt_ecb(aes_ctx, op, len, in, out);
892 }
893 
905  sdp_aes_op_t op,
906  uint32_t length,
907  uint8_t iv[16],
908  const uint8_t *in,
909  uint8_t *out)
910 {
911  return ROM_API_TABLE_ROOT->sdp_driver_if->aes_crypt_cbc(aes_ctx, op, length, iv, in, out);
912 }
913 
921 {
922  return ROM_API_TABLE_ROOT->sdp_driver_if->hash_init(hash_ctx, alg);
923 }
924 
932 static inline hpm_stat_t rom_sdp_hash_update(sdp_hash_ctx_t *hash_ctx, const uint8_t *data, uint32_t length)
933 {
934  return ROM_API_TABLE_ROOT->sdp_driver_if->hash_update(hash_ctx, data, length);
935 }
936 
943 static inline hpm_stat_t rom_sdp_hash_finish(sdp_hash_ctx_t *hash_ctx, uint8_t *digest)
944 {
945  return ROM_API_TABLE_ROOT->sdp_driver_if->hash_finish(hash_ctx, digest);
946 }
947 
956 static inline hpm_stat_t rom_sdp_memcpy(sdp_dma_ctx_t *dma_ctx, void *dst, const void *src, uint32_t length)
957 {
958  return ROM_API_TABLE_ROOT->sdp_driver_if->memcpy(dma_ctx, dst, src, length);
959 }
960 
969 static inline hpm_stat_t rom_sdp_memset(sdp_dma_ctx_t *dma_ctx, void *dst, uint8_t pattern, uint32_t length)
970 {
971  return ROM_API_TABLE_ROOT->sdp_driver_if->memset(dma_ctx, dst, pattern, length);
972 }
973 
974 
975 /***********************************************************************************************************************
976  *
977  *
978  * SM3 Driver Wrapper
979  *
980  *
981  **********************************************************************************************************************/
982 
990 {
991  return ROM_API_TABLE_ROOT->sm3_api_if->init(ctx);
992 }
993 
1002 static inline hpm_stat_t rom_sm3_update(sm3_context_t *ctx, const void *input, uint32_t len)
1003 {
1004  return ROM_API_TABLE_ROOT->sm3_api_if->update(ctx, input, len);
1005 }
1006 
1015 static inline hpm_stat_t rom_sm3_finalize(sm3_context_t *ctx, uint8_t output[32])
1016 {
1017  return ROM_API_TABLE_ROOT->sm3_api_if->finalize(ctx, output);
1018 }
1019 
1020 /***********************************************************************************************************************
1021  *
1022  *
1023  * SM4 Driver Wrapper
1024  *
1025  *
1026  **********************************************************************************************************************/
1033 static inline void rom_sm4_setkey_enc(sm4_context_t *ctx, const uint8_t key[16])
1034 {
1035  ROM_API_TABLE_ROOT->sm4_api_if->setkey_enc(ctx, key);
1036 }
1037 
1044 static inline void rom_sm4_setkey_dec(sm4_context_t *ctx, const uint8_t key[16])
1045 {
1046  ROM_API_TABLE_ROOT->sm4_api_if->setkey_dec(ctx, key);
1047 }
1048 
1058 static inline hpm_stat_t rom_sm4_crypt_ecb(sm4_context_t *ctx, uint32_t mode, uint32_t length, const uint8_t *input, uint8_t *output)
1059 {
1060  return ROM_API_TABLE_ROOT->sm4_api_if->crypt_ecb(ctx, mode, length, input, output);
1061 }
1062 
1073 static inline hpm_stat_t rom_sm4_crypt_cbc(sm4_context_t *ctx, uint32_t mode, uint32_t length, const uint8_t iv[16], const uint8_t *input, uint8_t *output)
1074 {
1075  return ROM_API_TABLE_ROOT->sm4_api_if->crypt_cbc(ctx, mode, length, iv, input, output);
1076 }
1077 
1078 
1079 
1080 #ifdef __cplusplus
1081 }
1082 #endif
1083 
1089 #endif /* HPM_ROMAPI_H */
static hpm_stat_t rom_sdp_memset(sdp_dma_ctx_t *dma_ctx, void *dst, uint8_t pattern, uint32_t length)
SDP memset operation.
Definition: hpm_romapi.h:969
static hpm_stat_t rom_sdp_aes_crypt_cbc(sdp_aes_ctx_t *aes_ctx, sdp_aes_op_t op, uint32_t length, uint8_t iv[16], const uint8_t *in, uint8_t *out)
SDP AES ECB crypto operation(Encrypt or Decrypt)
Definition: hpm_romapi.h:904
static hpm_stat_t rom_xpi_nor_auto_config(XPI_Type *base, xpi_nor_config_t *config, xpi_nor_config_option_t *cfg_option)
Automatically configure XPI NOR based on cfg_option.
Definition: hpm_romapi.h:610
static hpm_stat_t rom_xpi_nor_init(XPI_Type *base, xpi_nor_config_t *nor_config)
Initialize XPI NOR based on nor_config.
Definition: hpm_romapi.h:417
static hpm_stat_t rom_xpi_nor_read(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t *dst, uint32_t start, uint32_t length)
Read data from specified FLASH address.
Definition: hpm_romapi.h:593
static hpm_stat_t rom_xpi_nor_erase_chip_nonblocking(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config)
Erase the whole FLASH in non-blocking way.
Definition: hpm_romapi.h:531
static hpm_stat_t rom_xpi_nor_erase_chip(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config)
Erase the whole FLASH in blocking way.
Definition: hpm_romapi.h:517
static hpm_stat_t rom_sdp_memcpy(sdp_dma_ctx_t *dma_ctx, void *dst, const void *src, uint32_t length)
SDP memcpy operation.
Definition: hpm_romapi.h:956
static hpm_stat_t rom_xpi_nor_erase_block(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t start)
Erase specified FLASH blcok in blocking way.
Definition: hpm_romapi.h:484
static ATTR_RAMFUNC bool rom_xpi_nor_remap_config(XPI_Type *base, uint32_t start, uint32_t len, uint32_t offset)
Configure the XPI Address Remapping Logic.
Definition: hpm_romapi.h:662
static ATTR_RAMFUNC bool rom_xpi_nor_exip_region_config(XPI_Type *base, uint32_t index, exip_region_param_t *param)
Configure Specified EXiP Region.
Definition: hpm_romapi.h:725
static ATTR_RAMFUNC void rom_xpi_nor_exip_enable(XPI_Type *base)
Enable global EXiP logic.
Definition: hpm_romapi.h:774
static void rom_sdp_init(void)
Initialize SDP IP.
Definition: hpm_romapi.h:847
static hpm_stat_t rom_xpi_nor_page_program_nonblocking(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, const uint32_t *src, uint32_t dst_addr, uint32_t length)
Page-Program data to specified FLASH address in non-blocking way.
Definition: hpm_romapi.h:572
static ATTR_RAMFUNC void rom_xpi_nor_exip_region_disable(XPI_Type *base, uint32_t index)
Disable EXiP Feature on specified EXiP Region.
Definition: hpm_romapi.h:755
static hpm_stat_t rom_xpi_nor_erase_sector_nonblocking(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t start)
Erase specified FLASH sector in non-blocking way.
Definition: hpm_romapi.h:468
static hpm_stat_t rom_xpi_nor_erase(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t start, uint32_t length)
Erase specified FLASH region.
Definition: hpm_romapi.h:431
static hpm_stat_t rom_enter_bootloader(void *ctx)
Eneter specified Boot mode.
Definition: hpm_romapi.h:384
static ATTR_RAMFUNC void rom_xpi_nor_remap_disable(XPI_Type *base)
Disable XPI Remapping logic.
Definition: hpm_romapi.h:686
static hpm_stat_t rom_sdp_aes_set_key(sdp_aes_ctx_t *aes_ctx, const uint8_t *key, sdp_aes_key_bits_t key_bits, uint32_t key_idx)
Set AES key to SDP.
Definition: hpm_romapi.h:868
static void rom_sdp_deinit(void)
De-initialize SDP IP.
Definition: hpm_romapi.h:855
static hpm_stat_t rom_xpi_ram_get_config(XPI_Type *base, xpi_ram_config_t *ram_cfg, xpi_ram_config_option_t *cfg_option)
Get XPI RAM configuration based on cfg_option.
Definition: hpm_romapi.h:819
static hpm_stat_t rom_xpi_ram_init(XPI_Type *base, xpi_ram_config_t *ram_cfg)
Initialize XPI RAM.
Definition: hpm_romapi.h:832
static hpm_stat_t rom_xpi_nor_get_status(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t addr, uint16_t *out_status)
Return the status register value on XPI NOR FLASH.
Definition: hpm_romapi.h:643
static hpm_stat_t rom_xpi_nor_erase_block_nonblocking(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t start)
Erase specified FLASH blcok in non-blocking way.
Definition: hpm_romapi.h:502
static ATTR_RAMFUNC void rom_xpi_nor_exip_disable(XPI_Type *base)
Disable global EXiP logic.
Definition: hpm_romapi.h:791
static hpm_stat_t rom_xpi_nor_program(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, const uint32_t *src, uint32_t dst_addr, uint32_t length)
Program data to specified FLASH address in blocking way.
Definition: hpm_romapi.h:550
static ATTR_RAMFUNC bool rom_xpi_nor_is_remap_enabled(XPI_Type *base)
Check whether XPI Remapping is enabled.
Definition: hpm_romapi.h:706
static hpm_stat_t rom_sdp_hash_finish(sdp_hash_ctx_t *hash_ctx, uint8_t *digest)
HASH finialize.
Definition: hpm_romapi.h:943
static hpm_stat_t rom_sdp_hash_update(sdp_hash_ctx_t *hash_ctx, const uint8_t *data, uint32_t length)
HASH Update.
Definition: hpm_romapi.h:932
static hpm_stat_t rom_sdp_aes_crypt_ecb(sdp_aes_ctx_t *aes_ctx, sdp_aes_op_t op, uint32_t len, const uint8_t *in, uint8_t *out)
SDP AES ECB crypto operation(Encrypt or Decrypt)
Definition: hpm_romapi.h:885
static hpm_stat_t rom_xpi_nor_get_property(XPI_Type *base, xpi_nor_config_t *nor_cfg, uint32_t property_id, uint32_t *value)
Get XPI NOR properties.
Definition: hpm_romapi.h:625
static hpm_stat_t rom_xpi_nor_get_config(XPI_Type *base, xpi_nor_config_t *nor_cfg, xpi_nor_config_option_t *cfg_option)
Get XPI NOR configuration via cfg_option.
Definition: hpm_romapi.h:404
static hpm_stat_t rom_sdp_hash_init(sdp_hash_ctx_t *hash_ctx, sdp_hash_alg_t alg)
HASH initialization.
Definition: hpm_romapi.h:920
static hpm_stat_t rom_xpi_nor_erase_sector(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t start)
Erase specified FLASH sector in blocking way.
Definition: hpm_romapi.h:450
uint32_t hpm_stat_t
Definition: hpm_common.h:119
otp_region_t
OTP region definitions.
Definition: hpm_otp_drv.h:24
otp_lock_option_t
OTP lock options.
Definition: hpm_otp_drv.h:34
static hpm_stat_t rom_sm3_init(sm3_context_t *ctx)
SM4 initialization.
Definition: hpm_romapi.h:989
static void rom_sm4_setkey_enc(sm4_context_t *ctx, const uint8_t key[16])
Set SM4 encryption key.
Definition: hpm_romapi.h:1033
static hpm_stat_t rom_sm3_finalize(sm3_context_t *ctx, uint8_t output[32])
SM3 finalize Return the computing SM3 digest.
Definition: hpm_romapi.h:1015
static hpm_stat_t rom_sm3_update(sm3_context_t *ctx, const void *input, uint32_t len)
SM3 update operation.
Definition: hpm_romapi.h:1002
#define HPM_XPI0
Definition: hpm_romapi.h:28
#define ROM_API_TABLE_ROOT
Definition: hpm_romapi.h:364
static void rom_sm4_setkey_dec(sm4_context_t *ctx, const uint8_t key[16])
Set SM4 decryption key.
Definition: hpm_romapi.h:1044
#define HPM_XPI1
Definition: hpm_romapi.h:32
static hpm_stat_t rom_sm4_crypt_ecb(sm4_context_t *ctx, uint32_t mode, uint32_t length, const uint8_t *input, uint8_t *output)
SM4 ECB crypto operation(Encrypt or Decrypt)
Definition: hpm_romapi.h:1058
static hpm_stat_t rom_sm4_crypt_cbc(sm4_context_t *ctx, uint32_t mode, uint32_t length, const uint8_t iv[16], const uint8_t *input, uint8_t *output)
SM4 CBC crypto operation(Encrypt or Decrypt)
Definition: hpm_romapi.h:1073
sdp_crypto_op_t
Crypto operation option.
Definition: hpm_sdp_drv.h:44
sdp_crypto_key_bits_t
SDP AES key bit options.
Definition: hpm_sdp_drv.h:29
sdp_hash_alg_t
SDP HASH algorithm definitions.
Definition: hpm_sdp_drv.h:75
xpi_xfer_channel_t
XPI Transfer Channel type definitions.
Definition: hpm_romapi_xpi_def.h:53
uint32_t XPI_Type
XPI_Type definitions for.
Definition: hpm_romapi_xpi_def.h:22
xpi_channel_t
XPI Channel defitions.
Definition: hpm_romapi_xpi_def.h:64
#define fencei()
execute fence.i
Definition: riscv_core.h:88
Bootloader API table.
Definition: hpm_romapi.h:243
const sm3_api_interface_t * sm3_api_if
Definition: hpm_romapi.h:359
const sm4_api_interface_t * sm4_api_if
Definition: hpm_romapi.h:360
Definition: hpm_romapi.h:52
OTP driver interface.
Definition: hpm_romapi.h:82
SDP AES context structure.
Definition: hpm_sdp_drv.h:132
SDP DMA context.
Definition: hpm_sdp_drv.h:152
SDP API interface.
Definition: hpm_romapi.h:243
SDP HASH context.
Definition: hpm_sdp_drv.h:159
Definition: hpm_romapi.h:301
uint32_t version
Definition: hpm_romapi.h:303
Definition: hpm_romapi.h:72
Definition: hpm_romapi.h:312
uint32_t version
Definition: hpm_romapi.h:314
Definition: hpm_romapi.h:80
uint32_t mode
Definition: hpm_romapi.h:81
Definition: hpm_romapi_xpi_soc_def.h:28
XPI configuration structure.
Definition: hpm_romapi_xpi_def.h:160
XPI Device Configuration structure.
Definition: hpm_romapi_xpi_def.h:173
XPI driver interface.
Definition: hpm_romapi.h:110
XPI NOR configuration option The ROM SW can detect the FLASH configuration based on the following str...
Definition: hpm_romapi_xpi_nor_def.h:136
XPI NOR configuration structure.
Definition: hpm_romapi_xpi_nor_def.h:261
XPI NOR driver interface.
Definition: hpm_romapi.h:145
XPI RAM configuration option The ROM SW can detect the FLASH configuration based on the following str...
Definition: hpm_romapi_xpi_ram_def.h:39
XPI RAM configuration structure.
Definition: hpm_romapi_xpi_ram_def.h:152
XPI RAM driver interface.
Definition: hpm_romapi.h:215
XPI Xfer context.
Definition: hpm_romapi_xpi_def.h:93
Enter Bootloader API argument.
Definition: hpm_romapi.h:41