HPM SDK
HPMicro Software Development Kit
hpm_romapi.h
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1 /*
2  * Copyright (c) 2022-2023 HPMicro
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  *
6  */
7 
8 #ifndef HPM_ROMAPI_H
9 #define HPM_ROMAPI_H
10 
17 #include "hpm_common.h"
18 #include "hpm_otp_drv.h"
19 #include "hpm_romapi_xpi_def.h"
20 #include "hpm_romapi_xpi_soc_def.h"
21 #include "hpm_romapi_xpi_nor_def.h"
22 #include "hpm_romapi_xpi_ram_def.h"
23 #include "hpm_sdp_drv.h"
24 
25 /* XPI0 base address */
26 #define HPM_XPI0_BASE (0xF3000000UL)
27 /* XPI0 base pointer */
28 #define HPM_XPI0 ((XPI_Type *) HPM_XPI0_BASE)
31 /***********************************************************************************************************************
32  *
33  *
34  * Definitions
35  *
36  *
37  **********************************************************************************************************************/
41 typedef union {
42  uint32_t U;
43  struct {
44  uint32_t index: 8;
45  uint32_t peripheral: 8;
46  uint32_t src: 8;
47  uint32_t tag: 8;
48  };
50 
51 /*EXiP Region Parameter */
52 typedef struct {
53  uint32_t start;
54  uint32_t len;
55  uint8_t key[16];
56  uint8_t ctr[8];
58 
59 #define API_BOOT_TAG (0xEBU)
60 #define API_BOOT_SRC_OTP (0U)
61 #define API_BOOT_SRC_PRIMARY (1U)
62 #define API_BOOT_SRC_SERIAL_BOOT (2U)
63 #define API_BOOT_SRC_ISP (3U)
64 #define API_BOOT_PERIPH_AUTO (0U)
65 #define API_BOOT_PERIPH_UART (1U)
66 #define API_BOOT_PERIPH_USBHID (2U)
71 typedef struct {
73  uint32_t version;
75  void (*init)(void);
77  void (*deinit)(void);
79  uint32_t (*read_from_shadow)(uint32_t addr);
81  uint32_t (*read_from_ip)(uint32_t addr);
83  hpm_stat_t (*program)(uint32_t addr, const uint32_t *src, uint32_t num_of_words);
85  hpm_stat_t (*reload)(otp_region_t region);
87  hpm_stat_t (*lock)(uint32_t addr, otp_lock_option_t lock_option);
89  hpm_stat_t (*lock_shadow)(uint32_t addr, otp_lock_option_t lock_option);
91  hpm_stat_t (*set_configurable_region)(uint32_t start, uint32_t num_of_words);
93  hpm_stat_t (*write_shadow_register)(uint32_t addr, uint32_t data);
95 
99 typedef struct {
101  uint32_t version;
103  hpm_stat_t (*get_default_config)(xpi_config_t *xpi_config);
105  hpm_stat_t (*get_default_device_config)(xpi_device_config_t *dev_config);
107  hpm_stat_t (*init)(XPI_Type *base, xpi_config_t *xpi_config);
109  hpm_stat_t (*config_ahb_buffer)(XPI_Type *base, xpi_ahb_buffer_cfg_t *ahb_buf_cfg);
111  hpm_stat_t (*config_device)(XPI_Type *base, xpi_device_config_t *dev_cfg, xpi_channel_t channel);
113  hpm_stat_t (*update_instr_table)(XPI_Type *base, const uint32_t *inst_base, uint32_t seq_idx, uint32_t num);
115  hpm_stat_t (*transfer_blocking)(XPI_Type *base, xpi_xfer_ctx_t *xfer);
117  void (*software_reset)(XPI_Type *base);
119  bool (*is_idle)(XPI_Type *base);
121  void (*update_dllcr)(XPI_Type *base,
122  uint32_t serial_root_clk_freq,
123  uint32_t data_valid_time,
124  xpi_channel_t channel,
125  uint32_t dly_target);
127  hpm_stat_t
128  (*get_abs_apb_xfer_addr)(XPI_Type *base, xpi_xfer_channel_t channel, uint32_t in_addr, uint32_t *out_addr);
130 
134 typedef struct {
136  uint32_t version;
138  hpm_stat_t (*get_config)(XPI_Type *base, xpi_nor_config_t *nor_cfg, xpi_nor_config_option_t *cfg_option);
140  hpm_stat_t (*init)(XPI_Type *base, xpi_nor_config_t *nor_config);
142  hpm_stat_t
143  (*enable_write)(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t addr);
145  hpm_stat_t (*get_status)(XPI_Type *base,
146  xpi_xfer_channel_t channel,
147  const xpi_nor_config_t *nor_config,
148  uint32_t addr,
149  uint16_t *out_status);
151  hpm_stat_t
152  (*wait_busy)(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t addr);
154  hpm_stat_t (*erase)(XPI_Type *base,
155  xpi_xfer_channel_t channel,
156  const xpi_nor_config_t *nor_config,
157  uint32_t start,
158  uint32_t length);
160  hpm_stat_t (*erase_chip)(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config);
162  hpm_stat_t
163  (*erase_sector)(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t addr);
165  hpm_stat_t
166  (*erase_block)(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t addr);
168  hpm_stat_t (*program)(XPI_Type *base,
169  xpi_xfer_channel_t channel,
170  const xpi_nor_config_t *nor_config,
171  const uint32_t *src,
172  uint32_t dst_addr,
173  uint32_t length);
175  hpm_stat_t (*read)(XPI_Type *base,
176  xpi_xfer_channel_t channel,
177  const xpi_nor_config_t *nor_config,
178  uint32_t *dst,
179  uint32_t start,
180  uint32_t length);
182  hpm_stat_t (*page_program_nonblocking)(XPI_Type *base,
183  xpi_xfer_channel_t channel,
184  const xpi_nor_config_t *nor_config,
185  const uint32_t *src,
186  uint32_t dst_addr,
187  uint32_t length);
189  hpm_stat_t (*erase_sector_nonblocking)(XPI_Type *base,
190  xpi_xfer_channel_t channel,
191  const xpi_nor_config_t *nor_config,
192  uint32_t addr);
194  hpm_stat_t (*erase_block_nonblocking)(XPI_Type *base,
195  xpi_xfer_channel_t channel,
196  const xpi_nor_config_t *nor_config,
197  uint32_t addr);
199  hpm_stat_t
200  (*erase_chip_nonblocking)(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config);
201 
202  uint32_t reserved0[3];
203 
205  hpm_stat_t (*auto_config)(XPI_Type *base, xpi_nor_config_t *nor_cfg, xpi_nor_config_option_t *cfg_option);
206 
208  hpm_stat_t (*get_property)(XPI_Type *base, xpi_nor_config_t *nor_cfg, uint32_t property_id, uint32_t *value);
209 
211 
215 typedef struct {
217  uint32_t version;
218 
220  hpm_stat_t (*get_config)(XPI_Type *base, xpi_ram_config_t *ram_cfg, xpi_ram_config_option_t *cfg_option);
221 
223  hpm_stat_t (*init)(XPI_Type *base, xpi_ram_config_t *ram_cfg);
225 
229 typedef struct {
231  uint32_t version;
233  hpm_stat_t (*sdp_ip_init)(void);
235  hpm_stat_t (*sdp_ip_deinit)(void);
237  hpm_stat_t (*aes_set_key)(sdp_aes_ctx_t *aes_ctx, const uint8_t *key, sdp_aes_key_bits_t keybits, uint32_t key_idx);
239  hpm_stat_t (*aes_crypt_ecb)(sdp_aes_ctx_t *aes_ctx, sdp_aes_op_t op, uint32_t len, const uint8_t *in, uint8_t *out);
241  hpm_stat_t (*aes_crypt_cbc)(sdp_aes_ctx_t *aes_ctx,
242  sdp_aes_op_t op,
243  uint32_t length,
244  uint8_t iv[16],
245  const uint8_t *input,
246  uint8_t *output);
248  hpm_stat_t
249  (*aes_crypt_ctr)(sdp_aes_ctx_t *aes_ctx, uint8_t *nonce_ctr, uint8_t *input, uint8_t *output, uint32_t length);
251  hpm_stat_t (*aes_ccm_gen_enc)(sdp_aes_ctx_t *aes_ctx,
252  uint32_t input_len,
253  const uint8_t *nonce,
254  uint32_t nonce_len,
255  const uint8_t *aad,
256  uint32_t aad_len,
257  const uint8_t *input,
258  uint8_t *output,
259  uint8_t *tag,
260  uint32_t tag_len);
262  hpm_stat_t (*aes_ccm_dec_verify)(sdp_aes_ctx_t *aes_ctx,
263  uint32_t input_len,
264  const uint8_t *nonce,
265  uint32_t nonce_len,
266  const uint8_t *aad,
267  uint32_t aad_len,
268  const uint8_t *input,
269  uint8_t *output,
270  const uint8_t *tag,
271  uint32_t tag_len);
273  hpm_stat_t (*memcpy)(sdp_dma_ctx_t *dma_ctx, void *dst, const void *src, uint32_t length);
275  hpm_stat_t (*memset)(sdp_dma_ctx_t *dma_ctx, void *dst, uint8_t pattern, uint32_t length);
277  hpm_stat_t (*hash_init)(sdp_hash_ctx_t *hash_ctx, sdp_hash_alg_t alg);
279  hpm_stat_t (*hash_update)(sdp_hash_ctx_t *hash_ctx, const uint8_t *data, uint32_t length);
281  hpm_stat_t (*hash_finish)(sdp_hash_ctx_t *hash_ctx, uint8_t *digest);
283  hpm_stat_t (*sm4_set_key)(sdp_sm4_ctx_t *sm4_ctx, const uint8_t *key, sdp_sm4_key_bits_t keybits, uint32_t key_idx);
285  hpm_stat_t (*sm4_crypt_ecb)(sdp_sm4_ctx_t *sm4_ctx, sdp_sm4_op_t op, uint32_t len, const uint8_t *in, uint8_t *out);
287  hpm_stat_t (*sm4_crypt_cbc)(sdp_sm4_ctx_t *sm4_ctx,
288  sdp_sm4_op_t op,
289  uint32_t length,
290  uint8_t iv[16],
291  const uint8_t *input,
292  uint8_t *output);
294  hpm_stat_t
295  (*sm4_crypt_ctr)(sdp_sm4_ctx_t *sm4_ctx, uint8_t *nonce_ctr, uint8_t *input, uint8_t *output, uint32_t length);
297  hpm_stat_t (*sm4_ccm_gen_enc)(sdp_sm4_ctx_t *sm4_ctx,
298  uint32_t input_len,
299  const uint8_t *nonce,
300  uint32_t nonce_len,
301  const uint8_t *aad,
302  uint32_t aad_len,
303  const uint8_t *input,
304  uint8_t *output,
305  uint8_t *tag,
306  uint32_t tag_len);
308  hpm_stat_t (*sm4_ccm_dec_verify)(sdp_sm4_ctx_t *sm4_ctx,
309  uint32_t input_len,
310  const uint8_t *nonce,
311  uint32_t nonce_len,
312  const uint8_t *aad,
313  uint32_t aad_len,
314  const uint8_t *input,
315  uint8_t *output,
316  const uint8_t *tag,
317  uint32_t tag_len);
319 
323 typedef struct {
325  const uint32_t version;
327  const char *copyright;
329  hpm_stat_t (*run_bootloader)(void *arg);
331  const otp_driver_interface_t *otp_driver_if;
333  const xpi_driver_interface_t *xpi_driver_if;
335  const xpi_nor_driver_interface_t *xpi_nor_driver_if;
337  const xpi_ram_driver_interface_t *xpi_ram_driver_if;
339  const sdp_driver_interface_t *sdp_driver_if;
341 
343 #define ROM_API_TABLE_ROOT ((const bootloader_api_table_t *)0x2001FF00U)
344 
345 
346 #ifdef __cplusplus
347 extern "C" {
348 #endif
349 
350 /***********************************************************************************************************************
351  *
352  *
353  * Enter bootloader Wrapper
354  *
355  *
356  **********************************************************************************************************************/
357 
363 static inline hpm_stat_t rom_enter_bootloader(void *ctx)
364 {
365  return ROM_API_TABLE_ROOT->run_bootloader(ctx);
366 }
367 
368 /***********************************************************************************************************************
369  *
370  *
371  * XPI NOR Driver Wrapper
372  *
373  *
374  **********************************************************************************************************************/
375 
384  xpi_nor_config_t *nor_cfg,
385  xpi_nor_config_option_t *cfg_option)
386 {
387  return ROM_API_TABLE_ROOT->xpi_nor_driver_if->get_config(base, nor_cfg, cfg_option);
388 }
389 
396 static inline hpm_stat_t rom_xpi_nor_init(XPI_Type *base, xpi_nor_config_t *nor_config)
397 {
398  return ROM_API_TABLE_ROOT->xpi_nor_driver_if->init(base, nor_config);
399 }
400 
411  xpi_xfer_channel_t channel,
412  const xpi_nor_config_t *nor_config,
413  uint32_t start,
414  uint32_t length)
415 {
416  hpm_stat_t status = ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase(base, channel, nor_config, start, length);
417  fencei();
418  return status;
419 }
420 
430  xpi_xfer_channel_t channel,
431  const xpi_nor_config_t *nor_config,
432  uint32_t start)
433 {
434  hpm_stat_t status = ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase_sector(base, channel, nor_config, start);
435  fencei();
436  return status;
437 }
438 
448  xpi_xfer_channel_t channel,
449  const xpi_nor_config_t *nor_config,
450  uint32_t start)
451 {
452  return ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase_sector_nonblocking(base, channel, nor_config, start);
453 }
454 
464  xpi_xfer_channel_t channel,
465  const xpi_nor_config_t *nor_config,
466  uint32_t start)
467 {
468  hpm_stat_t status = ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase_block(base, channel, nor_config, start);
469  fencei();
470  return status;
471 }
472 
482  xpi_xfer_channel_t channel,
483  const xpi_nor_config_t *nor_config,
484  uint32_t start)
485 {
486  return ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase_block_nonblocking(base, channel, nor_config, start);
487 }
488 
497  xpi_xfer_channel_t channel,
498  const xpi_nor_config_t *nor_config)
499 {
500  return ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase_chip(base, channel, nor_config);
501 }
502 
511  xpi_xfer_channel_t channel,
512  const xpi_nor_config_t *nor_config)
513 {
514  hpm_stat_t status = ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase_chip_nonblocking(base, channel, nor_config);
515  fencei();
516  return status;
517 }
518 
530  xpi_xfer_channel_t channel,
531  const xpi_nor_config_t *nor_config,
532  const uint32_t *src,
533  uint32_t dst_addr,
534  uint32_t length)
535 {
536  hpm_stat_t status = ROM_API_TABLE_ROOT->xpi_nor_driver_if->program(base, channel, nor_config, src, dst_addr, length);
537  fencei();
538  return status;
539 }
540 
552  xpi_xfer_channel_t channel,
553  const xpi_nor_config_t *nor_config,
554  const uint32_t *src,
555  uint32_t dst_addr,
556  uint32_t length)
557 {
558  return ROM_API_TABLE_ROOT->xpi_nor_driver_if
559  ->page_program_nonblocking(base, channel, nor_config, src, dst_addr, length);
560 }
561 
573  xpi_xfer_channel_t channel,
574  const xpi_nor_config_t *nor_config,
575  uint32_t *dst,
576  uint32_t start,
577  uint32_t length)
578 {
579  return ROM_API_TABLE_ROOT->xpi_nor_driver_if->read(base, channel, nor_config, dst, start, length);
580 }
581 
590  xpi_nor_config_t *config,
591  xpi_nor_config_option_t *cfg_option)
592 {
593  return ROM_API_TABLE_ROOT->xpi_nor_driver_if->auto_config(base, config, cfg_option);
594 }
595 
605  xpi_nor_config_t *nor_cfg,
606  uint32_t property_id,
607  uint32_t *value)
608 {
609  return ROM_API_TABLE_ROOT->xpi_nor_driver_if->get_property(base, nor_cfg, property_id, value);
610 }
611 
623  xpi_xfer_channel_t channel,
624  const xpi_nor_config_t *nor_config,
625  uint32_t addr,
626  uint16_t *out_status)
627 {
628  return ROM_API_TABLE_ROOT->xpi_nor_driver_if->get_status(base, channel, nor_config, addr, out_status);
629 }
630 
640 ATTR_RAMFUNC
641 static inline bool rom_xpi_nor_remap_config(XPI_Type *base, uint32_t start, uint32_t len, uint32_t offset)
642 {
643  if ((base != HPM_XPI0) || ((start & 0xFFF) != 0) || ((len & 0xFFF) != 0)
644  || ((offset & 0xFFF) != 0)) {
645  return false;
646  }
647  static const uint8_t k_mc_xpi_remap_config[] = {
648  0x2e, 0x96, 0x23, 0x22, 0xc5, 0x42, 0x23, 0x24,
649  0xd5, 0x42, 0x93, 0xe5, 0x15, 0x00, 0x23, 0x20,
650  0xb5, 0x42, 0x05, 0x45, 0x82, 0x80,
651  };
652  typedef bool (*remap_config_cb_t)(XPI_Type *, uint32_t, uint32_t, uint32_t);
653  remap_config_cb_t cb = (remap_config_cb_t) &k_mc_xpi_remap_config;
654  bool result = cb(base, start, len, offset);
655  ROM_API_TABLE_ROOT->xpi_driver_if->software_reset(base);
656  fencei();
657  return result;
658 }
659 
664 ATTR_RAMFUNC
665 static inline void rom_xpi_nor_remap_disable(XPI_Type *base)
666 {
667  static const uint8_t k_mc_xpi_remap_disable[] = {
668  0x83, 0x27, 0x05, 0x42, 0xf9, 0x9b, 0x23, 0x20,
669  0xf5, 0x42, 0x82, 0x80,
670  };
671  typedef void (*remap_disable_cb_t)(XPI_Type *);
672  remap_disable_cb_t cb = (remap_disable_cb_t) &k_mc_xpi_remap_disable;
673  cb(base);
674  fencei();
675 }
676 
684 ATTR_RAMFUNC
685 static inline bool rom_xpi_nor_is_remap_enabled(XPI_Type *base)
686 {
687  static const uint8_t k_mc_xpi_remap_enabled[] = {
688  0x03, 0x25, 0x05, 0x42, 0x05, 0x89, 0x82, 0x80,
689  };
690  typedef bool (*remap_chk_cb_t)(XPI_Type *);
691  remap_chk_cb_t chk_cb = (remap_chk_cb_t) &k_mc_xpi_remap_enabled;
692  return chk_cb(base);
693 }
694 
703 ATTR_RAMFUNC
704 static inline bool rom_xpi_nor_exip_region_config(XPI_Type *base, uint32_t index, exip_region_param_t *param)
705 {
706  if (base != HPM_XPI0) {
707  return false;
708  }
709  static const uint8_t k_mc_exip_region_config[] = {
710  0x18, 0x4a, 0x9a, 0x05, 0x2e, 0x95, 0x85, 0x67,
711  0xaa, 0x97, 0x23, 0xa4, 0xe7, 0xd0, 0x4c, 0x4a,
712  0x14, 0x42, 0x58, 0x42, 0x23, 0xa6, 0xb7, 0xd0,
713  0x4c, 0x46, 0x36, 0x97, 0x13, 0x77, 0x07, 0xc0,
714  0x23, 0xa2, 0xb7, 0xd0, 0x0c, 0x46, 0x13, 0x67,
715  0x37, 0x00, 0x05, 0x45, 0x23, 0xa0, 0xb7, 0xd0,
716  0x0c, 0x4e, 0x23, 0xaa, 0xb7, 0xd0, 0x50, 0x4e,
717  0x23, 0xa8, 0xc7, 0xd0, 0x23, 0xac, 0xd7, 0xd0,
718  0x23, 0xae, 0xe7, 0xd0, 0x82, 0x80,
719  };
720  typedef void (*exip_region_config_cb_t)(XPI_Type *, uint32_t, exip_region_param_t *);
721  exip_region_config_cb_t cb = (exip_region_config_cb_t) &k_mc_exip_region_config;
722  cb(base, index, param);
723  ROM_API_TABLE_ROOT->xpi_driver_if->software_reset(base);
724  fencei();
725  return true;
726 }
727 
733 ATTR_RAMFUNC
734 static inline void rom_xpi_nor_exip_region_disable(XPI_Type *base, uint32_t index)
735 {
736  static const uint8_t k_mc_exip_region_disable[] = {
737  0x9a, 0x05, 0x2e, 0x95, 0x85, 0x67, 0xaa, 0x97,
738  0x03, 0xa7, 0xc7, 0xd1, 0x75, 0x9b, 0x23, 0xae,
739  0xe7, 0xd0, 0x82, 0x80
740  };
741  typedef void (*exip_region_disable_cb_t)(XPI_Type *, uint32_t);
742  exip_region_disable_cb_t cb = (exip_region_disable_cb_t) &k_mc_exip_region_disable;
743  cb(base, index);
744  ROM_API_TABLE_ROOT->xpi_driver_if->software_reset(base);
745  fencei();
746 }
747 
752 ATTR_RAMFUNC
753 static inline void rom_xpi_nor_exip_enable(XPI_Type *base)
754 {
755  static const uint8_t k_mc_exip_enable[] = {
756  0x85, 0x67, 0x3e, 0x95, 0x83, 0x27, 0x05, 0xc0,
757  0x37, 0x07, 0x00, 0x80, 0xd9, 0x8f, 0x23, 0x20,
758  0xf5, 0xc0, 0x82, 0x80
759  };
760  typedef void (*exip_enable_cb_t)(XPI_Type *);
761  exip_enable_cb_t cb = (exip_enable_cb_t) &k_mc_exip_enable;
762  cb(base);
763 }
764 
769 ATTR_RAMFUNC
770 static inline void rom_xpi_nor_exip_disable(XPI_Type *base)
771 {
772  static const uint8_t k_mc_exip_disable[] = {
773  0x85, 0x67, 0x3e, 0x95, 0x83, 0x27, 0x05, 0xc0,
774  0x86, 0x07, 0x85, 0x83, 0x23, 0x20, 0xf5, 0xc0,
775  0x82, 0x80
776  };
777  typedef void (*exip_disable_cb_t)(XPI_Type *);
778  exip_disable_cb_t cb = (exip_disable_cb_t) &k_mc_exip_disable;
779  cb(base);
780  ROM_API_TABLE_ROOT->xpi_driver_if->software_reset(base);
781  fencei();
782 }
783 
784 /***********************************************************************************************************************
785  *
786  *
787  * XPI RAM Driver Wrapper
788  *
789  *
790  **********************************************************************************************************************/
799  xpi_ram_config_t *ram_cfg,
800  xpi_ram_config_option_t *cfg_option)
801 {
802  return ROM_API_TABLE_ROOT->xpi_ram_driver_if->get_config(base, ram_cfg, cfg_option);
803 }
804 
811 static inline hpm_stat_t rom_xpi_ram_init(XPI_Type *base, xpi_ram_config_t *ram_cfg)
812 {
813  return ROM_API_TABLE_ROOT->xpi_ram_driver_if->init(base, ram_cfg);
814 }
815 
816 /***********************************************************************************************************************
817  *
818  *
819  * SDP Driver Wrapper
820  *
821  *
822  **********************************************************************************************************************/
826 static inline void rom_sdp_init(void)
827 {
828  ROM_API_TABLE_ROOT->sdp_driver_if->sdp_ip_init();
829 }
830 
834 static inline void rom_sdp_deinit(void)
835 {
836  ROM_API_TABLE_ROOT->sdp_driver_if->sdp_ip_deinit();
837 }
838 
848  const uint8_t *key,
849  sdp_aes_key_bits_t key_bits,
850  uint32_t key_idx)
851 {
852  return ROM_API_TABLE_ROOT->sdp_driver_if->aes_set_key(aes_ctx, key, key_bits, key_idx);
853 }
854 
865  sdp_aes_op_t op,
866  uint32_t len,
867  const uint8_t *in,
868  uint8_t *out)
869 {
870  return ROM_API_TABLE_ROOT->sdp_driver_if->aes_crypt_ecb(aes_ctx, op, len, in, out);
871 }
872 
884  sdp_aes_op_t op,
885  uint32_t length,
886  uint8_t iv[16],
887  const uint8_t *in,
888  uint8_t *out)
889 {
890  return ROM_API_TABLE_ROOT->sdp_driver_if->aes_crypt_cbc(aes_ctx, op, length, iv, in, out);
891 }
892 
901 static inline hpm_stat_t rom_sdp_sm4_set_key(sdp_sm4_ctx_t *sm4_ctx,
902  const uint8_t *key,
903  sdp_sm4_key_bits_t key_bits,
904  uint32_t key_idx)
905 {
906  return ROM_API_TABLE_ROOT->sdp_driver_if->sm4_set_key(sm4_ctx, key, key_bits, key_idx);
907 }
908 
918 static inline hpm_stat_t rom_sdp_sm4_crypt_ecb(sdp_sm4_ctx_t *sm4_ctx,
919  sdp_sm4_op_t op,
920  uint32_t len,
921  const uint8_t *in,
922  uint8_t *out)
923 {
924  return ROM_API_TABLE_ROOT->sdp_driver_if->sm4_crypt_ecb(sm4_ctx, op, len, in, out);
925 }
926 
937 static inline hpm_stat_t rom_sdp_sm4_crypt_cbc(sdp_sm4_ctx_t *sm4_ctx,
938  sdp_sm4_op_t op,
939  uint32_t length,
940  uint8_t iv[16],
941  const uint8_t *in,
942  uint8_t *out)
943 {
944  return ROM_API_TABLE_ROOT->sdp_driver_if->sm4_crypt_cbc(sm4_ctx, op, length, iv, in, out);
945 }
946 
954 {
955  return ROM_API_TABLE_ROOT->sdp_driver_if->hash_init(hash_ctx, alg);
956 }
957 
965 static inline hpm_stat_t rom_sdp_hash_update(sdp_hash_ctx_t *hash_ctx, const uint8_t *data, uint32_t length)
966 {
967  return ROM_API_TABLE_ROOT->sdp_driver_if->hash_update(hash_ctx, data, length);
968 }
969 
976 static inline hpm_stat_t rom_sdp_hash_finish(sdp_hash_ctx_t *hash_ctx, uint8_t *digest)
977 {
978  return ROM_API_TABLE_ROOT->sdp_driver_if->hash_finish(hash_ctx, digest);
979 }
980 
989 static inline hpm_stat_t rom_sdp_memcpy(sdp_dma_ctx_t *dma_ctx, void *dst, const void *src, uint32_t length)
990 {
991  return ROM_API_TABLE_ROOT->sdp_driver_if->memcpy(dma_ctx, dst, src, length);
992 }
993 
1002 static inline hpm_stat_t rom_sdp_memset(sdp_dma_ctx_t *dma_ctx, void *dst, uint8_t pattern, uint32_t length)
1003 {
1004  return ROM_API_TABLE_ROOT->sdp_driver_if->memset(dma_ctx, dst, pattern, length);
1005 }
1006 
1007 #ifdef __cplusplus
1008 }
1009 #endif
1010 
1016 #endif /* HPM_ROMAPI_H */
static hpm_stat_t rom_sdp_memset(sdp_dma_ctx_t *dma_ctx, void *dst, uint8_t pattern, uint32_t length)
SDP memset operation.
Definition: hpm_romapi.h:1002
static hpm_stat_t rom_sdp_aes_crypt_cbc(sdp_aes_ctx_t *aes_ctx, sdp_aes_op_t op, uint32_t length, uint8_t iv[16], const uint8_t *in, uint8_t *out)
SDP AES CBC crypto operation(Encrypt or Decrypt)
Definition: hpm_romapi.h:883
static hpm_stat_t rom_xpi_nor_auto_config(XPI_Type *base, xpi_nor_config_t *config, xpi_nor_config_option_t *cfg_option)
Automatically configure XPI NOR based on cfg_option.
Definition: hpm_romapi.h:589
static hpm_stat_t rom_xpi_nor_init(XPI_Type *base, xpi_nor_config_t *nor_config)
Initialize XPI NOR based on nor_config.
Definition: hpm_romapi.h:396
static hpm_stat_t rom_xpi_nor_read(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t *dst, uint32_t start, uint32_t length)
Read data from specified FLASH address.
Definition: hpm_romapi.h:572
static hpm_stat_t rom_sdp_sm4_crypt_cbc(sdp_sm4_ctx_t *sm4_ctx, sdp_sm4_op_t op, uint32_t length, uint8_t iv[16], const uint8_t *in, uint8_t *out)
SDP SM4 CBC crypto operation(Encrypt or Decrypt)
Definition: hpm_romapi.h:937
static hpm_stat_t rom_xpi_nor_erase_chip_nonblocking(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config)
Erase the whole FLASH in non-blocking way.
Definition: hpm_romapi.h:510
static hpm_stat_t rom_xpi_nor_erase_chip(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config)
Erase the whole FLASH in blocking way.
Definition: hpm_romapi.h:496
static hpm_stat_t rom_sdp_memcpy(sdp_dma_ctx_t *dma_ctx, void *dst, const void *src, uint32_t length)
SDP memcpy operation.
Definition: hpm_romapi.h:989
static hpm_stat_t rom_xpi_nor_erase_block(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t start)
Erase specified FLASH blcok in blocking way.
Definition: hpm_romapi.h:463
static ATTR_RAMFUNC bool rom_xpi_nor_remap_config(XPI_Type *base, uint32_t start, uint32_t len, uint32_t offset)
Configure the XPI Address Remapping Logic.
Definition: hpm_romapi.h:641
static hpm_stat_t rom_sdp_sm4_crypt_ecb(sdp_sm4_ctx_t *sm4_ctx, sdp_sm4_op_t op, uint32_t len, const uint8_t *in, uint8_t *out)
SDP SM4 ECB crypto operation(Encrypt or Decrypt)
Definition: hpm_romapi.h:918
static ATTR_RAMFUNC bool rom_xpi_nor_exip_region_config(XPI_Type *base, uint32_t index, exip_region_param_t *param)
Configure Specified EXiP Region.
Definition: hpm_romapi.h:704
static ATTR_RAMFUNC void rom_xpi_nor_exip_enable(XPI_Type *base)
Enable global EXiP logic.
Definition: hpm_romapi.h:753
static hpm_stat_t rom_sdp_sm4_set_key(sdp_sm4_ctx_t *sm4_ctx, const uint8_t *key, sdp_sm4_key_bits_t key_bits, uint32_t key_idx)
Set SM4 key to SDP.
Definition: hpm_romapi.h:901
static void rom_sdp_init(void)
Initialize SDP IP.
Definition: hpm_romapi.h:826
static hpm_stat_t rom_xpi_nor_page_program_nonblocking(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, const uint32_t *src, uint32_t dst_addr, uint32_t length)
Page-Program data to specified FLASH address in non-blocking way.
Definition: hpm_romapi.h:551
static ATTR_RAMFUNC void rom_xpi_nor_exip_region_disable(XPI_Type *base, uint32_t index)
Disable EXiP Feature on specified EXiP Region.
Definition: hpm_romapi.h:734
static hpm_stat_t rom_xpi_nor_erase_sector_nonblocking(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t start)
Erase specified FLASH sector in non-blocking way.
Definition: hpm_romapi.h:447
static hpm_stat_t rom_xpi_nor_erase(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t start, uint32_t length)
Erase specified FLASH region.
Definition: hpm_romapi.h:410
static hpm_stat_t rom_enter_bootloader(void *ctx)
Eneter specified Boot mode.
Definition: hpm_romapi.h:363
static ATTR_RAMFUNC void rom_xpi_nor_remap_disable(XPI_Type *base)
Disable XPI Remapping logic.
Definition: hpm_romapi.h:665
static hpm_stat_t rom_sdp_aes_set_key(sdp_aes_ctx_t *aes_ctx, const uint8_t *key, sdp_aes_key_bits_t key_bits, uint32_t key_idx)
Set AES key to SDP.
Definition: hpm_romapi.h:847
static void rom_sdp_deinit(void)
De-initialize SDP IP.
Definition: hpm_romapi.h:834
static hpm_stat_t rom_xpi_ram_get_config(XPI_Type *base, xpi_ram_config_t *ram_cfg, xpi_ram_config_option_t *cfg_option)
Get XPI RAM configuration based on cfg_option.
Definition: hpm_romapi.h:798
static hpm_stat_t rom_xpi_ram_init(XPI_Type *base, xpi_ram_config_t *ram_cfg)
Initialize XPI RAM.
Definition: hpm_romapi.h:811
static hpm_stat_t rom_xpi_nor_get_status(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t addr, uint16_t *out_status)
Return the status register value on XPI NOR FLASH.
Definition: hpm_romapi.h:622
static hpm_stat_t rom_xpi_nor_erase_block_nonblocking(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t start)
Erase specified FLASH blcok in non-blocking way.
Definition: hpm_romapi.h:481
static ATTR_RAMFUNC void rom_xpi_nor_exip_disable(XPI_Type *base)
Disable global EXiP logic.
Definition: hpm_romapi.h:770
static hpm_stat_t rom_xpi_nor_program(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, const uint32_t *src, uint32_t dst_addr, uint32_t length)
Program data to specified FLASH address in blocking way.
Definition: hpm_romapi.h:529
static ATTR_RAMFUNC bool rom_xpi_nor_is_remap_enabled(XPI_Type *base)
Check whether XPI Remapping is enabled.
Definition: hpm_romapi.h:685
static hpm_stat_t rom_sdp_hash_finish(sdp_hash_ctx_t *hash_ctx, uint8_t *digest)
HASH finialize.
Definition: hpm_romapi.h:976
static hpm_stat_t rom_sdp_hash_update(sdp_hash_ctx_t *hash_ctx, const uint8_t *data, uint32_t length)
HASH Update.
Definition: hpm_romapi.h:965
static hpm_stat_t rom_sdp_aes_crypt_ecb(sdp_aes_ctx_t *aes_ctx, sdp_aes_op_t op, uint32_t len, const uint8_t *in, uint8_t *out)
SDP AES ECB crypto operation(Encrypt or Decrypt)
Definition: hpm_romapi.h:864
static hpm_stat_t rom_xpi_nor_get_property(XPI_Type *base, xpi_nor_config_t *nor_cfg, uint32_t property_id, uint32_t *value)
Get XPI NOR properties.
Definition: hpm_romapi.h:604
static hpm_stat_t rom_xpi_nor_get_config(XPI_Type *base, xpi_nor_config_t *nor_cfg, xpi_nor_config_option_t *cfg_option)
Get XPI NOR configuration via cfg_option.
Definition: hpm_romapi.h:383
static hpm_stat_t rom_sdp_hash_init(sdp_hash_ctx_t *hash_ctx, sdp_hash_alg_t alg)
HASH initialization.
Definition: hpm_romapi.h:953
static hpm_stat_t rom_xpi_nor_erase_sector(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t start)
Erase specified FLASH sector in blocking way.
Definition: hpm_romapi.h:429
uint32_t hpm_stat_t
Definition: hpm_common.h:119
otp_region_t
OTP region definitions.
Definition: hpm_otp_drv.h:24
otp_lock_option_t
OTP lock options.
Definition: hpm_otp_drv.h:34
#define HPM_XPI0
Definition: hpm_romapi.h:28
#define ROM_API_TABLE_ROOT
Definition: hpm_romapi.h:343
sdp_crypto_op_t
Crypto operation option.
Definition: hpm_sdp_drv.h:44
sdp_crypto_key_bits_t
SDP AES key bit options.
Definition: hpm_sdp_drv.h:29
sdp_hash_alg_t
SDP HASH algorithm definitions.
Definition: hpm_sdp_drv.h:75
xpi_xfer_channel_t
XPI Transfer Channel type definitions.
Definition: hpm_romapi_xpi_def.h:53
uint32_t XPI_Type
XPI_Type definitions for.
Definition: hpm_romapi_xpi_def.h:22
xpi_channel_t
XPI Channel defitions.
Definition: hpm_romapi_xpi_def.h:64
#define fencei()
execute fence.i
Definition: riscv_core.h:88
Bootloader API table.
Definition: hpm_romapi.h:243
Definition: hpm_romapi.h:52
OTP driver interface.
Definition: hpm_romapi.h:82
SDP AES context structure.
Definition: hpm_sdp_drv.h:132
SDP DMA context.
Definition: hpm_sdp_drv.h:152
SDP API interface.
Definition: hpm_romapi.h:243
SDP HASH context.
Definition: hpm_sdp_drv.h:159
Definition: hpm_romapi_xpi_soc_def.h:28
XPI configuration structure.
Definition: hpm_romapi_xpi_def.h:160
XPI Device Configuration structure.
Definition: hpm_romapi_xpi_def.h:173
XPI driver interface.
Definition: hpm_romapi.h:110
XPI NOR configuration option The ROM SW can detect the FLASH configuration based on the following str...
Definition: hpm_romapi_xpi_nor_def.h:136
XPI NOR configuration structure.
Definition: hpm_romapi_xpi_nor_def.h:261
XPI NOR driver interface.
Definition: hpm_romapi.h:145
XPI RAM configuration option The ROM SW can detect the FLASH configuration based on the following str...
Definition: hpm_romapi_xpi_ram_def.h:39
XPI RAM configuration structure.
Definition: hpm_romapi_xpi_ram_def.h:152
XPI RAM driver interface.
Definition: hpm_romapi.h:215
XPI Xfer context.
Definition: hpm_romapi_xpi_def.h:93
Enter Bootloader API argument.
Definition: hpm_romapi.h:41