HPM SDK
HPMicro Software Development Kit
hpm_ov7725.h
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1 /*
2  * Copyright (c) 2021 HPMicro
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  *
6  */
7 
8 #ifndef HPM_OV7725_H
9 #define HPM_OV7725_H
10 #include "hpm_common.h"
11 #include "hpm_camera_config.h"
12 
21 /***********************************************************************************************************************
22  *
23  * Definitions
24  *
25  **********************************************************************************************************************/
26 
30 #define OV7725_ACTIVE_IMAGE_WIDTH (480U)
31 #define OV7725_ACTIVE_IMAGE_HEIGHT (480U)
32 #define OV7725_I2C_ADDR (0x21U)
33 #define OV7725_CHIP_ID_HIGH_BYTE_ADDR (0x0A)
34 #define OV7725_CHIP_ID_HIGH_BYTE_VALUE (0x77)
35 #define OV7725_CHIP_ID_LOW_BYTE_ADDR (0x0B)
36 #define OV7725_CHIP_ID_LOW_BYTE_VALUE (0x21) /* need to check */
37 
38 #define OV7725_RST_ACTIVE 0
39 #define OV7725_RST_INACTIVE 1
40 #define OV7725_PWDN_ACTIVE 1
41 #define OV7725_PWDN_INACTIVE 0
45 #define GAIN (0x00U) /* AGC – Gain control gain setting */
46 #define BLUE (0x01U) /* AWB – Blue channel gain setting */
47 #define RED (0x02U) /* AWB – Red channel gain setting */
48 #define GREEN (0x03U) /* AWB – Green channel gain setting */
49 
50 #define BAVG (0x05U) /* U/B Average Level */
51 #define GAVG (0x06U) /* Y/Gb Average Level */
52 #define RAVG (0x07U) /* V/R Average Level */
53 #define AECH (0x08U) /* Exposure Value – AEC MSBs */
54 
55 #define COM2 (0x09U) /* Common Control 2 */
56 #define COM2_SOFT_SLEEP (0x10U) /* Soft sleep mode */
57 #define COM2_OUT_DRIVE_1x (0x00U) /* Output drive capability 1x */
58 #define COM2_OUT_DRIVE_2x (0x01U) /* Output drive capability 2x */
59 #define COM2_OUT_DRIVE_3x (0x02U) /* Output drive capability 3x */
60 #define COM2_OUT_DRIVE_4x (0x03U) /* Output drive capability 4x */
61 
62 #define PID (0x0AU) /* Product ID Number MSB */
63 #define VER (0x0BU) /* Product ID Number LSB */
64 
65 #define COM3 (0x0CU) /* Common Control 3 */
66 #define COM3_VFLIP (0x80U) /* Vertical flip image ON/OFF selection */
67 #define COM3_MIRROR (0x40U) /* Horizontal mirror image ON/OFF selection */
68 #define COM3_SWAP_BR (0x20U) /* Swap B/R output sequence in RGB output mode */
69 #define COM3_SWAP_YUV (0x10U) /* Swap Y/UV output sequence in YUV output mode */
70 #define COM3_SWAP_MSB (0x08U) /* Swap output MSB/LSB */
71 #define COM3_TRI_CLOCK (0x04U) /* Tri-state option for output clock at power-down period */
72 #define COM3_TRI_DATA (0x02U) /* Tri-state option for output data at power-down period */
73 #define COM3_COLOR_BAR (0x01U) /* Sensor color bar test pattern output enable */
74 
75 #define COM4 (0x0DU) /* Common Control 4 */
76 #define COM4_PLL_BYPASS (0x00U) /* Bypass PLL */
77 #define COM4_PLL_4x (0x40U) /* PLL frequency 4x */
78 #define COM4_PLL_6x (0x80U) /* PLL frequency 6x */
79 #define COM4_PLL_8x (0xc0U) /* PLL frequency 8x */
80 #define COM4_AEC_FULL (0x00U) /* AEC evaluate full window */
81 #define COM4_AEC_1_2 (0x10U) /* AEC evaluate 1/2 window */
82 #define COM4_AEC_1_4 (0x20U) /* AEC evaluate 1/4 window */
83 #define COM4_AEC_2_3 (0x30U) /* AEC evaluate 2/3 window */
84 
85 #define COM5 (0x0EU) /* Common Control 5 */
86 #define COM5_AFR (0x80U) /* Auto frame rate control ON/OFF selection (night mode) */
87 #define COM5_AFR_SPEED (0x40U) /* Auto frame rate control speed selection */
88 #define COM5_AFR_0 (0x00U) /* No reduction of frame rate */
89 #define COM5_AFR_1_2 (0x10U) /* Max reduction to 1/2 frame rate */
90 #define COM5_AFR_1_4 (0x20U) /* Max reduction to 1/4 frame rate */
91 #define COM5_AFR_1_8 (0x30U) /* Max reduction to 1/8 frame rate */
92 #define COM5_AFR_4x (0x04U) /* Add frame when AGC reaches 4x gain */
93 #define COM5_AFR_8x (0x08U) /* Add frame when AGC reaches 8x gain */
94 #define COM5_AFR_16x (0x0cU) /* Add frame when AGC reaches 16x gain */
95 #define COM5_AEC_NO_LIMIT (0x01U) /* No limit to AEC increase step */
96 
97 #define COM6 (0x0FU) /* Common Control 6 */
98 #define COM6_AUTO_WINDOW (0x01U) /* Auto window setting ON/OFF selection when format changes */
99 
100 #define AEC (0x10U) /* AEC[7:0] (see register AECH for AEC[15:8]) */
101 #define CLKRC (0x11U) /* Internal Clock */
102 
103 #define COM7 (0x12U) /* Common Control 7 */
104 #define COM7_RESET (0x80U) /* SCCB Register Reset */
105 #define COM7_RES_VGA (0x00U) /* Resolution VGA */
106 #define COM7_RES_QVGA (0x40U) /* Resolution QVGA */
107 #define COM7_BT656 (0x20U) /* BT.656 protocol ON/OFF */
108 #define COM7_SENSOR_RAW (0x10U) /* Sensor RAW */
109 #define COM7_FMT_GBR422 (0x02U) /* RGB output format GBR422 */
110 #define COM7_FMT_RGB565 (0x06U) /* RGB output format RGB565 */
111 #define COM7_FMT_RGB555 (0x0AU) /* RGB output format RGB555 */
112 #define COM7_FMT_RGB444 (0x0EU) /* RGB output format RGB444 */
113 #define COM7_FMT_YUV (0x00U) /* Output format YUV */
114 #define COM7_FMT_P_BAYER (0x01U) /* Output format Processed Bayer RAW */
115 #define COM7_FMT_R_BAYER (0x03U) /* Output format Bayer RAW */
116 
117 #define COM8 (0x13U) /* Common Control 8 */
118 #define COM8_FAST_AUTO (0x80U) /* Enable fast AGC/AEC algorithm */
119 #define COM8_STEP_VSYNC (0x00U) /* AEC - Step size limited to vertical blank */
120 #define COM8_STEP_UNLIMIT (0x40U) /* AEC - Step size unlimited step size */
121 #define COM8_BANDF_EN (0x20U) /* Banding filter ON/OFF */
122 #define COM8_AEC_BANDF (0x10U) /* Enable AEC below banding value */
123 #define COM8_AEC_FINE_EN (0x08U) /* Fine AEC ON/OFF control */
124 #define COM8_AGC_EN (0x04U) /* AGC Enable */
125 #define COM8_AWB_EN (0x02U) /* AWB Enable */
126 #define COM8_AEC_EN (0x01U) /* AEC Enable */
127 
128 #define COM9 (0x14U) /* Common Control 9 */
129 #define COM9_HISTO_AVG (0x80U) /* Histogram or average based AEC/AGC selection */
130 #define COM9_AGC_GAIN_2x (0x00U) /* Automatic Gain Ceiling 2x */
131 #define COM9_AGC_GAIN_4x (0x10U) /* Automatic Gain Ceiling 4x */
132 #define COM9_AGC_GAIN_8x (0x20U) /* Automatic Gain Ceiling 8x */
133 #define COM9_AGC_GAIN_16x (0x30U) /* Automatic Gain Ceiling 16x */
134 #define COM9_AGC_GAIN_32x (0x40U) /* Automatic Gain Ceiling 32x */
135 #define COM9_DROP_VSYNC (0x04U) /* Drop VSYNC output of corrupt frame */
136 #define COM9_DROP_HREF (0x02U) /* Drop HREF output of corrupt frame */
137 
138 #define COM10 (0x15U) /* Common Control 10 */
139 #define COM10_NEGATIVE (0x80U) /* Output negative data */
140 #define COM10_HSYNC_EN (0x40U) /* HREF changes to HSYNC */
141 #define COM10_PCLK_FREE (0x00U) /* PCLK output option: free running PCLK */
142 #define COM10_PCLK_MASK (0x20U) /* PCLK output option: masked during horizontal blank */
143 #define COM10_PCLK_REV (0x10U) /* PCLK reverse */
144 #define COM10_HREF_REV (0x08U) /* HREF reverse */
145 #define COM10_VSYNC_FALLING (0x00U) /* VSYNC changes on falling edge of PCLK */
146 #define COM10_VSYNC_RISING (0x04U) /* VSYNC changes on rising edge of PCLK */
147 #define COM10_VSYNC_NEG (0x02U) /* VSYNC negative */
148 #define COM10_OUT_RANGE_8 (0x01U) /* Output data range: Full range */
149 #define COM10_OUT_RANGE_10 (0x00U) /* Output data range: Data from [10] to [F0] (8 MSBs) */
150 
151 #define REG16 (0x16U) /* Register 16 */
152 #define REG16_BIT_SHIFT (0x80U) /* Bit shift test pattern options */
153 #define HSTART (0x17U) /* Horizontal Frame (HREF column) Start 8 MSBs (2 LSBs are at HREF[5:4]) */
154 #define HSIZE (0x18U) /* Horizontal Sensor Size (2 LSBs are at HREF[1:0]) */
155 #define VSTART (0x19U) /* Vertical Frame (row) Start 8 MSBs (1 LSB is at HREF[6]) */
156 #define VSIZE (0x1AU) /* Vertical Sensor Size (1 LSB is at HREF[2]) */
157 #define PSHFT (0x1BU) /* Data Format - Pixel Delay Select */
158 #define REG_MIDH (0x1CU) /* Manufacturer ID Byte – High */
159 #define REG_MIDL (0x1DU) /* Manufacturer ID Byte – Low */
160 #define LAEC (0x1FU) /* Fine AEC Value - defines exposure value less than one row period */
161 
162 #define COM11 (0x20U) /* Common Control 11 */
163 #define COM11_SNGL_FRAME_EN (0x02U) /* Single frame ON/OFF selection */
164 #define COM11_SNGL_XFR_TRIG (0x01U) /* Single frame transfer trigger */
165 
166 #define BDBASE (0x22U) /* Banding Filter Minimum AEC Value */
167 #define DBSTEP (0x23U) /* Banding Filter Maximum Step */
168 #define AEW (0x24U) /* AGC/AEC - Stable Operating Region (Upper Limit) */
169 #define AEB (0x25U) /* AGC/AEC - Stable Operating Region (Lower Limit) */
170 #define VPT (0x26U) /* AGC/AEC Fast Mode Operating Region */
171 #define REG28 (0x28U) /* Selection on the number of dummy rows, N */
172 #define HOUTSIZE (0x29U) /* Horizontal Data Output Size MSBs (2 LSBs at register EXHCH[1:0]) */
173 #define EXHCH (0x2AU) /* Dummy Pixel Insert MSB */
174 #define EXHCL (0x2BU) /* Dummy Pixel Insert LSB */
175 #define VOUTSIZE (0x2CU) /* Vertical Data Output Size MSBs (LSB at register EXHCH[2]) */
176 #define ADVFL (0x2DU) /* LSB of Insert Dummy Rows in Vertical Sync (1 bit equals 1 row) */
177 #define ADVFH (0x2EU) /* MSB of Insert Dummy Rows in Vertical Sync */
178 #define YAVE (0x2FU) /* Y/G Channel Average Value */
179 #define LUMHTH (0x30U) /* Histogram AEC/AGC Luminance High Level Threshold */
180 #define LUMLTH (0x31U) /* Histogram AEC/AGC Luminance Low Level Threshold */
181 #define HREF (0x32U) /* Image Start and Size Control */
182 #define DM_LNL (0x33U) /* Dummy Row Low 8 Bits */
183 #define DM_LNH (0x34U) /* Dummy Row High 8 Bits */
184 #define ADOFF_B (0x35U) /* AD Offset Compensation Value for B Channel */
185 #define ADOFF_R (0x36U) /* AD Offset Compensation Value for R Channel */
186 #define ADOFF_GB (0x37U) /* AD Offset Compensation Value for GB Channel */
187 #define ADOFF_GR (0x38U) /* AD Offset Compensation Value for GR Channel */
188 #define OFF_B (0x39U) /* AD Offset Compensation Value for B Channel */
189 #define OFF_R (0x3AU) /* AD Offset Compensation Value for R Channel */
190 #define OFF_GB (0x3BU) /* AD Offset Compensation Value for GB Channel */
191 #define OFF_GR (0x3CU) /* AD Offset Compensation Value for GR Channel */
192 #define COM12 (0x3DU) /* DC offset compensation for analog process */
193 
194 #define COM13 (0x3EU) /* Common Control 13 */
195 #define COM13_BLC_EN (0x80U) /* BLC enable */
196 #define COM13_ADC_EN (0x40U) /* ADC channel BLC ON/OFF control */
197 #define COM13_ANALOG_BLC (0x20U) /* Analog processing channel BLC ON/OFF control */
198 #define COM13_ABLC_GAIN_EN (0x04U) /* ABLC gain trigger enable */
199 
200 #define COM14 (0x3FU) /* Common Control 14 */
201 #define COM15 (0x40U) /* Common Control 15 */
202 #define COM16 (0x41U) /* Common Control 16 */
203 #define TGT_B (0x42U) /* BLC Blue Channel Target Value */
204 #define TGT_R (0x43U) /* BLC Red Channel Target Value */
205 #define TGT_GB (0x44U) /* BLC Gb Channel Target Value */
206 #define TGT_GR (0x45U) /* BLC Gr Channel Target Value */
207 
208 #define LC_CTR (0x46U) /* Lens Correction Control */
209 #define LC_CTR_RGB_COMP_1 (0x00U) /* R, G, and B channel compensation coefficient is set by LC_COEF ((0x49U)) */
210 /* R, G, and B channel compensation coefficient is set by registers LC_COEFB ((0x4BU)), LC_COEF ((0x49U)), and LC_COEFR ((0x4CU)), respectively */
211 #define LC_CTR_RGB_COMP_3 (0x04U)
212 #define LC_CTR_EN (0x01U) /* Lens correction enable */
213 #define LC_XC (0x47U) /* X Coordinate of Lens Correction Center Relative to Array Center */
214 #define LC_YC (0x48U) /* Y Coordinate of Lens Correction Center Relative to Array Center */
215 #define LC_COEF (0x49U) /* Lens Correction Coefficient */
216 #define LC_RADI (0x4AU) /* Lens Correction Radius */
217 #define LC_COEFB (0x4BU) /* Lens Correction B Channel Compensation Coefficient */
218 #define LC_COEFR (0x4CU) /* Lens Correction R Channel Compensation Coefficient */
219 
220 #define FIXGAIN (0x4DU) /* Analog Fix Gain Amplifier */
221 #define AREF0 (0x4EU) /* Sensor Reference Control */
222 #define AREF1 (0x4FU) /* Sensor Reference Current Control */
223 #define AREF2 (0x50U) /* Analog Reference Control */
224 #define AREF3 (0x51U) /* ADC Reference Control */
225 #define AREF4 (0x52U) /* ADC Reference Control */
226 #define AREF5 (0x53U) /* ADC Reference Control */
227 #define AREF6 (0x54U) /* Analog Reference Control */
228 #define AREF7 (0x55U) /* Analog Reference Control */
229 #define UFIX (0x60U) /* U Channel Fixed Value Output */
230 #define VFIX (0x61U) /* V Channel Fixed Value Output */
231 #define AWBB_BLK (0x62U) /* AWB Option for Advanced AWB */
232 
233 #define AWB_CTRL0 (0x63U) /* AWB Control Byte 0 */
234 #define AWB_CTRL0_GAIN_EN (0x80U) /* AWB gain enable */
235 #define AWB_CTRL0_CALC_EN (0x40U) /* AWB calculate enable */
236 #define AWB_CTRL0_WBC_MASK (0x0FU) /* WBC threshold 2 */
237 
238 #define DSP_CTRL1 (0x64U) /* DSP Control Byte 1 */
239 #define DSP_CTRL1_FIFO_EN (0x80U) /* FIFO enable/disable selection */
240 #define DSP_CTRL1_UV_EN (0x40U) /* UV adjust function ON/OFF selection */
241 #define DSP_CTRL1_SDE_EN (0x20U) /* SDE enable */
242 #define DSP_CTRL1_MTRX_EN (0x10U) /* Color matrix ON/OFF selection */
243 #define DSP_CTRL1_INTRP_EN (0x08U) /* Interpolation ON/OFF selection */
244 #define DSP_CTRL1_GAMMA_EN (0x04U) /* Gamma function ON/OFF selection */
245 #define DSP_CTRL1_BLACK_EN (0x02U) /* Black defect auto correction ON/OFF */
246 #define DSP_CTRL1_WHITE_EN (0x01U) /* White defect auto correction ON/OFF */
247 
248 #define DSP_CTRL2 (0x65U) /* DSP Control Byte 2 */
249 #define DSP_CTRL2_VDCW_EN (0x08U) /* Vertical DCW enable */
250 #define DSP_CTRL2_HDCW_EN (0x04U) /* Horizontal DCW enable */
251 #define DSP_CTRL2_VZOOM_EN (0x02U) /* Vertical zoom out enable */
252 #define DSP_CTRL2_HZOOM_EN (0x01U) /* Horizontal zoom out enable */
253 
254 #define DSP_CTRL3 (0x66U) /* DSP Control Byte 3 */
255 #define DSP_CTRL3_UV_EN (0x80U) /* UV output sequence option */
256 #define DSP_CTRL3_CBAR_EN (0x20U) /* DSP color bar ON/OFF selection */
257 #define DSP_CTRL3_FIFO_EN (0x08U) /* FIFO power down ON/OFF selection */
258 #define DSP_CTRL3_SCAL1_PWDN (0x04U) /* Scaling module power down control 1 */
259 #define DSP_CTRL3_SCAL2_PWDN (0x02U) /* Scaling module power down control 2 */
260 #define DSP_CTRL3_INTRP_PWDN (0x01U) /* Interpolation module power down control */
261 
262 #define DSP_CTRL4 (0x67U) /* DSP Control Byte 4 */
263 #define DSP_CTRL4_YUV_RGB (0x00U) /* Output selection YUV or RGB */
264 #define DSP_CTRL4_RAW8 (0x02U) /* Output selection RAW8 */
265 #define DSP_CTRL4_RAW10 (0x03U) /* Output selection RAW10 */
266 
267 #define AWB_BIAS (0x68U) /* AWB BLC Level Clip */
268 #define AWB_CTRL1 (0x69U) /* AWB Control 1 */
269 #define AWB_CTRL2 (0x6AU) /* AWB Control 2 */
270 
271 #define AWB_CTRL3 (0x6BU) /* AWB Control 3 */
272 #define AWB_CTRL3_ADVANCED (0x80U) /* AWB mode select - Advanced AWB */
273 #define AWB_CTRL3_SIMPLE (0x00U) /* AWB mode select - Simple AWB */
274 
275 #define AWB_CTRL4 (0x6CU) /* AWB Control 4 */
276 #define AWB_CTRL5 (0x6DU) /* AWB Control 5 */
277 #define AWB_CTRL6 (0x6EU) /* AWB Control 6 */
278 #define AWB_CTRL7 (0x6FU) /* AWB Control 7 */
279 #define AWB_CTRL8 (0x70U) /* AWB Control 8 */
280 #define AWB_CTRL9 (0x71U) /* AWB Control 9 */
281 #define AWB_CTRL10 (0x72U) /* AWB Control 10 */
282 #define AWB_CTRL11 (0x73U) /* AWB Control 11 */
283 #define AWB_CTRL12 (0x74U) /* AWB Control 12 */
284 #define AWB_CTRL13 (0x75U) /* AWB Control 13 */
285 #define AWB_CTRL14 (0x76U) /* AWB Control 14 */
286 #define AWB_CTRL15 (0x77U) /* AWB Control 15 */
287 #define AWB_CTRL16 (0x78U) /* AWB Control 16 */
288 #define AWB_CTRL17 (0x79U) /* AWB Control 17 */
289 #define AWB_CTRL18 (0x7AU) /* AWB Control 18 */
290 #define AWB_CTRL19 (0x7BU) /* AWB Control 19 */
291 #define AWB_CTRL20 (0x7CU) /* AWB Control 20 */
292 #define AWB_CTRL21 (0x7DU) /* AWB Control 21 */
293 #define GAM1 (0x7EU) /* Gamma Curve 1st Segment Input End Point (0x04U) Output Value */
294 #define GAM2 (0x7FU) /* Gamma Curve 2nd Segment Input End Point (0x08U) Output Value */
295 #define GAM3 (0x80U) /* Gamma Curve 3rd Segment Input End Point (0x10U) Output Value */
296 #define GAM4 (0x81U) /* Gamma Curve 4th Segment Input End Point (0x20U) Output Value */
297 #define GAM5 (0x82U) /* Gamma Curve 5th Segment Input End Point (0x28U) Output Value */
298 #define GAM6 (0x83U) /* Gamma Curve 6th Segment Input End Point (0x30U) Output Value */
299 #define GAM7 (0x84U) /* Gamma Curve 7th Segment Input End Point (0x38U) Output Value */
300 #define GAM8 (0x85U) /* Gamma Curve 8th Segment Input End Point (0x40U) Output Value */
301 #define GAM9 (0x86U) /* Gamma Curve 9th Segment Input End Point (0x48U) Output Value */
302 #define GAM10 (0x87U) /* Gamma Curve 10th Segment Input End Point (0x50U) Output Value */
303 #define GAM11 (0x88U) /* Gamma Curve 11th Segment Input End Point (0x60U) Output Value */
304 #define GAM12 (0x89U) /* Gamma Curve 12th Segment Input End Point (0x70U) Output Value */
305 #define GAM13 (0x8AU) /* Gamma Curve 13th Segment Input End Point (0x90U) Output Value */
306 #define GAM14 (0x8BU) /* Gamma Curve 14th Segment Input End Point (0xB0U) Output Value */
307 #define GAM15 (0x8CU) /* Gamma Curve 15th Segment Input End Point (0xD0U) Output Value */
308 #define SLOP (0x8DU) /* Gamma Curve Highest Segment Slope */
309 #define DNSTH (0x8EU) /* De-noise Threshold */
310 #define EDGE0 (0x8FU) /* Edge Enhancement Strength Control */
311 #define EDGE1 (0x90U) /* Edge Enhancement Threshold Control */
312 #define DNSOFF (0x91U) /* Auto De-noise Threshold Control */
313 #define EDGE2 (0x92U) /* Edge Enhancement Strength Upper Limit */
314 #define EDGE3 (0x93U) /* Edge Enhancement Strength Upper Limit */
315 #define MTX1 (0x94U) /* Matrix Coefficient 1 */
316 #define MTX2 (0x95U) /* Matrix Coefficient 2 */
317 #define MTX3 (0x96U) /* Matrix Coefficient 3 */
318 #define MTX4 (0x97U) /* Matrix Coefficient 4 */
319 #define MTX5 (0x98U) /* Matrix Coefficient 5 */
320 #define MTX6 (0x99U) /* Matrix Coefficient 6 */
321 
322 #define MTX_CTRL (0x9AU) /* Matrix Control */
323 #define MTX_CTRL_DBL_EN (0x80U) /* Matrix double ON/OFF selection */
324 
325 #define BRIGHTNESS (0x9BU) /* Brightness Control */
326 #define CONTRAST (0x9CU) /* Contrast Gain */
327 #define UVADJ0 (0x9EU) /* Auto UV Adjust Control 0 */
328 #define UVADJ1 (0x9FU) /* Auto UV Adjust Control 1 */
329 #define SCAL0 (0xA0U) /* DCW Ratio Control */
330 #define SCAL1 (0xA1U) /* Horizontal Zoom Out Control */
331 #define SCAL2 (0xA2U) /* Vertical Zoom Out Control */
332 #define FIFODLYM (0xA3U) /* FIFO Manual Mode Delay Control */
333 #define FIFODLYA (0xA4U) /* FIFO Auto Mode Delay Control */
334 
335 #define SDE (0xA6U) /* Special Digital Effect Control */
336 #define SDE_NEGATIVE_EN (0x40U) /* Negative image enable */
337 #define SDE_GRAYSCALE_EN (0x20U) /* Gray scale image enable */
338 #define SDE_V_FIXED_EN (0x10U) /* V fixed value enable */
339 #define SDE_U_FIXED_EN (0x08U) /* U fixed value enable */
340 #define SDE_CONT_BRIGHT_EN (0x04U) /* Contrast/Brightness enable */
341 #define SDE_SATURATION_EN (0x02U) /* Saturation enable */
342 #define SDE_HUE_EN (0x01U) /* Hue enable */
343 
344 #define USAT (0xA7U) /* U Component Saturation Gain */
345 #define VSAT (0xA8U) /* V Component Saturation Gain */
346 #define HUECOS (0xA9U) /* Cosine value × (0x80U) */
347 #define HUESIN (0xAAU) /* Sine value × (0x80U) */
348 #define SIGN_BIT (0xABU) /* Sign Bit for Hue and Brightness */
349 
350 #define DSPAUTO (0xACU) /* DSP Auto Function ON/OFF Control */
351 #define DSPAUTO_AWB_EN (0x80U) /* AWB auto threshold control */
352 #define DSPAUTO_DENOISE_EN (0x40U) /* De-noise auto threshold control */
353 #define DSPAUTO_EDGE_EN (0x20U) /* Sharpness (edge enhancement) auto strength control */
354 #define DSPAUTO_UV_EN (0x10U) /* UV adjust auto slope control */
355 #define DSPAUTO_SCAL0_EN (0x08U) /* Auto scaling factor control (register SCAL0 ((0xA0U))) */
356 #define DSPAUTO_SCAL1_EN (0x04U) /* Auto scaling factor control (registers SCAL1 ((0xA1U) and SCAL2 ((0xA2U)))*/
357 
358 #ifdef __cplusplus
359 extern "C" {
360 #endif
361 
368 
376 hpm_stat_t ov7725_read_register(camera_context_t *context, uint8_t reg, uint8_t *buf);
377 
385 hpm_stat_t ov7725_write_register(camera_context_t *context, uint8_t reg, uint8_t val);
386 
392 
398 
399 
408 hpm_stat_t ov7725_load_settings(camera_context_t *context, uint8_t *reg_values, uint32_t count);
409 
415 void ov7725_power_up(camera_context_t *context);
416 
417 #ifdef __cplusplus
418 }
419 #endif
420 
426 #endif /* HPM_OV7725_H */
uint32_t hpm_stat_t
Definition: hpm_common.h:126
hpm_stat_t ov7725_init(camera_context_t *context, camera_config_t *ov_config)
ov7725 initialization routine
Definition: hpm_ov7725.c:303
hpm_stat_t ov7725_check_chip_id(camera_context_t *context)
ov7725 check chip id
Definition: hpm_ov7725.c:224
hpm_stat_t ov7725_read_register(camera_context_t *context, uint8_t reg, uint8_t *buf)
ov7725 read register
Definition: hpm_ov7725.c:185
hpm_stat_t ov7725_software_reset(camera_context_t *context)
ov7725 reset
Definition: hpm_ov7725.c:212
hpm_stat_t ov7725_load_settings(camera_context_t *context, uint8_t *reg_values, uint32_t count)
ov7725 load set of register-value pairs
Definition: hpm_ov7725.c:200
void ov7725_power_up(camera_context_t *context)
ov7725 power up
Definition: hpm_ov7725.c:332
hpm_stat_t ov7725_write_register(camera_context_t *context, uint8_t reg, uint8_t val)
ov7725 write register
Definition: hpm_ov7725.c:195
Definition: hpm_camera_config.h:42
Definition: hpm_camera_config.h:18