30 #define OV7725_ACTIVE_IMAGE_WIDTH (480U)
31 #define OV7725_ACTIVE_IMAGE_HEIGHT (480U)
32 #define OV7725_I2C_ADDR (0x21U)
33 #define OV7725_CHIP_ID_HIGH_BYTE_ADDR (0x0A)
34 #define OV7725_CHIP_ID_HIGH_BYTE_VALUE (0x77)
35 #define OV7725_CHIP_ID_LOW_BYTE_ADDR (0x0B)
36 #define OV7725_CHIP_ID_LOW_BYTE_VALUE (0x21)
38 #define OV7725_RST_ACTIVE 0
39 #define OV7725_RST_INACTIVE 1
40 #define OV7725_PWDN_ACTIVE 1
41 #define OV7725_PWDN_INACTIVE 0
56 #define COM2_SOFT_SLEEP (0x10U)
57 #define COM2_OUT_DRIVE_1x (0x00U)
58 #define COM2_OUT_DRIVE_2x (0x01U)
59 #define COM2_OUT_DRIVE_3x (0x02U)
60 #define COM2_OUT_DRIVE_4x (0x03U)
66 #define COM3_VFLIP (0x80U)
67 #define COM3_MIRROR (0x40U)
68 #define COM3_SWAP_BR (0x20U)
69 #define COM3_SWAP_YUV (0x10U)
70 #define COM3_SWAP_MSB (0x08U)
71 #define COM3_TRI_CLOCK (0x04U)
72 #define COM3_TRI_DATA (0x02U)
73 #define COM3_COLOR_BAR (0x01U)
76 #define COM4_PLL_BYPASS (0x00U)
77 #define COM4_PLL_4x (0x40U)
78 #define COM4_PLL_6x (0x80U)
79 #define COM4_PLL_8x (0xc0U)
80 #define COM4_AEC_FULL (0x00U)
81 #define COM4_AEC_1_2 (0x10U)
82 #define COM4_AEC_1_4 (0x20U)
83 #define COM4_AEC_2_3 (0x30U)
86 #define COM5_AFR (0x80U)
87 #define COM5_AFR_SPEED (0x40U)
88 #define COM5_AFR_0 (0x00U)
89 #define COM5_AFR_1_2 (0x10U)
90 #define COM5_AFR_1_4 (0x20U)
91 #define COM5_AFR_1_8 (0x30U)
92 #define COM5_AFR_4x (0x04U)
93 #define COM5_AFR_8x (0x08U)
94 #define COM5_AFR_16x (0x0cU)
95 #define COM5_AEC_NO_LIMIT (0x01U)
98 #define COM6_AUTO_WINDOW (0x01U)
101 #define CLKRC (0x11U)
104 #define COM7_RESET (0x80U)
105 #define COM7_RES_VGA (0x00U)
106 #define COM7_RES_QVGA (0x40U)
107 #define COM7_BT656 (0x20U)
108 #define COM7_SENSOR_RAW (0x10U)
109 #define COM7_FMT_GBR422 (0x02U)
110 #define COM7_FMT_RGB565 (0x06U)
111 #define COM7_FMT_RGB555 (0x0AU)
112 #define COM7_FMT_RGB444 (0x0EU)
113 #define COM7_FMT_YUV (0x00U)
114 #define COM7_FMT_P_BAYER (0x01U)
115 #define COM7_FMT_R_BAYER (0x03U)
118 #define COM8_FAST_AUTO (0x80U)
119 #define COM8_STEP_VSYNC (0x00U)
120 #define COM8_STEP_UNLIMIT (0x40U)
121 #define COM8_BANDF_EN (0x20U)
122 #define COM8_AEC_BANDF (0x10U)
123 #define COM8_AEC_FINE_EN (0x08U)
124 #define COM8_AGC_EN (0x04U)
125 #define COM8_AWB_EN (0x02U)
126 #define COM8_AEC_EN (0x01U)
129 #define COM9_HISTO_AVG (0x80U)
130 #define COM9_AGC_GAIN_2x (0x00U)
131 #define COM9_AGC_GAIN_4x (0x10U)
132 #define COM9_AGC_GAIN_8x (0x20U)
133 #define COM9_AGC_GAIN_16x (0x30U)
134 #define COM9_AGC_GAIN_32x (0x40U)
135 #define COM9_DROP_VSYNC (0x04U)
136 #define COM9_DROP_HREF (0x02U)
138 #define COM10 (0x15U)
139 #define COM10_NEGATIVE (0x80U)
140 #define COM10_HSYNC_EN (0x40U)
141 #define COM10_PCLK_FREE (0x00U)
142 #define COM10_PCLK_MASK (0x20U)
143 #define COM10_PCLK_REV (0x10U)
144 #define COM10_HREF_REV (0x08U)
145 #define COM10_VSYNC_FALLING (0x00U)
146 #define COM10_VSYNC_RISING (0x04U)
147 #define COM10_VSYNC_NEG (0x02U)
148 #define COM10_OUT_RANGE_8 (0x01U)
149 #define COM10_OUT_RANGE_10 (0x00U)
151 #define REG16 (0x16U)
152 #define REG16_BIT_SHIFT (0x80U)
153 #define HSTART (0x17U)
154 #define HSIZE (0x18U)
155 #define VSTART (0x19U)
156 #define VSIZE (0x1AU)
157 #define PSHFT (0x1BU)
158 #define REG_MIDH (0x1CU)
159 #define REG_MIDL (0x1DU)
162 #define COM11 (0x20U)
163 #define COM11_SNGL_FRAME_EN (0x02U)
164 #define COM11_SNGL_XFR_TRIG (0x01U)
166 #define BDBASE (0x22U)
167 #define DBSTEP (0x23U)
171 #define REG28 (0x28U)
172 #define HOUTSIZE (0x29U)
173 #define EXHCH (0x2AU)
174 #define EXHCL (0x2BU)
175 #define VOUTSIZE (0x2CU)
176 #define ADVFL (0x2DU)
177 #define ADVFH (0x2EU)
179 #define LUMHTH (0x30U)
180 #define LUMLTH (0x31U)
182 #define DM_LNL (0x33U)
183 #define DM_LNH (0x34U)
184 #define ADOFF_B (0x35U)
185 #define ADOFF_R (0x36U)
186 #define ADOFF_GB (0x37U)
187 #define ADOFF_GR (0x38U)
188 #define OFF_B (0x39U)
189 #define OFF_R (0x3AU)
190 #define OFF_GB (0x3BU)
191 #define OFF_GR (0x3CU)
192 #define COM12 (0x3DU)
194 #define COM13 (0x3EU)
195 #define COM13_BLC_EN (0x80U)
196 #define COM13_ADC_EN (0x40U)
197 #define COM13_ANALOG_BLC (0x20U)
198 #define COM13_ABLC_GAIN_EN (0x04U)
200 #define COM14 (0x3FU)
201 #define COM15 (0x40U)
202 #define COM16 (0x41U)
203 #define TGT_B (0x42U)
204 #define TGT_R (0x43U)
205 #define TGT_GB (0x44U)
206 #define TGT_GR (0x45U)
208 #define LC_CTR (0x46U)
209 #define LC_CTR_RGB_COMP_1 (0x00U)
211 #define LC_CTR_RGB_COMP_3 (0x04U)
212 #define LC_CTR_EN (0x01U)
213 #define LC_XC (0x47U)
214 #define LC_YC (0x48U)
215 #define LC_COEF (0x49U)
216 #define LC_RADI (0x4AU)
217 #define LC_COEFB (0x4BU)
218 #define LC_COEFR (0x4CU)
220 #define FIXGAIN (0x4DU)
221 #define AREF0 (0x4EU)
222 #define AREF1 (0x4FU)
223 #define AREF2 (0x50U)
224 #define AREF3 (0x51U)
225 #define AREF4 (0x52U)
226 #define AREF5 (0x53U)
227 #define AREF6 (0x54U)
228 #define AREF7 (0x55U)
231 #define AWBB_BLK (0x62U)
233 #define AWB_CTRL0 (0x63U)
234 #define AWB_CTRL0_GAIN_EN (0x80U)
235 #define AWB_CTRL0_CALC_EN (0x40U)
236 #define AWB_CTRL0_WBC_MASK (0x0FU)
238 #define DSP_CTRL1 (0x64U)
239 #define DSP_CTRL1_FIFO_EN (0x80U)
240 #define DSP_CTRL1_UV_EN (0x40U)
241 #define DSP_CTRL1_SDE_EN (0x20U)
242 #define DSP_CTRL1_MTRX_EN (0x10U)
243 #define DSP_CTRL1_INTRP_EN (0x08U)
244 #define DSP_CTRL1_GAMMA_EN (0x04U)
245 #define DSP_CTRL1_BLACK_EN (0x02U)
246 #define DSP_CTRL1_WHITE_EN (0x01U)
248 #define DSP_CTRL2 (0x65U)
249 #define DSP_CTRL2_VDCW_EN (0x08U)
250 #define DSP_CTRL2_HDCW_EN (0x04U)
251 #define DSP_CTRL2_VZOOM_EN (0x02U)
252 #define DSP_CTRL2_HZOOM_EN (0x01U)
254 #define DSP_CTRL3 (0x66U)
255 #define DSP_CTRL3_UV_EN (0x80U)
256 #define DSP_CTRL3_CBAR_EN (0x20U)
257 #define DSP_CTRL3_FIFO_EN (0x08U)
258 #define DSP_CTRL3_SCAL1_PWDN (0x04U)
259 #define DSP_CTRL3_SCAL2_PWDN (0x02U)
260 #define DSP_CTRL3_INTRP_PWDN (0x01U)
262 #define DSP_CTRL4 (0x67U)
263 #define DSP_CTRL4_YUV_RGB (0x00U)
264 #define DSP_CTRL4_RAW8 (0x02U)
265 #define DSP_CTRL4_RAW10 (0x03U)
267 #define AWB_BIAS (0x68U)
268 #define AWB_CTRL1 (0x69U)
269 #define AWB_CTRL2 (0x6AU)
271 #define AWB_CTRL3 (0x6BU)
272 #define AWB_CTRL3_ADVANCED (0x80U)
273 #define AWB_CTRL3_SIMPLE (0x00U)
275 #define AWB_CTRL4 (0x6CU)
276 #define AWB_CTRL5 (0x6DU)
277 #define AWB_CTRL6 (0x6EU)
278 #define AWB_CTRL7 (0x6FU)
279 #define AWB_CTRL8 (0x70U)
280 #define AWB_CTRL9 (0x71U)
281 #define AWB_CTRL10 (0x72U)
282 #define AWB_CTRL11 (0x73U)
283 #define AWB_CTRL12 (0x74U)
284 #define AWB_CTRL13 (0x75U)
285 #define AWB_CTRL14 (0x76U)
286 #define AWB_CTRL15 (0x77U)
287 #define AWB_CTRL16 (0x78U)
288 #define AWB_CTRL17 (0x79U)
289 #define AWB_CTRL18 (0x7AU)
290 #define AWB_CTRL19 (0x7BU)
291 #define AWB_CTRL20 (0x7CU)
292 #define AWB_CTRL21 (0x7DU)
302 #define GAM10 (0x87U)
303 #define GAM11 (0x88U)
304 #define GAM12 (0x89U)
305 #define GAM13 (0x8AU)
306 #define GAM14 (0x8BU)
307 #define GAM15 (0x8CU)
309 #define DNSTH (0x8EU)
310 #define EDGE0 (0x8FU)
311 #define EDGE1 (0x90U)
312 #define DNSOFF (0x91U)
313 #define EDGE2 (0x92U)
314 #define EDGE3 (0x93U)
322 #define MTX_CTRL (0x9AU)
323 #define MTX_CTRL_DBL_EN (0x80U)
325 #define BRIGHTNESS (0x9BU)
326 #define CONTRAST (0x9CU)
327 #define UVADJ0 (0x9EU)
328 #define UVADJ1 (0x9FU)
329 #define SCAL0 (0xA0U)
330 #define SCAL1 (0xA1U)
331 #define SCAL2 (0xA2U)
332 #define FIFODLYM (0xA3U)
333 #define FIFODLYA (0xA4U)
336 #define SDE_NEGATIVE_EN (0x40U)
337 #define SDE_GRAYSCALE_EN (0x20U)
338 #define SDE_V_FIXED_EN (0x10U)
339 #define SDE_U_FIXED_EN (0x08U)
340 #define SDE_CONT_BRIGHT_EN (0x04U)
341 #define SDE_SATURATION_EN (0x02U)
342 #define SDE_HUE_EN (0x01U)
346 #define HUECOS (0xA9U)
347 #define HUESIN (0xAAU)
348 #define SIGN_BIT (0xABU)
350 #define DSPAUTO (0xACU)
351 #define DSPAUTO_AWB_EN (0x80U)
352 #define DSPAUTO_DENOISE_EN (0x40U)
353 #define DSPAUTO_EDGE_EN (0x20U)
354 #define DSPAUTO_UV_EN (0x10U)
355 #define DSPAUTO_SCAL0_EN (0x08U)
356 #define DSPAUTO_SCAL1_EN (0x04U)
uint32_t hpm_stat_t
Definition: hpm_common.h:126
hpm_stat_t ov7725_init(camera_context_t *context, camera_config_t *ov_config)
ov7725 initialization routine
Definition: hpm_ov7725.c:303
hpm_stat_t ov7725_check_chip_id(camera_context_t *context)
ov7725 check chip id
Definition: hpm_ov7725.c:224
hpm_stat_t ov7725_read_register(camera_context_t *context, uint8_t reg, uint8_t *buf)
ov7725 read register
Definition: hpm_ov7725.c:185
hpm_stat_t ov7725_software_reset(camera_context_t *context)
ov7725 reset
Definition: hpm_ov7725.c:212
hpm_stat_t ov7725_load_settings(camera_context_t *context, uint8_t *reg_values, uint32_t count)
ov7725 load set of register-value pairs
Definition: hpm_ov7725.c:200
void ov7725_power_up(camera_context_t *context)
ov7725 power up
Definition: hpm_ov7725.c:332
hpm_stat_t ov7725_write_register(camera_context_t *context, uint8_t reg, uint8_t val)
ov7725 write register
Definition: hpm_ov7725.c:195
Definition: hpm_camera_config.h:42
Definition: hpm_camera_config.h:18