hpm_spi.h

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/*
 * Copyright (c) 2022 HPMicro
 *
 * SPDX-License-Identifier: BSD-3-Clause
 *
 */
 
#ifndef HPM_COMPONENT_SPI_H
#define HPM_COMPONENT_SPI_H
 
#include "hpm_common.h"
#include "hpm_spi_drv.h"
#ifdef HPMSOC_HAS_HPMSDK_DMAV2
#include "hpm_dmav2_drv.h"
#else
#include "hpm_dma_drv.h"
#endif
#include "hpm_dmamux_drv.h"
#include "hpm_misc.h"
#include "hpm_l1c_drv.h"
 
#ifndef SPI_CS_ACTIVE
#define SPI_CS_ACTIVE 0
#endif
 
#ifndef USE_DMA_MGR
#define USE_DMA_MGR      (0U)
#endif
 
#if USE_DMA_MGR
#include "hpm_dma_mgr.h"
#endif
/* Every transaction can be delineated by 3 dma descriptions: SPI control, SPI cmd, SPI data */
#define SPI_DMA_DESC_COUNT_PER_TRANS    (3U)
 
typedef struct {
    DMA_Type *dma_ptr;
    DMAMUX_Type *dmamux_ptr;
    uint8_t rx_dma_ch;
    uint8_t tx_dma_ch;
    uint8_t rx_dmamux_ch;
    uint8_t tx_dmamux_ch;
    uint8_t rx_req;
    uint8_t tx_req;
    uint8_t data_width;
} spi_dma_context_t;
 
typedef struct {
    SPI_Type *ptr;
    uint32_t cs_pin;
    uint8_t cmd;
    uint8_t *rx_buff;
    uint8_t *tx_buff;
    uint8_t running_core;
    uint32_t addr;
    uint32_t rx_size;
    uint32_t rx_count;
    uint32_t tx_size;
    uint32_t tx_count;
    uint32_t data_len_in_byte;
    uint32_t per_trans_max;
    uint32_t *spi_transctrl;
    void (*write_cs)(uint32_t cs_pin, uint8_t state);
    spi_dma_context_t dma_context;
    dma_linked_descriptor_t *dma_linked_descriptor;
} spi_context_t;
 
typedef struct {
    spi_mode_selection_t mode;               
    spi_data_phase_format_t io_mode;         
    spi_sclk_idle_state_t clk_polarity;      
    spi_sclk_sampling_clk_edges_t clk_phase; 
    spi_shift_direction_t direction;                
    uint8_t data_len;                        
    bool data_merge;                         
} spi_initialize_config_t;
 
#if USE_DMA_MGR
typedef void (*spi_dma_complete_cb)(uint32_t channel);
#endif
 
#ifdef __cplusplus
extern "C" {
#endif
 
hpm_stat_t hpm_spi_setup_dma_transfer(spi_context_t *context, spi_control_config_t *config);
 
/*
 * SPI release gpio pin if gpio use for SPI CS function
 */
hpm_stat_t hpm_spi_release_gpio_cs(spi_context_t *context);
 
 
void hpm_spi_get_default_init_config(spi_initialize_config_t *config);
 
hpm_stat_t hpm_spi_initialize(SPI_Type *ptr, spi_initialize_config_t *config);
 
hpm_stat_t hpm_spi_set_sclk_frequency(SPI_Type *ptr, uint32_t freq);
 
hpm_stat_t hpm_spi_transmit_receive_blocking(SPI_Type *ptr, uint8_t *wbuff, uint8_t *rbuff, uint32_t size, uint32_t timeout);
 
hpm_stat_t hpm_spi_receive_blocking(SPI_Type *ptr, uint8_t *buff, uint32_t size, uint32_t timeout);
 
hpm_stat_t hpm_spi_transmit_blocking(SPI_Type *ptr, uint8_t *buff, uint32_t size, uint32_t timeout);
 
hpm_stat_t hpm_spi_transmit_receive_setup_dma(SPI_Type *ptr, uint32_t size);
 
hpm_stat_t hpm_spi_receive_setup_dma(SPI_Type *ptr, uint32_t size);
 
hpm_stat_t hpm_spi_transmit_setup_dma(SPI_Type *ptr, uint32_t size);
 
#if USE_DMA_MGR
hpm_stat_t hpm_spi_dma_mgr_install_callback(SPI_Type *ptr,
                                        spi_dma_complete_cb tx_complete,
                                        spi_dma_complete_cb rx_complete);
 
hpm_stat_t hpm_spi_transmit_receive_nonblocking(SPI_Type *ptr, uint8_t *wbuff, uint8_t *rbuff, uint32_t size);
 
hpm_stat_t hpm_spi_receive_nonblocking(SPI_Type *ptr, uint8_t *buff, uint32_t size);
 
hpm_stat_t hpm_spi_transmit_nonblocking(SPI_Type *ptr, uint8_t *buff, uint32_t size);
 
dma_resource_t *hpm_spi_get_tx_dma_resource(SPI_Type *ptr);
 
dma_resource_t *hpm_spi_get_rx_dma_resource(SPI_Type *ptr);
 
#endif
 
#ifdef __cplusplus
}
#endif
 
#endif /* HPM_COMPONENT_SPI_H */