HPM SDK
HPMicro Software Development Kit
sfdp_def.h
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1 /* */
2 /* Created by hpm15 on 3/11/21. */
3 /* */
4 
5 #ifndef SFDP_DEF_H
6 #define SFDP_DEF_H
7 
8 #include <stdint.h>
9 #include "hpm_common.h"
10 
11 /* ! @brief Commands for probing the FLASH device */
12 #define SERIAL_FLASH_READ_SFDP (0x5AU)
13 #define SERIAL_FLASH_READ_MANUFACTURE_ID (0x9FU)
14 
15 /* !@brief SFDP related definitions */
16 #define SFDP_SIGNATURE (0x50444653UL) /* ASCII: SFDP */
17 #define SFDP_VERSION_MAJOR_1_0 (1U)
18 #define SFDP_VERSION_MINOR_0 (0U) /* JESD216 */
19 #define SFDP_VERSION_MINOR_A (5U) /* JESD216A */
20 #define SFDP_VERSION_MINOR_B (6U) /* JESD216B */
21 #define SFDP_VERSION_MINOR_C (7U) /* JESD216C */
22 #define SFDP_VERSION_MINOR_D (8U) /* JESD216D */
23 #define SFDP_BASIC_PROTOCOL_TABLE_SIZE_REV0 (36U)
24 #define SFDP_BASIC_PROTOCOL_TABLE_SIZE_REVA (64U)
25 #define SFDP_BASIC_PROTOCOL_TABLE_SIZE_REVB SFDP_BASIC_PROTOCOL_TABLE_SIZE_REVA
26 #define SFDP_BASIC_PROTOCOL_TABLE_SIZE_REVC (80U)
27 #define SFDP_BASIC_PROTOCOL_TABLE_SIZE_REVD SFDP_BASIC_PROTOCOL_TABLE_SIZE_REVC
28 
29 typedef union _sfdp_header {
30  uint32_t words[2];
31  struct {
32  uint32_t signature;
33  uint8_t minor_rev;
34  uint8_t major_rev;
35  uint8_t param_hdr_num;
36  uint8_t sfdp_access_protocol; /* Defined in JESD216C, reserved for older version */
37  };
38 
39 } sfdp_header_t;
40 
41 /* !@brief SFDP parameter Type ID definitions */
42 #define PARAMETER_ID_BASIC_SPIPROTOCOL (0xFF00U)
43 /* New Table added in JESD216B */
44 #define PARAMETER_ID_SECTOR_MAP (0xFF81U)
45 #define PARAMETER_ID_4BYTEADDRESS_INSTRUCTION_TABLE (0xFF84U)
46 /* New Table added in JESD216C */
47 #define PARAMETER_ID_XSPIPROFILE1_0 (0xFF05U)
48 #define PARAMETER_ID_XSPIOROFILE2_0 (0xFF06U)
49 #define PARAMETER_ID_STACTRLCFGREGMAP (0xFF87U)
50 #define PARAMETER_ID_OPIENABLESEQ (0xFF09U)
51 #define PARAMETER_ID_CMDSEQ_CHANGE_TO_OCTAL_DDR (0xFF0AU)
52 
53 #define NORFLASH_ADDRESSBITS_3B (0U)
54 #define NORFLASH_ADDRESSBITS_3B_4B (1U)
55 #define NORFLASH_ADDRESSBITS_4B (2U)
56 
57 #define COMMAND_EXTENSION_SAME_AS_COMMAND (0U)
58 #define COMMAND_EXTENSION_INVERSE_OF_COMMAND (1U)
59 #define COMMAND_AND_COMMANDEXTENSION_16BITWORD (2U)
60 
61 /* !@brief Supported methods to enter 8-8-8 mode from 1-1-1 mode, More details please refer to JESD216C/D */
62 #define ENTER_OCTAL_MODE_OPTION0 HPM_BITSMASK(1U, 1)
63 #define ENTER_OCTAL_MODE_OPTION1 HPM_BITSMASK(1U, 2)
64 
65 /* !@brief SFDP Parameter Header, see JESD216D doc for more details */
66 typedef union _sfdp_parameter_header {
67  uint32_t words[2];
68  struct {
69  uint8_t parameter_id_lsb;
70  uint8_t minor_rev;
71  uint8_t major_rev;
72  uint8_t table_length_in_32bit;
73  uint8_t parameter_table_pointer[3];
74  uint8_t parameter_id_msb;
75  };
76 
77 } sfdp_parameter_header_t;
78 
79 /* !@brief Basic Flash Parameter Table, see JESD216D doc for more details */
80 typedef union _jedec_flash_param_table {
81  uint32_t words[20];
82  struct {
83  struct {
84  uint32_t erase_size : 2;
85  uint32_t write_granularity : 1;
86  uint32_t reserved0 : 2;
87  uint32_t unused0 : 3;
88  uint32_t erase4k_inst : 8;
89  uint32_t support_1_1_2_fast_read : 1;
90  uint32_t address_bits : 2;
91  uint32_t support_ddr_clocking : 1;
92  uint32_t support_1_2_2_fast_read : 1;
93  uint32_t supports_1_4_4_fast_read : 1;
94  uint32_t support_1_1_4_fast_read : 1;
95  uint32_t unused1 : 9;
96  } misc; /* 1st word */
97  uint32_t flash_density; /* 2nd word */
98  struct {
99  uint32_t dummy_clocks_1_4_4_read : 5;
100  uint32_t mode_clocks_1_4_4_read : 3;
101  uint32_t inst_1_4_4_read : 8;
102  uint32_t dummy_clocks_1_1_4_read : 5;
103  uint32_t mode_clocks_1_1_4_read : 3;
104  uint32_t inst_1_1_4_read : 8;
105  } read_1_4_info; /* 3rd word */
106  struct {
107  uint32_t dummy_clocks_1_1_2_read : 5;
108  uint32_t mode_clocks_1_1_2_read : 3;
109  uint32_t inst_1_1_2_read : 8;
110  uint32_t dummy_clocks_1_2_2_read : 5;
111  uint32_t mode_clocks_1_2_2_read : 3;
112  uint32_t inst_1_2_2_read : 8;
113  } read_1_2_info; /* 4th word */
114 
115  struct {
116  uint32_t support_2_2_2_fast_read : 1;
117  uint32_t reserved0 : 3;
118  uint32_t support_4_4_4_fast_read : 1;
119  uint32_t reserved1 : 27;
120  } read_22_44_check; /* 5th word */
121 
122  struct {
123  uint32_t reserved0 : 16;
124  uint32_t dummy_clocks_2_2_2_read : 5;
125  uint32_t mode_clocks_2_2_2_read : 3;
126  uint32_t inst_2_2_2_read : 8;
127  } read_2_2_info; /* 6th word */
128  struct {
129  uint32_t reserved0 : 16;
130  uint32_t dummy_clocks_4_4_4_read : 5;
131  uint32_t mode_clocks_4_4_4_read : 3;
132  uint32_t inst_4_4_4_read : 8;
133  } read_4_4_info; /* 7th word */
134 
135  struct {
136  uint8_t size;
137  uint8_t inst;
138  } erase_info[4]; /* 8th,9th word */
139 
140  uint32_t erase_timing; /* 10th word */
141  struct {
142  uint32_t reserved0 : 4;
143  uint32_t page_size : 4;
144  uint32_t reserved1 : 24;
145  } chip_erase_progrm_info; /* 11th word */
146 
147  struct {
148  uint32_t suspend_resume_spec;
149  uint32_t suspend_resume_inst;
150  } suspend_resume_info; /* 12th, 13th word */
151 
152  struct {
153  uint32_t reserved0 : 2;
154  uint32_t busy_status_polling : 6;
155  uint32_t reserved1 : 24;
156  } busy_status_info; /* 14th word */
157 
158  struct {
159  uint32_t mode_4_4_4_disable_seq : 4;
160  uint32_t mode_4_4_4_enable_seq : 5;
161  uint32_t support_mode_0_4_4 : 1;
162  uint32_t mode_0_4_4_exit_method : 6;
163  uint32_t mode_0_4_4_entry_method : 4;
164  uint32_t quad_enable_requirement : 3;
165  uint32_t hold_reset_disable : 1;
166  uint32_t reserved0 : 8;
167  } mode_4_4_info; /* 15th word */
168 
169  struct {
170  uint32_t status_reg_write_enable : 7;
171  uint32_t reserved0 : 1;
172  uint32_t soft_reset_rescue_support : 6;
173  uint32_t exit_4_byte_addressing : 10;
174  uint32_t enter_4_byte_addrssing : 8;
175  } mode_config_info; /* 16th word */
176 
177  struct {
178  uint32_t dummy_clocks_1_8_8_read : 5;
179  uint32_t mode_clocks_1_8_8_read : 3;
180  uint32_t inst_1_8_8_read : 8;
181  uint32_t dummy_clocks_1_1_8_read : 5;
182  uint32_t mode_clocks_1_1_8_read : 3;
183  uint32_t inst_1_1_8_read : 8;
184  } read_1_8_info; /* 17th word */
185 
186  struct {
187  uint32_t reserved : 18;
188  uint32_t output_driver_strength : 5;
189  uint32_t jedec_spi_protocol_reset : 1;
190  uint32_t dqs_waveform_type_sdr : 2;
191  uint32_t dqs_support_in_qpi_sdr : 1;
192  uint32_t dqs_support_in_qpi_ddr : 1;
193  uint32_t dqs_support_in_opi_str : 1;
194  uint32_t cmd_and_extension_in_opi_ddr : 2;
195  uint32_t byte_order_in_opi_ddr : 1;
196  } xpi_misc_info; /* 18th word */
197 
198  struct {
199  uint32_t opi_sdr_disable_seq : 4;
200  uint32_t opi_sdr_enable_seq : 5;
201  uint32_t support_mode_0_8_8 : 1;
202  uint32_t mode_0_8_8_exit_method : 6;
203  uint32_t mode_0_8_8_entry_method : 4;
204  uint32_t octal_enable_requirement : 3;
205  uint32_t reserved : 9;
206  } mode_octal_info; /* 19th word */
207 
208  struct {
209  uint32_t qpi_sdr_no_dqs : 4;
210  uint32_t qpi_sdr_with_dqs : 4;
211  uint32_t qpi_ddr_no_dqs : 4;
212  uint32_t qpi_ddr_with_dqs : 4;
213  uint32_t opi_sdr_no_dqs : 4;
214  uint32_t opi_sdr_with_dqs : 4;
215  uint32_t opi_ddr_no_dqs : 4;
216  uint32_t opi_ddr_with_dqs : 4;
217  } max_speed_info_xpi; /* 20th word */
218  };
219 
220 } jedec_flash_param_table_t;
221 
222 /* !@brief 4Byte Addressing Instruction Table, see JESD216D doc for more details */
223 typedef union _jedec_4byte_addressing_inst_table {
224  uint32_t words[2];
225  struct {
226  struct {
227  uint32_t support_1_1_1_read : 1;
228  uint32_t support_1_1_1_fast_read : 1;
229  uint32_t support_1_1_2_fast_read : 1;
230  uint32_t support_1_2_2_fast_read : 1;
231  uint32_t support_1_1_4_fast_read : 1;
232  uint32_t support_1_4_4_fast_read : 1;
233  uint32_t support_1_1_1_page_program : 1;
234  uint32_t support_1_1_4_page_program : 1;
235  uint32_t support_1_4_4_page_program : 1;
236  uint32_t support_erase_type1_size : 1;
237  uint32_t support_erase_type2_size : 1;
238  uint32_t support_erase_type3_size : 1;
239  uint32_t support_erase_type4_size : 1;
240  uint32_t support_1_1_1_dtr_read : 1;
241  uint32_t support_1_2_2_dtr_read : 1;
242  uint32_t support_1_4_4_dtr_read : 1;
243  uint32_t support_volatile_sector_lock_read_cmd : 1;
244  uint32_t support_volatile_sector_lock_write_cmd : 1;
245  uint32_t support_nonvolatile_sector_lock_read_cmd : 1;
246  uint32_t support_nonvolatile_sector_lock_write_cmd : 1;
247  uint32_t reserved : 12;
248  } cmd_4byte_support_info;
249 
250  struct {
251  uint8_t erase_inst[4];
252  } erase_inst_info;
253  };
254 } jedec_4byte_addressing_inst_table_t;
255 
256 typedef union _jedec_cmd_sequence_change_to_octal_mode {
257  uint32_t words[8];
258 
259  struct {
260  struct {
261  uint32_t byte3_of_1st_command_seq : 8;
262  uint32_t byte2_of_1st_command_seq : 8;
263  uint32_t byte1_of_1st_command_seq : 8;
264  uint32_t length_of_1st_command_seq : 8;
265  } first_command_sequence_low; /* 1st command sequence */
266 
267  struct {
268  uint32_t byte7_of_first_command_seq : 8;
269  uint32_t byte6_of_first_command_seq : 8;
270  uint32_t byte5_of_first_command_seq : 8;
271  uint32_t byte4_of_first_command_seq : 8;
272  } first_command_sequence_high; /* 1st command sequence */
273 
274  struct {
275  uint32_t byte3_of_2nd_command_seq : 8;
276  uint32_t byte2_of_2nd_command_seq : 8;
277  uint32_t byte1_of_2nd_command_seq : 8;
278  uint32_t length_of_2nd_command_seq : 8;
279  } second_command_sequence_low; /* 2nd command sequence */
280 
281  struct {
282  uint32_t byte7_of_2nd_command_seq : 8;
283  uint32_t byte6_of_2nd_command_seq : 8;
284  uint32_t byte5_of_2nd_command_seq : 8;
285  uint32_t byte4_of_2md_command_seq : 8;
286  } second_command_sequence_high; /* 2nd command sequence */
287 
288  struct {
289  uint32_t byte3_of_3rd_command_seq : 8;
290  uint32_t byte2_of_3rd_command_seq : 8;
291  uint32_t byte1_of_3rd_command_seq : 8;
292  uint32_t length_of_3rd_command_seq : 8;
293  } third_command_sequence_low; /* 3rd command sequence */
294 
295  struct {
296  uint32_t byte7_of_3rd_command_seq : 8;
297  uint32_t byte6_of_3rd_command_seq : 8;
298  uint32_t byte5_of_3rd_command_seq : 8;
299  uint32_t byte4_of_3rd_command_seq : 8;
300  } third_command_sequence_high; /* 3rd command sequence */
301 
302  struct {
303  uint32_t byte3_of_4th_command_seq : 8;
304  uint32_t byte2_of_4th_command_seq : 8;
305  uint32_t byte1_of_4th_command_seq : 8;
306  uint32_t length_of_4th_command_seq : 8;
307  } fourth_command_sequence_low; /* 4th command sequence */
308 
309  struct {
310  uint32_t byte7_of_4th_command_seq : 8;
311  uint32_t byte6_of_4th_command_seq : 8;
312  uint32_t byte5_of_4th_command_seq : 8;
313  uint32_t byte4_of_4th_command_seq : 8;
314  } fourth_command_sequence_high; /* 4th command sequence */
315  };
316 
317 } jedec_cmd_sequence_change_to_octal_mode_t;
318 
319 typedef union _jedec_x_spi_profile1_0_table_t {
320  uint32_t words[5];
321 
322  struct {
323  struct {
324  uint32_t fast_read_wrapped_cmd : 8;
325  uint32_t fast_read_cmd : 8;
326  uint32_t reserved : 16;
327  } table1;
328 
329  struct {
330  uint32_t write_nv_register_cmd : 8;
331  uint32_t write_v_register_cmd : 8;
332  uint32_t reserved : 16;
333  } table2;
334 
335  uint32_t unused_tables[3];
336  };
337 
338 } jedec_x_spi_profile1_0_table_t;
339 
340 typedef union _jedec_status_control_configuration_reg_map {
341  uint32_t words[28];
342  struct {
343  uint32_t unused_table[2];
344  struct {
345  uint32_t dummy_cycles_1s_1s_1s : 4;
346  uint32_t reserved0 : 2;
347  uint32_t dummy_cycles_8d_8d_8d : 4;
348  uint32_t dummy_cycles_8s_8s_8s : 4;
349  uint32_t dummy_cycles_4s_4d_4d : 4;
350  uint32_t dummy_cycles_4s_4s_4s : 4;
351  uint32_t dummy_cycles_2s_2s_2s : 4;
352  uint32_t dummy_cycles_1s_1s_1s_select : 2;
353  uint32_t addr_bytes_address_status_register : 2;
354  uint32_t unused0 : 2;
355  };
356  uint32_t unused_table1[25];
357  };
358 } jedec_status_control_configuration_reg_map_t;
359 
360 typedef struct _jdec_query_table {
361  uint32_t standard_version; /* JESD216 version */
362  uint32_t flash_param_tbl_size;
363  jedec_flash_param_table_t flash_param_tbl;
364  bool has_4b_addressing_inst_table;
365  jedec_4byte_addressing_inst_table_t flash_4b_inst_tbl;
366  bool has_otcal_ddr_mode_enable_sequence_table;
367  jedec_cmd_sequence_change_to_octal_mode_t otcal_ddr_mode_enable_sequence; /* JESD216C/D */
368  jedec_x_spi_profile1_0_table_t profile1_0_table;
369  bool has_spi_profile1_0_table;
370  jedec_status_control_configuration_reg_map_t sccr_map;
371  bool has_sccr_map;
372 } jedec_info_table_t;
373 
374 
375 /* !@brief Typical Serial NOR commands supported by most Serial NOR devices */
376 #define SERIALNOR_CMD_BASICREAD_3B (0x03U)
377 #define SERIALNOR_CMD_BASICREAD_4B (0x13U)
378 #define SERIALNOR_CMD_PAGEPROGRAM_1_1_1_3B (0x02U)
379 #define SERIALNOR_CMD_PAGEPROGRAM_1_1_1_4B (0x12U)
380 #define SERIALNOR_CMD_PAGEPROGRAM_1_4_4_4B (0x3EU)
381 #define SERIALNOR_CMD_PAGEPROGRAM_1_1_4_4B (0x34U)
382 #define SERIALNOR_CMD_READ_SDR_1_4_4_3B (0xEBU)
383 #define SERIALNOR_CMD_READ_DDR_1_4_4_3B (0xEDU)
384 #define SERIALNOR_CMD_READ_SDR_1_4_4_4B (0xECU)
385 #define SERIALNOR_CMD_READ_SDR_1_1_4_4B (0x6CU)
386 #define SERIALNOR_CMD_READ_DDR_1_4_4_4B (0xEEU)
387 #define SERIALNOR_CMD_CHIPERASE (0x60U)
388 #define SERIALNOR_CMD_WRITEENABLE (0x06U)
389 #define SERIALNOR_CMD_WRITE_STATUS_REG1 (0x01U)
390 #define SERIALNOR_CMD_READ_STATUS_REG1 (0x05U)
391 #define SERIALNOR_CMD_WRITE_STATUS_REG2 (0x3EU)
392 #define SERIALNOR_CMD_READ_STATUS_REG2 (0x3FU)
393 #define SERIALNOR_CMD_READ_FLAGREG (0x70U)
394 #define SERIALNOR_CMD_READID (0x9FU)
395 #define SERIALNOR_CMD_READ_DDR_4B (0x0CU)
396 #define SERIALNOR_CMD_READ_DDR_3B (0x0BU)
397 #define SERIALNOR_CMD_SE4K_3B (0x20U)
398 #define SERIALNOR_CMD_SE4K_4B (0x21U)
399 #define SERIALNOR_CMD_SE64K_3B (0xD8U)
400 #define SERIALNOR_CMD_SE64K_4B (0xDCU)
401 
402 #endif
size
static void size
Definition: hpm_math.h:6938
hpm_common.h
sfdp_header_t
union _sfdp_header sfdp_header_t
jedec_4byte_addressing_inst_table_t
union _jedec_4byte_addressing_inst_table jedec_4byte_addressing_inst_table_t
jedec_info_table_t
struct _jdec_query_table jedec_info_table_t
jedec_flash_param_table_t
union _jedec_flash_param_table jedec_flash_param_table_t
jedec_status_control_configuration_reg_map_t
union _jedec_status_control_configuration_reg_map jedec_status_control_configuration_reg_map_t
jedec_x_spi_profile1_0_table_t
union _jedec_x_spi_profile1_0_table_t jedec_x_spi_profile1_0_table_t
jedec_cmd_sequence_change_to_octal_mode_t
union _jedec_cmd_sequence_change_to_octal_mode jedec_cmd_sequence_change_to_octal_mode_t
sfdp_parameter_header_t
union _sfdp_parameter_header sfdp_parameter_header_t