HPM SDK
HPMicro Software Development Kit
hpm_plb_regs.h
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1 /*
2  * Copyright (c) 2021-2024 HPMicro
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  *
6  */
7 
8 
9 #ifndef HPM_PLB_H
10 #define HPM_PLB_H
11 
12 typedef struct {
13  struct {
14  __RW uint32_t LOOKUP_TABLE[4]; /* 0x0 - 0xC: TYPE A CHN lookup_table 0 */
15  __RW uint32_t SW_INJECT; /* 0x10: TYPE A CHN software inject */
16  __R uint8_t RESERVED0[12]; /* 0x14 - 0x1F: Reserved */
17  } TYPE_A[8];
18  __R uint8_t RESERVED0[768]; /* 0x100 - 0x3FF: Reserved */
19  struct {
20  __RW uint32_t LUT[2]; /* 0x400 - 0x404: TYPE B CHN lookup table 0 */
21  __RW uint32_t CMP[4]; /* 0x408 - 0x414: TYPE B CHN data unit cmp0 */
22  __RW uint32_t MODE; /* 0x418: TYPE B CHN mode ctrl */
23  __RW uint32_t SW_INJECT; /* 0x41C: TYPE B CHN software inject */
24  } TYPE_B[8];
25 } PLB_Type;
26 
27 
28 /* Bitfield definition for register of struct array TYPE_A: 0 */
29 /*
30  * LOOKUP_TABLE (RW)
31  *
32  * using 4 bit trig_in as lookup index. software can program this register as trig_in's true table.
33  */
34 #define PLB_TYPE_A_LOOKUP_TABLE_LOOKUP_TABLE_MASK (0xFFFFU)
35 #define PLB_TYPE_A_LOOKUP_TABLE_LOOKUP_TABLE_SHIFT (0U)
36 #define PLB_TYPE_A_LOOKUP_TABLE_LOOKUP_TABLE_SET(x) (((uint32_t)(x) << PLB_TYPE_A_LOOKUP_TABLE_LOOKUP_TABLE_SHIFT) & PLB_TYPE_A_LOOKUP_TABLE_LOOKUP_TABLE_MASK)
37 #define PLB_TYPE_A_LOOKUP_TABLE_LOOKUP_TABLE_GET(x) (((uint32_t)(x) & PLB_TYPE_A_LOOKUP_TABLE_LOOKUP_TABLE_MASK) >> PLB_TYPE_A_LOOKUP_TABLE_LOOKUP_TABLE_SHIFT)
38 
39 /* Bitfield definition for register of struct array TYPE_A: SW_INJECT */
40 /*
41  * SW_INJECT (RW)
42  *
43  * software can inject value to TYPEA's output
44  */
45 #define PLB_TYPE_A_SW_INJECT_SW_INJECT_MASK (0xFU)
46 #define PLB_TYPE_A_SW_INJECT_SW_INJECT_SHIFT (0U)
47 #define PLB_TYPE_A_SW_INJECT_SW_INJECT_SET(x) (((uint32_t)(x) << PLB_TYPE_A_SW_INJECT_SW_INJECT_SHIFT) & PLB_TYPE_A_SW_INJECT_SW_INJECT_MASK)
48 #define PLB_TYPE_A_SW_INJECT_SW_INJECT_GET(x) (((uint32_t)(x) & PLB_TYPE_A_SW_INJECT_SW_INJECT_MASK) >> PLB_TYPE_A_SW_INJECT_SW_INJECT_SHIFT)
49 
50 /* Bitfield definition for register of struct array TYPE_B: 0 */
51 /*
52  * LOOKUP_TABLE (RW)
53  *
54  * lut0 and lut1 union as 64bit, consider each 4bit as one slice. then, total 16 slice. slice0 as bit3:0, slice1 as bit7:4...etc. using 4bit trig in as index of slice. the operate sel in data unit of type B channle is decided by which slice value choosed by trig_in
55  */
56 #define PLB_TYPE_B_LUT_LOOKUP_TABLE_MASK (0xFFFFFFFFUL)
57 #define PLB_TYPE_B_LUT_LOOKUP_TABLE_SHIFT (0U)
58 #define PLB_TYPE_B_LUT_LOOKUP_TABLE_SET(x) (((uint32_t)(x) << PLB_TYPE_B_LUT_LOOKUP_TABLE_SHIFT) & PLB_TYPE_B_LUT_LOOKUP_TABLE_MASK)
59 #define PLB_TYPE_B_LUT_LOOKUP_TABLE_GET(x) (((uint32_t)(x) & PLB_TYPE_B_LUT_LOOKUP_TABLE_MASK) >> PLB_TYPE_B_LUT_LOOKUP_TABLE_SHIFT)
60 
61 /* Bitfield definition for register of struct array TYPE_B: 0 */
62 /*
63  * CMP_VALUE (RW)
64  *
65  * cmp value, using as data unit operation
66  */
67 #define PLB_TYPE_B_CMP_CMP_VALUE_MASK (0xFFFFFFFFUL)
68 #define PLB_TYPE_B_CMP_CMP_VALUE_SHIFT (0U)
69 #define PLB_TYPE_B_CMP_CMP_VALUE_SET(x) (((uint32_t)(x) << PLB_TYPE_B_CMP_CMP_VALUE_SHIFT) & PLB_TYPE_B_CMP_CMP_VALUE_MASK)
70 #define PLB_TYPE_B_CMP_CMP_VALUE_GET(x) (((uint32_t)(x) & PLB_TYPE_B_CMP_CMP_VALUE_MASK) >> PLB_TYPE_B_CMP_CMP_VALUE_SHIFT)
71 
72 /* Bitfield definition for register of struct array TYPE_B: MODE */
73 /*
74  * OPT_SEL (RW)
75  *
76  * operation selection in data unit.
77  */
78 #define PLB_TYPE_B_MODE_OPT_SEL_MASK (0x10000UL)
79 #define PLB_TYPE_B_MODE_OPT_SEL_SHIFT (16U)
80 #define PLB_TYPE_B_MODE_OPT_SEL_SET(x) (((uint32_t)(x) << PLB_TYPE_B_MODE_OPT_SEL_SHIFT) & PLB_TYPE_B_MODE_OPT_SEL_MASK)
81 #define PLB_TYPE_B_MODE_OPT_SEL_GET(x) (((uint32_t)(x) & PLB_TYPE_B_MODE_OPT_SEL_MASK) >> PLB_TYPE_B_MODE_OPT_SEL_SHIFT)
82 
83 /*
84  * OUT3_SEL (RW)
85  *
86  * trig out 3 output type in current channel
87  */
88 #define PLB_TYPE_B_MODE_OUT3_SEL_MASK (0xF000U)
89 #define PLB_TYPE_B_MODE_OUT3_SEL_SHIFT (12U)
90 #define PLB_TYPE_B_MODE_OUT3_SEL_SET(x) (((uint32_t)(x) << PLB_TYPE_B_MODE_OUT3_SEL_SHIFT) & PLB_TYPE_B_MODE_OUT3_SEL_MASK)
91 #define PLB_TYPE_B_MODE_OUT3_SEL_GET(x) (((uint32_t)(x) & PLB_TYPE_B_MODE_OUT3_SEL_MASK) >> PLB_TYPE_B_MODE_OUT3_SEL_SHIFT)
92 
93 /*
94  * OUT2_SEL (RW)
95  *
96  * trig out 2 output type in current channel
97  */
98 #define PLB_TYPE_B_MODE_OUT2_SEL_MASK (0xF00U)
99 #define PLB_TYPE_B_MODE_OUT2_SEL_SHIFT (8U)
100 #define PLB_TYPE_B_MODE_OUT2_SEL_SET(x) (((uint32_t)(x) << PLB_TYPE_B_MODE_OUT2_SEL_SHIFT) & PLB_TYPE_B_MODE_OUT2_SEL_MASK)
101 #define PLB_TYPE_B_MODE_OUT2_SEL_GET(x) (((uint32_t)(x) & PLB_TYPE_B_MODE_OUT2_SEL_MASK) >> PLB_TYPE_B_MODE_OUT2_SEL_SHIFT)
102 
103 /*
104  * OUT1_SEL (RW)
105  *
106  * trig out 1 output type in current channel
107  */
108 #define PLB_TYPE_B_MODE_OUT1_SEL_MASK (0xF0U)
109 #define PLB_TYPE_B_MODE_OUT1_SEL_SHIFT (4U)
110 #define PLB_TYPE_B_MODE_OUT1_SEL_SET(x) (((uint32_t)(x) << PLB_TYPE_B_MODE_OUT1_SEL_SHIFT) & PLB_TYPE_B_MODE_OUT1_SEL_MASK)
111 #define PLB_TYPE_B_MODE_OUT1_SEL_GET(x) (((uint32_t)(x) & PLB_TYPE_B_MODE_OUT1_SEL_MASK) >> PLB_TYPE_B_MODE_OUT1_SEL_SHIFT)
112 
113 /*
114  * OUT0_SEL (RW)
115  *
116  * trig out 0 output type in current channel
117  */
118 #define PLB_TYPE_B_MODE_OUT0_SEL_MASK (0xFU)
119 #define PLB_TYPE_B_MODE_OUT0_SEL_SHIFT (0U)
120 #define PLB_TYPE_B_MODE_OUT0_SEL_SET(x) (((uint32_t)(x) << PLB_TYPE_B_MODE_OUT0_SEL_SHIFT) & PLB_TYPE_B_MODE_OUT0_SEL_MASK)
121 #define PLB_TYPE_B_MODE_OUT0_SEL_GET(x) (((uint32_t)(x) & PLB_TYPE_B_MODE_OUT0_SEL_MASK) >> PLB_TYPE_B_MODE_OUT0_SEL_SHIFT)
122 
123 /* Bitfield definition for register of struct array TYPE_B: SW_INJECT */
124 /*
125  * SOFTWARE_INJECT (RW)
126  *
127  * data unit value can be changed if program this register
128  */
129 #define PLB_TYPE_B_SW_INJECT_SOFTWARE_INJECT_MASK (0xFFFFFFFFUL)
130 #define PLB_TYPE_B_SW_INJECT_SOFTWARE_INJECT_SHIFT (0U)
131 #define PLB_TYPE_B_SW_INJECT_SOFTWARE_INJECT_SET(x) (((uint32_t)(x) << PLB_TYPE_B_SW_INJECT_SOFTWARE_INJECT_SHIFT) & PLB_TYPE_B_SW_INJECT_SOFTWARE_INJECT_MASK)
132 #define PLB_TYPE_B_SW_INJECT_SOFTWARE_INJECT_GET(x) (((uint32_t)(x) & PLB_TYPE_B_SW_INJECT_SOFTWARE_INJECT_MASK) >> PLB_TYPE_B_SW_INJECT_SOFTWARE_INJECT_SHIFT)
133 
134 
135 
136 /* LOOKUP_TABLE register group index macro definition */
137 #define PLB_TYPE_A_LOOKUP_TABLE_0 (0UL)
138 #define PLB_TYPE_A_LOOKUP_TABLE_1 (1UL)
139 #define PLB_TYPE_A_LOOKUP_TABLE_2 (2UL)
140 #define PLB_TYPE_A_LOOKUP_TABLE_3 (3UL)
141 
142 /* TYPE_A register group index macro definition */
143 #define PLB_TYPE_A_0 (0UL)
144 #define PLB_TYPE_A_1 (1UL)
145 #define PLB_TYPE_A_2 (2UL)
146 #define PLB_TYPE_A_3 (3UL)
147 #define PLB_TYPE_A_4 (4UL)
148 #define PLB_TYPE_A_5 (5UL)
149 #define PLB_TYPE_A_6 (6UL)
150 #define PLB_TYPE_A_7 (7UL)
151 
152 /* LUT register group index macro definition */
153 #define PLB_TYPE_B_LUT_0 (0UL)
154 #define PLB_TYPE_B_LUT_1 (1UL)
155 
156 /* CMP register group index macro definition */
157 #define PLB_TYPE_B_CMP_0 (0UL)
158 #define PLB_TYPE_B_CMP_1 (1UL)
159 #define PLB_TYPE_B_CMP_2 (2UL)
160 #define PLB_TYPE_B_CMP_3 (3UL)
161 
162 /* TYPE_B register group index macro definition */
163 #define PLB_TYPE_B_0 (0UL)
164 #define PLB_TYPE_B_1 (1UL)
165 #define PLB_TYPE_B_2 (2UL)
166 #define PLB_TYPE_B_3 (3UL)
167 #define PLB_TYPE_B_4 (4UL)
168 #define PLB_TYPE_B_5 (5UL)
169 #define PLB_TYPE_B_6 (6UL)
170 #define PLB_TYPE_B_7 (7UL)
171 
172 
173 #endif /* HPM_PLB_H */
PLB_Type
Definition: hpm_plb_regs.h:12