Macros
#define	HPM_IP_FEATURE_PLIC_HIGHEST_PRIORITY 31

#define	HPM_IP_FEATURE_PLIC_SUPPORT_S_MODE 1

#define	HPM_IP_FEATURE_PLIC_HAS_TRIGGER_TYPE 1

#define	HPM_IP_FEATURE_GPTMR_MONITOR 1

#define	HPM_IP_FEATURE_GPTMR_OP_MODE 1

#define	HPM_IP_FEATURE_GPTMR_CNT_MODE 1

#define	HPM_IP_FEATURE_GPTMR_BURST_MODE 1

#define	HPM_IP_FEATURE_GPTMR_QEI_MODE 1

#define	HPM_IP_FEATURE_UART_RX_IDLE_DETECT 1

#define	HPM_IP_FEATURE_UART_FCRR 1

#define	HPM_IP_FEATURE_UART_RX_EN 1

#define	HPM_IP_FEATURE_UART_E00018_FIX 1

#define	HPM_IP_FEATURE_UART_9BIT_MODE 1

#define	HPM_IP_FEATURE_UART_TX_IDLE_DETECT 1

#define	HPM_IP_FEATURE_UART_ADDR_MATCH 1

#define	HPM_IP_FEATURE_UART_TRIG_MODE 1

#define	HPM_IP_FEATURE_UART_FINE_FIFO_THRLD 1

#define	HPM_IP_FEATURE_UART_IIR2 1

#define	HPM_IP_FEATURE_UART_STOP_BIT 1

#define	HPM_IP_FEATURE_UART_DISABLE_DMA_TIMEOUT 1

#define	HPM_IP_FEATURE_UART_RX_LINE_ERROR_DETECT 1

#define	HPM_IP_FEATURE_UART_DMA_STOP 1

#define	HPM_IP_FEATURE_UART_BAUD_ACT_ENJ_PLCK 1

#define	HPM_IP_FEATURE_UART_DE_DELAY 1

#define	HPM_IP_FEATURE_I2C_SUPPORT_RESET 1

#define	HPM_IP_FEATURE_SPI_NEW_TRANS_COUNT 1

#define	HPM_IP_FEATURE_SPI_CS_SELECT 1

#define	HPM_IP_FEATURE_SPI_SUPPORT_DIRECTIO 1

#define	HPM_IP_FEATURE_SPI_DMA_TX_REQ_AFTER_CMD_FO_MASTER 1

#define	HPM_IP_FEATURE_SPI_CS_EDGE_DETECT_FOR_SLAVE 1

#define	HPM_IP_FEATURE_EWDG_SOC_SUPPORT_TIMEOUT_INTERRUPT 1

#define	HPM_IP_FEATURE_DMAV2_BURST_IN_FIXED_TRANS 1

#define	HPM_IP_FEATURE_DMAV2_BYTE_ORDER_SWAP 1

#define	HPM_IP_FEATURE_PPI_DM_POLARITY_EACH_CS 1

#define	HPM_IP_FEATURE_LOBS_COMP_LOGIC 1

#define	HPM_IP_FEATURE_LOBS_IRQ_CTRL 1

#define	HPM_IP_FEATURE_LOBS_TRIG_ADDR 1

#define	HPM_IP_FEATURE_LOBS_CNT_DATA_NUM 1

#define	HPM_IP_FEATURE_LOBS_SAMPLE_RATE_EXT 1

#define	HPM_IP_FEATURE_ADC16_HAS_MOT_EN 1

#define	HPM_IP_FEATURE_ADC16_HAS_DIFF_MODE 1

#define	HPM_IP_FEATURE_ADC16_SEQ_HCFG_EN 1

#define	HPM_IP_FEATURE_ACMP_HAS_CAP_SEL 1

#define	HPM_IP_FEATURE_ACMP_DAC_MATRIX 1

#define	HPM_IP_FEATURE_ACMP_12BIT_DAC 1

#define	HPM_IP_FEATURE_QEIV2_ONESHOT_MODE 1

#define	HPM_IP_FEATURE_QEIV2_SW_RESTART_TRG 1

#define	HPM_IP_FEATURE_QEIV2_TIMESTAMP 1

#define	HPM_IP_FEATURE_QEIV2_ADC_THRESHOLD 1

#define	HPM_IP_FEATURE_QEIV2_SIN_TOGI 1

#define	HPM_IP_FEATURE_QEIV2_ADC_SW_INJECT 1

#define	HPM_IP_FEATURE_QEIV2_POS_ADJ 1

#define	HPM_IP_FEATURE_QEOV2_POSITION_FILTER 1

#define	HPM_IP_FEATURE_PWMV2_ASYNC_FAULT_CFG 1

#define	HPM_IP_FEATURE_SDM_GATE_FUNC 1

#define	HPM_IP_FEATURE_SDM_TIMESTAMP_FUNC 1

#define	HPM_IP_FEATURE_PLB_COUNTER_READ_REAL_TIME 1

#define	HPM_IP_FEATURE_TRGM_HAS_TRGM_IN_OUT_STATUS 1

#define	HPM_IP_FEATURE_ENET_HAS_MII_MODE 1

#define	HPM_IP_FEATURE_ESC_BYTE_READ 1

#define	HPM_IP_FEATURE_ESC_PORT_DIS 1

#define	HPM_IP_FEATURE_ESC_SYNC_IRQ_MASK 1

#define	HPM_IP_FEATURE_ESC_GPIO_BYTE_CTRL 1

Macro Definition Documentation

◆ HPM_IP_FEATURE_ACMP_12BIT_DAC

#define HPM_IP_FEATURE_ACMP_12BIT_DAC 1

◆ HPM_IP_FEATURE_ACMP_DAC_MATRIX

#define HPM_IP_FEATURE_ACMP_DAC_MATRIX 1

◆ HPM_IP_FEATURE_ACMP_HAS_CAP_SEL

#define HPM_IP_FEATURE_ACMP_HAS_CAP_SEL 1

◆ HPM_IP_FEATURE_ADC16_HAS_DIFF_MODE

#define HPM_IP_FEATURE_ADC16_HAS_DIFF_MODE 1

◆ HPM_IP_FEATURE_ADC16_HAS_MOT_EN

#define HPM_IP_FEATURE_ADC16_HAS_MOT_EN 1

◆ HPM_IP_FEATURE_ADC16_SEQ_HCFG_EN

#define HPM_IP_FEATURE_ADC16_SEQ_HCFG_EN 1

◆ HPM_IP_FEATURE_DMAV2_BURST_IN_FIXED_TRANS

#define HPM_IP_FEATURE_DMAV2_BURST_IN_FIXED_TRANS 1

◆ HPM_IP_FEATURE_DMAV2_BYTE_ORDER_SWAP

#define HPM_IP_FEATURE_DMAV2_BYTE_ORDER_SWAP 1

◆ HPM_IP_FEATURE_ENET_HAS_MII_MODE

#define HPM_IP_FEATURE_ENET_HAS_MII_MODE 1

◆ HPM_IP_FEATURE_ESC_BYTE_READ

#define HPM_IP_FEATURE_ESC_BYTE_READ 1

◆ HPM_IP_FEATURE_ESC_GPIO_BYTE_CTRL

#define HPM_IP_FEATURE_ESC_GPIO_BYTE_CTRL 1

◆ HPM_IP_FEATURE_ESC_PORT_DIS

#define HPM_IP_FEATURE_ESC_PORT_DIS 1

◆ HPM_IP_FEATURE_ESC_SYNC_IRQ_MASK

#define HPM_IP_FEATURE_ESC_SYNC_IRQ_MASK 1

◆ HPM_IP_FEATURE_EWDG_SOC_SUPPORT_TIMEOUT_INTERRUPT

#define HPM_IP_FEATURE_EWDG_SOC_SUPPORT_TIMEOUT_INTERRUPT 1

◆ HPM_IP_FEATURE_GPTMR_BURST_MODE

#define HPM_IP_FEATURE_GPTMR_BURST_MODE 1

◆ HPM_IP_FEATURE_GPTMR_CNT_MODE

#define HPM_IP_FEATURE_GPTMR_CNT_MODE 1

◆ HPM_IP_FEATURE_GPTMR_MONITOR

#define HPM_IP_FEATURE_GPTMR_MONITOR 1

◆ HPM_IP_FEATURE_GPTMR_OP_MODE

#define HPM_IP_FEATURE_GPTMR_OP_MODE 1

◆ HPM_IP_FEATURE_GPTMR_QEI_MODE

#define HPM_IP_FEATURE_GPTMR_QEI_MODE 1

◆ HPM_IP_FEATURE_I2C_SUPPORT_RESET

#define HPM_IP_FEATURE_I2C_SUPPORT_RESET 1

◆ HPM_IP_FEATURE_LOBS_CNT_DATA_NUM

#define HPM_IP_FEATURE_LOBS_CNT_DATA_NUM 1

◆ HPM_IP_FEATURE_LOBS_COMP_LOGIC

#define HPM_IP_FEATURE_LOBS_COMP_LOGIC 1

◆ HPM_IP_FEATURE_LOBS_IRQ_CTRL

#define HPM_IP_FEATURE_LOBS_IRQ_CTRL 1

◆ HPM_IP_FEATURE_LOBS_SAMPLE_RATE_EXT

#define HPM_IP_FEATURE_LOBS_SAMPLE_RATE_EXT 1

◆ HPM_IP_FEATURE_LOBS_TRIG_ADDR

#define HPM_IP_FEATURE_LOBS_TRIG_ADDR 1

◆ HPM_IP_FEATURE_PLB_COUNTER_READ_REAL_TIME

#define HPM_IP_FEATURE_PLB_COUNTER_READ_REAL_TIME 1

◆ HPM_IP_FEATURE_PLIC_HAS_TRIGGER_TYPE

#define HPM_IP_FEATURE_PLIC_HAS_TRIGGER_TYPE 1

◆ HPM_IP_FEATURE_PLIC_HIGHEST_PRIORITY

#define HPM_IP_FEATURE_PLIC_HIGHEST_PRIORITY 31

◆ HPM_IP_FEATURE_PLIC_SUPPORT_S_MODE

#define HPM_IP_FEATURE_PLIC_SUPPORT_S_MODE 1

◆ HPM_IP_FEATURE_PPI_DM_POLARITY_EACH_CS

#define HPM_IP_FEATURE_PPI_DM_POLARITY_EACH_CS 1

◆ HPM_IP_FEATURE_PWMV2_ASYNC_FAULT_CFG

#define HPM_IP_FEATURE_PWMV2_ASYNC_FAULT_CFG 1

◆ HPM_IP_FEATURE_QEIV2_ADC_SW_INJECT

#define HPM_IP_FEATURE_QEIV2_ADC_SW_INJECT 1

◆ HPM_IP_FEATURE_QEIV2_ADC_THRESHOLD

#define HPM_IP_FEATURE_QEIV2_ADC_THRESHOLD 1

◆ HPM_IP_FEATURE_QEIV2_ONESHOT_MODE

#define HPM_IP_FEATURE_QEIV2_ONESHOT_MODE 1

◆ HPM_IP_FEATURE_QEIV2_POS_ADJ

#define HPM_IP_FEATURE_QEIV2_POS_ADJ 1

◆ HPM_IP_FEATURE_QEIV2_SIN_TOGI

#define HPM_IP_FEATURE_QEIV2_SIN_TOGI 1

◆ HPM_IP_FEATURE_QEIV2_SW_RESTART_TRG

#define HPM_IP_FEATURE_QEIV2_SW_RESTART_TRG 1

◆ HPM_IP_FEATURE_QEIV2_TIMESTAMP

#define HPM_IP_FEATURE_QEIV2_TIMESTAMP 1

◆ HPM_IP_FEATURE_QEOV2_POSITION_FILTER

#define HPM_IP_FEATURE_QEOV2_POSITION_FILTER 1

◆ HPM_IP_FEATURE_SDM_GATE_FUNC

#define HPM_IP_FEATURE_SDM_GATE_FUNC 1

◆ HPM_IP_FEATURE_SDM_TIMESTAMP_FUNC

#define HPM_IP_FEATURE_SDM_TIMESTAMP_FUNC 1

◆ HPM_IP_FEATURE_SPI_CS_EDGE_DETECT_FOR_SLAVE

#define HPM_IP_FEATURE_SPI_CS_EDGE_DETECT_FOR_SLAVE 1

◆ HPM_IP_FEATURE_SPI_CS_SELECT

#define HPM_IP_FEATURE_SPI_CS_SELECT 1

◆ HPM_IP_FEATURE_SPI_DMA_TX_REQ_AFTER_CMD_FO_MASTER

#define HPM_IP_FEATURE_SPI_DMA_TX_REQ_AFTER_CMD_FO_MASTER 1

◆ HPM_IP_FEATURE_SPI_NEW_TRANS_COUNT

#define HPM_IP_FEATURE_SPI_NEW_TRANS_COUNT 1

◆ HPM_IP_FEATURE_SPI_SUPPORT_DIRECTIO

#define HPM_IP_FEATURE_SPI_SUPPORT_DIRECTIO 1

◆ HPM_IP_FEATURE_TRGM_HAS_TRGM_IN_OUT_STATUS

#define HPM_IP_FEATURE_TRGM_HAS_TRGM_IN_OUT_STATUS 1

◆ HPM_IP_FEATURE_UART_9BIT_MODE

#define HPM_IP_FEATURE_UART_9BIT_MODE 1

◆ HPM_IP_FEATURE_UART_ADDR_MATCH

#define HPM_IP_FEATURE_UART_ADDR_MATCH 1

◆ HPM_IP_FEATURE_UART_BAUD_ACT_ENJ_PLCK

#define HPM_IP_FEATURE_UART_BAUD_ACT_ENJ_PLCK 1

◆ HPM_IP_FEATURE_UART_DE_DELAY

#define HPM_IP_FEATURE_UART_DE_DELAY 1

◆ HPM_IP_FEATURE_UART_DISABLE_DMA_TIMEOUT

#define HPM_IP_FEATURE_UART_DISABLE_DMA_TIMEOUT 1

◆ HPM_IP_FEATURE_UART_DMA_STOP

#define HPM_IP_FEATURE_UART_DMA_STOP 1

◆ HPM_IP_FEATURE_UART_E00018_FIX

#define HPM_IP_FEATURE_UART_E00018_FIX 1

◆ HPM_IP_FEATURE_UART_FCRR

#define HPM_IP_FEATURE_UART_FCRR 1

◆ HPM_IP_FEATURE_UART_FINE_FIFO_THRLD

#define HPM_IP_FEATURE_UART_FINE_FIFO_THRLD 1

◆ HPM_IP_FEATURE_UART_IIR2

#define HPM_IP_FEATURE_UART_IIR2 1

◆ HPM_IP_FEATURE_UART_RX_EN

#define HPM_IP_FEATURE_UART_RX_EN 1

◆ HPM_IP_FEATURE_UART_RX_IDLE_DETECT

#define HPM_IP_FEATURE_UART_RX_IDLE_DETECT 1

◆ HPM_IP_FEATURE_UART_RX_LINE_ERROR_DETECT

#define HPM_IP_FEATURE_UART_RX_LINE_ERROR_DETECT 1

◆ HPM_IP_FEATURE_UART_STOP_BIT

#define HPM_IP_FEATURE_UART_STOP_BIT 1

◆ HPM_IP_FEATURE_UART_TRIG_MODE

#define HPM_IP_FEATURE_UART_TRIG_MODE 1

◆ HPM_IP_FEATURE_UART_TX_IDLE_DETECT

#define HPM_IP_FEATURE_UART_TX_IDLE_DETECT 1

Macros