INTERRUPT driver APIs. More...

Macros
#define	M_MODE 0

#define	S_MODE 1

#define	PLICSWI 1

#define	intc_m_enable_irq(irq) intc_enable_irq(HPM_PLIC_TARGET_M_MODE, irq)

#define	intc_m_disable_irq(irq) intc_disable_irq(HPM_PLIC_TARGET_M_MODE, irq)

#define	intc_m_set_threshold(threshold) intc_set_threshold(HPM_PLIC_TARGET_M_MODE, threshold)

#define	intc_m_get_threshold() intc_get_threshold(HPM_PLIC_TARGET_M_MODE)

#define	intc_m_complete_irq(irq) intc_complete_irq(HPM_PLIC_TARGET_M_MODE, irq)

#define	intc_m_claim_irq() intc_claim_irq(HPM_PLIC_TARGET_M_MODE)

#define	intc_m_enable_irq_with_priority(irq, priority)

#define	SAVE_CSR(r) register long __##r = read_csr(r);

#define	RESTORE_CSR(r) write_csr(r, __##r);

#define	SAVE_MXSTATUS()

#define	RESTORE_MXSTATUS()

#define	SAVE_FCSR()

#define	RESTORE_FCSR()

#define	SAVE_UCODE()

#define	RESTORE_UCODE()

#define	CONTEXT_REG_NUM HPM_ALIGN_UP((4 * 22), 16)

#define	SAVE_FPU_CONTEXT()

#define	RESTORE_FPU_CONTEXT()

#define	SAVE_CALLER_CONTEXT()
	Save the caller registers based on the RISC-V ABI specification. More...

#define	RESTORE_CALLER_CONTEXT()
	Restore the caller registers based on the RISC-V ABI specification. More...

#define	SAVE_FPU_STATE()

#define	RESTORE_FPU_STATE()

#define	SAVE_DSP_CONTEXT()

#define	RESTORE_DSP_CONTEXT()

#define	SAVE_MCCTL_CONTEXT()

#define	RESTORE_MCCTL_CONTEXT()

#define	ENTER_NESTED_IRQ_HANDLING_M()

#define	COMPLETE_IRQ_HANDLING_M(irq_num)

#define	EXIT_NESTED_IRQ_HANDLING_M()

#define	EXIT_NESTED_IRQ_HANDLING_S()

#define	NESTED_IRQ_ENTER()

#define	NESTED_IRQ_EXIT()

#define	HPM_EXTERN_C

#define	ISR_NAME_M(irq_num) default_isr_##irq_num

#define	SDK_DECLARE_EXT_ISR_M(irq_num, isr)
	Declare an external interrupt handler for machine mode. More...

#define	SDK_DECLARE_MCHTMR_ISR(isr)
	Declare machine timer interrupt handler. More...

#define	SDK_DECLARE_SWI_ISR(isr)
	Declare machine software interrupt handler. More...

Functions
static ATTR_ALWAYS_INLINE void	enable_global_irq (uint32_t mask)
	Enable global IRQ with mask. More...

static ATTR_ALWAYS_INLINE uint32_t	disable_global_irq (uint32_t mask)
	Disable global IRQ with mask and return mstatus. More...

static ATTR_ALWAYS_INLINE void	restore_global_irq (uint32_t mask)
	Restore global IRQ with mask. More...

static ATTR_ALWAYS_INLINE void	enable_irq_from_intc (void)
	Enable IRQ from interrupt controller. More...

static ATTR_ALWAYS_INLINE void	disable_irq_from_intc (void)
	Disable IRQ from interrupt controller. More...

static ATTR_ALWAYS_INLINE void	enable_mchtmr_irq (void)
	Enable machine timer IRQ. More...

static ATTR_ALWAYS_INLINE void	disable_mchtmr_irq (void)
	Disable machine timer IRQ. More...

static ATTR_ALWAYS_INLINE void	intc_m_init_swi (void)
	Initialize software interrupt. More...

static ATTR_ALWAYS_INLINE void	intc_m_enable_swi (void)
	Enable software interrupt. More...

static ATTR_ALWAYS_INLINE void	intc_m_disable_swi (void)
	Disable software interrupt. More...

static ATTR_ALWAYS_INLINE void	intc_m_trigger_swi (void)
	Trigger software interrupt. More...

static ATTR_ALWAYS_INLINE void	intc_m_claim_swi (void)
	Claim software interrupt. More...

static ATTR_ALWAYS_INLINE void	intc_m_complete_swi (void)
	Complete software interrupt. More...

static ATTR_ALWAYS_INLINE void	intc_enable_irq (uint32_t target, uint32_t irq)

static ATTR_ALWAYS_INLINE void	intc_set_irq_priority (uint32_t irq, uint32_t priority)
	Set interrupt priority. More...

static ATTR_ALWAYS_INLINE void	intc_disable_irq (uint32_t target, uint32_t irq)
	Disable specific interrupt. More...

static ATTR_ALWAYS_INLINE void	intc_set_threshold (uint32_t target, uint32_t threshold)
	Set interrupt threshold. More...

static ATTR_ALWAYS_INLINE uint32_t	intc_get_threshold (uint32_t target)
	Get interrupt threshold. More...

static ATTR_ALWAYS_INLINE uint32_t	intc_claim_irq (uint32_t target)
	Claim IRQ. More...

static ATTR_ALWAYS_INLINE void	intc_complete_irq (uint32_t target, uint32_t irq)
	Complete IRQ. More...

void	default_irq_entry (void)

static ATTR_ALWAYS_INLINE void	install_isr (uint32_t irq, uint32_t isr)
	Install ISR for certain IRQ for ram based vector table. More...

static ATTR_ALWAYS_INLINE void	uninstall_isr (uint32_t irq)
	Uninstall ISR for certain IRQ for ram based vector table. More...

Detailed Description

INTERRUPT driver APIs.

Macro Definition Documentation

◆ COMPLETE_IRQ_HANDLING_M

#define COMPLETE_IRQ_HANDLING_M ( irq_num )

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

Value:

    { \
    __asm volatile("csrci mstatus, 8"); \
    __asm volatile("lui a4, 0xe4200"); \
    __asm volatile("li a3, %0" : : "i" (irq_num) :); \
    __asm volatile("sw a3, 4(a4)"); \
}

◆ CONTEXT_REG_NUM

#define CONTEXT_REG_NUM HPM_ALIGN_UP((4 * 22), 16)

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

◆ ENTER_NESTED_IRQ_HANDLING_M

#define ENTER_NESTED_IRQ_HANDLING_M ( )

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

Value:

    { \
    __asm volatile("\n\            csrr s2, mepc    \n\            csrr s3, mstatus \n");\
    SAVE_FPU_STATE(); \
    SAVE_DSP_CONTEXT(); \
    SAVE_MCCTL_CONTEXT(); \
    __asm volatile("csrsi mstatus, 8"); \
}

◆ EXIT_NESTED_IRQ_HANDLING_M

#define EXIT_NESTED_IRQ_HANDLING_M ( )

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

Value:

    { \
    __asm volatile("\n\            csrw mstatus, s3 \n\            csrw mepc, s2 \n");\
            RESTORE_FPU_STATE(); \
            RESTORE_DSP_CONTEXT(); \
            RESTORE_MCCTL_CONTEXT(); \
}

◆ EXIT_NESTED_IRQ_HANDLING_S

#define EXIT_NESTED_IRQ_HANDLING_S ( )

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

Value:

    { \
    __asm volatile("\n\            csrw sstatus, s3 \n\            csrw sepc, s2 \n");\
            RESTORE_FPU_STATE(); \
            RESTORE_DSP_CONTEXT(); \
}

◆ HPM_EXTERN_C

#define HPM_EXTERN_C

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

◆ intc_m_claim_irq

#define intc_m_claim_irq ( ) intc_claim_irq(HPM_PLIC_TARGET_M_MODE)

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

◆ intc_m_complete_irq

#define intc_m_complete_irq ( irq ) intc_complete_irq(HPM_PLIC_TARGET_M_MODE, irq)

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

◆ intc_m_disable_irq

#define intc_m_disable_irq ( irq ) intc_disable_irq(HPM_PLIC_TARGET_M_MODE, irq)

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

◆ intc_m_enable_irq

#define intc_m_enable_irq ( irq ) intc_enable_irq(HPM_PLIC_TARGET_M_MODE, irq)

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

◆ intc_m_enable_irq_with_priority

#define intc_m_enable_irq_with_priority	(	irq,
		priority
	)

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

Value:

    do { \
        intc_set_irq_priority(irq, priority); \
        intc_m_enable_irq(irq); \
    } while (0)

◆ intc_m_get_threshold

#define intc_m_get_threshold ( ) intc_get_threshold(HPM_PLIC_TARGET_M_MODE)

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

◆ intc_m_set_threshold

#define intc_m_set_threshold ( threshold ) intc_set_threshold(HPM_PLIC_TARGET_M_MODE, threshold)

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

◆ ISR_NAME_M

#define ISR_NAME_M ( irq_num ) default_isr_##irq_num

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

◆ M_MODE

#define M_MODE 0

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

Machine mode

◆ NESTED_IRQ_ENTER

#define NESTED_IRQ_ENTER ( )

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

Value:

        SAVE_CSR(CSR_MEPC)                              \
        SAVE_CSR(CSR_MSTATUS)                           \
        SAVE_MXSTATUS()                                 \
        SAVE_FCSR()                                     \
        SAVE_UCODE()                                    \
        set_csr(CSR_MSTATUS, CSR_MSTATUS_MIE_MASK);

◆ NESTED_IRQ_EXIT

#define NESTED_IRQ_EXIT ( )

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

Value:

        RESTORE_CSR(CSR_MSTATUS)                        \
        RESTORE_CSR(CSR_MEPC)                           \
        RESTORE_MXSTATUS()                              \
        RESTORE_FCSR()                                  \
        RESTORE_UCODE()

◆ PLICSWI

#define PLICSWI 1

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

◆ RESTORE_CALLER_CONTEXT

#define RESTORE_CALLER_CONTEXT ( )

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

Value:

        { \
        __asm volatile("\n\            c.lwsp ra,  0*4(sp) \n\            c.lwsp t0,  1*4(sp) \n\            c.lwsp t1,  2*4(sp) \n\            c.lwsp t2,  3*4(sp) \n\            c.lwsp s1,  4*4(sp) \n\            c.lwsp a0,  5*4(sp) \n\            c.lwsp a1,  6*4(sp) \n\            c.lwsp a2,  7*4(sp) \n\            c.lwsp a3,  8*4(sp) \n\            c.lwsp a4,  9*4(sp) \n\            c.lwsp a5, 10*4(sp) \n\            c.lwsp a6, 11*4(sp) \n\            c.lwsp a7, 12*4(sp) \n\            c.lwsp s2, 13*4(sp) \n\            c.lwsp s3, 14*4(sp) \n\            c.lwsp s4, 15*4(sp) \n\            c.lwsp s5, 16*4(sp) \n\            c.lwsp s6, 17*4(sp) \n\            c.lwsp t3, 18*4(sp) \n\            c.lwsp t4, 19*4(sp) \n\            c.lwsp t5, 20*4(sp) \n\            c.lwsp t6, 21*4(sp) \n");\
        RESTORE_FPU_CONTEXT(); \
        __asm volatile("addi sp, sp, %0" : : "i"(CONTEXT_REG_NUM) :);\
}

Restore the caller registers based on the RISC-V ABI specification.

◆ RESTORE_CSR

#define RESTORE_CSR ( r ) write_csr(r, __##r);

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

◆ RESTORE_DSP_CONTEXT

#define RESTORE_DSP_CONTEXT ( )

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

◆ RESTORE_FCSR

#define RESTORE_FCSR ( )

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

◆ RESTORE_FPU_CONTEXT

#define RESTORE_FPU_CONTEXT ( )

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

◆ RESTORE_FPU_STATE

#define RESTORE_FPU_STATE ( )

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

◆ RESTORE_MCCTL_CONTEXT

#define RESTORE_MCCTL_CONTEXT ( )

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

Value:

        {\
        __asm volatile("csrw %0, s6\n" ::"i"(CSR_MCCTLDATA):); \
        __asm volatile("csrw %0, s5\n" ::"i"(CSR_MCCTLBEGINADDR):); \
}

◆ RESTORE_MXSTATUS

#define RESTORE_MXSTATUS ( )

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

◆ RESTORE_UCODE

#define RESTORE_UCODE ( )

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

◆ S_MODE

#define S_MODE 1

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

Supervisor mode

◆ SAVE_CALLER_CONTEXT

#define SAVE_CALLER_CONTEXT ( )

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

Value:

    { \
    __asm volatile("addi sp, sp, %0" : : "i"(-CONTEXT_REG_NUM) :);\
    __asm volatile("\n\            c.swsp ra,  0*4(sp) \n\            c.swsp t0,  1*4(sp) \n\            c.swsp t1,  2*4(sp) \n\            c.swsp t2,  3*4(sp) \n\            c.swsp s1,  4*4(sp) \n\            c.swsp a0,  5*4(sp) \n\            c.swsp a1,  6*4(sp) \n\            c.swsp a2,  7*4(sp) \n\            c.swsp a3,  8*4(sp) \n\            c.swsp a4,  9*4(sp) \n\            c.swsp a5, 10*4(sp) \n\            c.swsp a6, 11*4(sp) \n\            c.swsp a7, 12*4(sp) \n\            c.swsp s2, 13*4(sp) \n\            c.swsp s3, 14*4(sp) \n\            c.swsp s4, 15*4(sp) \n\            c.swsp s5, 16*4(sp) \n\            c.swsp s6, 17*4(sp) \n\            c.swsp t3, 18*4(sp) \n\            c.swsp t4, 19*4(sp) \n\            c.swsp t5, 20*4(sp) \n\            c.swsp t6, 21*4(sp)"); \
    SAVE_FPU_CONTEXT(); \
}

Save the caller registers based on the RISC-V ABI specification.

◆ SAVE_CSR

#define SAVE_CSR ( r ) register long __##r = read_csr(r);

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

◆ SAVE_DSP_CONTEXT

#define SAVE_DSP_CONTEXT ( )

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

◆ SAVE_FCSR

#define SAVE_FCSR ( )

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

◆ SAVE_FPU_CONTEXT

#define SAVE_FPU_CONTEXT ( )

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

◆ SAVE_FPU_STATE

#define SAVE_FPU_STATE ( )

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

◆ SAVE_MCCTL_CONTEXT

#define SAVE_MCCTL_CONTEXT ( )

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

Value:

        { \
        __asm volatile("csrrs s5, %0, x0\n" ::"i"(CSR_MCCTLBEGINADDR):);  \
        __asm volatile("csrrs s6, %0, x0\n" ::"i"(CSR_MCCTLDATA):);  \
}

◆ SAVE_MXSTATUS

#define SAVE_MXSTATUS ( )

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

◆ SAVE_UCODE

#define SAVE_UCODE ( )

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

◆ SDK_DECLARE_EXT_ISR_M

#define SDK_DECLARE_EXT_ISR_M	(	irq_num,
		isr
	)

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

Value:

void isr(void) __attribute__((section(".isr_vector")));\
HPM_EXTERN_C HPM_ATTR_MACHINE_INTERRUPT void ISR_NAME_M(irq_num)(void);\
HPM_ATTR_MACHINE_INTERRUPT void ISR_NAME_M(irq_num)(void) \
{ \
    SAVE_CALLER_CONTEXT(); \
    ENTER_NESTED_IRQ_HANDLING_M();\
    __asm volatile("la t1, %0\n\t" : : "i" (isr) : );\
    __asm volatile("jalr t1\n");\
    COMPLETE_IRQ_HANDLING_M(irq_num);\
    EXIT_NESTED_IRQ_HANDLING_M();\
    RESTORE_CALLER_CONTEXT();\
    __asm volatile("fence io, io");\
}

Declare an external interrupt handler for machine mode.

Parameters

[in]	irq_num	- IRQ number index
[in]	isr	- Application IRQ handler function pointer

◆ SDK_DECLARE_MCHTMR_ISR

#define SDK_DECLARE_MCHTMR_ISR ( isr )

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

Value:

void isr(void) __attribute__((section(".isr_vector")));\
HPM_EXTERN_C void mchtmr_isr(void) __attribute__((section(".isr_vector"))); \
void mchtmr_isr(void) {\
    isr();\
}

Declare machine timer interrupt handler.

Parameters

[in] isr - MCHTMR IRQ handler function pointer

◆ SDK_DECLARE_SWI_ISR

#define SDK_DECLARE_SWI_ISR ( isr )

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

Value:

void isr(void) __attribute__((section(".isr_vector")));\
HPM_EXTERN_C void swi_isr(void) __attribute__((section(".isr_vector"))); \
void swi_isr(void) {\
    isr();\
}

Declare machine software interrupt handler.

Parameters

[in] isr - SWI IRQ handler function pointer

Function Documentation

◆ default_irq_entry()

void default_irq_entry ( void )

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

◆ disable_global_irq()

static ATTR_ALWAYS_INLINE uint32_t disable_global_irq ( uint32_t mask )

inlinestatic

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

Disable global IRQ with mask and return mstatus.

Parameters

[in] mask interrupt mask to be disabled

Return values

current mstatus value before irq mask is disabled

◆ disable_irq_from_intc()

static ATTR_ALWAYS_INLINE void disable_irq_from_intc ( void )

inlinestatic

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

Disable IRQ from interrupt controller.

◆ disable_mchtmr_irq()

static ATTR_ALWAYS_INLINE void disable_mchtmr_irq ( void )

inlinestatic

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

Disable machine timer IRQ.

◆ enable_global_irq()

static ATTR_ALWAYS_INLINE void enable_global_irq ( uint32_t mask )

inlinestatic

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

Enable global IRQ with mask.

Parameters

[in] mask interrupt mask to be enabaled

◆ enable_irq_from_intc()

static ATTR_ALWAYS_INLINE void enable_irq_from_intc ( void )

inlinestatic

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

Enable IRQ from interrupt controller.

◆ enable_mchtmr_irq()

static ATTR_ALWAYS_INLINE void enable_mchtmr_irq ( void )

inlinestatic

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

Enable machine timer IRQ.

◆ install_isr()

static ATTR_ALWAYS_INLINE void install_isr	(	uint32_t	irq,
		uint32_t	isr
	)

inlinestatic

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

Install ISR for certain IRQ for ram based vector table.

Parameters

[in]	irq	Target interrupt number
[in]	isr	Interrupt service routine

◆ intc_claim_irq()

static ATTR_ALWAYS_INLINE uint32_t intc_claim_irq ( uint32_t target )

inlinestatic

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

Claim IRQ.

Parameters

[in] target Target to handle specific interrupt

◆ intc_complete_irq()

static ATTR_ALWAYS_INLINE void intc_complete_irq	(	uint32_t	target,
		uint32_t	irq
	)

inlinestatic

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

Complete IRQ.

Parameters

[in]	target	Target to handle specific interrupt
[in]	irq	Specific IRQ to be completed

◆ intc_disable_irq()

static ATTR_ALWAYS_INLINE void intc_disable_irq	(	uint32_t	target,
		uint32_t	irq
	)

inlinestatic

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

Disable specific interrupt.

Parameters

[in]	target	Target to handle specific interrupt
[in]	irq	Interrupt number

◆ intc_enable_irq()

static ATTR_ALWAYS_INLINE void intc_enable_irq	(	uint32_t	target,
		uint32_t	irq
	)

inlinestatic

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

◆ intc_get_threshold()

static ATTR_ALWAYS_INLINE uint32_t intc_get_threshold ( uint32_t target )

inlinestatic

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

Get interrupt threshold.

Parameters

[in] target Target to handle specific interrupt

◆ intc_m_claim_swi()

static ATTR_ALWAYS_INLINE void intc_m_claim_swi ( void )

inlinestatic

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

Claim software interrupt.

◆ intc_m_complete_swi()

static ATTR_ALWAYS_INLINE void intc_m_complete_swi ( void )

inlinestatic

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

Complete software interrupt.

◆ intc_m_disable_swi()

static ATTR_ALWAYS_INLINE void intc_m_disable_swi ( void )

inlinestatic

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

Disable software interrupt.

◆ intc_m_enable_swi()

static ATTR_ALWAYS_INLINE void intc_m_enable_swi ( void )

inlinestatic

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

Enable software interrupt.

◆ intc_m_init_swi()

static ATTR_ALWAYS_INLINE void intc_m_init_swi ( void )

inlinestatic

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

Initialize software interrupt.

◆ intc_m_trigger_swi()

static ATTR_ALWAYS_INLINE void intc_m_trigger_swi ( void )

inlinestatic

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

Trigger software interrupt.

◆ intc_set_irq_priority()

static ATTR_ALWAYS_INLINE void intc_set_irq_priority	(	uint32_t	irq,
		uint32_t	priority
	)

inlinestatic

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

Set interrupt priority.

Parameters

[in]	irq	Interrupt number
[in]	priority	Priority of interrupt

◆ intc_set_threshold()

static ATTR_ALWAYS_INLINE void intc_set_threshold	(	uint32_t	target,
		uint32_t	threshold
	)

inlinestatic

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

Set interrupt threshold.

Parameters

[in]	target	Target to handle specific interrupt
[in]	threshold	Threshold of IRQ can be serviced

◆ restore_global_irq()

static ATTR_ALWAYS_INLINE void restore_global_irq ( uint32_t mask )

inlinestatic

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

Restore global IRQ with mask.

Parameters

[in] mask interrupt mask to be restored

◆ uninstall_isr()

static ATTR_ALWAYS_INLINE void uninstall_isr ( uint32_t irq )

inlinestatic

#include </home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/arch/riscv/intc/hpm_interrupt.h>

Uninstall ISR for certain IRQ for ram based vector table.

Parameters

[in] irq Target interrupt number

Macros

Functions

Detailed Description

Macro Definition Documentation

◆ COMPLETE_IRQ_HANDLING_M

◆ CONTEXT_REG_NUM

◆ ENTER_NESTED_IRQ_HANDLING_M

◆ EXIT_NESTED_IRQ_HANDLING_M

◆ EXIT_NESTED_IRQ_HANDLING_S

◆ HPM_EXTERN_C

◆ intc_m_claim_irq

◆ intc_m_complete_irq

◆ intc_m_disable_irq

◆ intc_m_enable_irq

◆ intc_m_enable_irq_with_priority

◆ intc_m_get_threshold

◆ intc_m_set_threshold

◆ ISR_NAME_M

◆ M_MODE

◆ NESTED_IRQ_ENTER

◆ NESTED_IRQ_EXIT

◆ PLICSWI

◆ RESTORE_CALLER_CONTEXT

◆ RESTORE_CSR

◆ RESTORE_DSP_CONTEXT

◆ RESTORE_FCSR

◆ RESTORE_FPU_CONTEXT

◆ RESTORE_FPU_STATE

◆ RESTORE_MCCTL_CONTEXT

◆ RESTORE_MXSTATUS

◆ RESTORE_UCODE

◆ S_MODE

◆ SAVE_CALLER_CONTEXT

◆ SAVE_CSR

◆ SAVE_DSP_CONTEXT

◆ SAVE_FCSR

◆ SAVE_FPU_CONTEXT

◆ SAVE_FPU_STATE

◆ SAVE_MCCTL_CONTEXT

◆ SAVE_MXSTATUS

◆ SAVE_UCODE

◆ SDK_DECLARE_EXT_ISR_M

◆ SDK_DECLARE_MCHTMR_ISR

◆ SDK_DECLARE_SWI_ISR

Function Documentation

◆ default_irq_entry()

◆ disable_global_irq()

◆ disable_irq_from_intc()

◆ disable_mchtmr_irq()

◆ enable_global_irq()

◆ enable_irq_from_intc()

◆ enable_mchtmr_irq()

◆ install_isr()

◆ intc_claim_irq()

◆ intc_complete_irq()

◆ intc_disable_irq()

◆ intc_enable_irq()

◆ intc_get_threshold()

◆ intc_m_claim_swi()

◆ intc_m_complete_swi()

◆ intc_m_disable_swi()

◆ intc_m_enable_swi()

◆ intc_m_init_swi()

◆ intc_m_trigger_swi()

◆ intc_set_irq_priority()

◆ intc_set_threshold()

◆ restore_global_irq()

◆ uninstall_isr()