PLLCTLV2 driver APIs. More...
Functions | |
| static bool | pllctlv2_xtal_is_stable (PLLCTLV2_Type *ptr) |
| Checks the stability status of the external crystal oscillator. More... | |
| static bool | pllctlv2_xtal_is_enabled (PLLCTLV2_Type *ptr) |
| Checks if the external crystal oscillator is enabled. More... | |
| static void | pllctlv2_xtal_set_rampup_time (PLLCTLV2_Type *ptr, uint32_t rc24m_cycles) |
| Configures the ramp-up time for the external crystal oscillator. More... | |
| static bool | pllctlv2_pll_is_stable (PLLCTLV2_Type *ptr, pllctlv2_pll_t pll) |
| Checks if the specified PLL has achieved stable operation. More... | |
| static bool | pllctlv2_pll_is_enabled (PLLCTLV2_Type *ptr, pllctlv2_pll_t pll) |
| Checks if the specified PLL is enabled. More... | |
| static bool | pllctlv2_pll_clk_is_stable (PLLCTLV2_Type *ptr, pllctlv2_pll_t pll, pllctlv2_clk_t clk) |
| Checks if the specified PLL CLK has achieved stable operation. More... | |
| static void | pllctlv2_select_reference_clock (PLLCTLV2_Type *ptr, pllctlv2_pll_t pll, uint8_t src) |
| Selects the reference clock source for the specified PLL. More... | |
| void | pllctlv2_enable_spread_spectrum (PLLCTLV2_Type *ptr, pllctlv2_pll_t pll, uint32_t step, uint32_t stop) |
| Enables and configures the spread spectrum modulation for the specified PLL. More... | |
| static void | pllctlv2_disable_spread_spectrum (PLLCTLV2_Type *ptr, pllctlv2_pll_t pll) |
| Disables the spread spectrum modulation for the specified PLL. More... | |
| static void | pllctlv2_set_pll_lock_time (PLLCTLV2_Type *ptr, pllctlv2_pll_t pll, uint32_t xtal_cycles) |
| Sets the lock time for the specified PLL. More... | |
| static void | pllctlv2_set_pll_step_time (PLLCTLV2_Type *ptr, pllctlv2_pll_t pll, uint32_t xtal_cycles) |
| Sets the step time for frequency changes in the specified PLL. More... | |
| static void | pllctlv2_enable_dither (PLLCTLV2_Type *ptr, pllctlv2_pll_t pll) |
| Enable dither for the specified PLL. More... | |
| static void | pllctlv2_disable_dither (PLLCTLV2_Type *ptr, pllctlv2_pll_t pll) |
| Disable dither for the specified PLL. More... | |
| static void | pllctlv2_enable_slow_lock (PLLCTLV2_Type *ptr, pllctlv2_pll_t pll) |
| Enable slow lock for the specified PLL. More... | |
| static void | pllctlv2_disable_slow_lock (PLLCTLV2_Type *ptr, pllctlv2_pll_t pll) |
| Disable slow lock for the specified PLL. More... | |
| void | pllctlv2_set_postdiv (PLLCTLV2_Type *ptr, pllctlv2_pll_t pll, pllctlv2_clk_t clk, pllctlv2_div_t div_value) |
| Configures the post-divider for a specific PLL output clock. More... | |
| hpm_stat_t | pllctlv2_set_pll_with_mfi_mfn (PLLCTLV2_Type *ptr, pllctlv2_pll_t pll, uint32_t mfi, uint32_t mfn) |
| Configures the PLL frequency using direct MFI and MFN values. More... | |
| hpm_stat_t | pllctlv2_init_pll_with_freq (PLLCTLV2_Type *ptr, pllctlv2_pll_t pll, uint32_t freq_in_hz) |
| Initializes the PLL to generate a specific output frequency. More... | |
| uint32_t | pllctlv2_get_pll_freq_in_hz (PLLCTLV2_Type *ptr, pllctlv2_pll_t pll) |
| Retrieves the current output frequency of the specified PLL. More... | |
| uint32_t | pllctlv2_get_pll_postdiv_freq_in_hz (PLLCTLV2_Type *ptr, pllctlv2_pll_t pll, pllctlv2_clk_t clk) |
| Retrieves the frequency of a specific PLL post-divider output. More... | |
| void | pllctlv2_setup_spread_spectrum (PLLCTLV2_Type *ptr, pllctlv2_pll_t pll, uint8_t spread_range, uint32_t modulation_freq) |
| Configures spread spectrum modulation parameters for a PLL. More... | |
PLLCTLV2 driver APIs.
|
inlinestatic |
Disable dither for the specified PLL.
| [in] | ptr | Base address of the PLLCTLV2 peripheral |
| [in] | pll | Index of the PLL to configure (pllctlv2_pll0 through pllctlv2_pll6) |
|
inlinestatic |
Disable slow lock for the specified PLL.
| [in] | ptr | Base address of the PLLCTLV2 peripheral |
| [in] | pll | Index of the PLL to configure (pllctlv2_pll0 through pllctlv2_pll6) |
|
inlinestatic |
Disables the spread spectrum modulation for the specified PLL.
| [in] | ptr | Base address of the PLLCTLV2 peripheral |
| [in] | pll | Index of the PLL to configure (pllctlv2_pll0 through pllctlv2_pll6) |
|
inlinestatic |
Enable dither for the specified PLL.
| [in] | ptr | Base address of the PLLCTLV2 peripheral |
| [in] | pll | Index of the PLL to configure (pllctlv2_pll0 through pllctlv2_pll6) |
|
inlinestatic |
Enable slow lock for the specified PLL.
| [in] | ptr | Base address of the PLLCTLV2 peripheral |
| [in] | pll | Index of the PLL to configure (pllctlv2_pll0 through pllctlv2_pll6) |
| void pllctlv2_enable_spread_spectrum | ( | PLLCTLV2_Type * | ptr, |
| pllctlv2_pll_t | pll, | ||
| uint32_t | step, | ||
| uint32_t | stop | ||
| ) |
Enables and configures the spread spectrum modulation for the specified PLL.
| [in] | ptr | Base address of the PLLCTLV2 peripheral |
| [in] | pll | Index of the PLL to configure (pllctlv2_pll0 through pllctlv2_pll6) |
| [in] | step | Modulation step size for spread spectrum |
| [in] | stop | Maximum modulation point for spread spectrum |
| uint32_t pllctlv2_get_pll_freq_in_hz | ( | PLLCTLV2_Type * | ptr, |
| pllctlv2_pll_t | pll | ||
| ) |
Retrieves the current output frequency of the specified PLL.
| [in] | ptr | Base address of the PLLCTLV2 peripheral |
| [in] | pll | Index of the PLL to query (pllctlv2_pll0 through pllctlv2_pll6) |
| uint32_t pllctlv2_get_pll_postdiv_freq_in_hz | ( | PLLCTLV2_Type * | ptr, |
| pllctlv2_pll_t | pll, | ||
| pllctlv2_clk_t | clk | ||
| ) |
Retrieves the frequency of a specific PLL post-divider output.
| [in] | ptr | Base address of the PLLCTLV2 peripheral |
| [in] | pll | Index of the PLL to query (pllctlv2_pll0 through pllctlv2_pll6) |
| [in] | clk | Post-divider output index (pllctlv2_clk0 through pllctlv2_clk3) |
| hpm_stat_t pllctlv2_init_pll_with_freq | ( | PLLCTLV2_Type * | ptr, |
| pllctlv2_pll_t | pll, | ||
| uint32_t | freq_in_hz | ||
| ) |
Initializes the PLL to generate a specific output frequency.
| [in] | ptr | Base address of the PLLCTLV2 peripheral |
| [in] | pll | Index of the PLL to configure (pllctlv2_pll0 through pllctlv2_pll6) |
| [in] | freq_in_hz | Desired PLL output frequency in Hertz |
< PLLCTLV2 PLL MFN Factor
|
inlinestatic |
Checks if the specified PLL CLK has achieved stable operation.
| [in] | ptr | Base address of the PLLCTLV2 peripheral |
| [in] | pll | Index of the PLL to check (pllctlv2_pll0 through pllctlv2_pll6) |
| [in] | clk | Post-divider output index (pllctlv2_clk0 through pllctlv2_clk3) |
|
inlinestatic |
Checks if the specified PLL is enabled.
| [in] | ptr | Base address of the PLLCTLV2 peripheral |
| [in] | pll | Index of the PLL to check (pllctlv2_pll0 through pllctlv2_pll6) |
|
inlinestatic |
Checks if the specified PLL has achieved stable operation.
| [in] | ptr | Base address of the PLLCTLV2 peripheral |
| [in] | pll | Index of the PLL to check (pllctlv2_pll0 through pllctlv2_pll6) |
|
inlinestatic |
Selects the reference clock source for the specified PLL.
| [in] | ptr | Base address of the PLLCTLV2 peripheral |
| [in] | pll | Index of the PLL to configure (pllctlv2_pll0 through pllctlv2_pll6) |
| [in] | src | Reference clock source selection:
|
|
inlinestatic |
Sets the lock time for the specified PLL.
| [in] | ptr | Base address of the PLLCTLV2 peripheral |
| [in] | pll | Index of the PLL to configure (pllctlv2_pll0 through pllctlv2_pll6) |
| [in] | xtal_cycles | Number of external crystal clock cycles to wait for PLL lock |
|
inlinestatic |
Sets the step time for frequency changes in the specified PLL.
| [in] | ptr | Base address of the PLLCTLV2 peripheral |
| [in] | pll | Index of the PLL to configure (pllctlv2_pll0 through pllctlv2_pll6) |
| [in] | xtal_cycles | Number of external crystal clock cycles between frequency steps |
| hpm_stat_t pllctlv2_set_pll_with_mfi_mfn | ( | PLLCTLV2_Type * | ptr, |
| pllctlv2_pll_t | pll, | ||
| uint32_t | mfi, | ||
| uint32_t | mfn | ||
| ) |
Configures the PLL frequency using direct MFI and MFN values.
| [in] | ptr | Base address of the PLLCTLV2 peripheral |
| [in] | pll | Index of the PLL to configure (pllctlv2_pll0 through pllctlv2_pll6) |
| [in] | mfi | Integer multiplication factor |
| [in] | mfn | Fractional multiplication factor numerator |
| void pllctlv2_set_postdiv | ( | PLLCTLV2_Type * | ptr, |
| pllctlv2_pll_t | pll, | ||
| pllctlv2_clk_t | clk, | ||
| pllctlv2_div_t | div_value | ||
| ) |
Configures the post-divider for a specific PLL output clock.
| [in] | ptr | Base address of the PLLCTLV2 peripheral |
| [in] | pll | Index of the PLL to configure (pllctlv2_pll0 through pllctlv2_pll6) |
| [in] | clk | Post-divider output index (pllctlv2_clk0 through pllctlv2_clk3) |
| [in] | div_value | Divider value selection (pllctlv2_div_1p0 through pllctlv2_div_13p6) |
| void pllctlv2_setup_spread_spectrum | ( | PLLCTLV2_Type * | ptr, |
| pllctlv2_pll_t | pll, | ||
| uint8_t | spread_range, | ||
| uint32_t | modulation_freq | ||
| ) |
Configures spread spectrum modulation parameters for a PLL.
| [in] | ptr | Base address of the PLLCTLV2 peripheral |
| [in] | pll | Index of the PLL to configure (pllctlv2_pll0 through pllctlv2_pll6) |
| [in] | spread_range | Spread spectrum range as a percentage (0.x%) |
| [in] | modulation_freq | Desired modulation frequency in Hertz |
|
inlinestatic |
Checks if the external crystal oscillator is enabled.
| [in] | ptr | Base address of the PLLCTLV2 peripheral |
|
inlinestatic |
Checks the stability status of the external crystal oscillator.
| [in] | ptr | Base address of the PLLCTLV2 peripheral |
|
inlinestatic |
Configures the ramp-up time for the external crystal oscillator.
| [in] | ptr | Base address of the PLLCTLV2 peripheral |
| [in] | rc24m_cycles | Number of RC24M clock cycles for the ramp-up period |