|
| #define | XPI_1PAD (0U) |
| | XPI pad definitions. More...
|
| |
| #define | XPI_2PADS (1U) |
| |
| #define | XPI_4PADS (2U) |
| |
| #define | XPI_8PADS (3U) |
| |
| #define | XPI_PHASE_STOP (0x00U) |
| | XPI Phase definitions. More...
|
| |
| #define | XPI_PHASE_CMD_SDR (0x01U) |
| |
| #define | XPI_PHASE_RADDR_SDR (0x02U) |
| |
| #define | XPI_PHASE_CADDR_SDR (0x03U) |
| |
| #define | XPI_PHASE_MODE4_SDR (0x06U) |
| |
| #define | XPI_PHASE_MODE8_SDR (0x07U) |
| |
| #define | XPI_PHASE_WRITE_SDR (0x08U) |
| |
| #define | XPI_PHASE_READ_SDR (0x09U) |
| |
| #define | XPI_PHASE_DUMMY_SDR (0X0CU) |
| |
| #define | XPI_PHASE_DUMMY_RWDS_SDR (0x0DU) |
| |
| #define | XPI_PHASE_CMD_DDR (0x21U) |
| |
| #define | XPI_PHASE_RADDR_DDR (0x22U) |
| |
| #define | XPI_PHASE_CADDR_DDR (0x23U) |
| |
| #define | XPI_PHASE_MODE4_DDR (0x26U) |
| |
| #define | XPI_PHASE_MODE8_DDR (0x27U) |
| |
| #define | XPI_PHASE_WRITE_DDR (0x28U) |
| |
| #define | XPI_PHASE_READ_DDR (0x29U) |
| |
| #define | XPI_PHASE_DUMMY_DDR (0x2CU) |
| |
| #define | XPI_PHASE_DUMMY_RWDS_DDR (0x2DU) |
| |
| #define | SUB_INSTR(phase, pad, op) ((uint32_t)(((uint16_t)(phase) << 10) | ((uint16_t)(pad) << 8) | ((uint16_t)(op)))) |
| | SUB Instruction. More...
|
| |
| #define | XPI_INSTR_SEQ(phase0, pad0, op0, phase1, pad1, op1) (SUB_INSTR(phase0, pad0, op0) | (SUB_INSTR(phase1, pad1, op1)<<16)) |
| | Generate a single word INSTRUCTION sequence word. More...
|
| |
|
| enum | xpi_rxclksrc_type_t { xpi_rxclksrc_internal_loopback = 0
, xpi_rxclksrc_dqs_loopback = 1
, xpi_rxclksrc_external_dqs = 3
} |
| | XPI Read Sample Clock source options. More...
|
| |
| enum | xpi_io_group_t { xpi_io_1st_group
, xpi_io_2nd_group
} |
| | XPI IO pin group options. More...
|
| |
| enum | xpi_xfer_channel_t {
xpi_xfer_channel_a1
, xpi_xfer_channel_a2
, xpi_xfer_channel_b1
, xpi_xfer_channel_b2
,
xpi_xfer_channel_auto
} |
| | XPI Transfer Channel type definitions. More...
|
| |
| enum | xpi_channel_t { xpi_channel_a1
, xpi_channel_a2
, xpi_channel_b1
, xpi_channel_b2
} |
| | XPI Channel definitions. More...
|
| |
| enum | xpi_apb_xfer_type_t { xpi_apb_xfer_type_cmd
, xpi_apb_xfer_type_config
, xpi_apb_xfer_type_read
, xpi_apb_xfer_type_write
} |
| | XPI APB Transfer type. More...
|
| |
| enum | xpi_xfer_mode_t { xpi_xfer_mode_polling
, xpi_xfer_mode_dma
, xpi_xfer_mode_interrupt
} |
| | XPI Xfer Mode. More...
|
| |
| enum | {
status_xpi_apb_jump_on_cs = ((uint32_t)( status_group_xpi )*1000U + (uint32_t)( 1 ))
, status_xpi_apb_unknown_inst = ((uint32_t)( status_group_xpi )*1000U + (uint32_t)( 2 ))
, status_xpi_apb_dummy_sdr_in_ddr_seq = ((uint32_t)( status_group_xpi )*1000U + (uint32_t)( 3 ))
, status_xpi_apb_dummy_ddr_in_sdr_seq = ((uint32_t)( status_group_xpi )*1000U + (uint32_t)( 4 ))
,
status_xpi_apb_exceed_addr_range = ((uint32_t)( status_group_xpi )*1000U + (uint32_t)( 5 ))
, status_xpi_apb_seq_timeout = ((uint32_t)( status_group_xpi )*1000U + (uint32_t)( 6 ))
, status_xpi_apb_cross_boundary = ((uint32_t)( status_group_xpi )*1000U + (uint32_t)( 7 ))
} |
| | XPI API command error codes. More...
|
| |
| enum | { xpi_dll_half_cycle = 0xFU
, xpi_dll_quarter_cycle = 0x7U
, xpi_dll_sdr_default_cycle = xpi_dll_half_cycle
, xpi_dll_ddr_default_cycle = xpi_dll_quarter_cycle
} |
| | Delay line definitions. More...
|
| |
XPI ROM APIs.