#include <hpm_adc12_regs.h>

Data Fields
__RW uint32_t	CONFIG [12]

__RW uint32_t	TRG_DMA_ADDR

__RW uint32_t	TRG_SW_STA

__R uint8_t	RESERVED0 [968]

__R uint32_t	BUS_RESULT [19]

__R uint8_t	RESERVED1 [180]

__RW uint32_t	BUF_CFG0

__R uint8_t	RESERVED2 [764]

__RW uint32_t	SEQ_CFG0

__RW uint32_t	SEQ_DMA_ADDR

__R uint32_t	SEQ_WR_ADDR

__RW uint32_t	SEQ_DMA_CFG

__RW uint32_t	SEQ_QUE [16]

__R uint8_t	RESERVED3 [944]

struct {
__RW uint32_t PRD_CFG

__RW uint32_t PRD_THSHD_CFG

__R uint32_t PRD_RESULT

__R uint8_t RESERVED0 [4]

}	PRD_CFG [19]

__R uint8_t	RESERVED4 [720]

__RW uint32_t	SAMPLE_CFG [19]

__R uint8_t	RESERVED5 [184]

__RW uint32_t	CONV_CFG1

__RW uint32_t	ADC_CFG0

__R uint8_t	RESERVED6 [4]

__RW uint32_t	INT_STS

__RW uint32_t	INT_EN

__R uint8_t	RESERVED7 [232]

__RW uint32_t	ANA_CTRL0

__RW uint32_t	ANA_CTRL1

__R uint8_t	RESERVED8 [8]

__RW uint32_t	ANA_STATUS

Field Documentation

◆ ADC_CFG0

__RW uint32_t ADC12_Type::ADC_CFG0

◆ ANA_CTRL0

__RW uint32_t ADC12_Type::ANA_CTRL0

◆ ANA_CTRL1

__RW uint32_t ADC12_Type::ANA_CTRL1

◆ ANA_STATUS

__RW uint32_t ADC12_Type::ANA_STATUS

◆ BUF_CFG0

__RW uint32_t ADC12_Type::BUF_CFG0

◆ BUS_RESULT

__R uint32_t ADC12_Type::BUS_RESULT[19]

◆ CONFIG

__RW uint32_t ADC12_Type::CONFIG[12]

◆ CONV_CFG1

__RW uint32_t ADC12_Type::CONV_CFG1

◆ INT_EN

__RW uint32_t ADC12_Type::INT_EN

◆ INT_STS

__RW uint32_t ADC12_Type::INT_STS

◆ PRD_CFG [1/2]

__RW uint32_t ADC12_Type::PRD_CFG

◆ [2/2]

struct { ... } ADC12_Type::PRD_CFG[19]

◆ PRD_RESULT

__R uint32_t ADC12_Type::PRD_RESULT

◆ PRD_THSHD_CFG

__RW uint32_t ADC12_Type::PRD_THSHD_CFG

◆ RESERVED0

__R uint8_t ADC12_Type::RESERVED0[4]

◆ RESERVED1

__R uint8_t ADC12_Type::RESERVED1[180]

◆ RESERVED2

__R uint8_t ADC12_Type::RESERVED2[764]

◆ RESERVED3

__R uint8_t ADC12_Type::RESERVED3[944]

◆ RESERVED4

__R uint8_t ADC12_Type::RESERVED4[720]

◆ RESERVED5

__R uint8_t ADC12_Type::RESERVED5[184]

◆ RESERVED6

__R uint8_t ADC12_Type::RESERVED6[4]

◆ RESERVED7

__R uint8_t ADC12_Type::RESERVED7[232]

◆ RESERVED8

__R uint8_t ADC12_Type::RESERVED8[8]

◆ SAMPLE_CFG

__RW uint32_t ADC12_Type::SAMPLE_CFG[19]

◆ SEQ_CFG0

__RW uint32_t ADC12_Type::SEQ_CFG0

◆ SEQ_DMA_ADDR

__RW uint32_t ADC12_Type::SEQ_DMA_ADDR

◆ SEQ_DMA_CFG

__RW uint32_t ADC12_Type::SEQ_DMA_CFG

◆ SEQ_QUE

__RW uint32_t ADC12_Type::SEQ_QUE[16]

◆ SEQ_WR_ADDR

__R uint32_t ADC12_Type::SEQ_WR_ADDR

◆ TRG_DMA_ADDR

__RW uint32_t ADC12_Type::TRG_DMA_ADDR

◆ TRG_SW_STA

__RW uint32_t ADC12_Type::TRG_SW_STA

The documentation for this struct was generated from the following file:

/home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/soc/HPM6700/ip/hpm_adc12_regs.h

Data Fields