HPM SDK
HPMicro Software Development Kit
Data Fields
CLC_Type Struct Reference

#include <hpm_clc_regs.h>

Data Fields

struct {
   __RW uint32_t   MODE
 
   __RW uint32_t   ADC_EXPECT
 
   __RW uint32_t   ADC_CHAN
 
   __RW uint32_t   ADC_OFFSET
 
   __RW uint32_t   EADC_LOWTH
 
   __RW uint32_t   EADC_HIGHTH
 
   __RW uint32_t   EADC_MIDLOWTH
 
   __RW uint32_t   EADC_MIDHIGHTH
 
   __RW uint32_t   P2Z2_CLAMP_LO
 
   __RW uint32_t   P2Z2_CLAMP_HI
 
   __RW uint32_t   P3Z3_CLAMP_LO
 
   __RW uint32_t   P3Z3_CLAMP_HI
 
   __R uint8_t   RESERVED0 [16]
 
   struct {
      __RW uint32_t   COEFF_B0
 
      __RW uint32_t   COEFF_B1
 
      __RW uint32_t   COEFF_B2
 
      __RW uint32_t   COEFF_B3
 
      __RW uint32_t   COEFF_A0
 
      __RW uint32_t   COEFF_A1
 
      __RW uint32_t   COEFF_A2
 
      __RW uint32_t   COEFF_KS
 
   }   COEFF [3]
 
   __RW uint32_t   PWM_PERIOD
 
   __R uint32_t   OUTPUT_VALUE
 
   __R uint32_t   TIMESTAMP
 
   __RW uint32_t   EADC_CURR
 
   __RW uint32_t   EADC_PRE0
 
   __RW uint32_t   EADC_PRE1
 
   __RW uint32_t   P2Z2_CURR
 
   __RW uint32_t   P2Z2_PRE0
 
   __R uint8_t   RESERVED1 [4]
 
   __RW uint32_t   P3Z3_CURR
 
   __R uint8_t   RESERVED2 [4]
 
   __RW uint32_t   P3Z3_FORBID_LO
 
   __RW uint32_t   P3Z3_FORBID_MD
 
   __RW uint32_t   P3Z3_FORBID_HI
 
   __R uint8_t   RESERVED3 [8]
 
   __RW uint32_t   ADC_SW
 
   __R uint8_t   RESERVED4 [24]
 
   __W uint32_t   STATUS
 
} VDVQ_CHAN [2]
 
__W uint32_t DQ_ADC_SW_READY
 
struct {
   __RW uint32_t   MODE
 
   __RW uint32_t   ADC_EXPECT
 
   __RW uint32_t   ADC_CHAN
 
   __RW uint32_t   ADC_OFFSET
 
   __RW uint32_t   EADC_LOWTH
 
   __RW uint32_t   EADC_HIGHTH
 
   __RW uint32_t   EADC_MIDLOWTH
 
   __RW uint32_t   EADC_MIDHIGHTH
 
   __RW uint32_t   P2Z2_CLAMP_LO
 
   __RW uint32_t   P2Z2_CLAMP_HI
 
   __RW uint32_t   P3Z3_CLAMP_LO
 
   __RW uint32_t   P3Z3_CLAMP_HI
 
   __R uint8_t   RESERVED0 [16]
 
   struct {
      __RW uint32_t   COEFF_B0
 
      __RW uint32_t   COEFF_B1
 
      __RW uint32_t   COEFF_B2
 
      __RW uint32_t   COEFF_B3
 
      __RW uint32_t   COEFF_A0
 
      __RW uint32_t   COEFF_A1
 
      __RW uint32_t   COEFF_A2
 
      __RW uint32_t   COEFF_KS
 
   }   COEFF [3]
 
   __RW uint32_t   PWM_PERIOD
 
   __R uint32_t   OUTPUT_VALUE
 
   __R uint32_t   TIMESTAMP
 
   __RW uint32_t   EADC_CURR
 
   __RW uint32_t   EADC_PRE0
 
   __RW uint32_t   EADC_PRE1
 
   __RW uint32_t   P2Z2_CURR
 
   __RW uint32_t   P2Z2_PRE0
 
   __R uint8_t   RESERVED1 [4]
 
   __RW uint32_t   P3Z3_CURR
 
   __R uint8_t   RESERVED2 [4]
 
   __RW uint32_t   P3Z3_FORBID_LO
 
   __RW uint32_t   P3Z3_FORBID_MD
 
   __RW uint32_t   P3Z3_FORBID_HI
 
   __RW uint32_t   LIND
 
   __RW uint32_t   KE
 
   __RW uint32_t   ADC_SW
 
   __RW uint32_t   SPEED_SW
 
   __RW uint32_t   DECOUPLE_SCALING
 
   __R uint8_t   RESERVED3 [16]
 
   __W uint32_t   STATUS
 
} VDVQ_CHAN [2]
 

Field Documentation

◆ ADC_CHAN

__RW uint32_t CLC_Type::ADC_CHAN

◆ ADC_EXPECT

__RW uint32_t CLC_Type::ADC_EXPECT

◆ ADC_OFFSET

__RW uint32_t CLC_Type::ADC_OFFSET

◆ ADC_SW

__RW uint32_t CLC_Type::ADC_SW

◆  [1/2]

struct { ... } CLC_Type::COEFF[3]

◆  [2/2]

struct { ... } CLC_Type::COEFF[3]

◆ COEFF_A0

__RW uint32_t CLC_Type::COEFF_A0

◆ COEFF_A1

__RW uint32_t CLC_Type::COEFF_A1

◆ COEFF_A2

__RW uint32_t CLC_Type::COEFF_A2

◆ COEFF_B0

__RW uint32_t CLC_Type::COEFF_B0

◆ COEFF_B1

__RW uint32_t CLC_Type::COEFF_B1

◆ COEFF_B2

__RW uint32_t CLC_Type::COEFF_B2

◆ COEFF_B3

__RW uint32_t CLC_Type::COEFF_B3

◆ COEFF_KS

__RW uint32_t CLC_Type::COEFF_KS

◆ DECOUPLE_SCALING

__RW uint32_t CLC_Type::DECOUPLE_SCALING

◆ DQ_ADC_SW_READY

__W uint32_t CLC_Type::DQ_ADC_SW_READY

◆ EADC_CURR

__RW uint32_t CLC_Type::EADC_CURR

◆ EADC_HIGHTH

__RW uint32_t CLC_Type::EADC_HIGHTH

◆ EADC_LOWTH

__RW uint32_t CLC_Type::EADC_LOWTH

◆ EADC_MIDHIGHTH

__RW uint32_t CLC_Type::EADC_MIDHIGHTH

◆ EADC_MIDLOWTH

__RW uint32_t CLC_Type::EADC_MIDLOWTH

◆ EADC_PRE0

__RW uint32_t CLC_Type::EADC_PRE0

◆ EADC_PRE1

__RW uint32_t CLC_Type::EADC_PRE1

◆ KE

__RW uint32_t CLC_Type::KE

◆ LIND

__RW uint32_t CLC_Type::LIND

◆ MODE

__RW uint32_t CLC_Type::MODE

◆ OUTPUT_VALUE

__R uint32_t CLC_Type::OUTPUT_VALUE

◆ P2Z2_CLAMP_HI

__RW uint32_t CLC_Type::P2Z2_CLAMP_HI

◆ P2Z2_CLAMP_LO

__RW uint32_t CLC_Type::P2Z2_CLAMP_LO

◆ P2Z2_CURR

__RW uint32_t CLC_Type::P2Z2_CURR

◆ P2Z2_PRE0

__RW uint32_t CLC_Type::P2Z2_PRE0

◆ P3Z3_CLAMP_HI

__RW uint32_t CLC_Type::P3Z3_CLAMP_HI

◆ P3Z3_CLAMP_LO

__RW uint32_t CLC_Type::P3Z3_CLAMP_LO

◆ P3Z3_CURR

__RW uint32_t CLC_Type::P3Z3_CURR

◆ P3Z3_FORBID_HI

__RW uint32_t CLC_Type::P3Z3_FORBID_HI

◆ P3Z3_FORBID_LO

__RW uint32_t CLC_Type::P3Z3_FORBID_LO

◆ P3Z3_FORBID_MD

__RW uint32_t CLC_Type::P3Z3_FORBID_MD

◆ PWM_PERIOD

__RW uint32_t CLC_Type::PWM_PERIOD

◆ RESERVED0

__R uint8_t CLC_Type::RESERVED0[16]

◆ RESERVED1

__R uint8_t CLC_Type::RESERVED1[4]

◆ RESERVED2

__R uint8_t CLC_Type::RESERVED2[4]

◆ RESERVED3

__R uint8_t CLC_Type::RESERVED3[16]

◆ RESERVED4

__R uint8_t CLC_Type::RESERVED4[24]

◆ SPEED_SW

__RW uint32_t CLC_Type::SPEED_SW

◆ STATUS

__W uint32_t CLC_Type::STATUS

◆ TIMESTAMP

__R uint32_t CLC_Type::TIMESTAMP

◆  [1/2]

struct { ... } CLC_Type::VDVQ_CHAN[2]

◆  [2/2]

struct { ... } CLC_Type::VDVQ_CHAN[2]
The documentation for this struct was generated from the following file: