HPM SDK
HPMicro Software Development Kit
FEMC_Type Struct Reference

#include <hpm_femc_regs.h>

Data Fields

__RW uint32_t CTRL
 
__RW uint32_t IOCTRL
 
__RW uint32_t BMW0
 
__RW uint32_t BMW1
 
__RW uint32_t BR [7]
 
__R uint8_t RESERVED0 [12]
 
__RW uint32_t INTEN
 
__W uint32_t INTR
 
__RW uint32_t SDRCTRL0
 
__RW uint32_t SDRCTRL1
 
__RW uint32_t SDRCTRL2
 
__RW uint32_t SDRCTRL3
 
__R uint8_t RESERVED1 [32]
 
__RW uint32_t SRCTRL0
 
__RW uint32_t SRCTRL1
 
__R uint8_t RESERVED2 [24]
 
__RW uint32_t SADDR
 
__RW uint32_t DATSZ
 
__RW uint32_t BYTEMSK
 
__RW uint32_t IPCMD
 
__RW uint32_t IPTX
 
__R uint8_t RESERVED3 [12]
 
__RW uint32_t IPRX
 
__R uint8_t RESERVED4 [12]
 
__R uint32_t STAT0
 
__R uint8_t RESERVED5 [140]
 
__RW uint32_t DLYCFG
 
__RW uint32_t BR2 [2]
 
__R uint8_t RESERVED6 [24]
 
__RW uint32_t SRCTRL2
 
__RW uint32_t SRCTRL3
 
__R uint8_t RESERVED7 [40]
 

Field Documentation

◆ BMW0

__RW uint32_t FEMC_Type::BMW0

◆ BMW1

__RW uint32_t FEMC_Type::BMW1

◆ BR

__RW uint32_t FEMC_Type::BR

◆ BR2

__RW uint32_t FEMC_Type::BR2

◆ BYTEMSK

__RW uint32_t FEMC_Type::BYTEMSK

◆ CTRL

__RW uint32_t FEMC_Type::CTRL

◆ DATSZ

__RW uint32_t FEMC_Type::DATSZ

◆ DLYCFG

__RW uint32_t FEMC_Type::DLYCFG

◆ INTEN

__RW uint32_t FEMC_Type::INTEN

◆ INTR

__W uint32_t FEMC_Type::INTR

◆ IOCTRL

__RW uint32_t FEMC_Type::IOCTRL

◆ IPCMD

__RW uint32_t FEMC_Type::IPCMD

◆ IPRX

__RW uint32_t FEMC_Type::IPRX

◆ IPTX

__RW uint32_t FEMC_Type::IPTX

◆ RESERVED0

__R uint8_t FEMC_Type::RESERVED0

◆ RESERVED1

__R uint8_t FEMC_Type::RESERVED1

◆ RESERVED2

__R uint8_t FEMC_Type::RESERVED2

◆ RESERVED3

__R uint8_t FEMC_Type::RESERVED3

◆ RESERVED4

__R uint8_t FEMC_Type::RESERVED4

◆ RESERVED5

__R uint8_t FEMC_Type::RESERVED5

◆ RESERVED6

__R uint8_t FEMC_Type::RESERVED6

◆ RESERVED7

__R uint8_t FEMC_Type::RESERVED7

◆ SADDR

__RW uint32_t FEMC_Type::SADDR

◆ SDRCTRL0

__RW uint32_t FEMC_Type::SDRCTRL0

◆ SDRCTRL1

__RW uint32_t FEMC_Type::SDRCTRL1

◆ SDRCTRL2

__RW uint32_t FEMC_Type::SDRCTRL2

◆ SDRCTRL3

__RW uint32_t FEMC_Type::SDRCTRL3

◆ SRCTRL0

__RW uint32_t FEMC_Type::SRCTRL0

◆ SRCTRL1

__RW uint32_t FEMC_Type::SRCTRL1

◆ SRCTRL2

__RW uint32_t FEMC_Type::SRCTRL2

◆ SRCTRL3

__RW uint32_t FEMC_Type::SRCTRL3

◆ STAT0

__R uint32_t FEMC_Type::STAT0

The documentation for this struct was generated from the following file: