#include <hpm_uart_regs.h>
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| __R uint8_t | RESERVED0 [4] |
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| __RW uint32_t | IDLE_CFG |
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| __RW uint32_t | ADDR_CFG |
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| __RW uint32_t | IIR2 |
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| __RW uint32_t | CFG |
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| __RW uint32_t | OSCR |
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| __RW uint32_t | FCRR |
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| __RW uint32_t | MOTO_CFG |
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| union { |
| __R uint32_t RBR |
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| __W uint32_t THR |
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| __RW uint32_t DLL |
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| }; | |
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| union { |
| __RW uint32_t IER |
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| __RW uint32_t DLM |
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| }; | |
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| union { |
| __RW uint32_t IIR |
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| __W uint32_t FCR |
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| }; | |
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| __RW uint32_t | LCR |
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| __RW uint32_t | MCR |
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| __R uint32_t | LSR |
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| __R uint32_t | MSR |
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| __RW uint32_t | GPR |
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| union { |
| __R uint32_t RBR |
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| __W uint32_t THR |
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| __RW uint32_t DLL |
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| }; | |
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| union { |
| __RW uint32_t IER |
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| __RW uint32_t DLM |
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| }; | |
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| union { |
| __RW uint32_t IIR |
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| __W uint32_t FCR |
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| }; | |
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| __R uint8_t | RESERVED1 [8] |
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| __R uint8_t | RESERVED2 [8] |
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| union { |
| __R uint32_t RBR |
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| __W uint32_t THR |
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| __RW uint32_t DLL |
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| }; | |
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| union { |
| __RW uint32_t IER |
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| __RW uint32_t DLM |
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| }; | |
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| union { |
| __RW uint32_t IIR |
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| __W uint32_t FCR |
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| }; | |
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| union { |
| __R uint32_t RBR |
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| __W uint32_t THR |
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| __RW uint32_t DLL |
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| }; | |
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| union { |
| __RW uint32_t IER |
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| __RW uint32_t DLM |
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| }; | |
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| union { |
| __R uint32_t IIR |
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| __W uint32_t FCR |
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| }; | |
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| union { |
| __R uint32_t RBR |
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| __W uint32_t THR |
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| __RW uint32_t DLL |
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| }; | |
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| union { |
| __RW uint32_t IER |
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| __RW uint32_t DLM |
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| }; | |
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| union { |
| __R uint32_t IIR |
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| __W uint32_t FCR |
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| }; | |
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| union { |
| __R uint32_t RBR |
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| __W uint32_t THR |
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| __RW uint32_t DLL |
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| }; | |
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| union { |
| __RW uint32_t IER |
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| __RW uint32_t DLM |
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| }; | |
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| union { |
| __RW uint32_t IIR |
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| __W uint32_t FCR |
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| }; | |
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| union { |
| __R uint32_t RBR |
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| __W uint32_t THR |
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| __RW uint32_t DLL |
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| }; | |
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| union { |
| __RW uint32_t IER |
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| __RW uint32_t DLM |
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| }; | |
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| union { |
| __RW uint32_t IIR |
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| __W uint32_t FCR |
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| }; | |
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| union { |
| __R uint32_t RBR |
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| __W uint32_t THR |
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| __RW uint32_t DLL |
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| }; | |
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| union { |
| __RW uint32_t IER |
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| __RW uint32_t DLM |
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| }; | |
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| union { |
| __RW uint32_t IIR |
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| __W uint32_t FCR |
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| }; | |
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◆ ADDR_CFG
| __RW uint32_t UART_Type::ADDR_CFG |
◆ CFG
| __RW uint32_t UART_Type::CFG |
◆ DLL
| __RW uint32_t UART_Type::DLL |
◆ DLM
| __RW uint32_t UART_Type::DLM |
◆ FCR
| __W uint32_t UART_Type::FCR |
◆ FCRR
| __RW uint32_t UART_Type::FCRR |
◆ GPR
| __RW uint32_t UART_Type::GPR |
◆ IDLE_CFG
| __RW uint32_t UART_Type::IDLE_CFG |
◆ IER
| __RW uint32_t UART_Type::IER |
◆ IIR [1/2]
| __RW uint32_t UART_Type::IIR |
◆ IIR [2/2]
| __R uint32_t UART_Type::IIR |
◆ IIR2
| __RW uint32_t UART_Type::IIR2 |
◆ LCR
| __RW uint32_t UART_Type::LCR |
◆ LSR
| __R uint32_t UART_Type::LSR |
◆ MCR
| __RW uint32_t UART_Type::MCR |
◆ MOTO_CFG
| __RW uint32_t UART_Type::MOTO_CFG |
◆ MSR
| __R uint32_t UART_Type::MSR |
◆ OSCR
| __RW uint32_t UART_Type::OSCR |
◆ RBR
| __R uint32_t UART_Type::RBR |
◆ RESERVED0
| __R uint8_t UART_Type::RESERVED0 |
◆ RESERVED1
| __R uint8_t UART_Type::RESERVED1 |
◆ RESERVED2
| __R uint8_t UART_Type::RESERVED2 |
◆ THR
| __W uint32_t UART_Type::THR |
The documentation for this struct was generated from the following file:
- /home/docs/checkouts/readthedocs.org/user_builds/hpm-sdk/checkouts/latest/soc/HPM5300/ip/hpm_uart_regs.h