67.6.7. UART LIN Slave with Baudrate Adaptive Example
67.6.7.1. Overview
This example demonstrates how to use UART peripheral with PLB peripheral to implement LIN slave baudrate adaptive functionality. The main features include:
Using PLB to detect LIN bus baudrate
LIN slave automatically adjusts baudrate based on detection results
LIN slave receiving data from master
LIN slave responding to master’s data request
67.6.7.2. Working Principle
This example implements the following functions:
Baudrate Adaptation:
Use PLB to measure LIN break and sync field timing
Calculate actual baudrate
Dynamically adjust UART baudrate to match master
Receiving Master Data:
Receive LIN frame (ID: 0x31, Data: 0x0-0x7)
Verify data correctness
Responding to Master Request:
Send LIN frame (ID: 0x30, Data: 0x7-0x0)
Use enhanced checksum
67.6.7.3. Workflow
Initialization Process:
PLB Initialization:
Configure PLB channel for timing measurement
Configure DMA for data acquisition
Set baudrate tolerance and filter parameters
UART Initialization:
Configure initial baudrate (19200)
Enable line status interrupt for break detection
Configure frame format as 8-bit data, no parity
Baudrate Detection Process:
Break and Sync Field Detection:
PLB captures LIN bus signal
Measure break and sync field timing
Calculate actual baudrate
Baudrate Adjustment:
Verify if calculated baudrate is within supported range
Dynamically update UART baudrate configuration
Prepare for PID reception
Data Processing Flow:
Receiving Data (ID: 0x31):
Configure RX FIFO trigger level greater than remaining frame length
Enable RX timeout interrupt
Receive and verify data in interrupt
Sending Data (ID: 0x30):
Prepare response data (0x7-0x0)
Enable TX FIFO interrupt
Confirm data transmission completion in interrupt
Interrupt Handling Process:
DMA Interrupt:
Process PLB acquired data
Calculate baudrate and update UART configuration
UART RX Data Interrupt:
Receive PID and verify
Configure subsequent operations
UART TX FIFO Interrupt:
Detect transmission completion
Note: When uart_intr_tx_slot_avail interrupt occurs, the last byte may still be in TX FIFO, additional status check or TXIDLE interrupt feature may be needed depending on version
UART RX Timeout Interrupt:
Receive complete data frame
Verify data correctness
Disable RX timeout interrupt
Note: RX timeout method requires interval between data frames ≥ 4 UART byte transmission time
67.6.7.4. Important Notes
Slave auto-sleep is not supported, no need for master wakeup
Baudrate detection requires additional hardware connection (UART_RX to PLB input)
Baudrate adjustment has a tolerance range (default ±5%)
67.6.7.5. Usage Guide
67.6.7.5.1. Hardware Requirements
One development board
One USB to LIN debugger
LIN transceiver (if not integrated on board)
67.6.7.5.2. Hardware Setup
Choose the appropriate connection method based on your board type:
For boards with onboard LIN transceiver:
Connect LIN signal line from USB-LIN debugger to board’s LIN signal pin
Connect GND
Connect UART_RX pin to PLB LIN clock detection pin
For boards without onboard LIN transceiver:
Connect board’s UART TX and RX pins to MCU side of LIN transceiver
Connect USB-LIN debugger to LIN bus side of transceiver
Connect GND
Connect UART_RX pin to PLB LIN clock detection pin
Please refer to Pin Description section for specific pin connections.
67.6.7.5.3. Running Steps
Configure USB-LIN debugger:
Select correct COM port and initial baudrate (can be any supported baudrate)
Click “Set to Debugger” button
Configure master send and receive functions:
Set send ID to 0x31, configure send data as: 0x0, 0x1, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7 and enhanced checksum
Set receive ID to 0x30
Check enable option
Click “Configure to Debugger” button
Compile and download program to development board and run
Try adjusting USB-LIN debugger’s baudrate to verify adaptive functionality
67.6.7.6. Running Results
Serial terminal output:
Test uart lin slave baudrate adaptive example uart lin receive ID: 0x31 uart receive 8 data: 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 uart lin receive ID: 0x30 uart send 8 data: 0x7 0x6 0x5 0x4 0x3 0x2 0x1 0x0
USB-LIN debugger shows communication data:
67.6.7.7. Debugging Tips
Hardware connection check
Use logic analyzer to observe LIN bus signals, verify the waveforms of break, sync, data segments and checksum are correct
Check if interrupts are generated as expected, including PLB interrupts, calculated baudrate, and UART interrupts