22.5.3. I2S Interrupt
22.5.3.1. Overview
This example demonstrates how to use I2S interrupt mode to transfer audio data to the onboard audio codec chip for playback.
22.5.3.2. Workflow
Configure system audio clock (MCLK) according to the audio sampling rate
Configure I2S peripheral: - Enable MCLK output to Codec - Set audio data format (bit width, number of channels) - Configure TX FIFO interrupt threshold - Enable transmit FIFO interrupt
Configure Codec: - Set audio data format and sampling rate - Configure Codec to playback mode - Configure audio output path (e.g., headphone output)
Enable I2S peripheral to start audio data transfer
When I2S generates TX FIFO interrupt, in the interrupt handler: - Read audio data - Align data according to audio depth - Fill data into I2S TX FIFO
Disable I2S interrupt and I2S peripheral when playback is complete
22.5.3.3. Project Configuration
Audio Codec Configuration - In the CMakeLists.txt file, set the matching audio codec type according to the board schematic - For example: “set(CONFIG_CODEC “sgtl5000”)”
22.5.3.4. Hardware Setup
Connect 3.5mm headphones to the audio codec’s headphone interface
22.5.3.5. Known Issues
On some development boards, there might be crosstalk when playing audio through the codec’s headphone interface. For example, when playing mono audio through the left channel, a weak sound might be heard in the right channel headphone.
22.5.3.6. Important Notes
Audio codec clock and configuration sequence:
Most Audio codecs require MCLK from the I2S interface as the master clock source
MCLK must be configured and enabled first, then the Codec can be configured through I2C interface after it’s working
22.5.3.7. Running Results
When the project runs correctly, you can observe:
Terminal output:
I2S Interrupt example
I2C bus is ready
I2S interrupt play finished
The headphones will play the sample audio in a loop
22.5.3.8. Debugging Tips
Verify that the audio codec model is correctly configured
Check if the I2C bus is properly initialized and the codec configuration is completed correctly
Monitor if interrupts are triggering properly
Use an oscilloscope to check if I2S signal timing is correct