HPM SDK
HPMicro Software Development Kit
hpm_romapi.h
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1 /*
2  * Copyright (c) 2022-2024 HPMicro
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  *
6  */
7 
8 #ifndef HPM_ROMAPI_H
9 #define HPM_ROMAPI_H
10 
17 #include "hpm_common.h"
18 #include "hpm_otp_drv.h"
19 #include "hpm_romapi_xpi_def.h"
20 #include "hpm_romapi_xpi_soc_def.h"
21 #include "hpm_romapi_xpi_nor_def.h"
22 #include "hpm_romapi_xpi_ram_def.h"
23 #include "hpm_sdp_drv.h"
24 
25 /* XPI0 base address */
26 #define HPM_XPI0_BASE (0xF3040000UL)
27 /* XPI0 base pointer */
28 #define HPM_XPI0 ((XPI_Type *) HPM_XPI0_BASE)
31 /***********************************************************************************************************************
32  *
33  *
34  * Definitions
35  *
36  *
37  **********************************************************************************************************************/
41 typedef union {
42  uint32_t U;
43  struct {
44  uint32_t index: 8;
45  uint32_t peripheral: 8;
46  uint32_t src: 8;
47  uint32_t tag: 8;
48  };
50 
51 /*EXiP Region Parameter */
52 typedef struct {
53  uint32_t start;
54  uint32_t len;
55  uint8_t key[16];
56  uint8_t ctr[8];
58 
59 #define API_BOOT_TAG (0xEBU)
60 #define API_BOOT_SRC_OTP (0U)
61 #define API_BOOT_SRC_PRIMARY (1U)
62 #define API_BOOT_SRC_SERIAL_BOOT (2U)
63 #define API_BOOT_SRC_ISP (3U)
64 #define API_BOOT_PERIPH_AUTO (0U)
65 #define API_BOOT_PERIPH_UART (1U)
66 #define API_BOOT_PERIPH_USBHID (2U)
71 typedef struct {
73  uint32_t version;
75  void (*init)(void);
77  void (*deinit)(void);
79  uint32_t (*read_from_shadow)(uint32_t addr);
81  uint32_t (*read_from_ip)(uint32_t addr);
83  hpm_stat_t (*program)(uint32_t addr, const uint32_t *src, uint32_t num_of_words);
85  hpm_stat_t (*reload)(otp_region_t region);
87  hpm_stat_t (*lock)(uint32_t addr, otp_lock_option_t lock_option);
89  hpm_stat_t (*lock_shadow)(uint32_t addr, otp_lock_option_t lock_option);
91  hpm_stat_t (*set_configurable_region)(uint32_t start, uint32_t num_of_words);
93  hpm_stat_t (*write_shadow_register)(uint32_t addr, uint32_t data);
95 
99 typedef struct {
101  uint32_t version;
102 
104  hpm_stat_t (*get_config)(XPI_Type *base, xpi_ram_config_t *ram_cfg, xpi_ram_config_option_t *cfg_option);
105 
109 
113 typedef struct {
115  uint32_t version;
117  hpm_stat_t (*sdp_ip_init)(void);
119  hpm_stat_t (*sdp_ip_deinit)(void);
121  hpm_stat_t (*aes_set_key)(sdp_aes_ctx_t *aes_ctx, const uint8_t *key, sdp_aes_key_bits_t keybits, uint32_t key_idx);
123  hpm_stat_t (*aes_crypt_ecb)(sdp_aes_ctx_t *aes_ctx, sdp_aes_op_t op, uint32_t len, const uint8_t *in, uint8_t *out);
125  hpm_stat_t (*aes_crypt_cbc)(sdp_aes_ctx_t *aes_ctx,
126  sdp_aes_op_t op,
127  uint32_t length,
128  uint8_t iv[16],
129  const uint8_t *input,
130  uint8_t *output);
132  hpm_stat_t
133  (*aes_crypt_ctr)(sdp_aes_ctx_t *aes_ctx, uint8_t *nonce_ctr, uint8_t *input, uint8_t *output, uint32_t length);
135  hpm_stat_t (*aes_ccm_gen_enc)(sdp_aes_ctx_t *aes_ctx,
136  uint32_t input_len,
137  const uint8_t *nonce,
138  uint32_t nonce_len,
139  const uint8_t *aad,
140  uint32_t aad_len,
141  const uint8_t *input,
142  uint8_t *output,
143  uint8_t *tag,
144  uint32_t tag_len);
146  hpm_stat_t (*aes_ccm_dec_verify)(sdp_aes_ctx_t *aes_ctx,
147  uint32_t input_len,
148  const uint8_t *nonce,
149  uint32_t nonce_len,
150  const uint8_t *aad,
151  uint32_t aad_len,
152  const uint8_t *input,
153  uint8_t *output,
154  const uint8_t *tag,
155  uint32_t tag_len);
157  hpm_stat_t (*memcpy)(sdp_dma_ctx_t *dma_ctx, void *dst, const void *src, uint32_t length);
159  hpm_stat_t (*memset)(sdp_dma_ctx_t *dma_ctx, void *dst, uint8_t pattern, uint32_t length);
161  hpm_stat_t (*hash_init)(sdp_hash_ctx_t *hash_ctx, sdp_hash_alg_t alg);
163  hpm_stat_t (*hash_update)(sdp_hash_ctx_t *hash_ctx, const uint8_t *data, uint32_t length);
165  hpm_stat_t (*hash_finish)(sdp_hash_ctx_t *hash_ctx, uint8_t *digest);
167  hpm_stat_t (*sm4_set_key)(sdp_sm4_ctx_t *sm4_ctx, const uint8_t *key, sdp_sm4_key_bits_t keybits, uint32_t key_idx);
169  hpm_stat_t (*sm4_crypt_ecb)(sdp_sm4_ctx_t *sm4_ctx, sdp_sm4_op_t op, uint32_t len, const uint8_t *in, uint8_t *out);
171  hpm_stat_t (*sm4_crypt_cbc)(sdp_sm4_ctx_t *sm4_ctx,
172  sdp_sm4_op_t op,
173  uint32_t length,
174  uint8_t iv[16],
175  const uint8_t *input,
176  uint8_t *output);
178  hpm_stat_t
179  (*sm4_crypt_ctr)(sdp_sm4_ctx_t *sm4_ctx, uint8_t *nonce_ctr, uint8_t *input, uint8_t *output, uint32_t length);
181  hpm_stat_t (*sm4_ccm_gen_enc)(sdp_sm4_ctx_t *sm4_ctx,
182  uint32_t input_len,
183  const uint8_t *nonce,
184  uint32_t nonce_len,
185  const uint8_t *aad,
186  uint32_t aad_len,
187  const uint8_t *input,
188  uint8_t *output,
189  uint8_t *tag,
190  uint32_t tag_len);
192  hpm_stat_t (*sm4_ccm_dec_verify)(sdp_sm4_ctx_t *sm4_ctx,
193  uint32_t input_len,
194  const uint8_t *nonce,
195  uint32_t nonce_len,
196  const uint8_t *aad,
197  uint32_t aad_len,
198  const uint8_t *input,
199  uint8_t *output,
200  const uint8_t *tag,
201  uint32_t tag_len);
203 
207 typedef struct {
209  const uint32_t version;
211  const char *copyright;
213  hpm_stat_t (*run_bootloader)(void *arg);
215  const otp_driver_interface_t *otp_driver_if;
217  const xpi_driver_interface_t *xpi_driver_if;
219  const xpi_nor_driver_interface_t *xpi_nor_driver_if;
223  const sdp_driver_interface_t *sdp_driver_if;
225 
227 #define ROM_API_TABLE_ROOT ((const bootloader_api_table_t *)0x2001FF00U)
228 
229 
230 #ifdef __cplusplus
231 extern "C" {
232 #endif
233 
234 /***********************************************************************************************************************
235  *
236  *
237  * Enter bootloader Wrapper
238  *
239  *
240  **********************************************************************************************************************/
241 
247 static inline hpm_stat_t rom_enter_bootloader(void *ctx)
248 {
249  return ROM_API_TABLE_ROOT->run_bootloader(ctx);
250 }
251 
252 /***********************************************************************************************************************
253  *
254  *
255  * XPI NOR Driver Wrapper
256  *
257  *
258  **********************************************************************************************************************/
259 
263 static inline void rom_xpi_nor_api_setup(void)
264 {
265  static const uint32_t s_setup_code[] = {
266  0x300027f3, 0xf6b36719, 0xe68100e7, 0x90738fd9, 0x80823007,
267  };
268  if (ROM_API_TABLE_ROOT->version == 0x56010000UL) {
269  typedef union {
270  void (*callback)(void);
271  const uint32_t *buffer;
272  } api_setup_entry_t;
273  volatile api_setup_entry_t entry;
274  entry.buffer = &s_setup_code[0];
275  entry.callback();
276  }
277 }
278 
286 ATTR_RAMFUNC
288  xpi_nor_config_t *nor_cfg,
289  xpi_nor_config_option_t *cfg_option)
290 {
292  hpm_stat_t status;
293  status = ROM_API_TABLE_ROOT->xpi_nor_driver_if->get_config(base, nor_cfg, cfg_option);
294  fencei();
295  return status;
296 }
297 
304 ATTR_RAMFUNC
305 static inline hpm_stat_t rom_xpi_nor_init(XPI_Type *base, xpi_nor_config_t *nor_config)
306 {
307  hpm_stat_t status;
308  status = ROM_API_TABLE_ROOT->xpi_nor_driver_if->init(base, nor_config);
309  fencei();
310  return status;
311 }
312 
322 ATTR_RAMFUNC
324  xpi_xfer_channel_t channel,
325  const xpi_nor_config_t *nor_config,
326  uint32_t start,
327  uint32_t length)
328 {
329  hpm_stat_t status = ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase(base, channel, nor_config, start, length);
330  fencei();
331  return status;
332 }
333 
342 ATTR_RAMFUNC
344  xpi_xfer_channel_t channel,
345  const xpi_nor_config_t *nor_config,
346  uint32_t start)
347 {
348  hpm_stat_t status = ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase_sector(base, channel, nor_config, start);
349  fencei();
350  return status;
351 }
352 
362  xpi_xfer_channel_t channel,
363  const xpi_nor_config_t *nor_config,
364  uint32_t start)
365 {
366  return ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase_sector_nonblocking(base, channel, nor_config, start);
367 }
368 
377 ATTR_RAMFUNC
379  xpi_xfer_channel_t channel,
380  const xpi_nor_config_t *nor_config,
381  uint32_t start)
382 {
383  hpm_stat_t status = ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase_block(base, channel, nor_config, start);
384  fencei();
385  return status;
386 }
387 
396 ATTR_RAMFUNC
398  xpi_xfer_channel_t channel,
399  const xpi_nor_config_t *nor_config,
400  uint32_t start)
401 {
402  return ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase_block_nonblocking(base, channel, nor_config, start);
403 }
404 
412 ATTR_RAMFUNC
414  xpi_xfer_channel_t channel,
415  const xpi_nor_config_t *nor_config)
416 {
417  hpm_stat_t status = ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase_chip(base, channel, nor_config);
418  fencei();
419  return status;
420 }
421 
429 ATTR_RAMFUNC
431  xpi_xfer_channel_t channel,
432  const xpi_nor_config_t *nor_config)
433 {
434  return ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase_chip_nonblocking(base, channel, nor_config);
435 }
436 
447 ATTR_RAMFUNC
449  xpi_xfer_channel_t channel,
450  const xpi_nor_config_t *nor_config,
451  const uint32_t *src,
452  uint32_t dst_addr,
453  uint32_t length)
454 {
455  hpm_stat_t status = ROM_API_TABLE_ROOT->xpi_nor_driver_if->program(base, channel, nor_config, src, dst_addr, length);
456  fencei();
457  return status;
458 }
459 
470 ATTR_RAMFUNC
472  xpi_xfer_channel_t channel,
473  const xpi_nor_config_t *nor_config,
474  const uint32_t *src,
475  uint32_t dst_addr,
476  uint32_t length)
477 {
478  return ROM_API_TABLE_ROOT->xpi_nor_driver_if
479  ->page_program_nonblocking(base, channel, nor_config, src, dst_addr, length);
480 }
481 
493  xpi_xfer_channel_t channel,
494  const xpi_nor_config_t *nor_config,
495  uint32_t *dst,
496  uint32_t start,
497  uint32_t length)
498 {
499  return ROM_API_TABLE_ROOT->xpi_nor_driver_if->read(base, channel, nor_config, dst, start, length);
500 }
501 
509 ATTR_RAMFUNC
511  xpi_nor_config_t *config,
512  xpi_nor_config_option_t *cfg_option)
513 {
515  hpm_stat_t status;
516  status = ROM_API_TABLE_ROOT->xpi_nor_driver_if->auto_config(base, config, cfg_option);
517  fencei();
518  return status;
519 }
520 
530  xpi_nor_config_t *nor_cfg,
531  uint32_t property_id,
532  uint32_t *value)
533 {
534  return ROM_API_TABLE_ROOT->xpi_nor_driver_if->get_property(base, nor_cfg, property_id, value);
535 }
536 
548  const xpi_nor_config_t *nor_config, uint32_t addr,
549  uint16_t *out_status)
550 {
551  return ROM_API_TABLE_ROOT->xpi_nor_driver_if->get_status(base, channel, nor_config, addr, out_status);
552 }
553 
563 ATTR_RAMFUNC
564 static inline bool rom_xpi_nor_remap_config(XPI_Type *base, uint32_t start, uint32_t len, uint32_t offset)
565 {
566  if ((base != HPM_XPI0) || ((start & 0xFFF) != 0) || ((len & 0xFFF) != 0)
567  || ((offset & 0xFFF) != 0)) {
568  return false;
569  }
570  static const uint8_t k_mc_xpi_remap_config[] = {
571  0x2e, 0x96, 0x23, 0x22, 0xc5, 0x42, 0x23, 0x24,
572  0xd5, 0x42, 0x93, 0xe5, 0x15, 0x00, 0x23, 0x20,
573  0xb5, 0x42, 0x05, 0x45, 0x82, 0x80,
574  };
575  typedef bool (*remap_config_cb_t)(XPI_Type *, uint32_t, uint32_t, uint32_t);
576  remap_config_cb_t cb = (remap_config_cb_t) &k_mc_xpi_remap_config;
577  bool result = cb(base, start, len, offset);
578  ROM_API_TABLE_ROOT->xpi_driver_if->software_reset(base);
579  fencei();
580  return result;
581 }
582 
587 ATTR_RAMFUNC
588 static inline void rom_xpi_nor_remap_disable(XPI_Type *base)
589 {
590  static const uint8_t k_mc_xpi_remap_disable[] = {
591  0x83, 0x27, 0x05, 0x42, 0xf9, 0x9b, 0x23, 0x20,
592  0xf5, 0x42, 0x82, 0x80,
593  };
594  typedef void (*remap_disable_cb_t)(XPI_Type *);
595  remap_disable_cb_t cb = (remap_disable_cb_t) &k_mc_xpi_remap_disable;
596  cb(base);
597  fencei();
598 }
599 
607 ATTR_RAMFUNC
608 static inline bool rom_xpi_nor_is_remap_enabled(XPI_Type *base)
609 {
610  static const uint8_t k_mc_xpi_remap_enabled[] = {
611  0x03, 0x25, 0x05, 0x42, 0x05, 0x89, 0x82, 0x80,
612  };
613  typedef bool (*remap_chk_cb_t)(XPI_Type *);
614  remap_chk_cb_t chk_cb = (remap_chk_cb_t) &k_mc_xpi_remap_enabled;
615  return chk_cb(base);
616 }
617 
626 ATTR_RAMFUNC
627 static inline bool rom_xpi_nor_exip_region_config(XPI_Type *base, uint32_t index, exip_region_param_t *param)
628 {
629  if (base != HPM_XPI0) {
630  return false;
631  }
632  static const uint8_t k_mc_exip_region_config[] = {
633  0x18, 0x4a, 0x9a, 0x05, 0x2e, 0x95, 0x85, 0x67,
634  0xaa, 0x97, 0x23, 0xa4, 0xe7, 0xd0, 0x4c, 0x4a,
635  0x14, 0x42, 0x58, 0x42, 0x23, 0xa6, 0xb7, 0xd0,
636  0x4c, 0x46, 0x36, 0x97, 0x13, 0x77, 0x07, 0xc0,
637  0x23, 0xa2, 0xb7, 0xd0, 0x0c, 0x46, 0x13, 0x67,
638  0x37, 0x00, 0x05, 0x45, 0x23, 0xa0, 0xb7, 0xd0,
639  0x0c, 0x4e, 0x23, 0xaa, 0xb7, 0xd0, 0x50, 0x4e,
640  0x23, 0xa8, 0xc7, 0xd0, 0x23, 0xac, 0xd7, 0xd0,
641  0x23, 0xae, 0xe7, 0xd0, 0x82, 0x80,
642  };
643  typedef void (*exip_region_config_cb_t)(XPI_Type *, uint32_t, exip_region_param_t *);
644  exip_region_config_cb_t cb = (exip_region_config_cb_t) &k_mc_exip_region_config;
645  cb(base, index, param);
646  ROM_API_TABLE_ROOT->xpi_driver_if->software_reset(base);
647  fencei();
648  return true;
649 }
650 
656 ATTR_RAMFUNC
657 static inline void rom_xpi_nor_exip_region_disable(XPI_Type *base, uint32_t index)
658 {
659  static const uint8_t k_mc_exip_region_disable[] = {
660  0x9a, 0x05, 0x2e, 0x95, 0x85, 0x67, 0xaa, 0x97,
661  0x03, 0xa7, 0xc7, 0xd1, 0x75, 0x9b, 0x23, 0xae,
662  0xe7, 0xd0, 0x82, 0x80
663  };
664  typedef void (*exip_region_disable_cb_t)(XPI_Type *, uint32_t);
665  exip_region_disable_cb_t cb = (exip_region_disable_cb_t) &k_mc_exip_region_disable;
666  cb(base, index);
667  ROM_API_TABLE_ROOT->xpi_driver_if->software_reset(base);
668  fencei();
669 }
670 
675 ATTR_RAMFUNC
676 static inline void rom_xpi_nor_exip_enable(XPI_Type *base)
677 {
678  static const uint8_t k_mc_exip_enable[] = {
679  0x85, 0x67, 0x3e, 0x95, 0x83, 0x27, 0x05, 0xc0,
680  0x37, 0x07, 0x00, 0x80, 0xd9, 0x8f, 0x23, 0x20,
681  0xf5, 0xc0, 0x82, 0x80
682  };
683  typedef void (*exip_enable_cb_t)(XPI_Type *);
684  exip_enable_cb_t cb = (exip_enable_cb_t) &k_mc_exip_enable;
685  cb(base);
686 }
687 
692 ATTR_RAMFUNC
693 static inline void rom_xpi_nor_exip_disable(XPI_Type *base)
694 {
695  static const uint8_t k_mc_exip_disable[] = {
696  0x85, 0x67, 0x3e, 0x95, 0x83, 0x27, 0x05, 0xc0,
697  0x86, 0x07, 0x85, 0x83, 0x23, 0x20, 0xf5, 0xc0,
698  0x82, 0x80
699  };
700  typedef void (*exip_disable_cb_t)(XPI_Type *);
701  exip_disable_cb_t cb = (exip_disable_cb_t) &k_mc_exip_disable;
702  cb(base);
703  ROM_API_TABLE_ROOT->xpi_driver_if->software_reset(base);
704  fencei();
705 }
706 
707 /***********************************************************************************************************************
708  *
709  *
710  * XPI RAM Driver Wrapper
711  *
712  *
713  **********************************************************************************************************************/
722  xpi_ram_config_t *ram_cfg,
723  xpi_ram_config_option_t *cfg_option)
724 {
725  return ROM_API_TABLE_ROOT->xpi_ram_driver_if->get_config(base, ram_cfg, cfg_option);
726 }
727 
734 static inline hpm_stat_t rom_xpi_ram_init(XPI_Type *base, xpi_ram_config_t *ram_cfg)
735 {
736  return ROM_API_TABLE_ROOT->xpi_ram_driver_if->init(base, ram_cfg);
737 }
738 
739 /***********************************************************************************************************************
740  *
741  *
742  * SDP Driver Wrapper
743  *
744  *
745  **********************************************************************************************************************/
749 static inline void rom_sdp_init(void)
750 {
751  ROM_API_TABLE_ROOT->sdp_driver_if->sdp_ip_init();
752 }
753 
757 static inline void rom_sdp_deinit(void)
758 {
759  ROM_API_TABLE_ROOT->sdp_driver_if->sdp_ip_deinit();
760 }
761 
771  const uint8_t *key,
772  sdp_aes_key_bits_t key_bits,
773  uint32_t key_idx)
774 {
775  return ROM_API_TABLE_ROOT->sdp_driver_if->aes_set_key(aes_ctx, key, key_bits, key_idx);
776 }
777 
788  sdp_aes_op_t op,
789  uint32_t len,
790  const uint8_t *in,
791  uint8_t *out)
792 {
793  return ROM_API_TABLE_ROOT->sdp_driver_if->aes_crypt_ecb(aes_ctx, op, len, in, out);
794 }
795 
807  sdp_aes_op_t op,
808  uint32_t length,
809  uint8_t iv[16],
810  const uint8_t *in,
811  uint8_t *out)
812 {
813  return ROM_API_TABLE_ROOT->sdp_driver_if->aes_crypt_cbc(aes_ctx, op, length, iv, in, out);
814 }
815 
824 static inline hpm_stat_t rom_sdp_sm4_set_key(sdp_sm4_ctx_t *sm4_ctx,
825  const uint8_t *key,
826  sdp_sm4_key_bits_t key_bits,
827  uint32_t key_idx)
828 {
829  return ROM_API_TABLE_ROOT->sdp_driver_if->sm4_set_key(sm4_ctx, key, key_bits, key_idx);
830 }
831 
841 static inline hpm_stat_t rom_sdp_sm4_crypt_ecb(sdp_sm4_ctx_t *sm4_ctx,
842  sdp_sm4_op_t op,
843  uint32_t len,
844  const uint8_t *in,
845  uint8_t *out)
846 {
847  return ROM_API_TABLE_ROOT->sdp_driver_if->sm4_crypt_ecb(sm4_ctx, op, len, in, out);
848 }
849 
860 static inline hpm_stat_t rom_sdp_sm4_crypt_cbc(sdp_sm4_ctx_t *sm4_ctx,
861  sdp_sm4_op_t op,
862  uint32_t length,
863  uint8_t iv[16],
864  const uint8_t *in,
865  uint8_t *out)
866 {
867  return ROM_API_TABLE_ROOT->sdp_driver_if->sm4_crypt_cbc(sm4_ctx, op, length, iv, in, out);
868 }
869 
877 {
878  return ROM_API_TABLE_ROOT->sdp_driver_if->hash_init(hash_ctx, alg);
879 }
880 
888 static inline hpm_stat_t rom_sdp_hash_update(sdp_hash_ctx_t *hash_ctx, const uint8_t *data, uint32_t length)
889 {
890  return ROM_API_TABLE_ROOT->sdp_driver_if->hash_update(hash_ctx, data, length);
891 }
892 
899 static inline hpm_stat_t rom_sdp_hash_finish(sdp_hash_ctx_t *hash_ctx, uint8_t *digest)
900 {
901  return ROM_API_TABLE_ROOT->sdp_driver_if->hash_finish(hash_ctx, digest);
902 }
903 
912 static inline hpm_stat_t rom_sdp_memcpy(sdp_dma_ctx_t *dma_ctx, void *dst, const void *src, uint32_t length)
913 {
914  return ROM_API_TABLE_ROOT->sdp_driver_if->memcpy(dma_ctx, dst, src, length);
915 }
916 
925 static inline hpm_stat_t rom_sdp_memset(sdp_dma_ctx_t *dma_ctx, void *dst, uint8_t pattern, uint32_t length)
926 {
927  return ROM_API_TABLE_ROOT->sdp_driver_if->memset(dma_ctx, dst, pattern, length);
928 }
929 
930 #ifdef __cplusplus
931 }
932 #endif
933 
939 #endif /* HPM_ROMAPI_H */
static hpm_stat_t rom_sdp_memset(sdp_dma_ctx_t *dma_ctx, void *dst, uint8_t pattern, uint32_t length)
SDP memset operation.
Definition: hpm_romapi.h:925
static hpm_stat_t rom_sdp_aes_crypt_cbc(sdp_aes_ctx_t *aes_ctx, sdp_aes_op_t op, uint32_t length, uint8_t iv[16], const uint8_t *in, uint8_t *out)
SDP AES CBC crypto operation(Encrypt or Decrypt)
Definition: hpm_romapi.h:806
static ATTR_RAMFUNC hpm_stat_t rom_xpi_nor_auto_config(XPI_Type *base, xpi_nor_config_t *config, xpi_nor_config_option_t *cfg_option)
Automatically configure XPI NOR based on cfg_option.
Definition: hpm_romapi.h:510
static ATTR_RAMFUNC hpm_stat_t rom_xpi_nor_init(XPI_Type *base, xpi_nor_config_t *nor_config)
Initialize XPI NOR based on nor_config.
Definition: hpm_romapi.h:305
static hpm_stat_t rom_xpi_nor_read(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t *dst, uint32_t start, uint32_t length)
Read data from specified FLASH address.
Definition: hpm_romapi.h:492
static hpm_stat_t rom_sdp_sm4_crypt_cbc(sdp_sm4_ctx_t *sm4_ctx, sdp_sm4_op_t op, uint32_t length, uint8_t iv[16], const uint8_t *in, uint8_t *out)
SDP SM4 CBC crypto operation(Encrypt or Decrypt)
Definition: hpm_romapi.h:860
static ATTR_RAMFUNC hpm_stat_t rom_xpi_nor_erase_chip_nonblocking(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config)
Erase the whole FLASH in non-blocking way.
Definition: hpm_romapi.h:430
static ATTR_RAMFUNC hpm_stat_t rom_xpi_nor_erase_chip(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config)
Erase the whole FLASH in blocking way.
Definition: hpm_romapi.h:413
static hpm_stat_t rom_sdp_memcpy(sdp_dma_ctx_t *dma_ctx, void *dst, const void *src, uint32_t length)
SDP memcpy operation.
Definition: hpm_romapi.h:912
static ATTR_RAMFUNC hpm_stat_t rom_xpi_nor_erase_block(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t start)
Erase specified FLASH blcok in blocking way.
Definition: hpm_romapi.h:378
static ATTR_RAMFUNC bool rom_xpi_nor_remap_config(XPI_Type *base, uint32_t start, uint32_t len, uint32_t offset)
Configure the XPI Address Remapping Logic.
Definition: hpm_romapi.h:564
static hpm_stat_t rom_sdp_sm4_crypt_ecb(sdp_sm4_ctx_t *sm4_ctx, sdp_sm4_op_t op, uint32_t len, const uint8_t *in, uint8_t *out)
SDP SM4 ECB crypto operation(Encrypt or Decrypt)
Definition: hpm_romapi.h:841
static ATTR_RAMFUNC bool rom_xpi_nor_exip_region_config(XPI_Type *base, uint32_t index, exip_region_param_t *param)
Configure Specified EXiP Region.
Definition: hpm_romapi.h:627
static ATTR_RAMFUNC void rom_xpi_nor_exip_enable(XPI_Type *base)
Enable global EXiP logic.
Definition: hpm_romapi.h:676
static hpm_stat_t rom_sdp_sm4_set_key(sdp_sm4_ctx_t *sm4_ctx, const uint8_t *key, sdp_sm4_key_bits_t key_bits, uint32_t key_idx)
Set SM4 key to SDP.
Definition: hpm_romapi.h:824
static void rom_sdp_init(void)
Initialize SDP IP.
Definition: hpm_romapi.h:749
static ATTR_RAMFUNC hpm_stat_t rom_xpi_nor_page_program_nonblocking(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, const uint32_t *src, uint32_t dst_addr, uint32_t length)
Page-Program data to specified FLASH address in non-blocking way.
Definition: hpm_romapi.h:471
static ATTR_RAMFUNC void rom_xpi_nor_exip_region_disable(XPI_Type *base, uint32_t index)
Disable EXiP Feature on specified EXiP Region.
Definition: hpm_romapi.h:657
static hpm_stat_t rom_xpi_nor_erase_sector_nonblocking(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t start)
Erase specified FLASH sector in non-blocking way.
Definition: hpm_romapi.h:361
static ATTR_RAMFUNC hpm_stat_t rom_xpi_nor_erase(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t start, uint32_t length)
Erase specified FLASH region.
Definition: hpm_romapi.h:323
static hpm_stat_t rom_enter_bootloader(void *ctx)
Eneter specified Boot mode.
Definition: hpm_romapi.h:247
static ATTR_RAMFUNC void rom_xpi_nor_remap_disable(XPI_Type *base)
Disable XPI Remapping logic.
Definition: hpm_romapi.h:588
static hpm_stat_t rom_sdp_aes_set_key(sdp_aes_ctx_t *aes_ctx, const uint8_t *key, sdp_aes_key_bits_t key_bits, uint32_t key_idx)
Set AES key to SDP.
Definition: hpm_romapi.h:770
static void rom_sdp_deinit(void)
De-initialize SDP IP.
Definition: hpm_romapi.h:757
static hpm_stat_t rom_xpi_nor_get_status(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t addr, uint16_t *out_status)
Return the status register value on XPI NOR FLASH.
Definition: hpm_romapi.h:547
static ATTR_RAMFUNC hpm_stat_t rom_xpi_nor_erase_block_nonblocking(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t start)
Erase specified FLASH blcok in non-blocking way.
Definition: hpm_romapi.h:397
static ATTR_RAMFUNC void rom_xpi_nor_exip_disable(XPI_Type *base)
Disable global EXiP logic.
Definition: hpm_romapi.h:693
static ATTR_RAMFUNC hpm_stat_t rom_xpi_nor_program(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, const uint32_t *src, uint32_t dst_addr, uint32_t length)
Program data to specified FLASH address in blocking way.
Definition: hpm_romapi.h:448
static ATTR_RAMFUNC bool rom_xpi_nor_is_remap_enabled(XPI_Type *base)
Check whether XPI Remapping is enabled.
Definition: hpm_romapi.h:608
static hpm_stat_t rom_sdp_hash_finish(sdp_hash_ctx_t *hash_ctx, uint8_t *digest)
HASH finialize.
Definition: hpm_romapi.h:899
static hpm_stat_t rom_sdp_hash_update(sdp_hash_ctx_t *hash_ctx, const uint8_t *data, uint32_t length)
HASH Update.
Definition: hpm_romapi.h:888
static hpm_stat_t rom_sdp_aes_crypt_ecb(sdp_aes_ctx_t *aes_ctx, sdp_aes_op_t op, uint32_t len, const uint8_t *in, uint8_t *out)
SDP AES ECB crypto operation(Encrypt or Decrypt)
Definition: hpm_romapi.h:787
static hpm_stat_t rom_xpi_nor_get_property(XPI_Type *base, xpi_nor_config_t *nor_cfg, uint32_t property_id, uint32_t *value)
Get XPI NOR properties.
Definition: hpm_romapi.h:529
static ATTR_RAMFUNC hpm_stat_t rom_xpi_nor_get_config(XPI_Type *base, xpi_nor_config_t *nor_cfg, xpi_nor_config_option_t *cfg_option)
Get XPI NOR configuration via cfg_option.
Definition: hpm_romapi.h:287
static hpm_stat_t rom_sdp_hash_init(sdp_hash_ctx_t *hash_ctx, sdp_hash_alg_t alg)
HASH initialization.
Definition: hpm_romapi.h:876
static ATTR_RAMFUNC hpm_stat_t rom_xpi_nor_erase_sector(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t start)
Erase specified FLASH sector in blocking way.
Definition: hpm_romapi.h:343
static void init(hpm_panel_t *panel)
Definition: cc10128007.c:86
uint32_t hpm_stat_t
Definition: hpm_common.h:126
otp_region_t
OTP region definitions.
Definition: hpm_otp_drv.h:24
otp_lock_option_t
OTP lock options.
Definition: hpm_otp_drv.h:34
static void rom_xpi_nor_api_setup(void)
Setup API Runtime environment on demand.
Definition: hpm_romapi.h:263
#define HPM_XPI0
Definition: hpm_romapi.h:28
#define ROM_API_TABLE_ROOT
Definition: hpm_romapi.h:227
static hpm_stat_t rom_xpi_ram_get_config(XPI_Type *base, xpi_ram_config_t *ram_cfg, xpi_ram_config_option_t *cfg_option)
Get XPI RAM configuration based on cfg_option.
Definition: hpm_romapi.h:721
static hpm_stat_t rom_xpi_ram_init(XPI_Type *base, xpi_ram_config_t *ram_cfg)
Initialize XPI RAM.
Definition: hpm_romapi.h:734
sdp_crypto_op_t
Crypto operation option.
Definition: hpm_sdp_drv.h:44
sdp_crypto_key_bits_t
SDP AES key bit options.
Definition: hpm_sdp_drv.h:29
sdp_hash_alg_t
SDP HASH algorithm definitions.
Definition: hpm_sdp_drv.h:102
xpi_xfer_channel_t
XPI Transfer Channel type definitions.
Definition: hpm_romapi_xpi_def.h:53
uint32_t XPI_Type
XPI_Type definitions for.
Definition: hpm_romapi_xpi_def.h:22
#define fencei()
execute fence.i
Definition: riscv_core.h:88
Bootloader API table.
Definition: hpm_romapi.h:127
const xpi_ram_driver_interface_t * xpi_ram_driver_if
Definition: hpm_romapi.h:221
Definition: hpm_romapi.h:52
OTP driver interface.
Definition: hpm_romapi.h:82
SDP AES context structure.
Definition: hpm_sdp_drv.h:159
SDP DMA context.
Definition: hpm_sdp_drv.h:179
SDP API interface.
Definition: hpm_romapi.h:127
SDP HASH context.
Definition: hpm_sdp_drv.h:186
XPI driver interface.
Definition: hpm_romapi_xpi_def.h:225
XPI NOR configuration option The ROM SW can detect the FLASH configuration based on the following str...
Definition: hpm_romapi_xpi_nor_def.h:136
XPI NOR configuration structure.
Definition: hpm_romapi_xpi_nor_def.h:261
XPI NOR driver interface.
Definition: hpm_romapi_xpi_nor_def.h:308
XPI RAM configuration option The ROM SW can detect the FLASH configuration based on the following str...
Definition: hpm_romapi_xpi_ram_def.h:39
XPI RAM configuration structure.
Definition: hpm_romapi_xpi_ram_def.h:152
XPI RAM driver interface.
Definition: hpm_romapi.h:99
uint32_t version
Definition: hpm_romapi.h:101
Enter Bootloader API argument.
Definition: hpm_romapi.h:41