HPM SDK
HPMicro Software Development Kit
hpm_romapi.h
Go to the documentation of this file.
1 /*
2  * Copyright (c) 2021-2024 HPMicro
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  *
6  */
7 
8 #ifndef HPM_ROMAPI_H
9 #define HPM_ROMAPI_H
10 
17 #include "hpm_common.h"
18 #include "hpm_otp_drv.h"
19 #include "hpm_romapi_xpi_def.h"
20 #include "hpm_romapi_xpi_soc_def.h"
21 #include "hpm_romapi_xpi_nor_def.h"
22 #include "hpm_romapi_xpi_ram_def.h"
23 #include "hpm_sdp_drv.h"
24 
25 /* XPI0 base address */
26 #define HPM_XPI0_BASE (0xF3040000UL)
27 /* XPI0 base pointer */
28 #define HPM_XPI0 ((XPI_Type *) HPM_XPI0_BASE)
29 /* XPI1 base address */
30 #define HPM_XPI1_BASE (0xF3044000UL)
31 /* XPI1 base pointer */
32 #define HPM_XPI1 ((XPI_Type *) HPM_XPI1_BASE)
35 /***********************************************************************************************************************
36  *
37  *
38  * Definitions
39  *
40  *
41  **********************************************************************************************************************/
45 typedef union {
46  uint32_t U;
47  struct {
48  uint32_t index: 8;
49  uint32_t peripheral: 8;
50  uint32_t src: 8;
51  uint32_t tag: 8;
52  };
54 
55 /*EXiP Region Parameter */
56 typedef struct {
57  uint32_t start;
58  uint32_t len;
59  uint8_t key[16];
60  uint8_t ctr[8];
62 
63 #define API_BOOT_TAG (0xEBU)
64 #define API_BOOT_SRC_OTP (0U)
65 #define API_BOOT_SRC_PRIMARY (1U)
66 #define API_BOOT_SRC_SERIAL_BOOT (2U)
67 #define API_BOOT_SRC_ISP (3U)
68 #define API_BOOT_PERIPH_AUTO (0U)
69 #define API_BOOT_PERIPH_UART (1U)
70 #define API_BOOT_PERIPH_USBHID (2U)
72 typedef struct {
73  uint32_t _internal[138];
75 
76 
77 #define SM4_ENCRYPT 1
78 #define SM4_DECRYPT 0
79 
80 typedef struct {
81  uint32_t mode;
82  uint32_t _internal[116];
84 
88 typedef struct {
90  uint32_t version;
92  void (*init)(void);
94  void (*deinit)(void);
96  uint32_t (*read_from_shadow)(uint32_t addr);
98  uint32_t (*read_from_ip)(uint32_t addr);
100  hpm_stat_t (*program)(uint32_t addr, const uint32_t *src, uint32_t num_of_words);
102  hpm_stat_t (*reload)(otp_region_t region);
104  hpm_stat_t (*lock)(uint32_t addr, otp_lock_option_t lock_option);
106  hpm_stat_t (*lock_shadow)(uint32_t addr, otp_lock_option_t lock_option);
108  hpm_stat_t (*set_configurable_region)(uint32_t start, uint32_t num_of_words);
110  hpm_stat_t (*write_shadow_register)(uint32_t addr, uint32_t data);
112 
116 typedef struct {
118  uint32_t version;
119 
121  hpm_stat_t (*get_config)(XPI_Type *base, xpi_ram_config_t *ram_cfg, xpi_ram_config_option_t *cfg_option);
122 
124  hpm_stat_t (*init)(XPI_Type *base, xpi_ram_config_t *ram_cfg);
126 
130 typedef struct {
132  uint32_t version;
134  hpm_stat_t (*sdp_ip_init)(void);
136  hpm_stat_t (*sdp_ip_deinit)(void);
138  hpm_stat_t (*aes_set_key)(sdp_aes_ctx_t *aes_ctx, const uint8_t *key, sdp_aes_key_bits_t keybits, uint32_t key_idx);
140  hpm_stat_t (*aes_crypt_ecb)(sdp_aes_ctx_t *aes_ctx, sdp_aes_op_t op, uint32_t len, const uint8_t *in, uint8_t *out);
142  hpm_stat_t (*aes_crypt_cbc)(sdp_aes_ctx_t *aes_ctx,
143  sdp_aes_op_t op,
144  uint32_t length,
145  uint8_t iv[16],
146  const uint8_t *input,
147  uint8_t *output);
149  hpm_stat_t
150  (*aes_crypt_ctr)(sdp_aes_ctx_t *aes_ctx, uint8_t *nonce_ctr, uint8_t *input, uint8_t *output, uint32_t length);
152  hpm_stat_t (*aes_ccm_gen_enc)(sdp_aes_ctx_t *aes_ctx,
153  uint32_t input_len,
154  const uint8_t *nonce,
155  uint32_t nonce_len,
156  const uint8_t *aad,
157  uint32_t aad_len,
158  const uint8_t *input,
159  uint8_t *output,
160  uint8_t *tag,
161  uint32_t tag_len);
163  hpm_stat_t (*aes_ccm_dec_verify)(sdp_aes_ctx_t *aes_ctx,
164  uint32_t input_len,
165  const uint8_t *nonce,
166  uint32_t nonce_len,
167  const uint8_t *aad,
168  uint32_t aad_len,
169  const uint8_t *input,
170  uint8_t *output,
171  const uint8_t *tag,
172  uint32_t tag_len);
174  hpm_stat_t (*memcpy)(sdp_dma_ctx_t *dma_ctx, void *dst, const void *src, uint32_t length);
176  hpm_stat_t (*memset)(sdp_dma_ctx_t *dma_ctx, void *dst, uint8_t pattern, uint32_t length);
178  hpm_stat_t (*hash_init)(sdp_hash_ctx_t *hash_ctx, sdp_hash_alg_t alg);
180  hpm_stat_t (*hash_update)(sdp_hash_ctx_t *hash_ctx, const uint8_t *data, uint32_t length);
182  hpm_stat_t (*hash_finish)(sdp_hash_ctx_t *hash_ctx, uint8_t *digest);
184 
185 typedef struct {
187  uint32_t version;
191  hpm_stat_t (*update)(sm3_context_t *ctx, const void *input, uint32_t len);
193  hpm_stat_t (*finalize)(sm3_context_t *ctx, uint8_t output[32]);
195 
196 typedef struct {
198  uint32_t version;
200  void (*setkey_enc)(sm4_context_t *ctx, const uint8_t key[16]);
202  void (*setkey_dec)(sm4_context_t *ctx, const uint8_t key[16]);
204  hpm_stat_t (*crypt_ecb)(sm4_context_t *ctx, uint32_t mode, uint32_t length, const uint8_t *input, uint8_t *output);
206  hpm_stat_t (*crypt_cbc)(sm4_context_t *ctx, uint32_t mode, uint32_t length, const uint8_t iv[16],
207  const uint8_t *input, uint8_t *output);
209  hpm_stat_t (*crypt_ctr)(sm4_context_t *ctx, uint8_t *nonce_counter, const uint8_t *input,
210  uint8_t *output, uint32_t length);
212  hpm_stat_t (*ccm_gen_enc)(sm4_context_t *ctx, uint32_t input_len, const uint8_t *iv,
213  uint32_t iv_len, const uint8_t *aad, uint32_t aad_len, const uint8_t *input,
214  uint8_t *output, uint8_t *tag, uint32_t tag_len);
216  hpm_stat_t (*ccm_dec_verify)(sm4_context_t *ctx, uint32_t input_len, const uint8_t *iv,
217  uint32_t iv_len, const uint8_t *aad, uint32_t aad_len, const uint8_t *input,
218  uint8_t *output, const uint8_t *tag, uint32_t tag_len);
220 
221 
225 typedef struct {
227  const uint32_t version;
229  const char *copyright;
231  hpm_stat_t (*run_bootloader)(void *arg);
233  const otp_driver_interface_t *otp_driver_if;
235  const xpi_driver_interface_t *xpi_driver_if;
237  const xpi_nor_driver_interface_t *xpi_nor_driver_if;
239  const xpi_ram_driver_interface_t *xpi_ram_driver_if;
241  const sdp_driver_interface_t *sdp_driver_if;
242  const uint32_t reserved0;
243  const sm3_api_interface_t *sm3_api_if; /* SM3 driver interface address */
244  const sm4_api_interface_t *sm4_api_if; /* SM4 driver itnerface address */
246 
248 #define ROM_API_TABLE_ROOT ((const bootloader_api_table_t*)0x2001FF00U)
249 
250 
251 #ifdef __cplusplus
252 extern "C" {
253 #endif
254 
255 /***********************************************************************************************************************
256  *
257  *
258  * Enter bootloader Wrapper
259  *
260  *
261  **********************************************************************************************************************/
262 
268 static inline hpm_stat_t rom_enter_bootloader(void *ctx)
269 {
270  return ROM_API_TABLE_ROOT->run_bootloader(ctx);
271 }
272 
273 /***********************************************************************************************************************
274  *
275  *
276  * XPI NOR Driver Wrapper
277  *
278  *
279  **********************************************************************************************************************/
280 
288 ATTR_RAMFUNC
290  xpi_nor_config_option_t *cfg_option)
291 {
292  hpm_stat_t status;
293  status = ROM_API_TABLE_ROOT->xpi_nor_driver_if->get_config(base, nor_cfg, cfg_option);
294  fencei();
295  return status;
296 }
297 
304 ATTR_RAMFUNC
305 static inline hpm_stat_t rom_xpi_nor_init(XPI_Type *base, xpi_nor_config_t *nor_config)
306 {
307  hpm_stat_t status;
308  status = ROM_API_TABLE_ROOT->xpi_nor_driver_if->init(base, nor_config);
309  fencei();
310  return status;
311 }
312 
322 ATTR_RAMFUNC
324  xpi_xfer_channel_t channel,
325  const xpi_nor_config_t *nor_config,
326  uint32_t start,
327  uint32_t length)
328 {
329  hpm_stat_t status = ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase(base, channel, nor_config, start, length);
330  fencei();
331  return status;
332 }
333 
342 ATTR_RAMFUNC
344  xpi_xfer_channel_t channel,
345  const xpi_nor_config_t *nor_config,
346  uint32_t start)
347 {
348  hpm_stat_t status = ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase_sector(base, channel, nor_config, start);
349  fencei();
350  return status;
351 }
352 
361 ATTR_RAMFUNC
363  xpi_xfer_channel_t channel,
364  const xpi_nor_config_t *nor_config,
365  uint32_t start)
366 {
367  return ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase_sector_nonblocking(base, channel, nor_config, start);
368 }
369 
378 ATTR_RAMFUNC
380  xpi_xfer_channel_t channel,
381  const xpi_nor_config_t *nor_config,
382  uint32_t start)
383 {
384  hpm_stat_t status = ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase_block(base, channel, nor_config, start);
385  fencei();
386  return status;
387 }
388 
397 ATTR_RAMFUNC
399  xpi_xfer_channel_t channel,
400  const xpi_nor_config_t *nor_config,
401  uint32_t start)
402 {
403  return ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase_block_nonblocking(base, channel, nor_config, start);
404 }
405 
413 ATTR_RAMFUNC
415  xpi_xfer_channel_t channel,
416  const xpi_nor_config_t *nor_config)
417 {
418  hpm_stat_t status = ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase_chip(base, channel, nor_config);
419  fencei();
420  return status;
421 }
422 
430 ATTR_RAMFUNC
432  xpi_xfer_channel_t channel,
433  const xpi_nor_config_t *nor_config)
434 {
435  hpm_stat_t status = ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase_chip_nonblocking(base, channel, nor_config);
436  fencei();
437  return status;
438 }
439 
450 ATTR_RAMFUNC
452  xpi_xfer_channel_t channel,
453  const xpi_nor_config_t *nor_config,
454  const uint32_t *src,
455  uint32_t dst_addr,
456  uint32_t length)
457 {
458  hpm_stat_t status = ROM_API_TABLE_ROOT->xpi_nor_driver_if->program(base, channel, nor_config, src, dst_addr, length);
459  fencei();
460  return status;
461 }
462 
473 ATTR_RAMFUNC
475  xpi_xfer_channel_t channel,
476  const xpi_nor_config_t *nor_config,
477  const uint32_t *src,
478  uint32_t dst_addr,
479  uint32_t length)
480 {
481  return ROM_API_TABLE_ROOT->xpi_nor_driver_if
482  ->page_program_nonblocking(base, channel, nor_config, src, dst_addr, length);
483 }
484 
496  xpi_xfer_channel_t channel,
497  const xpi_nor_config_t *nor_config,
498  uint32_t *dst,
499  uint32_t start,
500  uint32_t length)
501 {
502  return ROM_API_TABLE_ROOT->xpi_nor_driver_if->read(base, channel, nor_config, dst, start, length);
503 }
504 
512 ATTR_RAMFUNC
514  xpi_nor_config_option_t *cfg_option)
515 {
516  hpm_stat_t status;
517  status = ROM_API_TABLE_ROOT->xpi_nor_driver_if->auto_config(base, config, cfg_option);
518  fencei();
519  return status;
520 }
521 
531  xpi_nor_config_t *nor_cfg,
532  uint32_t property_id,
533  uint32_t *value)
534 {
535  return ROM_API_TABLE_ROOT->xpi_nor_driver_if->get_property(base, nor_cfg, property_id, value);
536 }
537 
549  xpi_xfer_channel_t channel,
550  const xpi_nor_config_t *nor_config,
551  uint32_t addr,
552  uint16_t *out_status)
553 {
554  return ROM_API_TABLE_ROOT->xpi_nor_driver_if->get_status(base, channel, nor_config, addr, out_status);
555 }
556 
566 ATTR_RAMFUNC
567 static inline bool rom_xpi_nor_remap_config(XPI_Type *base, uint32_t start, uint32_t len, uint32_t offset)
568 {
569  if (((base != HPM_XPI0) && (base != HPM_XPI1)) || ((start & 0xFFF) != 0) || ((len & 0xFFF) != 0)
570  || ((offset & 0xFFF) != 0)) {
571  return false;
572  }
573  static const uint8_t k_mc_xpi_remap_config[] = {
574  0x2e, 0x96, 0x23, 0x22, 0xc5, 0x42, 0x23, 0x24,
575  0xd5, 0x42, 0x93, 0xe5, 0x15, 0x00, 0x23, 0x20,
576  0xb5, 0x42, 0x05, 0x45, 0x82, 0x80,
577  };
578  typedef bool (*remap_config_cb_t)(XPI_Type *, uint32_t, uint32_t, uint32_t);
579  remap_config_cb_t cb = (remap_config_cb_t) &k_mc_xpi_remap_config;
580  bool result = cb(base, start, len, offset);
581  ROM_API_TABLE_ROOT->xpi_driver_if->software_reset(base);
582  fencei();
583  return result;
584 }
585 
590 ATTR_RAMFUNC
591 static inline void rom_xpi_nor_remap_disable(XPI_Type *base)
592 {
593  static const uint8_t k_mc_xpi_remap_disable[] = {
594  0x83, 0x27, 0x05, 0x42, 0xf9, 0x9b, 0x23, 0x20,
595  0xf5, 0x42, 0x82, 0x80,
596  };
597  typedef void (*remap_disable_cb_t)(XPI_Type *);
598  remap_disable_cb_t cb = (remap_disable_cb_t) &k_mc_xpi_remap_disable;
599  cb(base);
600  fencei();
601 }
602 
610 ATTR_RAMFUNC
611 static inline bool rom_xpi_nor_is_remap_enabled(XPI_Type *base)
612 {
613  static const uint8_t k_mc_xpi_remap_enabled[] = {
614  0x03, 0x25, 0x05, 0x42, 0x05, 0x89, 0x82, 0x80,
615  };
616  typedef bool (*remap_chk_cb_t)(XPI_Type *);
617  remap_chk_cb_t chk_cb = (remap_chk_cb_t) &k_mc_xpi_remap_enabled;
618  return chk_cb(base);
619 }
620 
629 ATTR_RAMFUNC
630 static inline bool rom_xpi_nor_exip_region_config(XPI_Type *base, uint32_t index, exip_region_param_t *param)
631 {
632  if (base != HPM_XPI0) {
633  return false;
634  }
635  static const uint8_t k_mc_exip_region_config[] = {
636  0x18, 0x4a, 0x9a, 0x05, 0x2e, 0x95, 0x85, 0x67,
637  0xaa, 0x97, 0x23, 0xa4, 0xe7, 0xd0, 0x4c, 0x4a,
638  0x14, 0x42, 0x58, 0x42, 0x23, 0xa6, 0xb7, 0xd0,
639  0x4c, 0x46, 0x36, 0x97, 0x13, 0x77, 0x07, 0xc0,
640  0x23, 0xa2, 0xb7, 0xd0, 0x0c, 0x46, 0x13, 0x67,
641  0x37, 0x00, 0x05, 0x45, 0x23, 0xa0, 0xb7, 0xd0,
642  0x0c, 0x4e, 0x23, 0xaa, 0xb7, 0xd0, 0x50, 0x4e,
643  0x23, 0xa8, 0xc7, 0xd0, 0x23, 0xac, 0xd7, 0xd0,
644  0x23, 0xae, 0xe7, 0xd0, 0x82, 0x80,
645  };
646  typedef void (*exip_region_config_cb_t)(XPI_Type *, uint32_t, exip_region_param_t *);
647  exip_region_config_cb_t cb = (exip_region_config_cb_t) &k_mc_exip_region_config;
648  cb(base, index, param);
649  ROM_API_TABLE_ROOT->xpi_driver_if->software_reset(base);
650  fencei();
651  return true;
652 }
653 
659 ATTR_RAMFUNC
660 static inline void rom_xpi_nor_exip_region_disable(XPI_Type *base, uint32_t index)
661 {
662  static const uint8_t k_mc_exip_region_disable[] = {
663  0x9a, 0x05, 0x2e, 0x95, 0x85, 0x67, 0xaa, 0x97,
664  0x03, 0xa7, 0xc7, 0xd1, 0x75, 0x9b, 0x23, 0xae,
665  0xe7, 0xd0, 0x82, 0x80
666  };
667  typedef void (*exip_region_disable_cb_t)(XPI_Type *, uint32_t);
668  exip_region_disable_cb_t cb = (exip_region_disable_cb_t) &k_mc_exip_region_disable;
669  cb(base, index);
670  ROM_API_TABLE_ROOT->xpi_driver_if->software_reset(base);
671  fencei();
672 }
673 
678 ATTR_RAMFUNC
679 static inline void rom_xpi_nor_exip_enable(XPI_Type *base)
680 {
681  static const uint8_t k_mc_exip_enable[] = {
682  0x85, 0x67, 0x3e, 0x95, 0x83, 0x27, 0x05, 0xc0,
683  0x37, 0x07, 0x00, 0x80, 0xd9, 0x8f, 0x23, 0x20,
684  0xf5, 0xc0, 0x82, 0x80
685  };
686  typedef void (*exip_enable_cb_t)(XPI_Type *);
687  exip_enable_cb_t cb = (exip_enable_cb_t) &k_mc_exip_enable;
688  cb(base);
689 }
690 
695 ATTR_RAMFUNC
696 static inline void rom_xpi_nor_exip_disable(XPI_Type *base)
697 {
698  static const uint8_t k_mc_exip_disable[] = {
699  0x85, 0x67, 0x3e, 0x95, 0x83, 0x27, 0x05, 0xc0,
700  0x86, 0x07, 0x85, 0x83, 0x23, 0x20, 0xf5, 0xc0,
701  0x82, 0x80
702  };
703  typedef void (*exip_disable_cb_t)(XPI_Type *);
704  exip_disable_cb_t cb = (exip_disable_cb_t) &k_mc_exip_disable;
705  cb(base);
706  ROM_API_TABLE_ROOT->xpi_driver_if->software_reset(base);
707  fencei();
708 }
709 
710 /***********************************************************************************************************************
711  *
712  *
713  * XPI RAM Driver Wrapper
714  *
715  *
716  **********************************************************************************************************************/
725  xpi_ram_config_t *ram_cfg,
726  xpi_ram_config_option_t *cfg_option)
727 {
728  return ROM_API_TABLE_ROOT->xpi_ram_driver_if->get_config(base, ram_cfg, cfg_option);
729 }
730 
737 static inline hpm_stat_t rom_xpi_ram_init(XPI_Type *base, xpi_ram_config_t *ram_cfg)
738 {
739  return ROM_API_TABLE_ROOT->xpi_ram_driver_if->init(base, ram_cfg);
740 }
741 
742 /***********************************************************************************************************************
743  *
744  *
745  * SDP Driver Wrapper
746  *
747  *
748  **********************************************************************************************************************/
752 static inline void rom_sdp_init(void)
753 {
754  ROM_API_TABLE_ROOT->sdp_driver_if->sdp_ip_init();
755 }
756 
760 static inline void rom_sdp_deinit(void)
761 {
762  ROM_API_TABLE_ROOT->sdp_driver_if->sdp_ip_deinit();
763 }
764 
774  const uint8_t *key,
775  sdp_aes_key_bits_t key_bits,
776  uint32_t key_idx)
777 {
778  return ROM_API_TABLE_ROOT->sdp_driver_if->aes_set_key(aes_ctx, key, key_bits, key_idx);
779 }
780 
791  sdp_aes_op_t op,
792  uint32_t len,
793  const uint8_t *in,
794  uint8_t *out)
795 {
796  return ROM_API_TABLE_ROOT->sdp_driver_if->aes_crypt_ecb(aes_ctx, op, len, in, out);
797 }
798 
810  sdp_aes_op_t op,
811  uint32_t length,
812  uint8_t iv[16],
813  const uint8_t *in,
814  uint8_t *out)
815 {
816  return ROM_API_TABLE_ROOT->sdp_driver_if->aes_crypt_cbc(aes_ctx, op, length, iv, in, out);
817 }
818 
826 {
827  return ROM_API_TABLE_ROOT->sdp_driver_if->hash_init(hash_ctx, alg);
828 }
829 
837 static inline hpm_stat_t rom_sdp_hash_update(sdp_hash_ctx_t *hash_ctx, const uint8_t *data, uint32_t length)
838 {
839  return ROM_API_TABLE_ROOT->sdp_driver_if->hash_update(hash_ctx, data, length);
840 }
841 
848 static inline hpm_stat_t rom_sdp_hash_finish(sdp_hash_ctx_t *hash_ctx, uint8_t *digest)
849 {
850  return ROM_API_TABLE_ROOT->sdp_driver_if->hash_finish(hash_ctx, digest);
851 }
852 
861 static inline hpm_stat_t rom_sdp_memcpy(sdp_dma_ctx_t *dma_ctx, void *dst, const void *src, uint32_t length)
862 {
863  return ROM_API_TABLE_ROOT->sdp_driver_if->memcpy(dma_ctx, dst, src, length);
864 }
865 
874 static inline hpm_stat_t rom_sdp_memset(sdp_dma_ctx_t *dma_ctx, void *dst, uint8_t pattern, uint32_t length)
875 {
876  return ROM_API_TABLE_ROOT->sdp_driver_if->memset(dma_ctx, dst, pattern, length);
877 }
878 
879 
880 /***********************************************************************************************************************
881  *
882  *
883  * SM3 Driver Wrapper
884  *
885  *
886  **********************************************************************************************************************/
887 
895 {
896  return ROM_API_TABLE_ROOT->sm3_api_if->init(ctx);
897 }
898 
907 static inline hpm_stat_t rom_sm3_update(sm3_context_t *ctx, const void *input, uint32_t len)
908 {
909  return ROM_API_TABLE_ROOT->sm3_api_if->update(ctx, input, len);
910 }
911 
920 static inline hpm_stat_t rom_sm3_finalize(sm3_context_t *ctx, uint8_t output[32])
921 {
922  return ROM_API_TABLE_ROOT->sm3_api_if->finalize(ctx, output);
923 }
924 
925 /***********************************************************************************************************************
926  *
927  *
928  * SM4 Driver Wrapper
929  *
930  *
931  **********************************************************************************************************************/
938 static inline void rom_sm4_setkey_enc(sm4_context_t *ctx, const uint8_t key[16])
939 {
940  ROM_API_TABLE_ROOT->sm4_api_if->setkey_enc(ctx, key);
941 }
942 
949 static inline void rom_sm4_setkey_dec(sm4_context_t *ctx, const uint8_t key[16])
950 {
951  ROM_API_TABLE_ROOT->sm4_api_if->setkey_dec(ctx, key);
952 }
953 
963 static inline hpm_stat_t rom_sm4_crypt_ecb(sm4_context_t *ctx, uint32_t mode, uint32_t length, const uint8_t *input, uint8_t *output)
964 {
965  return ROM_API_TABLE_ROOT->sm4_api_if->crypt_ecb(ctx, mode, length, input, output);
966 }
967 
978 static inline hpm_stat_t rom_sm4_crypt_cbc(sm4_context_t *ctx, uint32_t mode, uint32_t length, const uint8_t iv[16], const uint8_t *input, uint8_t *output)
979 {
980  return ROM_API_TABLE_ROOT->sm4_api_if->crypt_cbc(ctx, mode, length, iv, input, output);
981 }
982 
983 
984 
985 #ifdef __cplusplus
986 }
987 #endif
988 
994 #endif /* HPM_ROMAPI_H */
static hpm_stat_t rom_sdp_memset(sdp_dma_ctx_t *dma_ctx, void *dst, uint8_t pattern, uint32_t length)
SDP memset operation.
Definition: hpm_romapi.h:874
static hpm_stat_t rom_sdp_aes_crypt_cbc(sdp_aes_ctx_t *aes_ctx, sdp_aes_op_t op, uint32_t length, uint8_t iv[16], const uint8_t *in, uint8_t *out)
SDP AES ECB crypto operation(Encrypt or Decrypt)
Definition: hpm_romapi.h:809
static ATTR_RAMFUNC hpm_stat_t rom_xpi_nor_auto_config(XPI_Type *base, xpi_nor_config_t *config, xpi_nor_config_option_t *cfg_option)
Automatically configure XPI NOR based on cfg_option.
Definition: hpm_romapi.h:513
static ATTR_RAMFUNC hpm_stat_t rom_xpi_nor_init(XPI_Type *base, xpi_nor_config_t *nor_config)
Initialize XPI NOR based on nor_config.
Definition: hpm_romapi.h:305
static hpm_stat_t rom_xpi_nor_read(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t *dst, uint32_t start, uint32_t length)
Read data from specified FLASH address.
Definition: hpm_romapi.h:495
static ATTR_RAMFUNC hpm_stat_t rom_xpi_nor_erase_chip_nonblocking(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config)
Erase the whole FLASH in non-blocking way.
Definition: hpm_romapi.h:431
static ATTR_RAMFUNC hpm_stat_t rom_xpi_nor_erase_chip(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config)
Erase the whole FLASH in blocking way.
Definition: hpm_romapi.h:414
static hpm_stat_t rom_sdp_memcpy(sdp_dma_ctx_t *dma_ctx, void *dst, const void *src, uint32_t length)
SDP memcpy operation.
Definition: hpm_romapi.h:861
static ATTR_RAMFUNC hpm_stat_t rom_xpi_nor_erase_block(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t start)
Erase specified FLASH blcok in blocking way.
Definition: hpm_romapi.h:379
static ATTR_RAMFUNC bool rom_xpi_nor_remap_config(XPI_Type *base, uint32_t start, uint32_t len, uint32_t offset)
Configure the XPI Address Remapping Logic.
Definition: hpm_romapi.h:567
static ATTR_RAMFUNC bool rom_xpi_nor_exip_region_config(XPI_Type *base, uint32_t index, exip_region_param_t *param)
Configure Specified EXiP Region.
Definition: hpm_romapi.h:630
static ATTR_RAMFUNC void rom_xpi_nor_exip_enable(XPI_Type *base)
Enable global EXiP logic.
Definition: hpm_romapi.h:679
static void rom_sdp_init(void)
Initialize SDP IP.
Definition: hpm_romapi.h:752
static ATTR_RAMFUNC hpm_stat_t rom_xpi_nor_page_program_nonblocking(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, const uint32_t *src, uint32_t dst_addr, uint32_t length)
Page-Program data to specified FLASH address in non-blocking way.
Definition: hpm_romapi.h:474
static ATTR_RAMFUNC void rom_xpi_nor_exip_region_disable(XPI_Type *base, uint32_t index)
Disable EXiP Feature on specified EXiP Region.
Definition: hpm_romapi.h:660
static ATTR_RAMFUNC hpm_stat_t rom_xpi_nor_erase_sector_nonblocking(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t start)
Erase specified FLASH sector in non-blocking way.
Definition: hpm_romapi.h:362
static ATTR_RAMFUNC hpm_stat_t rom_xpi_nor_erase(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t start, uint32_t length)
Erase specified FLASH region.
Definition: hpm_romapi.h:323
static hpm_stat_t rom_enter_bootloader(void *ctx)
Eneter specified Boot mode.
Definition: hpm_romapi.h:268
static ATTR_RAMFUNC void rom_xpi_nor_remap_disable(XPI_Type *base)
Disable XPI Remapping logic.
Definition: hpm_romapi.h:591
static hpm_stat_t rom_sdp_aes_set_key(sdp_aes_ctx_t *aes_ctx, const uint8_t *key, sdp_aes_key_bits_t key_bits, uint32_t key_idx)
Set AES key to SDP.
Definition: hpm_romapi.h:773
static void rom_sdp_deinit(void)
De-initialize SDP IP.
Definition: hpm_romapi.h:760
static hpm_stat_t rom_xpi_ram_get_config(XPI_Type *base, xpi_ram_config_t *ram_cfg, xpi_ram_config_option_t *cfg_option)
Get XPI RAM configuration based on cfg_option.
Definition: hpm_romapi.h:724
static hpm_stat_t rom_xpi_ram_init(XPI_Type *base, xpi_ram_config_t *ram_cfg)
Initialize XPI RAM.
Definition: hpm_romapi.h:737
static hpm_stat_t rom_xpi_nor_get_status(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t addr, uint16_t *out_status)
Return the status register value on XPI NOR FLASH.
Definition: hpm_romapi.h:548
static ATTR_RAMFUNC hpm_stat_t rom_xpi_nor_erase_block_nonblocking(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t start)
Erase specified FLASH blcok in non-blocking way.
Definition: hpm_romapi.h:398
static ATTR_RAMFUNC void rom_xpi_nor_exip_disable(XPI_Type *base)
Disable global EXiP logic.
Definition: hpm_romapi.h:696
static ATTR_RAMFUNC hpm_stat_t rom_xpi_nor_program(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, const uint32_t *src, uint32_t dst_addr, uint32_t length)
Program data to specified FLASH address in blocking way.
Definition: hpm_romapi.h:451
static ATTR_RAMFUNC bool rom_xpi_nor_is_remap_enabled(XPI_Type *base)
Check whether XPI Remapping is enabled.
Definition: hpm_romapi.h:611
static hpm_stat_t rom_sdp_hash_finish(sdp_hash_ctx_t *hash_ctx, uint8_t *digest)
HASH finialize.
Definition: hpm_romapi.h:848
static hpm_stat_t rom_sdp_hash_update(sdp_hash_ctx_t *hash_ctx, const uint8_t *data, uint32_t length)
HASH Update.
Definition: hpm_romapi.h:837
static hpm_stat_t rom_sdp_aes_crypt_ecb(sdp_aes_ctx_t *aes_ctx, sdp_aes_op_t op, uint32_t len, const uint8_t *in, uint8_t *out)
SDP AES ECB crypto operation(Encrypt or Decrypt)
Definition: hpm_romapi.h:790
static hpm_stat_t rom_xpi_nor_get_property(XPI_Type *base, xpi_nor_config_t *nor_cfg, uint32_t property_id, uint32_t *value)
Get XPI NOR properties.
Definition: hpm_romapi.h:530
static ATTR_RAMFUNC hpm_stat_t rom_xpi_nor_get_config(XPI_Type *base, xpi_nor_config_t *nor_cfg, xpi_nor_config_option_t *cfg_option)
Get XPI NOR configuration via cfg_option.
Definition: hpm_romapi.h:289
static hpm_stat_t rom_sdp_hash_init(sdp_hash_ctx_t *hash_ctx, sdp_hash_alg_t alg)
HASH initialization.
Definition: hpm_romapi.h:825
static ATTR_RAMFUNC hpm_stat_t rom_xpi_nor_erase_sector(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t start)
Erase specified FLASH sector in blocking way.
Definition: hpm_romapi.h:343
static void init(hpm_panel_t *panel)
Definition: cc10128007.c:86
uint32_t hpm_stat_t
Definition: hpm_common.h:126
otp_region_t
OTP region definitions.
Definition: hpm_otp_drv.h:24
otp_lock_option_t
OTP lock options.
Definition: hpm_otp_drv.h:34
static hpm_stat_t rom_sm3_init(sm3_context_t *ctx)
SM4 initialization.
Definition: hpm_romapi.h:894
static void rom_sm4_setkey_enc(sm4_context_t *ctx, const uint8_t key[16])
Set SM4 encryption key.
Definition: hpm_romapi.h:938
static hpm_stat_t rom_sm3_finalize(sm3_context_t *ctx, uint8_t output[32])
SM3 finalize Return the computing SM3 digest.
Definition: hpm_romapi.h:920
static hpm_stat_t rom_sm3_update(sm3_context_t *ctx, const void *input, uint32_t len)
SM3 update operation.
Definition: hpm_romapi.h:907
#define HPM_XPI0
Definition: hpm_romapi.h:28
#define ROM_API_TABLE_ROOT
Definition: hpm_romapi.h:248
static void rom_sm4_setkey_dec(sm4_context_t *ctx, const uint8_t key[16])
Set SM4 decryption key.
Definition: hpm_romapi.h:949
#define HPM_XPI1
Definition: hpm_romapi.h:32
static hpm_stat_t rom_sm4_crypt_ecb(sm4_context_t *ctx, uint32_t mode, uint32_t length, const uint8_t *input, uint8_t *output)
SM4 ECB crypto operation(Encrypt or Decrypt)
Definition: hpm_romapi.h:963
static hpm_stat_t rom_sm4_crypt_cbc(sm4_context_t *ctx, uint32_t mode, uint32_t length, const uint8_t iv[16], const uint8_t *input, uint8_t *output)
SM4 CBC crypto operation(Encrypt or Decrypt)
Definition: hpm_romapi.h:978
sdp_crypto_op_t
Crypto operation option.
Definition: hpm_sdp_drv.h:44
sdp_crypto_key_bits_t
SDP AES key bit options.
Definition: hpm_sdp_drv.h:29
sdp_hash_alg_t
SDP HASH algorithm definitions.
Definition: hpm_sdp_drv.h:102
xpi_xfer_channel_t
XPI Transfer Channel type definitions.
Definition: hpm_romapi_xpi_def.h:53
uint32_t XPI_Type
XPI_Type definitions for.
Definition: hpm_romapi_xpi_def.h:22
#define fencei()
execute fence.i
Definition: riscv_core.h:88
Bootloader API table.
Definition: hpm_romapi.h:127
const sm3_api_interface_t * sm3_api_if
Definition: hpm_romapi.h:243
const sm4_api_interface_t * sm4_api_if
Definition: hpm_romapi.h:244
Definition: hpm_romapi.h:52
OTP driver interface.
Definition: hpm_romapi.h:82
SDP AES context structure.
Definition: hpm_sdp_drv.h:159
SDP DMA context.
Definition: hpm_sdp_drv.h:179
SDP API interface.
Definition: hpm_romapi.h:127
SDP HASH context.
Definition: hpm_sdp_drv.h:186
Definition: hpm_romapi.h:185
uint32_t version
Definition: hpm_romapi.h:187
Definition: hpm_romapi.h:72
Definition: hpm_romapi.h:196
uint32_t version
Definition: hpm_romapi.h:198
Definition: hpm_romapi.h:80
uint32_t mode
Definition: hpm_romapi.h:81
XPI driver interface.
Definition: hpm_romapi_xpi_def.h:225
XPI NOR configuration option The ROM SW can detect the FLASH configuration based on the following str...
Definition: hpm_romapi_xpi_nor_def.h:136
XPI NOR configuration structure.
Definition: hpm_romapi_xpi_nor_def.h:261
XPI NOR driver interface.
Definition: hpm_romapi_xpi_nor_def.h:308
XPI RAM configuration option The ROM SW can detect the FLASH configuration based on the following str...
Definition: hpm_romapi_xpi_ram_def.h:39
XPI RAM configuration structure.
Definition: hpm_romapi_xpi_ram_def.h:152
XPI RAM driver interface.
Definition: hpm_romapi.h:99
Enter Bootloader API argument.
Definition: hpm_romapi.h:41