hpm_dma_regs.h File Reference

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Data Structures
struct	DMA_Type

Macros
#define	DMA_DMACFG_CHAINXFR_MASK   (0x80000000UL)
#define	DMA_DMACFG_CHAINXFR_SHIFT   (31U)
#define	DMA_DMACFG_CHAINXFR_GET(x)   (((uint32_t)(x) & DMA_DMACFG_CHAINXFR_MASK) >> DMA_DMACFG_CHAINXFR_SHIFT)
#define	DMA_DMACFG_REQSYNC_MASK   (0x40000000UL)
#define	DMA_DMACFG_REQSYNC_SHIFT   (30U)
#define	DMA_DMACFG_REQSYNC_GET(x)   (((uint32_t)(x) & DMA_DMACFG_REQSYNC_MASK) >> DMA_DMACFG_REQSYNC_SHIFT)
#define	DMA_DMACFG_DATAWIDTH_MASK   (0x3000000UL)
#define	DMA_DMACFG_DATAWIDTH_SHIFT   (24U)
#define	DMA_DMACFG_DATAWIDTH_GET(x)   (((uint32_t)(x) & DMA_DMACFG_DATAWIDTH_MASK) >> DMA_DMACFG_DATAWIDTH_SHIFT)
#define	DMA_DMACFG_ADDRWIDTH_MASK   (0xFE0000UL)
#define	DMA_DMACFG_ADDRWIDTH_SHIFT   (17U)
#define	DMA_DMACFG_ADDRWIDTH_GET(x)   (((uint32_t)(x) & DMA_DMACFG_ADDRWIDTH_MASK) >> DMA_DMACFG_ADDRWIDTH_SHIFT)
#define	DMA_DMACFG_CORENUM_MASK   (0x10000UL)
#define	DMA_DMACFG_CORENUM_SHIFT   (16U)
#define	DMA_DMACFG_CORENUM_GET(x)   (((uint32_t)(x) & DMA_DMACFG_CORENUM_MASK) >> DMA_DMACFG_CORENUM_SHIFT)
#define	DMA_DMACFG_BUSNUM_MASK   (0x8000U)
#define	DMA_DMACFG_BUSNUM_SHIFT   (15U)
#define	DMA_DMACFG_BUSNUM_GET(x)   (((uint32_t)(x) & DMA_DMACFG_BUSNUM_MASK) >> DMA_DMACFG_BUSNUM_SHIFT)
#define	DMA_DMACFG_REQNUM_MASK   (0x7C00U)
#define	DMA_DMACFG_REQNUM_SHIFT   (10U)
#define	DMA_DMACFG_REQNUM_GET(x)   (((uint32_t)(x) & DMA_DMACFG_REQNUM_MASK) >> DMA_DMACFG_REQNUM_SHIFT)
#define	DMA_DMACFG_FIFODEPTH_MASK   (0x3F0U)
#define	DMA_DMACFG_FIFODEPTH_SHIFT   (4U)
#define	DMA_DMACFG_FIFODEPTH_GET(x)   (((uint32_t)(x) & DMA_DMACFG_FIFODEPTH_MASK) >> DMA_DMACFG_FIFODEPTH_SHIFT)
#define	DMA_DMACFG_CHANNELNUM_MASK   (0xFU)
#define	DMA_DMACFG_CHANNELNUM_SHIFT   (0U)
#define	DMA_DMACFG_CHANNELNUM_GET(x)   (((uint32_t)(x) & DMA_DMACFG_CHANNELNUM_MASK) >> DMA_DMACFG_CHANNELNUM_SHIFT)
#define	DMA_DMACTRL_RESET_MASK   (0x1U)
#define	DMA_DMACTRL_RESET_SHIFT   (0U)
#define	DMA_DMACTRL_RESET_SET(x)   (((uint32_t)(x) << DMA_DMACTRL_RESET_SHIFT) & DMA_DMACTRL_RESET_MASK)
#define	DMA_DMACTRL_RESET_GET(x)   (((uint32_t)(x) & DMA_DMACTRL_RESET_MASK) >> DMA_DMACTRL_RESET_SHIFT)
#define	DMA_CHABORT_CHABORT_MASK   (0xFFFFFFFFUL)
#define	DMA_CHABORT_CHABORT_SHIFT   (0U)
#define	DMA_CHABORT_CHABORT_SET(x)   (((uint32_t)(x) << DMA_CHABORT_CHABORT_SHIFT) & DMA_CHABORT_CHABORT_MASK)
#define	DMA_CHABORT_CHABORT_GET(x)   (((uint32_t)(x) & DMA_CHABORT_CHABORT_MASK) >> DMA_CHABORT_CHABORT_SHIFT)
#define	DMA_INTSTATUS_TC_MASK   (0xFF0000UL)
#define	DMA_INTSTATUS_TC_SHIFT   (16U)
#define	DMA_INTSTATUS_TC_SET(x)   (((uint32_t)(x) << DMA_INTSTATUS_TC_SHIFT) & DMA_INTSTATUS_TC_MASK)
#define	DMA_INTSTATUS_TC_GET(x)   (((uint32_t)(x) & DMA_INTSTATUS_TC_MASK) >> DMA_INTSTATUS_TC_SHIFT)
#define	DMA_INTSTATUS_ABORT_MASK   (0xFF00U)
#define	DMA_INTSTATUS_ABORT_SHIFT   (8U)
#define	DMA_INTSTATUS_ABORT_SET(x)   (((uint32_t)(x) << DMA_INTSTATUS_ABORT_SHIFT) & DMA_INTSTATUS_ABORT_MASK)
#define	DMA_INTSTATUS_ABORT_GET(x)   (((uint32_t)(x) & DMA_INTSTATUS_ABORT_MASK) >> DMA_INTSTATUS_ABORT_SHIFT)
#define	DMA_INTSTATUS_ERROR_MASK   (0xFFU)
#define	DMA_INTSTATUS_ERROR_SHIFT   (0U)
#define	DMA_INTSTATUS_ERROR_SET(x)   (((uint32_t)(x) << DMA_INTSTATUS_ERROR_SHIFT) & DMA_INTSTATUS_ERROR_MASK)
#define	DMA_INTSTATUS_ERROR_GET(x)   (((uint32_t)(x) & DMA_INTSTATUS_ERROR_MASK) >> DMA_INTSTATUS_ERROR_SHIFT)
#define	DMA_CHEN_CHEN_MASK   (0xFFFFFFFFUL)
#define	DMA_CHEN_CHEN_SHIFT   (0U)
#define	DMA_CHEN_CHEN_GET(x)   (((uint32_t)(x) & DMA_CHEN_CHEN_MASK) >> DMA_CHEN_CHEN_SHIFT)
#define	DMA_CHCTRL_CTRL_PRIORITY_MASK   (0x20000000UL)
#define	DMA_CHCTRL_CTRL_PRIORITY_SHIFT   (29U)
#define	DMA_CHCTRL_CTRL_PRIORITY_SET(x)   (((uint32_t)(x) << DMA_CHCTRL_CTRL_PRIORITY_SHIFT) & DMA_CHCTRL_CTRL_PRIORITY_MASK)
#define	DMA_CHCTRL_CTRL_PRIORITY_GET(x)   (((uint32_t)(x) & DMA_CHCTRL_CTRL_PRIORITY_MASK) >> DMA_CHCTRL_CTRL_PRIORITY_SHIFT)
#define	DMA_CHCTRL_CTRL_SRCBURSTSIZE_MASK   (0xF000000UL)
#define	DMA_CHCTRL_CTRL_SRCBURSTSIZE_SHIFT   (24U)
#define	DMA_CHCTRL_CTRL_SRCBURSTSIZE_SET(x)   (((uint32_t)(x) << DMA_CHCTRL_CTRL_SRCBURSTSIZE_SHIFT) & DMA_CHCTRL_CTRL_SRCBURSTSIZE_MASK)
#define	DMA_CHCTRL_CTRL_SRCBURSTSIZE_GET(x)   (((uint32_t)(x) & DMA_CHCTRL_CTRL_SRCBURSTSIZE_MASK) >> DMA_CHCTRL_CTRL_SRCBURSTSIZE_SHIFT)
#define	DMA_CHCTRL_CTRL_SRCWIDTH_MASK   (0xE00000UL)
#define	DMA_CHCTRL_CTRL_SRCWIDTH_SHIFT   (21U)
#define	DMA_CHCTRL_CTRL_SRCWIDTH_SET(x)   (((uint32_t)(x) << DMA_CHCTRL_CTRL_SRCWIDTH_SHIFT) & DMA_CHCTRL_CTRL_SRCWIDTH_MASK)
#define	DMA_CHCTRL_CTRL_SRCWIDTH_GET(x)   (((uint32_t)(x) & DMA_CHCTRL_CTRL_SRCWIDTH_MASK) >> DMA_CHCTRL_CTRL_SRCWIDTH_SHIFT)
#define	DMA_CHCTRL_CTRL_DSTWIDTH_MASK   (0x1C0000UL)
#define	DMA_CHCTRL_CTRL_DSTWIDTH_SHIFT   (18U)
#define	DMA_CHCTRL_CTRL_DSTWIDTH_SET(x)   (((uint32_t)(x) << DMA_CHCTRL_CTRL_DSTWIDTH_SHIFT) & DMA_CHCTRL_CTRL_DSTWIDTH_MASK)
#define	DMA_CHCTRL_CTRL_DSTWIDTH_GET(x)   (((uint32_t)(x) & DMA_CHCTRL_CTRL_DSTWIDTH_MASK) >> DMA_CHCTRL_CTRL_DSTWIDTH_SHIFT)
#define	DMA_CHCTRL_CTRL_SRCMODE_MASK   (0x20000UL)
#define	DMA_CHCTRL_CTRL_SRCMODE_SHIFT   (17U)
#define	DMA_CHCTRL_CTRL_SRCMODE_SET(x)   (((uint32_t)(x) << DMA_CHCTRL_CTRL_SRCMODE_SHIFT) & DMA_CHCTRL_CTRL_SRCMODE_MASK)
#define	DMA_CHCTRL_CTRL_SRCMODE_GET(x)   (((uint32_t)(x) & DMA_CHCTRL_CTRL_SRCMODE_MASK) >> DMA_CHCTRL_CTRL_SRCMODE_SHIFT)
#define	DMA_CHCTRL_CTRL_DSTMODE_MASK   (0x10000UL)
#define	DMA_CHCTRL_CTRL_DSTMODE_SHIFT   (16U)
#define	DMA_CHCTRL_CTRL_DSTMODE_SET(x)   (((uint32_t)(x) << DMA_CHCTRL_CTRL_DSTMODE_SHIFT) & DMA_CHCTRL_CTRL_DSTMODE_MASK)
#define	DMA_CHCTRL_CTRL_DSTMODE_GET(x)   (((uint32_t)(x) & DMA_CHCTRL_CTRL_DSTMODE_MASK) >> DMA_CHCTRL_CTRL_DSTMODE_SHIFT)
#define	DMA_CHCTRL_CTRL_SRCADDRCTRL_MASK   (0xC000U)
#define	DMA_CHCTRL_CTRL_SRCADDRCTRL_SHIFT   (14U)
#define	DMA_CHCTRL_CTRL_SRCADDRCTRL_SET(x)   (((uint32_t)(x) << DMA_CHCTRL_CTRL_SRCADDRCTRL_SHIFT) & DMA_CHCTRL_CTRL_SRCADDRCTRL_MASK)
#define	DMA_CHCTRL_CTRL_SRCADDRCTRL_GET(x)   (((uint32_t)(x) & DMA_CHCTRL_CTRL_SRCADDRCTRL_MASK) >> DMA_CHCTRL_CTRL_SRCADDRCTRL_SHIFT)
#define	DMA_CHCTRL_CTRL_DSTADDRCTRL_MASK   (0x3000U)
#define	DMA_CHCTRL_CTRL_DSTADDRCTRL_SHIFT   (12U)
#define	DMA_CHCTRL_CTRL_DSTADDRCTRL_SET(x)   (((uint32_t)(x) << DMA_CHCTRL_CTRL_DSTADDRCTRL_SHIFT) & DMA_CHCTRL_CTRL_DSTADDRCTRL_MASK)
#define	DMA_CHCTRL_CTRL_DSTADDRCTRL_GET(x)   (((uint32_t)(x) & DMA_CHCTRL_CTRL_DSTADDRCTRL_MASK) >> DMA_CHCTRL_CTRL_DSTADDRCTRL_SHIFT)
#define	DMA_CHCTRL_CTRL_SRCREQSEL_MASK   (0xF00U)
#define	DMA_CHCTRL_CTRL_SRCREQSEL_SHIFT   (8U)
#define	DMA_CHCTRL_CTRL_SRCREQSEL_SET(x)   (((uint32_t)(x) << DMA_CHCTRL_CTRL_SRCREQSEL_SHIFT) & DMA_CHCTRL_CTRL_SRCREQSEL_MASK)
#define	DMA_CHCTRL_CTRL_SRCREQSEL_GET(x)   (((uint32_t)(x) & DMA_CHCTRL_CTRL_SRCREQSEL_MASK) >> DMA_CHCTRL_CTRL_SRCREQSEL_SHIFT)
#define	DMA_CHCTRL_CTRL_DSTREQSEL_MASK   (0xF0U)
#define	DMA_CHCTRL_CTRL_DSTREQSEL_SHIFT   (4U)
#define	DMA_CHCTRL_CTRL_DSTREQSEL_SET(x)   (((uint32_t)(x) << DMA_CHCTRL_CTRL_DSTREQSEL_SHIFT) & DMA_CHCTRL_CTRL_DSTREQSEL_MASK)
#define	DMA_CHCTRL_CTRL_DSTREQSEL_GET(x)   (((uint32_t)(x) & DMA_CHCTRL_CTRL_DSTREQSEL_MASK) >> DMA_CHCTRL_CTRL_DSTREQSEL_SHIFT)
#define	DMA_CHCTRL_CTRL_INTABTMASK_MASK   (0x8U)
#define	DMA_CHCTRL_CTRL_INTABTMASK_SHIFT   (3U)
#define	DMA_CHCTRL_CTRL_INTABTMASK_SET(x)   (((uint32_t)(x) << DMA_CHCTRL_CTRL_INTABTMASK_SHIFT) & DMA_CHCTRL_CTRL_INTABTMASK_MASK)
#define	DMA_CHCTRL_CTRL_INTABTMASK_GET(x)   (((uint32_t)(x) & DMA_CHCTRL_CTRL_INTABTMASK_MASK) >> DMA_CHCTRL_CTRL_INTABTMASK_SHIFT)
#define	DMA_CHCTRL_CTRL_INTERRMASK_MASK   (0x4U)
#define	DMA_CHCTRL_CTRL_INTERRMASK_SHIFT   (2U)
#define	DMA_CHCTRL_CTRL_INTERRMASK_SET(x)   (((uint32_t)(x) << DMA_CHCTRL_CTRL_INTERRMASK_SHIFT) & DMA_CHCTRL_CTRL_INTERRMASK_MASK)
#define	DMA_CHCTRL_CTRL_INTERRMASK_GET(x)   (((uint32_t)(x) & DMA_CHCTRL_CTRL_INTERRMASK_MASK) >> DMA_CHCTRL_CTRL_INTERRMASK_SHIFT)
#define	DMA_CHCTRL_CTRL_INTTCMASK_MASK   (0x2U)
#define	DMA_CHCTRL_CTRL_INTTCMASK_SHIFT   (1U)
#define	DMA_CHCTRL_CTRL_INTTCMASK_SET(x)   (((uint32_t)(x) << DMA_CHCTRL_CTRL_INTTCMASK_SHIFT) & DMA_CHCTRL_CTRL_INTTCMASK_MASK)
#define	DMA_CHCTRL_CTRL_INTTCMASK_GET(x)   (((uint32_t)(x) & DMA_CHCTRL_CTRL_INTTCMASK_MASK) >> DMA_CHCTRL_CTRL_INTTCMASK_SHIFT)
#define	DMA_CHCTRL_CTRL_ENABLE_MASK   (0x1U)
#define	DMA_CHCTRL_CTRL_ENABLE_SHIFT   (0U)
#define	DMA_CHCTRL_CTRL_ENABLE_SET(x)   (((uint32_t)(x) << DMA_CHCTRL_CTRL_ENABLE_SHIFT) & DMA_CHCTRL_CTRL_ENABLE_MASK)
#define	DMA_CHCTRL_CTRL_ENABLE_GET(x)   (((uint32_t)(x) & DMA_CHCTRL_CTRL_ENABLE_MASK) >> DMA_CHCTRL_CTRL_ENABLE_SHIFT)
#define	DMA_CHCTRL_TRANSIZE_TRANSIZE_MASK   (0xFFFFFFFFUL)
#define	DMA_CHCTRL_TRANSIZE_TRANSIZE_SHIFT   (0U)
#define	DMA_CHCTRL_TRANSIZE_TRANSIZE_SET(x)   (((uint32_t)(x) << DMA_CHCTRL_TRANSIZE_TRANSIZE_SHIFT) & DMA_CHCTRL_TRANSIZE_TRANSIZE_MASK)
#define	DMA_CHCTRL_TRANSIZE_TRANSIZE_GET(x)   (((uint32_t)(x) & DMA_CHCTRL_TRANSIZE_TRANSIZE_MASK) >> DMA_CHCTRL_TRANSIZE_TRANSIZE_SHIFT)
#define	DMA_CHCTRL_SRCADDR_SRCADDRL_MASK   (0xFFFFFFFFUL)
#define	DMA_CHCTRL_SRCADDR_SRCADDRL_SHIFT   (0U)
#define	DMA_CHCTRL_SRCADDR_SRCADDRL_SET(x)   (((uint32_t)(x) << DMA_CHCTRL_SRCADDR_SRCADDRL_SHIFT) & DMA_CHCTRL_SRCADDR_SRCADDRL_MASK)
#define	DMA_CHCTRL_SRCADDR_SRCADDRL_GET(x)   (((uint32_t)(x) & DMA_CHCTRL_SRCADDR_SRCADDRL_MASK) >> DMA_CHCTRL_SRCADDR_SRCADDRL_SHIFT)
#define	DMA_CHCTRL_SRCADDRH_SRCADDRH_MASK   (0xFFFFFFFFUL)
#define	DMA_CHCTRL_SRCADDRH_SRCADDRH_SHIFT   (0U)
#define	DMA_CHCTRL_SRCADDRH_SRCADDRH_SET(x)   (((uint32_t)(x) << DMA_CHCTRL_SRCADDRH_SRCADDRH_SHIFT) & DMA_CHCTRL_SRCADDRH_SRCADDRH_MASK)
#define	DMA_CHCTRL_SRCADDRH_SRCADDRH_GET(x)   (((uint32_t)(x) & DMA_CHCTRL_SRCADDRH_SRCADDRH_MASK) >> DMA_CHCTRL_SRCADDRH_SRCADDRH_SHIFT)
#define	DMA_CHCTRL_DSTADDR_DSTADDRL_MASK   (0xFFFFFFFFUL)
#define	DMA_CHCTRL_DSTADDR_DSTADDRL_SHIFT   (0U)
#define	DMA_CHCTRL_DSTADDR_DSTADDRL_SET(x)   (((uint32_t)(x) << DMA_CHCTRL_DSTADDR_DSTADDRL_SHIFT) & DMA_CHCTRL_DSTADDR_DSTADDRL_MASK)
#define	DMA_CHCTRL_DSTADDR_DSTADDRL_GET(x)   (((uint32_t)(x) & DMA_CHCTRL_DSTADDR_DSTADDRL_MASK) >> DMA_CHCTRL_DSTADDR_DSTADDRL_SHIFT)
#define	DMA_CHCTRL_DSTADDRH_DSTADDRH_MASK   (0xFFFFFFFFUL)
#define	DMA_CHCTRL_DSTADDRH_DSTADDRH_SHIFT   (0U)
#define	DMA_CHCTRL_DSTADDRH_DSTADDRH_SET(x)   (((uint32_t)(x) << DMA_CHCTRL_DSTADDRH_DSTADDRH_SHIFT) & DMA_CHCTRL_DSTADDRH_DSTADDRH_MASK)
#define	DMA_CHCTRL_DSTADDRH_DSTADDRH_GET(x)   (((uint32_t)(x) & DMA_CHCTRL_DSTADDRH_DSTADDRH_MASK) >> DMA_CHCTRL_DSTADDRH_DSTADDRH_SHIFT)
#define	DMA_CHCTRL_LLPOINTER_LLPOINTERL_MASK   (0xFFFFFFF8UL)
#define	DMA_CHCTRL_LLPOINTER_LLPOINTERL_SHIFT   (3U)
#define	DMA_CHCTRL_LLPOINTER_LLPOINTERL_SET(x)   (((uint32_t)(x) << DMA_CHCTRL_LLPOINTER_LLPOINTERL_SHIFT) & DMA_CHCTRL_LLPOINTER_LLPOINTERL_MASK)
#define	DMA_CHCTRL_LLPOINTER_LLPOINTERL_GET(x)   (((uint32_t)(x) & DMA_CHCTRL_LLPOINTER_LLPOINTERL_MASK) >> DMA_CHCTRL_LLPOINTER_LLPOINTERL_SHIFT)
#define	DMA_CHCTRL_LLPOINTER_LLDBUSINFIDX_MASK   (0x1U)
#define	DMA_CHCTRL_LLPOINTER_LLDBUSINFIDX_SHIFT   (0U)
#define	DMA_CHCTRL_LLPOINTER_LLDBUSINFIDX_SET(x)   (((uint32_t)(x) << DMA_CHCTRL_LLPOINTER_LLDBUSINFIDX_SHIFT) & DMA_CHCTRL_LLPOINTER_LLDBUSINFIDX_MASK)
#define	DMA_CHCTRL_LLPOINTER_LLDBUSINFIDX_GET(x)   (((uint32_t)(x) & DMA_CHCTRL_LLPOINTER_LLDBUSINFIDX_MASK) >> DMA_CHCTRL_LLPOINTER_LLDBUSINFIDX_SHIFT)
#define	DMA_CHCTRL_LLPOINTERH_LLPOINTERH_MASK   (0xFFFFFFFFUL)
#define	DMA_CHCTRL_LLPOINTERH_LLPOINTERH_SHIFT   (0U)
#define	DMA_CHCTRL_LLPOINTERH_LLPOINTERH_SET(x)   (((uint32_t)(x) << DMA_CHCTRL_LLPOINTERH_LLPOINTERH_SHIFT) & DMA_CHCTRL_LLPOINTERH_LLPOINTERH_MASK)
#define	DMA_CHCTRL_LLPOINTERH_LLPOINTERH_GET(x)   (((uint32_t)(x) & DMA_CHCTRL_LLPOINTERH_LLPOINTERH_MASK) >> DMA_CHCTRL_LLPOINTERH_LLPOINTERH_SHIFT)
#define	DMA_CHCTRL_CH0   (0UL)
#define	DMA_CHCTRL_CH1   (1UL)
#define	DMA_CHCTRL_CH2   (2UL)
#define	DMA_CHCTRL_CH3   (3UL)
#define	DMA_CHCTRL_CH4   (4UL)
#define	DMA_CHCTRL_CH5   (5UL)
#define	DMA_CHCTRL_CH6   (6UL)
#define	DMA_CHCTRL_CH7   (7UL)

Macro Definition Documentation

DMA_CHABORT_CHABORT_GET

#define DMA_CHABORT_CHABORT_GET

(

x

)

(((uint32_t)(x) & DMA_CHABORT_CHABORT_MASK) >> DMA_CHABORT_CHABORT_SHIFT)

DMA_CHABORT_CHABORT_MASK

#define DMA_CHABORT_CHABORT_MASK   (0xFFFFFFFFUL)

DMA_CHABORT_CHABORT_SET

#define DMA_CHABORT_CHABORT_SET

(

x

)

(((uint32_t)(x) << DMA_CHABORT_CHABORT_SHIFT) & DMA_CHABORT_CHABORT_MASK)

DMA_CHABORT_CHABORT_SHIFT

#define DMA_CHABORT_CHABORT_SHIFT   (0U)

DMA_CHCTRL_CH0

#define DMA_CHCTRL_CH0   (0UL)

DMA_CHCTRL_CH1

#define DMA_CHCTRL_CH1   (1UL)

DMA_CHCTRL_CH2

#define DMA_CHCTRL_CH2   (2UL)

DMA_CHCTRL_CH3

#define DMA_CHCTRL_CH3   (3UL)

DMA_CHCTRL_CH4

#define DMA_CHCTRL_CH4   (4UL)

DMA_CHCTRL_CH5

#define DMA_CHCTRL_CH5   (5UL)

DMA_CHCTRL_CH6

#define DMA_CHCTRL_CH6   (6UL)

DMA_CHCTRL_CH7

#define DMA_CHCTRL_CH7   (7UL)

DMA_CHCTRL_CTRL_DSTADDRCTRL_GET

#define DMA_CHCTRL_CTRL_DSTADDRCTRL_GET

(

x

)

(((uint32_t)(x) & DMA_CHCTRL_CTRL_DSTADDRCTRL_MASK) >> DMA_CHCTRL_CTRL_DSTADDRCTRL_SHIFT)

DMA_CHCTRL_CTRL_DSTADDRCTRL_MASK

#define DMA_CHCTRL_CTRL_DSTADDRCTRL_MASK   (0x3000U)

DMA_CHCTRL_CTRL_DSTADDRCTRL_SET

#define DMA_CHCTRL_CTRL_DSTADDRCTRL_SET

(

x

)

(((uint32_t)(x) << DMA_CHCTRL_CTRL_DSTADDRCTRL_SHIFT) & DMA_CHCTRL_CTRL_DSTADDRCTRL_MASK)

DMA_CHCTRL_CTRL_DSTADDRCTRL_SHIFT

#define DMA_CHCTRL_CTRL_DSTADDRCTRL_SHIFT   (12U)

DMA_CHCTRL_CTRL_DSTMODE_GET

#define DMA_CHCTRL_CTRL_DSTMODE_GET

(

x

)

(((uint32_t)(x) & DMA_CHCTRL_CTRL_DSTMODE_MASK) >> DMA_CHCTRL_CTRL_DSTMODE_SHIFT)

DMA_CHCTRL_CTRL_DSTMODE_MASK

#define DMA_CHCTRL_CTRL_DSTMODE_MASK   (0x10000UL)

DMA_CHCTRL_CTRL_DSTMODE_SET

#define DMA_CHCTRL_CTRL_DSTMODE_SET

(

x

)

(((uint32_t)(x) << DMA_CHCTRL_CTRL_DSTMODE_SHIFT) & DMA_CHCTRL_CTRL_DSTMODE_MASK)

DMA_CHCTRL_CTRL_DSTMODE_SHIFT

#define DMA_CHCTRL_CTRL_DSTMODE_SHIFT   (16U)

DMA_CHCTRL_CTRL_DSTREQSEL_GET

#define DMA_CHCTRL_CTRL_DSTREQSEL_GET

(

x

)

(((uint32_t)(x) & DMA_CHCTRL_CTRL_DSTREQSEL_MASK) >> DMA_CHCTRL_CTRL_DSTREQSEL_SHIFT)

DMA_CHCTRL_CTRL_DSTREQSEL_MASK

#define DMA_CHCTRL_CTRL_DSTREQSEL_MASK   (0xF0U)

DMA_CHCTRL_CTRL_DSTREQSEL_SET

#define DMA_CHCTRL_CTRL_DSTREQSEL_SET

(

x

)

(((uint32_t)(x) << DMA_CHCTRL_CTRL_DSTREQSEL_SHIFT) & DMA_CHCTRL_CTRL_DSTREQSEL_MASK)

DMA_CHCTRL_CTRL_DSTREQSEL_SHIFT

#define DMA_CHCTRL_CTRL_DSTREQSEL_SHIFT   (4U)

DMA_CHCTRL_CTRL_DSTWIDTH_GET

#define DMA_CHCTRL_CTRL_DSTWIDTH_GET

(

x

)

(((uint32_t)(x) & DMA_CHCTRL_CTRL_DSTWIDTH_MASK) >> DMA_CHCTRL_CTRL_DSTWIDTH_SHIFT)

DMA_CHCTRL_CTRL_DSTWIDTH_MASK

#define DMA_CHCTRL_CTRL_DSTWIDTH_MASK   (0x1C0000UL)

DMA_CHCTRL_CTRL_DSTWIDTH_SET

#define DMA_CHCTRL_CTRL_DSTWIDTH_SET

(

x

)

(((uint32_t)(x) << DMA_CHCTRL_CTRL_DSTWIDTH_SHIFT) & DMA_CHCTRL_CTRL_DSTWIDTH_MASK)

DMA_CHCTRL_CTRL_DSTWIDTH_SHIFT

#define DMA_CHCTRL_CTRL_DSTWIDTH_SHIFT   (18U)

DMA_CHCTRL_CTRL_ENABLE_GET

#define DMA_CHCTRL_CTRL_ENABLE_GET

(

x

)

(((uint32_t)(x) & DMA_CHCTRL_CTRL_ENABLE_MASK) >> DMA_CHCTRL_CTRL_ENABLE_SHIFT)

DMA_CHCTRL_CTRL_ENABLE_MASK

#define DMA_CHCTRL_CTRL_ENABLE_MASK   (0x1U)

DMA_CHCTRL_CTRL_ENABLE_SET

#define DMA_CHCTRL_CTRL_ENABLE_SET

(

x

)

(((uint32_t)(x) << DMA_CHCTRL_CTRL_ENABLE_SHIFT) & DMA_CHCTRL_CTRL_ENABLE_MASK)

DMA_CHCTRL_CTRL_ENABLE_SHIFT

#define DMA_CHCTRL_CTRL_ENABLE_SHIFT   (0U)

DMA_CHCTRL_CTRL_INTABTMASK_GET

#define DMA_CHCTRL_CTRL_INTABTMASK_GET

(

x

)

(((uint32_t)(x) & DMA_CHCTRL_CTRL_INTABTMASK_MASK) >> DMA_CHCTRL_CTRL_INTABTMASK_SHIFT)

DMA_CHCTRL_CTRL_INTABTMASK_MASK

#define DMA_CHCTRL_CTRL_INTABTMASK_MASK   (0x8U)

DMA_CHCTRL_CTRL_INTABTMASK_SET

#define DMA_CHCTRL_CTRL_INTABTMASK_SET

(

x

)

(((uint32_t)(x) << DMA_CHCTRL_CTRL_INTABTMASK_SHIFT) & DMA_CHCTRL_CTRL_INTABTMASK_MASK)

DMA_CHCTRL_CTRL_INTABTMASK_SHIFT

#define DMA_CHCTRL_CTRL_INTABTMASK_SHIFT   (3U)

DMA_CHCTRL_CTRL_INTERRMASK_GET

#define DMA_CHCTRL_CTRL_INTERRMASK_GET

(

x

)

(((uint32_t)(x) & DMA_CHCTRL_CTRL_INTERRMASK_MASK) >> DMA_CHCTRL_CTRL_INTERRMASK_SHIFT)

DMA_CHCTRL_CTRL_INTERRMASK_MASK

#define DMA_CHCTRL_CTRL_INTERRMASK_MASK   (0x4U)

DMA_CHCTRL_CTRL_INTERRMASK_SET

#define DMA_CHCTRL_CTRL_INTERRMASK_SET

(

x

)

(((uint32_t)(x) << DMA_CHCTRL_CTRL_INTERRMASK_SHIFT) & DMA_CHCTRL_CTRL_INTERRMASK_MASK)

DMA_CHCTRL_CTRL_INTERRMASK_SHIFT

#define DMA_CHCTRL_CTRL_INTERRMASK_SHIFT   (2U)

DMA_CHCTRL_CTRL_INTTCMASK_GET

#define DMA_CHCTRL_CTRL_INTTCMASK_GET

(

x

)

(((uint32_t)(x) & DMA_CHCTRL_CTRL_INTTCMASK_MASK) >> DMA_CHCTRL_CTRL_INTTCMASK_SHIFT)

DMA_CHCTRL_CTRL_INTTCMASK_MASK

#define DMA_CHCTRL_CTRL_INTTCMASK_MASK   (0x2U)

DMA_CHCTRL_CTRL_INTTCMASK_SET

#define DMA_CHCTRL_CTRL_INTTCMASK_SET

(

x

)

(((uint32_t)(x) << DMA_CHCTRL_CTRL_INTTCMASK_SHIFT) & DMA_CHCTRL_CTRL_INTTCMASK_MASK)

DMA_CHCTRL_CTRL_INTTCMASK_SHIFT

#define DMA_CHCTRL_CTRL_INTTCMASK_SHIFT   (1U)

DMA_CHCTRL_CTRL_PRIORITY_GET

#define DMA_CHCTRL_CTRL_PRIORITY_GET

(

x

)

(((uint32_t)(x) & DMA_CHCTRL_CTRL_PRIORITY_MASK) >> DMA_CHCTRL_CTRL_PRIORITY_SHIFT)

DMA_CHCTRL_CTRL_PRIORITY_MASK

#define DMA_CHCTRL_CTRL_PRIORITY_MASK   (0x20000000UL)

DMA_CHCTRL_CTRL_PRIORITY_SET

#define DMA_CHCTRL_CTRL_PRIORITY_SET

(

x

)

(((uint32_t)(x) << DMA_CHCTRL_CTRL_PRIORITY_SHIFT) & DMA_CHCTRL_CTRL_PRIORITY_MASK)

DMA_CHCTRL_CTRL_PRIORITY_SHIFT

#define DMA_CHCTRL_CTRL_PRIORITY_SHIFT   (29U)

DMA_CHCTRL_CTRL_SRCADDRCTRL_GET

#define DMA_CHCTRL_CTRL_SRCADDRCTRL_GET

(

x

)

(((uint32_t)(x) & DMA_CHCTRL_CTRL_SRCADDRCTRL_MASK) >> DMA_CHCTRL_CTRL_SRCADDRCTRL_SHIFT)

DMA_CHCTRL_CTRL_SRCADDRCTRL_MASK

#define DMA_CHCTRL_CTRL_SRCADDRCTRL_MASK   (0xC000U)

DMA_CHCTRL_CTRL_SRCADDRCTRL_SET

#define DMA_CHCTRL_CTRL_SRCADDRCTRL_SET

(

x

)

(((uint32_t)(x) << DMA_CHCTRL_CTRL_SRCADDRCTRL_SHIFT) & DMA_CHCTRL_CTRL_SRCADDRCTRL_MASK)

DMA_CHCTRL_CTRL_SRCADDRCTRL_SHIFT

#define DMA_CHCTRL_CTRL_SRCADDRCTRL_SHIFT   (14U)

DMA_CHCTRL_CTRL_SRCBURSTSIZE_GET

#define DMA_CHCTRL_CTRL_SRCBURSTSIZE_GET

(

x

)

(((uint32_t)(x) & DMA_CHCTRL_CTRL_SRCBURSTSIZE_MASK) >> DMA_CHCTRL_CTRL_SRCBURSTSIZE_SHIFT)

DMA_CHCTRL_CTRL_SRCBURSTSIZE_MASK

#define DMA_CHCTRL_CTRL_SRCBURSTSIZE_MASK   (0xF000000UL)

DMA_CHCTRL_CTRL_SRCBURSTSIZE_SET

#define DMA_CHCTRL_CTRL_SRCBURSTSIZE_SET

(

x

)

(((uint32_t)(x) << DMA_CHCTRL_CTRL_SRCBURSTSIZE_SHIFT) & DMA_CHCTRL_CTRL_SRCBURSTSIZE_MASK)

DMA_CHCTRL_CTRL_SRCBURSTSIZE_SHIFT

#define DMA_CHCTRL_CTRL_SRCBURSTSIZE_SHIFT   (24U)

DMA_CHCTRL_CTRL_SRCMODE_GET

#define DMA_CHCTRL_CTRL_SRCMODE_GET

(

x

)

(((uint32_t)(x) & DMA_CHCTRL_CTRL_SRCMODE_MASK) >> DMA_CHCTRL_CTRL_SRCMODE_SHIFT)

DMA_CHCTRL_CTRL_SRCMODE_MASK

#define DMA_CHCTRL_CTRL_SRCMODE_MASK   (0x20000UL)

DMA_CHCTRL_CTRL_SRCMODE_SET

#define DMA_CHCTRL_CTRL_SRCMODE_SET

(

x

)

(((uint32_t)(x) << DMA_CHCTRL_CTRL_SRCMODE_SHIFT) & DMA_CHCTRL_CTRL_SRCMODE_MASK)

DMA_CHCTRL_CTRL_SRCMODE_SHIFT

#define DMA_CHCTRL_CTRL_SRCMODE_SHIFT   (17U)

DMA_CHCTRL_CTRL_SRCREQSEL_GET

#define DMA_CHCTRL_CTRL_SRCREQSEL_GET

(

x

)

(((uint32_t)(x) & DMA_CHCTRL_CTRL_SRCREQSEL_MASK) >> DMA_CHCTRL_CTRL_SRCREQSEL_SHIFT)

DMA_CHCTRL_CTRL_SRCREQSEL_MASK

#define DMA_CHCTRL_CTRL_SRCREQSEL_MASK   (0xF00U)

DMA_CHCTRL_CTRL_SRCREQSEL_SET

#define DMA_CHCTRL_CTRL_SRCREQSEL_SET

(

x

)

(((uint32_t)(x) << DMA_CHCTRL_CTRL_SRCREQSEL_SHIFT) & DMA_CHCTRL_CTRL_SRCREQSEL_MASK)

DMA_CHCTRL_CTRL_SRCREQSEL_SHIFT

#define DMA_CHCTRL_CTRL_SRCREQSEL_SHIFT   (8U)

DMA_CHCTRL_CTRL_SRCWIDTH_GET

#define DMA_CHCTRL_CTRL_SRCWIDTH_GET

(

x

)

(((uint32_t)(x) & DMA_CHCTRL_CTRL_SRCWIDTH_MASK) >> DMA_CHCTRL_CTRL_SRCWIDTH_SHIFT)

DMA_CHCTRL_CTRL_SRCWIDTH_MASK

#define DMA_CHCTRL_CTRL_SRCWIDTH_MASK   (0xE00000UL)

DMA_CHCTRL_CTRL_SRCWIDTH_SET

#define DMA_CHCTRL_CTRL_SRCWIDTH_SET

(

x

)

(((uint32_t)(x) << DMA_CHCTRL_CTRL_SRCWIDTH_SHIFT) & DMA_CHCTRL_CTRL_SRCWIDTH_MASK)

DMA_CHCTRL_CTRL_SRCWIDTH_SHIFT

#define DMA_CHCTRL_CTRL_SRCWIDTH_SHIFT   (21U)

DMA_CHCTRL_DSTADDR_DSTADDRL_GET

#define DMA_CHCTRL_DSTADDR_DSTADDRL_GET

(

x

)

(((uint32_t)(x) & DMA_CHCTRL_DSTADDR_DSTADDRL_MASK) >> DMA_CHCTRL_DSTADDR_DSTADDRL_SHIFT)

DMA_CHCTRL_DSTADDR_DSTADDRL_MASK

#define DMA_CHCTRL_DSTADDR_DSTADDRL_MASK   (0xFFFFFFFFUL)

DMA_CHCTRL_DSTADDR_DSTADDRL_SET

#define DMA_CHCTRL_DSTADDR_DSTADDRL_SET

(

x

)

(((uint32_t)(x) << DMA_CHCTRL_DSTADDR_DSTADDRL_SHIFT) & DMA_CHCTRL_DSTADDR_DSTADDRL_MASK)

DMA_CHCTRL_DSTADDR_DSTADDRL_SHIFT

#define DMA_CHCTRL_DSTADDR_DSTADDRL_SHIFT   (0U)

DMA_CHCTRL_DSTADDRH_DSTADDRH_GET

#define DMA_CHCTRL_DSTADDRH_DSTADDRH_GET

(

x

)

(((uint32_t)(x) & DMA_CHCTRL_DSTADDRH_DSTADDRH_MASK) >> DMA_CHCTRL_DSTADDRH_DSTADDRH_SHIFT)

DMA_CHCTRL_DSTADDRH_DSTADDRH_MASK

#define DMA_CHCTRL_DSTADDRH_DSTADDRH_MASK   (0xFFFFFFFFUL)

DMA_CHCTRL_DSTADDRH_DSTADDRH_SET

#define DMA_CHCTRL_DSTADDRH_DSTADDRH_SET

(

x

)

(((uint32_t)(x) << DMA_CHCTRL_DSTADDRH_DSTADDRH_SHIFT) & DMA_CHCTRL_DSTADDRH_DSTADDRH_MASK)

DMA_CHCTRL_DSTADDRH_DSTADDRH_SHIFT

#define DMA_CHCTRL_DSTADDRH_DSTADDRH_SHIFT   (0U)

DMA_CHCTRL_LLPOINTER_LLDBUSINFIDX_GET

#define DMA_CHCTRL_LLPOINTER_LLDBUSINFIDX_GET

(

x

)

(((uint32_t)(x) & DMA_CHCTRL_LLPOINTER_LLDBUSINFIDX_MASK) >> DMA_CHCTRL_LLPOINTER_LLDBUSINFIDX_SHIFT)

DMA_CHCTRL_LLPOINTER_LLDBUSINFIDX_MASK

#define DMA_CHCTRL_LLPOINTER_LLDBUSINFIDX_MASK   (0x1U)

DMA_CHCTRL_LLPOINTER_LLDBUSINFIDX_SET

#define DMA_CHCTRL_LLPOINTER_LLDBUSINFIDX_SET

(

x

)

(((uint32_t)(x) << DMA_CHCTRL_LLPOINTER_LLDBUSINFIDX_SHIFT) & DMA_CHCTRL_LLPOINTER_LLDBUSINFIDX_MASK)

DMA_CHCTRL_LLPOINTER_LLDBUSINFIDX_SHIFT

#define DMA_CHCTRL_LLPOINTER_LLDBUSINFIDX_SHIFT   (0U)

DMA_CHCTRL_LLPOINTER_LLPOINTERL_GET

#define DMA_CHCTRL_LLPOINTER_LLPOINTERL_GET

(

x

)

(((uint32_t)(x) & DMA_CHCTRL_LLPOINTER_LLPOINTERL_MASK) >> DMA_CHCTRL_LLPOINTER_LLPOINTERL_SHIFT)

DMA_CHCTRL_LLPOINTER_LLPOINTERL_MASK

#define DMA_CHCTRL_LLPOINTER_LLPOINTERL_MASK   (0xFFFFFFF8UL)

DMA_CHCTRL_LLPOINTER_LLPOINTERL_SET

#define DMA_CHCTRL_LLPOINTER_LLPOINTERL_SET

(

x

)

(((uint32_t)(x) << DMA_CHCTRL_LLPOINTER_LLPOINTERL_SHIFT) & DMA_CHCTRL_LLPOINTER_LLPOINTERL_MASK)

DMA_CHCTRL_LLPOINTER_LLPOINTERL_SHIFT

#define DMA_CHCTRL_LLPOINTER_LLPOINTERL_SHIFT   (3U)

DMA_CHCTRL_LLPOINTERH_LLPOINTERH_GET

#define DMA_CHCTRL_LLPOINTERH_LLPOINTERH_GET

(

x

)

(((uint32_t)(x) & DMA_CHCTRL_LLPOINTERH_LLPOINTERH_MASK) >> DMA_CHCTRL_LLPOINTERH_LLPOINTERH_SHIFT)

DMA_CHCTRL_LLPOINTERH_LLPOINTERH_MASK

#define DMA_CHCTRL_LLPOINTERH_LLPOINTERH_MASK   (0xFFFFFFFFUL)

DMA_CHCTRL_LLPOINTERH_LLPOINTERH_SET

#define DMA_CHCTRL_LLPOINTERH_LLPOINTERH_SET

(

x

)

(((uint32_t)(x) << DMA_CHCTRL_LLPOINTERH_LLPOINTERH_SHIFT) & DMA_CHCTRL_LLPOINTERH_LLPOINTERH_MASK)

DMA_CHCTRL_LLPOINTERH_LLPOINTERH_SHIFT

#define DMA_CHCTRL_LLPOINTERH_LLPOINTERH_SHIFT   (0U)

DMA_CHCTRL_SRCADDR_SRCADDRL_GET

#define DMA_CHCTRL_SRCADDR_SRCADDRL_GET

(

x

)

(((uint32_t)(x) & DMA_CHCTRL_SRCADDR_SRCADDRL_MASK) >> DMA_CHCTRL_SRCADDR_SRCADDRL_SHIFT)

DMA_CHCTRL_SRCADDR_SRCADDRL_MASK

#define DMA_CHCTRL_SRCADDR_SRCADDRL_MASK   (0xFFFFFFFFUL)

DMA_CHCTRL_SRCADDR_SRCADDRL_SET

#define DMA_CHCTRL_SRCADDR_SRCADDRL_SET

(

x

)

(((uint32_t)(x) << DMA_CHCTRL_SRCADDR_SRCADDRL_SHIFT) & DMA_CHCTRL_SRCADDR_SRCADDRL_MASK)

DMA_CHCTRL_SRCADDR_SRCADDRL_SHIFT

#define DMA_CHCTRL_SRCADDR_SRCADDRL_SHIFT   (0U)

DMA_CHCTRL_SRCADDRH_SRCADDRH_GET

#define DMA_CHCTRL_SRCADDRH_SRCADDRH_GET

(

x

)

(((uint32_t)(x) & DMA_CHCTRL_SRCADDRH_SRCADDRH_MASK) >> DMA_CHCTRL_SRCADDRH_SRCADDRH_SHIFT)

DMA_CHCTRL_SRCADDRH_SRCADDRH_MASK

#define DMA_CHCTRL_SRCADDRH_SRCADDRH_MASK   (0xFFFFFFFFUL)

DMA_CHCTRL_SRCADDRH_SRCADDRH_SET

#define DMA_CHCTRL_SRCADDRH_SRCADDRH_SET

(

x

)

(((uint32_t)(x) << DMA_CHCTRL_SRCADDRH_SRCADDRH_SHIFT) & DMA_CHCTRL_SRCADDRH_SRCADDRH_MASK)

DMA_CHCTRL_SRCADDRH_SRCADDRH_SHIFT

#define DMA_CHCTRL_SRCADDRH_SRCADDRH_SHIFT   (0U)

DMA_CHCTRL_TRANSIZE_TRANSIZE_GET

#define DMA_CHCTRL_TRANSIZE_TRANSIZE_GET

(

x

)

(((uint32_t)(x) & DMA_CHCTRL_TRANSIZE_TRANSIZE_MASK) >> DMA_CHCTRL_TRANSIZE_TRANSIZE_SHIFT)

DMA_CHCTRL_TRANSIZE_TRANSIZE_MASK

#define DMA_CHCTRL_TRANSIZE_TRANSIZE_MASK   (0xFFFFFFFFUL)

DMA_CHCTRL_TRANSIZE_TRANSIZE_SET

#define DMA_CHCTRL_TRANSIZE_TRANSIZE_SET

(

x

)

(((uint32_t)(x) << DMA_CHCTRL_TRANSIZE_TRANSIZE_SHIFT) & DMA_CHCTRL_TRANSIZE_TRANSIZE_MASK)

DMA_CHCTRL_TRANSIZE_TRANSIZE_SHIFT

#define DMA_CHCTRL_TRANSIZE_TRANSIZE_SHIFT   (0U)

DMA_CHEN_CHEN_GET

#define DMA_CHEN_CHEN_GET

(

x

)

(((uint32_t)(x) & DMA_CHEN_CHEN_MASK) >> DMA_CHEN_CHEN_SHIFT)

DMA_CHEN_CHEN_MASK

#define DMA_CHEN_CHEN_MASK   (0xFFFFFFFFUL)

DMA_CHEN_CHEN_SHIFT

#define DMA_CHEN_CHEN_SHIFT   (0U)

DMA_DMACFG_ADDRWIDTH_GET

#define DMA_DMACFG_ADDRWIDTH_GET

(

x

)

(((uint32_t)(x) & DMA_DMACFG_ADDRWIDTH_MASK) >> DMA_DMACFG_ADDRWIDTH_SHIFT)

DMA_DMACFG_ADDRWIDTH_MASK

#define DMA_DMACFG_ADDRWIDTH_MASK   (0xFE0000UL)

DMA_DMACFG_ADDRWIDTH_SHIFT

#define DMA_DMACFG_ADDRWIDTH_SHIFT   (17U)

DMA_DMACFG_BUSNUM_GET

#define DMA_DMACFG_BUSNUM_GET

(

x

)

(((uint32_t)(x) & DMA_DMACFG_BUSNUM_MASK) >> DMA_DMACFG_BUSNUM_SHIFT)

DMA_DMACFG_BUSNUM_MASK

#define DMA_DMACFG_BUSNUM_MASK   (0x8000U)

DMA_DMACFG_BUSNUM_SHIFT

#define DMA_DMACFG_BUSNUM_SHIFT   (15U)

DMA_DMACFG_CHAINXFR_GET

#define DMA_DMACFG_CHAINXFR_GET

(

x

)

(((uint32_t)(x) & DMA_DMACFG_CHAINXFR_MASK) >> DMA_DMACFG_CHAINXFR_SHIFT)

DMA_DMACFG_CHAINXFR_MASK

#define DMA_DMACFG_CHAINXFR_MASK   (0x80000000UL)

DMA_DMACFG_CHAINXFR_SHIFT

#define DMA_DMACFG_CHAINXFR_SHIFT   (31U)

DMA_DMACFG_CHANNELNUM_GET

#define DMA_DMACFG_CHANNELNUM_GET

(

x

)

(((uint32_t)(x) & DMA_DMACFG_CHANNELNUM_MASK) >> DMA_DMACFG_CHANNELNUM_SHIFT)

DMA_DMACFG_CHANNELNUM_MASK

#define DMA_DMACFG_CHANNELNUM_MASK   (0xFU)

DMA_DMACFG_CHANNELNUM_SHIFT

#define DMA_DMACFG_CHANNELNUM_SHIFT   (0U)

DMA_DMACFG_CORENUM_GET

#define DMA_DMACFG_CORENUM_GET

(

x

)

(((uint32_t)(x) & DMA_DMACFG_CORENUM_MASK) >> DMA_DMACFG_CORENUM_SHIFT)

DMA_DMACFG_CORENUM_MASK

#define DMA_DMACFG_CORENUM_MASK   (0x10000UL)

DMA_DMACFG_CORENUM_SHIFT

#define DMA_DMACFG_CORENUM_SHIFT   (16U)

DMA_DMACFG_DATAWIDTH_GET

#define DMA_DMACFG_DATAWIDTH_GET

(

x

)

(((uint32_t)(x) & DMA_DMACFG_DATAWIDTH_MASK) >> DMA_DMACFG_DATAWIDTH_SHIFT)

DMA_DMACFG_DATAWIDTH_MASK

#define DMA_DMACFG_DATAWIDTH_MASK   (0x3000000UL)

DMA_DMACFG_DATAWIDTH_SHIFT

#define DMA_DMACFG_DATAWIDTH_SHIFT   (24U)

DMA_DMACFG_FIFODEPTH_GET

#define DMA_DMACFG_FIFODEPTH_GET

(

x

)

(((uint32_t)(x) & DMA_DMACFG_FIFODEPTH_MASK) >> DMA_DMACFG_FIFODEPTH_SHIFT)

DMA_DMACFG_FIFODEPTH_MASK

#define DMA_DMACFG_FIFODEPTH_MASK   (0x3F0U)

DMA_DMACFG_FIFODEPTH_SHIFT

#define DMA_DMACFG_FIFODEPTH_SHIFT   (4U)

DMA_DMACFG_REQNUM_GET

#define DMA_DMACFG_REQNUM_GET

(

x

)

(((uint32_t)(x) & DMA_DMACFG_REQNUM_MASK) >> DMA_DMACFG_REQNUM_SHIFT)

DMA_DMACFG_REQNUM_MASK

#define DMA_DMACFG_REQNUM_MASK   (0x7C00U)

DMA_DMACFG_REQNUM_SHIFT

#define DMA_DMACFG_REQNUM_SHIFT   (10U)

DMA_DMACFG_REQSYNC_GET

#define DMA_DMACFG_REQSYNC_GET

(

x

)

(((uint32_t)(x) & DMA_DMACFG_REQSYNC_MASK) >> DMA_DMACFG_REQSYNC_SHIFT)

DMA_DMACFG_REQSYNC_MASK

#define DMA_DMACFG_REQSYNC_MASK   (0x40000000UL)

DMA_DMACFG_REQSYNC_SHIFT

#define DMA_DMACFG_REQSYNC_SHIFT   (30U)

DMA_DMACTRL_RESET_GET

#define DMA_DMACTRL_RESET_GET

(

x

)

(((uint32_t)(x) & DMA_DMACTRL_RESET_MASK) >> DMA_DMACTRL_RESET_SHIFT)

DMA_DMACTRL_RESET_MASK

#define DMA_DMACTRL_RESET_MASK   (0x1U)

DMA_DMACTRL_RESET_SET

#define DMA_DMACTRL_RESET_SET

(

x

)

(((uint32_t)(x) << DMA_DMACTRL_RESET_SHIFT) & DMA_DMACTRL_RESET_MASK)

DMA_DMACTRL_RESET_SHIFT

#define DMA_DMACTRL_RESET_SHIFT   (0U)

DMA_INTSTATUS_ABORT_GET

#define DMA_INTSTATUS_ABORT_GET

(

x

)

(((uint32_t)(x) & DMA_INTSTATUS_ABORT_MASK) >> DMA_INTSTATUS_ABORT_SHIFT)

DMA_INTSTATUS_ABORT_MASK

#define DMA_INTSTATUS_ABORT_MASK   (0xFF00U)

DMA_INTSTATUS_ABORT_SET

#define DMA_INTSTATUS_ABORT_SET

(

x

)

(((uint32_t)(x) << DMA_INTSTATUS_ABORT_SHIFT) & DMA_INTSTATUS_ABORT_MASK)

DMA_INTSTATUS_ABORT_SHIFT

#define DMA_INTSTATUS_ABORT_SHIFT   (8U)

DMA_INTSTATUS_ERROR_GET

#define DMA_INTSTATUS_ERROR_GET

(

x

)

(((uint32_t)(x) & DMA_INTSTATUS_ERROR_MASK) >> DMA_INTSTATUS_ERROR_SHIFT)

DMA_INTSTATUS_ERROR_MASK

#define DMA_INTSTATUS_ERROR_MASK   (0xFFU)

DMA_INTSTATUS_ERROR_SET

#define DMA_INTSTATUS_ERROR_SET

(

x

)

(((uint32_t)(x) << DMA_INTSTATUS_ERROR_SHIFT) & DMA_INTSTATUS_ERROR_MASK)

DMA_INTSTATUS_ERROR_SHIFT

#define DMA_INTSTATUS_ERROR_SHIFT   (0U)

DMA_INTSTATUS_TC_GET

#define DMA_INTSTATUS_TC_GET

(

x

)

(((uint32_t)(x) & DMA_INTSTATUS_TC_MASK) >> DMA_INTSTATUS_TC_SHIFT)

DMA_INTSTATUS_TC_MASK

#define DMA_INTSTATUS_TC_MASK   (0xFF0000UL)

DMA_INTSTATUS_TC_SET

#define DMA_INTSTATUS_TC_SET

(

x

)

(((uint32_t)(x) << DMA_INTSTATUS_TC_SHIFT) & DMA_INTSTATUS_TC_MASK)

DMA_INTSTATUS_TC_SHIFT

#define DMA_INTSTATUS_TC_SHIFT   (16U)