HPM SDK
HPMicro Software Development Kit
hpm_romapi.h
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1 /*
2  * Copyright (c) 2022-2024 HPMicro
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  *
6  */
7 
8 #ifndef HPM_ROMAPI_H
9 #define HPM_ROMAPI_H
10 
17 #include "hpm_common.h"
18 #include "hpm_otp_drv.h"
19 #include "hpm_romapi_xpi_def.h"
20 #include "hpm_romapi_xpi_soc_def.h"
21 #include "hpm_romapi_xpi_nor_def.h"
22 #include "hpm_romapi_xpi_ram_def.h"
23 #include "hpm_sdp_drv.h"
24 
25 /* XPI0 base address */
26 #define HPM_XPI0_BASE (0xF3000000UL)
27 /* XPI0 base pointer */
28 #define HPM_XPI0 ((XPI_Type *) HPM_XPI0_BASE)
31 /***********************************************************************************************************************
32  *
33  *
34  * Definitions
35  *
36  *
37  **********************************************************************************************************************/
41 typedef union {
42  uint32_t U;
43  struct {
44  uint32_t index: 8;
45  uint32_t peripheral: 8;
46  uint32_t src: 8;
47  uint32_t tag: 8;
48  };
50 
51 /*EXiP Region Parameter */
52 typedef struct {
53  uint32_t start;
54  uint32_t len;
55  uint8_t key[16];
56  uint8_t ctr[8];
58 
59 #define API_BOOT_TAG (0xEBU)
60 #define API_BOOT_SRC_OTP (0U)
61 #define API_BOOT_SRC_PRIMARY (1U)
62 #define API_BOOT_SRC_SERIAL_BOOT (2U)
63 #define API_BOOT_SRC_ISP (3U)
64 #define API_BOOT_PERIPH_AUTO (0U)
65 #define API_BOOT_PERIPH_UART (1U)
66 #define API_BOOT_PERIPH_USBHID (2U)
71 typedef struct {
73  uint32_t version;
75  void (*init)(void);
77  void (*deinit)(void);
79  uint32_t (*read_from_shadow)(uint32_t addr);
81  uint32_t (*read_from_ip)(uint32_t addr);
83  hpm_stat_t (*program)(uint32_t addr, const uint32_t *src, uint32_t num_of_words);
85  hpm_stat_t (*reload)(otp_region_t region);
87  hpm_stat_t (*lock)(uint32_t addr, otp_lock_option_t lock_option);
89  hpm_stat_t (*lock_shadow)(uint32_t addr, otp_lock_option_t lock_option);
91  hpm_stat_t (*set_configurable_region)(uint32_t start, uint32_t num_of_words);
93  hpm_stat_t (*write_shadow_register)(uint32_t addr, uint32_t data);
95 
99 typedef struct {
101  uint32_t version;
102 
104  hpm_stat_t (*get_config)(XPI_Type *base, xpi_ram_config_t *ram_cfg, xpi_ram_config_option_t *cfg_option);
105 
107  hpm_stat_t (*init)(XPI_Type *base, xpi_ram_config_t *ram_cfg);
109 
113 typedef struct {
115  uint32_t version;
117  hpm_stat_t (*sdp_ip_init)(void);
119  hpm_stat_t (*sdp_ip_deinit)(void);
121  hpm_stat_t (*aes_set_key)(sdp_aes_ctx_t *aes_ctx, const uint8_t *key, sdp_aes_key_bits_t keybits, uint32_t key_idx);
123  hpm_stat_t (*aes_crypt_ecb)(sdp_aes_ctx_t *aes_ctx, sdp_aes_op_t op, uint32_t len, const uint8_t *in, uint8_t *out);
125  hpm_stat_t (*aes_crypt_cbc)(sdp_aes_ctx_t *aes_ctx,
126  sdp_aes_op_t op,
127  uint32_t length,
128  uint8_t iv[16],
129  const uint8_t *input,
130  uint8_t *output);
132  hpm_stat_t
133  (*aes_crypt_ctr)(sdp_aes_ctx_t *aes_ctx, uint8_t *nonce_ctr, uint8_t *input, uint8_t *output, uint32_t length);
135  hpm_stat_t (*aes_ccm_gen_enc)(sdp_aes_ctx_t *aes_ctx,
136  uint32_t input_len,
137  const uint8_t *nonce,
138  uint32_t nonce_len,
139  const uint8_t *aad,
140  uint32_t aad_len,
141  const uint8_t *input,
142  uint8_t *output,
143  uint8_t *tag,
144  uint32_t tag_len);
146  hpm_stat_t (*aes_ccm_dec_verify)(sdp_aes_ctx_t *aes_ctx,
147  uint32_t input_len,
148  const uint8_t *nonce,
149  uint32_t nonce_len,
150  const uint8_t *aad,
151  uint32_t aad_len,
152  const uint8_t *input,
153  uint8_t *output,
154  const uint8_t *tag,
155  uint32_t tag_len);
157  hpm_stat_t (*memcpy)(sdp_dma_ctx_t *dma_ctx, void *dst, const void *src, uint32_t length);
159  hpm_stat_t (*memset)(sdp_dma_ctx_t *dma_ctx, void *dst, uint8_t pattern, uint32_t length);
161  hpm_stat_t (*hash_init)(sdp_hash_ctx_t *hash_ctx, sdp_hash_alg_t alg);
163  hpm_stat_t (*hash_update)(sdp_hash_ctx_t *hash_ctx, const uint8_t *data, uint32_t length);
165  hpm_stat_t (*hash_finish)(sdp_hash_ctx_t *hash_ctx, uint8_t *digest);
167  hpm_stat_t (*sm4_set_key)(sdp_sm4_ctx_t *sm4_ctx, const uint8_t *key, sdp_sm4_key_bits_t keybits, uint32_t key_idx);
169  hpm_stat_t (*sm4_crypt_ecb)(sdp_sm4_ctx_t *sm4_ctx, sdp_sm4_op_t op, uint32_t len, const uint8_t *in, uint8_t *out);
171  hpm_stat_t (*sm4_crypt_cbc)(sdp_sm4_ctx_t *sm4_ctx,
172  sdp_sm4_op_t op,
173  uint32_t length,
174  uint8_t iv[16],
175  const uint8_t *input,
176  uint8_t *output);
178  hpm_stat_t
179  (*sm4_crypt_ctr)(sdp_sm4_ctx_t *sm4_ctx, uint8_t *nonce_ctr, uint8_t *input, uint8_t *output, uint32_t length);
181  hpm_stat_t (*sm4_ccm_gen_enc)(sdp_sm4_ctx_t *sm4_ctx,
182  uint32_t input_len,
183  const uint8_t *nonce,
184  uint32_t nonce_len,
185  const uint8_t *aad,
186  uint32_t aad_len,
187  const uint8_t *input,
188  uint8_t *output,
189  uint8_t *tag,
190  uint32_t tag_len);
192  hpm_stat_t (*sm4_ccm_dec_verify)(sdp_sm4_ctx_t *sm4_ctx,
193  uint32_t input_len,
194  const uint8_t *nonce,
195  uint32_t nonce_len,
196  const uint8_t *aad,
197  uint32_t aad_len,
198  const uint8_t *input,
199  uint8_t *output,
200  const uint8_t *tag,
201  uint32_t tag_len);
203 
207 typedef struct {
209  const uint32_t version;
211  const char *copyright;
213  hpm_stat_t (*run_bootloader)(void *arg);
215  const otp_driver_interface_t *otp_driver_if;
217  const xpi_driver_interface_t *xpi_driver_if;
219  const xpi_nor_driver_interface_t *xpi_nor_driver_if;
221  const xpi_ram_driver_interface_t *xpi_ram_driver_if;
223  const sdp_driver_interface_t *sdp_driver_if;
225 
227 #define ROM_API_TABLE_ROOT ((const bootloader_api_table_t *)0x2001FF00U)
228 
229 
230 #ifdef __cplusplus
231 extern "C" {
232 #endif
233 
234 /***********************************************************************************************************************
235  *
236  *
237  * Enter bootloader Wrapper
238  *
239  *
240  **********************************************************************************************************************/
241 
247 static inline hpm_stat_t rom_enter_bootloader(void *ctx)
248 {
249  return ROM_API_TABLE_ROOT->run_bootloader(ctx);
250 }
251 
252 /***********************************************************************************************************************
253  *
254  *
255  * XPI NOR Driver Wrapper
256  *
257  *
258  **********************************************************************************************************************/
259 
267 ATTR_RAMFUNC
269  xpi_nor_config_t *nor_cfg,
270  xpi_nor_config_option_t *cfg_option)
271 {
272  hpm_stat_t status;
273  status = ROM_API_TABLE_ROOT->xpi_nor_driver_if->get_config(base, nor_cfg, cfg_option);
274  fencei();
275  return status;
276 }
277 
284 ATTR_RAMFUNC
285 static inline hpm_stat_t rom_xpi_nor_init(XPI_Type *base, xpi_nor_config_t *nor_config)
286 {
287  hpm_stat_t status;
288  status = ROM_API_TABLE_ROOT->xpi_nor_driver_if->init(base, nor_config);
289  fencei();
290  return status;
291 }
292 
302 ATTR_RAMFUNC
304  xpi_xfer_channel_t channel,
305  const xpi_nor_config_t *nor_config,
306  uint32_t start,
307  uint32_t length)
308 {
309  hpm_stat_t status = ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase(base, channel, nor_config, start, length);
310  fencei();
311  return status;
312 }
313 
322 ATTR_RAMFUNC
324  xpi_xfer_channel_t channel,
325  const xpi_nor_config_t *nor_config,
326  uint32_t start)
327 {
328  hpm_stat_t status = ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase_sector(base, channel, nor_config, start);
329  fencei();
330  return status;
331 }
332 
341 ATTR_RAMFUNC
343  xpi_xfer_channel_t channel,
344  const xpi_nor_config_t *nor_config,
345  uint32_t start)
346 {
347  return ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase_sector_nonblocking(base, channel, nor_config, start);
348 }
349 
358 ATTR_RAMFUNC
360  xpi_xfer_channel_t channel,
361  const xpi_nor_config_t *nor_config,
362  uint32_t start)
363 {
364  hpm_stat_t status = ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase_block(base, channel, nor_config, start);
365  fencei();
366  return status;
367 }
368 
377 ATTR_RAMFUNC
379  xpi_xfer_channel_t channel,
380  const xpi_nor_config_t *nor_config,
381  uint32_t start)
382 {
383  return ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase_block_nonblocking(base, channel, nor_config, start);
384 }
385 
393 ATTR_RAMFUNC
395  xpi_xfer_channel_t channel,
396  const xpi_nor_config_t *nor_config)
397 {
398  hpm_stat_t status = ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase_chip(base, channel, nor_config);
399  fencei();
400  return status;
401 }
402 
410 ATTR_RAMFUNC
412  xpi_xfer_channel_t channel,
413  const xpi_nor_config_t *nor_config)
414 {
415  hpm_stat_t status = ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase_chip_nonblocking(base, channel, nor_config);
416  fencei();
417  return status;
418 }
419 
430 ATTR_RAMFUNC
432  xpi_xfer_channel_t channel,
433  const xpi_nor_config_t *nor_config,
434  const uint32_t *src,
435  uint32_t dst_addr,
436  uint32_t length)
437 {
438  hpm_stat_t status = ROM_API_TABLE_ROOT->xpi_nor_driver_if->program(base, channel, nor_config, src, dst_addr, length);
439  fencei();
440  return status;
441 }
442 
453 ATTR_RAMFUNC
455  xpi_xfer_channel_t channel,
456  const xpi_nor_config_t *nor_config,
457  const uint32_t *src,
458  uint32_t dst_addr,
459  uint32_t length)
460 {
461  return ROM_API_TABLE_ROOT->xpi_nor_driver_if
462  ->page_program_nonblocking(base, channel, nor_config, src, dst_addr, length);
463 }
464 
476  xpi_xfer_channel_t channel,
477  const xpi_nor_config_t *nor_config,
478  uint32_t *dst,
479  uint32_t start,
480  uint32_t length)
481 {
482  return ROM_API_TABLE_ROOT->xpi_nor_driver_if->read(base, channel, nor_config, dst, start, length);
483 }
484 
492 ATTR_RAMFUNC
494  xpi_nor_config_t *config,
495  xpi_nor_config_option_t *cfg_option)
496 {
497  hpm_stat_t status;
498  status = ROM_API_TABLE_ROOT->xpi_nor_driver_if->auto_config(base, config, cfg_option);
499  fencei();
500  return status;
501 }
502 
512  xpi_nor_config_t *nor_cfg,
513  uint32_t property_id,
514  uint32_t *value)
515 {
516  return ROM_API_TABLE_ROOT->xpi_nor_driver_if->get_property(base, nor_cfg, property_id, value);
517 }
518 
530  xpi_xfer_channel_t channel,
531  const xpi_nor_config_t *nor_config,
532  uint32_t addr,
533  uint16_t *out_status)
534 {
535  return ROM_API_TABLE_ROOT->xpi_nor_driver_if->get_status(base, channel, nor_config, addr, out_status);
536 }
537 
547 ATTR_RAMFUNC
548 static inline bool rom_xpi_nor_remap_config(XPI_Type *base, uint32_t start, uint32_t len, uint32_t offset)
549 {
550  if ((base != HPM_XPI0) || ((start & 0xFFF) != 0) || ((len & 0xFFF) != 0)
551  || ((offset & 0xFFF) != 0)) {
552  return false;
553  }
554  static const uint8_t k_mc_xpi_remap_config[] = {
555  0x2e, 0x96, 0x23, 0x22, 0xc5, 0x42, 0x23, 0x24,
556  0xd5, 0x42, 0x93, 0xe5, 0x15, 0x00, 0x23, 0x20,
557  0xb5, 0x42, 0x05, 0x45, 0x82, 0x80,
558  };
559  typedef bool (*remap_config_cb_t)(XPI_Type *, uint32_t, uint32_t, uint32_t);
560  remap_config_cb_t cb = (remap_config_cb_t) &k_mc_xpi_remap_config;
561  bool result = cb(base, start, len, offset);
562  ROM_API_TABLE_ROOT->xpi_driver_if->software_reset(base);
563  fencei();
564  return result;
565 }
566 
571 ATTR_RAMFUNC
572 static inline void rom_xpi_nor_remap_disable(XPI_Type *base)
573 {
574  static const uint8_t k_mc_xpi_remap_disable[] = {
575  0x83, 0x27, 0x05, 0x42, 0xf9, 0x9b, 0x23, 0x20,
576  0xf5, 0x42, 0x82, 0x80,
577  };
578  typedef void (*remap_disable_cb_t)(XPI_Type *);
579  remap_disable_cb_t cb = (remap_disable_cb_t) &k_mc_xpi_remap_disable;
580  cb(base);
581  fencei();
582 }
583 
591 ATTR_RAMFUNC
592 static inline bool rom_xpi_nor_is_remap_enabled(XPI_Type *base)
593 {
594  static const uint8_t k_mc_xpi_remap_enabled[] = {
595  0x03, 0x25, 0x05, 0x42, 0x05, 0x89, 0x82, 0x80,
596  };
597  typedef bool (*remap_chk_cb_t)(XPI_Type *);
598  remap_chk_cb_t chk_cb = (remap_chk_cb_t) &k_mc_xpi_remap_enabled;
599  return chk_cb(base);
600 }
601 
610 ATTR_RAMFUNC
611 static inline bool rom_xpi_nor_exip_region_config(XPI_Type *base, uint32_t index, exip_region_param_t *param)
612 {
613  if (base != HPM_XPI0) {
614  return false;
615  }
616  static const uint8_t k_mc_exip_region_config[] = {
617  0x18, 0x4a, 0x9a, 0x05, 0x2e, 0x95, 0x85, 0x67,
618  0xaa, 0x97, 0x23, 0xa4, 0xe7, 0xd0, 0x4c, 0x4a,
619  0x14, 0x42, 0x58, 0x42, 0x23, 0xa6, 0xb7, 0xd0,
620  0x4c, 0x46, 0x36, 0x97, 0x13, 0x77, 0x07, 0xc0,
621  0x23, 0xa2, 0xb7, 0xd0, 0x0c, 0x46, 0x13, 0x67,
622  0x37, 0x00, 0x05, 0x45, 0x23, 0xa0, 0xb7, 0xd0,
623  0x0c, 0x4e, 0x23, 0xaa, 0xb7, 0xd0, 0x50, 0x4e,
624  0x23, 0xa8, 0xc7, 0xd0, 0x23, 0xac, 0xd7, 0xd0,
625  0x23, 0xae, 0xe7, 0xd0, 0x82, 0x80,
626  };
627  typedef void (*exip_region_config_cb_t)(XPI_Type *, uint32_t, exip_region_param_t *);
628  exip_region_config_cb_t cb = (exip_region_config_cb_t) &k_mc_exip_region_config;
629  cb(base, index, param);
630  ROM_API_TABLE_ROOT->xpi_driver_if->software_reset(base);
631  fencei();
632  return true;
633 }
634 
640 ATTR_RAMFUNC
641 static inline void rom_xpi_nor_exip_region_disable(XPI_Type *base, uint32_t index)
642 {
643  static const uint8_t k_mc_exip_region_disable[] = {
644  0x9a, 0x05, 0x2e, 0x95, 0x85, 0x67, 0xaa, 0x97,
645  0x03, 0xa7, 0xc7, 0xd1, 0x75, 0x9b, 0x23, 0xae,
646  0xe7, 0xd0, 0x82, 0x80
647  };
648  typedef void (*exip_region_disable_cb_t)(XPI_Type *, uint32_t);
649  exip_region_disable_cb_t cb = (exip_region_disable_cb_t) &k_mc_exip_region_disable;
650  cb(base, index);
651  ROM_API_TABLE_ROOT->xpi_driver_if->software_reset(base);
652  fencei();
653 }
654 
659 ATTR_RAMFUNC
660 static inline void rom_xpi_nor_exip_enable(XPI_Type *base)
661 {
662  static const uint8_t k_mc_exip_enable[] = {
663  0x85, 0x67, 0x3e, 0x95, 0x83, 0x27, 0x05, 0xc0,
664  0x37, 0x07, 0x00, 0x80, 0xd9, 0x8f, 0x23, 0x20,
665  0xf5, 0xc0, 0x82, 0x80
666  };
667  typedef void (*exip_enable_cb_t)(XPI_Type *);
668  exip_enable_cb_t cb = (exip_enable_cb_t) &k_mc_exip_enable;
669  cb(base);
670 }
671 
676 ATTR_RAMFUNC
677 static inline void rom_xpi_nor_exip_disable(XPI_Type *base)
678 {
679  static const uint8_t k_mc_exip_disable[] = {
680  0x85, 0x67, 0x3e, 0x95, 0x83, 0x27, 0x05, 0xc0,
681  0x86, 0x07, 0x85, 0x83, 0x23, 0x20, 0xf5, 0xc0,
682  0x82, 0x80
683  };
684  typedef void (*exip_disable_cb_t)(XPI_Type *);
685  exip_disable_cb_t cb = (exip_disable_cb_t) &k_mc_exip_disable;
686  cb(base);
687  ROM_API_TABLE_ROOT->xpi_driver_if->software_reset(base);
688  fencei();
689 }
690 
691 /***********************************************************************************************************************
692  *
693  *
694  * XPI RAM Driver Wrapper
695  *
696  *
697  **********************************************************************************************************************/
706  xpi_ram_config_t *ram_cfg,
707  xpi_ram_config_option_t *cfg_option)
708 {
709  return ROM_API_TABLE_ROOT->xpi_ram_driver_if->get_config(base, ram_cfg, cfg_option);
710 }
711 
718 static inline hpm_stat_t rom_xpi_ram_init(XPI_Type *base, xpi_ram_config_t *ram_cfg)
719 {
720  return ROM_API_TABLE_ROOT->xpi_ram_driver_if->init(base, ram_cfg);
721 }
722 
723 /***********************************************************************************************************************
724  *
725  *
726  * SDP Driver Wrapper
727  *
728  *
729  **********************************************************************************************************************/
733 static inline void rom_sdp_init(void)
734 {
735  ROM_API_TABLE_ROOT->sdp_driver_if->sdp_ip_init();
736 }
737 
741 static inline void rom_sdp_deinit(void)
742 {
743  ROM_API_TABLE_ROOT->sdp_driver_if->sdp_ip_deinit();
744 }
745 
755  const uint8_t *key,
756  sdp_aes_key_bits_t key_bits,
757  uint32_t key_idx)
758 {
759  return ROM_API_TABLE_ROOT->sdp_driver_if->aes_set_key(aes_ctx, key, key_bits, key_idx);
760 }
761 
772  sdp_aes_op_t op,
773  uint32_t len,
774  const uint8_t *in,
775  uint8_t *out)
776 {
777  return ROM_API_TABLE_ROOT->sdp_driver_if->aes_crypt_ecb(aes_ctx, op, len, in, out);
778 }
779 
791  sdp_aes_op_t op,
792  uint32_t length,
793  uint8_t iv[16],
794  const uint8_t *in,
795  uint8_t *out)
796 {
797  return ROM_API_TABLE_ROOT->sdp_driver_if->aes_crypt_cbc(aes_ctx, op, length, iv, in, out);
798 }
799 
808 static inline hpm_stat_t rom_sdp_sm4_set_key(sdp_sm4_ctx_t *sm4_ctx,
809  const uint8_t *key,
810  sdp_sm4_key_bits_t key_bits,
811  uint32_t key_idx)
812 {
813  return ROM_API_TABLE_ROOT->sdp_driver_if->sm4_set_key(sm4_ctx, key, key_bits, key_idx);
814 }
815 
825 static inline hpm_stat_t rom_sdp_sm4_crypt_ecb(sdp_sm4_ctx_t *sm4_ctx,
826  sdp_sm4_op_t op,
827  uint32_t len,
828  const uint8_t *in,
829  uint8_t *out)
830 {
831  return ROM_API_TABLE_ROOT->sdp_driver_if->sm4_crypt_ecb(sm4_ctx, op, len, in, out);
832 }
833 
844 static inline hpm_stat_t rom_sdp_sm4_crypt_cbc(sdp_sm4_ctx_t *sm4_ctx,
845  sdp_sm4_op_t op,
846  uint32_t length,
847  uint8_t iv[16],
848  const uint8_t *in,
849  uint8_t *out)
850 {
851  return ROM_API_TABLE_ROOT->sdp_driver_if->sm4_crypt_cbc(sm4_ctx, op, length, iv, in, out);
852 }
853 
861 {
862  return ROM_API_TABLE_ROOT->sdp_driver_if->hash_init(hash_ctx, alg);
863 }
864 
872 static inline hpm_stat_t rom_sdp_hash_update(sdp_hash_ctx_t *hash_ctx, const uint8_t *data, uint32_t length)
873 {
874  return ROM_API_TABLE_ROOT->sdp_driver_if->hash_update(hash_ctx, data, length);
875 }
876 
883 static inline hpm_stat_t rom_sdp_hash_finish(sdp_hash_ctx_t *hash_ctx, uint8_t *digest)
884 {
885  return ROM_API_TABLE_ROOT->sdp_driver_if->hash_finish(hash_ctx, digest);
886 }
887 
896 static inline hpm_stat_t rom_sdp_memcpy(sdp_dma_ctx_t *dma_ctx, void *dst, const void *src, uint32_t length)
897 {
898  return ROM_API_TABLE_ROOT->sdp_driver_if->memcpy(dma_ctx, dst, src, length);
899 }
900 
909 static inline hpm_stat_t rom_sdp_memset(sdp_dma_ctx_t *dma_ctx, void *dst, uint8_t pattern, uint32_t length)
910 {
911  return ROM_API_TABLE_ROOT->sdp_driver_if->memset(dma_ctx, dst, pattern, length);
912 }
913 
914 #ifdef __cplusplus
915 }
916 #endif
917 
923 #endif /* HPM_ROMAPI_H */
static hpm_stat_t rom_sdp_memset(sdp_dma_ctx_t *dma_ctx, void *dst, uint8_t pattern, uint32_t length)
SDP memset operation.
Definition: hpm_romapi.h:909
static hpm_stat_t rom_sdp_aes_crypt_cbc(sdp_aes_ctx_t *aes_ctx, sdp_aes_op_t op, uint32_t length, uint8_t iv[16], const uint8_t *in, uint8_t *out)
SDP AES CBC crypto operation(Encrypt or Decrypt)
Definition: hpm_romapi.h:790
static ATTR_RAMFUNC hpm_stat_t rom_xpi_nor_auto_config(XPI_Type *base, xpi_nor_config_t *config, xpi_nor_config_option_t *cfg_option)
Automatically configure XPI NOR based on cfg_option.
Definition: hpm_romapi.h:493
static ATTR_RAMFUNC hpm_stat_t rom_xpi_nor_init(XPI_Type *base, xpi_nor_config_t *nor_config)
Initialize XPI NOR based on nor_config.
Definition: hpm_romapi.h:285
static hpm_stat_t rom_xpi_nor_read(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t *dst, uint32_t start, uint32_t length)
Read data from specified FLASH address.
Definition: hpm_romapi.h:475
static hpm_stat_t rom_sdp_sm4_crypt_cbc(sdp_sm4_ctx_t *sm4_ctx, sdp_sm4_op_t op, uint32_t length, uint8_t iv[16], const uint8_t *in, uint8_t *out)
SDP SM4 CBC crypto operation(Encrypt or Decrypt)
Definition: hpm_romapi.h:844
static ATTR_RAMFUNC hpm_stat_t rom_xpi_nor_erase_chip_nonblocking(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config)
Erase the whole FLASH in non-blocking way.
Definition: hpm_romapi.h:411
static ATTR_RAMFUNC hpm_stat_t rom_xpi_nor_erase_chip(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config)
Erase the whole FLASH in blocking way.
Definition: hpm_romapi.h:394
static hpm_stat_t rom_sdp_memcpy(sdp_dma_ctx_t *dma_ctx, void *dst, const void *src, uint32_t length)
SDP memcpy operation.
Definition: hpm_romapi.h:896
static ATTR_RAMFUNC hpm_stat_t rom_xpi_nor_erase_block(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t start)
Erase specified FLASH blcok in blocking way.
Definition: hpm_romapi.h:359
static ATTR_RAMFUNC bool rom_xpi_nor_remap_config(XPI_Type *base, uint32_t start, uint32_t len, uint32_t offset)
Configure the XPI Address Remapping Logic.
Definition: hpm_romapi.h:548
static hpm_stat_t rom_sdp_sm4_crypt_ecb(sdp_sm4_ctx_t *sm4_ctx, sdp_sm4_op_t op, uint32_t len, const uint8_t *in, uint8_t *out)
SDP SM4 ECB crypto operation(Encrypt or Decrypt)
Definition: hpm_romapi.h:825
static ATTR_RAMFUNC bool rom_xpi_nor_exip_region_config(XPI_Type *base, uint32_t index, exip_region_param_t *param)
Configure Specified EXiP Region.
Definition: hpm_romapi.h:611
static ATTR_RAMFUNC void rom_xpi_nor_exip_enable(XPI_Type *base)
Enable global EXiP logic.
Definition: hpm_romapi.h:660
static hpm_stat_t rom_sdp_sm4_set_key(sdp_sm4_ctx_t *sm4_ctx, const uint8_t *key, sdp_sm4_key_bits_t key_bits, uint32_t key_idx)
Set SM4 key to SDP.
Definition: hpm_romapi.h:808
static void rom_sdp_init(void)
Initialize SDP IP.
Definition: hpm_romapi.h:733
static ATTR_RAMFUNC hpm_stat_t rom_xpi_nor_page_program_nonblocking(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, const uint32_t *src, uint32_t dst_addr, uint32_t length)
Page-Program data to specified FLASH address in non-blocking way.
Definition: hpm_romapi.h:454
static ATTR_RAMFUNC void rom_xpi_nor_exip_region_disable(XPI_Type *base, uint32_t index)
Disable EXiP Feature on specified EXiP Region.
Definition: hpm_romapi.h:641
static ATTR_RAMFUNC hpm_stat_t rom_xpi_nor_erase_sector_nonblocking(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t start)
Erase specified FLASH sector in non-blocking way.
Definition: hpm_romapi.h:342
static ATTR_RAMFUNC hpm_stat_t rom_xpi_nor_erase(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t start, uint32_t length)
Erase specified FLASH region.
Definition: hpm_romapi.h:303
static hpm_stat_t rom_enter_bootloader(void *ctx)
Eneter specified Boot mode.
Definition: hpm_romapi.h:247
static ATTR_RAMFUNC void rom_xpi_nor_remap_disable(XPI_Type *base)
Disable XPI Remapping logic.
Definition: hpm_romapi.h:572
static hpm_stat_t rom_sdp_aes_set_key(sdp_aes_ctx_t *aes_ctx, const uint8_t *key, sdp_aes_key_bits_t key_bits, uint32_t key_idx)
Set AES key to SDP.
Definition: hpm_romapi.h:754
static void rom_sdp_deinit(void)
De-initialize SDP IP.
Definition: hpm_romapi.h:741
static hpm_stat_t rom_xpi_ram_get_config(XPI_Type *base, xpi_ram_config_t *ram_cfg, xpi_ram_config_option_t *cfg_option)
Get XPI RAM configuration based on cfg_option.
Definition: hpm_romapi.h:705
static hpm_stat_t rom_xpi_ram_init(XPI_Type *base, xpi_ram_config_t *ram_cfg)
Initialize XPI RAM.
Definition: hpm_romapi.h:718
static hpm_stat_t rom_xpi_nor_get_status(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t addr, uint16_t *out_status)
Return the status register value on XPI NOR FLASH.
Definition: hpm_romapi.h:529
static ATTR_RAMFUNC hpm_stat_t rom_xpi_nor_erase_block_nonblocking(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t start)
Erase specified FLASH blcok in non-blocking way.
Definition: hpm_romapi.h:378
static ATTR_RAMFUNC void rom_xpi_nor_exip_disable(XPI_Type *base)
Disable global EXiP logic.
Definition: hpm_romapi.h:677
static ATTR_RAMFUNC hpm_stat_t rom_xpi_nor_program(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, const uint32_t *src, uint32_t dst_addr, uint32_t length)
Program data to specified FLASH address in blocking way.
Definition: hpm_romapi.h:431
static ATTR_RAMFUNC bool rom_xpi_nor_is_remap_enabled(XPI_Type *base)
Check whether XPI Remapping is enabled.
Definition: hpm_romapi.h:592
static hpm_stat_t rom_sdp_hash_finish(sdp_hash_ctx_t *hash_ctx, uint8_t *digest)
HASH finialize.
Definition: hpm_romapi.h:883
static hpm_stat_t rom_sdp_hash_update(sdp_hash_ctx_t *hash_ctx, const uint8_t *data, uint32_t length)
HASH Update.
Definition: hpm_romapi.h:872
static hpm_stat_t rom_sdp_aes_crypt_ecb(sdp_aes_ctx_t *aes_ctx, sdp_aes_op_t op, uint32_t len, const uint8_t *in, uint8_t *out)
SDP AES ECB crypto operation(Encrypt or Decrypt)
Definition: hpm_romapi.h:771
static hpm_stat_t rom_xpi_nor_get_property(XPI_Type *base, xpi_nor_config_t *nor_cfg, uint32_t property_id, uint32_t *value)
Get XPI NOR properties.
Definition: hpm_romapi.h:511
static ATTR_RAMFUNC hpm_stat_t rom_xpi_nor_get_config(XPI_Type *base, xpi_nor_config_t *nor_cfg, xpi_nor_config_option_t *cfg_option)
Get XPI NOR configuration via cfg_option.
Definition: hpm_romapi.h:268
static hpm_stat_t rom_sdp_hash_init(sdp_hash_ctx_t *hash_ctx, sdp_hash_alg_t alg)
HASH initialization.
Definition: hpm_romapi.h:860
static ATTR_RAMFUNC hpm_stat_t rom_xpi_nor_erase_sector(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t start)
Erase specified FLASH sector in blocking way.
Definition: hpm_romapi.h:323
static void init(hpm_panel_t *panel)
Definition: cc10128007.c:86
uint32_t hpm_stat_t
Definition: hpm_common.h:126
otp_region_t
OTP region definitions.
Definition: hpm_otp_drv.h:24
otp_lock_option_t
OTP lock options.
Definition: hpm_otp_drv.h:34
#define HPM_XPI0
Definition: hpm_romapi.h:28
#define ROM_API_TABLE_ROOT
Definition: hpm_romapi.h:227
sdp_crypto_op_t
Crypto operation option.
Definition: hpm_sdp_drv.h:44
sdp_crypto_key_bits_t
SDP AES key bit options.
Definition: hpm_sdp_drv.h:29
sdp_hash_alg_t
SDP HASH algorithm definitions.
Definition: hpm_sdp_drv.h:102
xpi_xfer_channel_t
XPI Transfer Channel type definitions.
Definition: hpm_romapi_xpi_def.h:53
uint32_t XPI_Type
XPI_Type definitions for.
Definition: hpm_romapi_xpi_def.h:22
#define fencei()
execute fence.i
Definition: riscv_core.h:88
Bootloader API table.
Definition: hpm_romapi.h:127
Definition: hpm_romapi.h:52
OTP driver interface.
Definition: hpm_romapi.h:82
SDP AES context structure.
Definition: hpm_sdp_drv.h:159
SDP DMA context.
Definition: hpm_sdp_drv.h:179
SDP API interface.
Definition: hpm_romapi.h:127
SDP HASH context.
Definition: hpm_sdp_drv.h:186
XPI driver interface.
Definition: hpm_romapi_xpi_def.h:225
XPI NOR configuration option The ROM SW can detect the FLASH configuration based on the following str...
Definition: hpm_romapi_xpi_nor_def.h:136
XPI NOR configuration structure.
Definition: hpm_romapi_xpi_nor_def.h:261
XPI NOR driver interface.
Definition: hpm_romapi_xpi_nor_def.h:308
XPI RAM configuration option The ROM SW can detect the FLASH configuration based on the following str...
Definition: hpm_romapi_xpi_ram_def.h:39
XPI RAM configuration structure.
Definition: hpm_romapi_xpi_ram_def.h:152
XPI RAM driver interface.
Definition: hpm_romapi.h:99
Enter Bootloader API argument.
Definition: hpm_romapi.h:41