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Data Structures | |
| struct | CAM_Type |
| #define CAM_ACT_SIZE_ACT_HEIGHT_GET | ( | x | ) | (((uint32_t)(x) & CAM_ACT_SIZE_ACT_HEIGHT_MASK) >> CAM_ACT_SIZE_ACT_HEIGHT_SHIFT) |
| #define CAM_ACT_SIZE_ACT_HEIGHT_MASK (0xFFFF0000UL) |
| #define CAM_ACT_SIZE_ACT_HEIGHT_SET | ( | x | ) | (((uint32_t)(x) << CAM_ACT_SIZE_ACT_HEIGHT_SHIFT) & CAM_ACT_SIZE_ACT_HEIGHT_MASK) |
| #define CAM_ACT_SIZE_ACT_HEIGHT_SHIFT (16U) |
| #define CAM_ACT_SIZE_ACT_WIDTH_GET | ( | x | ) | (((uint32_t)(x) & CAM_ACT_SIZE_ACT_WIDTH_MASK) >> CAM_ACT_SIZE_ACT_WIDTH_SHIFT) |
| #define CAM_ACT_SIZE_ACT_WIDTH_MASK (0xFFFFU) |
| #define CAM_ACT_SIZE_ACT_WIDTH_SET | ( | x | ) | (((uint32_t)(x) << CAM_ACT_SIZE_ACT_WIDTH_SHIFT) & CAM_ACT_SIZE_ACT_WIDTH_MASK) |
| #define CAM_ACT_SIZE_ACT_WIDTH_SHIFT (0U) |
| #define CAM_BUF_PARA_LINEBSP_STRIDE_GET | ( | x | ) | (((uint32_t)(x) & CAM_BUF_PARA_LINEBSP_STRIDE_MASK) >> CAM_BUF_PARA_LINEBSP_STRIDE_SHIFT) |
| #define CAM_BUF_PARA_LINEBSP_STRIDE_MASK (0xFFFFU) |
| #define CAM_BUF_PARA_LINEBSP_STRIDE_SET | ( | x | ) | (((uint32_t)(x) << CAM_BUF_PARA_LINEBSP_STRIDE_SHIFT) & CAM_BUF_PARA_LINEBSP_STRIDE_MASK) |
| #define CAM_BUF_PARA_LINEBSP_STRIDE_SHIFT (0U) |
| #define CAM_CLRKEY_HIGH_LIMIT_GET | ( | x | ) | (((uint32_t)(x) & CAM_CLRKEY_HIGH_LIMIT_MASK) >> CAM_CLRKEY_HIGH_LIMIT_SHIFT) |
| #define CAM_CLRKEY_HIGH_LIMIT_MASK (0xFFFFFFUL) |
| #define CAM_CLRKEY_HIGH_LIMIT_SET | ( | x | ) | (((uint32_t)(x) << CAM_CLRKEY_HIGH_LIMIT_SHIFT) & CAM_CLRKEY_HIGH_LIMIT_MASK) |
| #define CAM_CLRKEY_HIGH_LIMIT_SHIFT (0U) |
| #define CAM_CLRKEY_LOW_LIMIT_GET | ( | x | ) | (((uint32_t)(x) & CAM_CLRKEY_LOW_LIMIT_MASK) >> CAM_CLRKEY_LOW_LIMIT_SHIFT) |
| #define CAM_CLRKEY_LOW_LIMIT_MASK (0xFFFFFFUL) |
| #define CAM_CLRKEY_LOW_LIMIT_SET | ( | x | ) | (((uint32_t)(x) << CAM_CLRKEY_LOW_LIMIT_SHIFT) & CAM_CLRKEY_LOW_LIMIT_MASK) |
| #define CAM_CLRKEY_LOW_LIMIT_SHIFT (0U) |
| #define CAM_CR18_AWQOS_GET | ( | x | ) | (((uint32_t)(x) & CAM_CR18_AWQOS_MASK) >> CAM_CR18_AWQOS_SHIFT) |
| #define CAM_CR18_AWQOS_MASK (0x780U) |
| #define CAM_CR18_AWQOS_SET | ( | x | ) | (((uint32_t)(x) << CAM_CR18_AWQOS_SHIFT) & CAM_CR18_AWQOS_MASK) |
| #define CAM_CR18_AWQOS_SHIFT (7U) |
| #define CAM_CR18_CAM_ENABLE_GET | ( | x | ) | (((uint32_t)(x) & CAM_CR18_CAM_ENABLE_MASK) >> CAM_CR18_CAM_ENABLE_SHIFT) |
| #define CAM_CR18_CAM_ENABLE_MASK (0x80000000UL) |
| #define CAM_CR18_CAM_ENABLE_SET | ( | x | ) | (((uint32_t)(x) << CAM_CR18_CAM_ENABLE_SHIFT) & CAM_CR18_CAM_ENABLE_MASK) |
| #define CAM_CR18_CAM_ENABLE_SHIFT (31U) |
| #define CAM_CR1_ASYNC_RXFIFO_CLR_GET | ( | x | ) | (((uint32_t)(x) & CAM_CR1_ASYNC_RXFIFO_CLR_MASK) >> CAM_CR1_ASYNC_RXFIFO_CLR_SHIFT) |
| #define CAM_CR1_ASYNC_RXFIFO_CLR_MASK (0x100000UL) |
| #define CAM_CR1_ASYNC_RXFIFO_CLR_SET | ( | x | ) | (((uint32_t)(x) << CAM_CR1_ASYNC_RXFIFO_CLR_SHIFT) & CAM_CR1_ASYNC_RXFIFO_CLR_MASK) |
| #define CAM_CR1_ASYNC_RXFIFO_CLR_SHIFT (20U) |
| #define CAM_CR1_COLOR_EXT_GET | ( | x | ) | (((uint32_t)(x) & CAM_CR1_COLOR_EXT_MASK) >> CAM_CR1_COLOR_EXT_SHIFT) |
| #define CAM_CR1_COLOR_EXT_MASK (0x20000000UL) |
| #define CAM_CR1_COLOR_EXT_SET | ( | x | ) | (((uint32_t)(x) << CAM_CR1_COLOR_EXT_SHIFT) & CAM_CR1_COLOR_EXT_MASK) |
| #define CAM_CR1_COLOR_EXT_SHIFT (29U) |
| #define CAM_CR1_COLOR_FORMATS_GET | ( | x | ) | (((uint32_t)(x) & CAM_CR1_COLOR_FORMATS_MASK) >> CAM_CR1_COLOR_FORMATS_SHIFT) |
| #define CAM_CR1_COLOR_FORMATS_MASK (0x78U) |
| #define CAM_CR1_COLOR_FORMATS_SET | ( | x | ) | (((uint32_t)(x) << CAM_CR1_COLOR_FORMATS_SHIFT) & CAM_CR1_COLOR_FORMATS_MASK) |
| #define CAM_CR1_COLOR_FORMATS_SHIFT (3U) |
| #define CAM_CR1_INV_DATA_GET | ( | x | ) | (((uint32_t)(x) & CAM_CR1_INV_DATA_MASK) >> CAM_CR1_INV_DATA_SHIFT) |
| #define CAM_CR1_INV_DATA_MASK (0x8000U) |
| #define CAM_CR1_INV_DATA_SET | ( | x | ) | (((uint32_t)(x) << CAM_CR1_INV_DATA_SHIFT) & CAM_CR1_INV_DATA_MASK) |
| #define CAM_CR1_INV_DATA_SHIFT (15U) |
| #define CAM_CR1_INV_DEN_GET | ( | x | ) | (((uint32_t)(x) & CAM_CR1_INV_DEN_MASK) >> CAM_CR1_INV_DEN_SHIFT) |
| #define CAM_CR1_INV_DEN_MASK (0x40000000UL) |
| #define CAM_CR1_INV_DEN_SET | ( | x | ) | (((uint32_t)(x) << CAM_CR1_INV_DEN_SHIFT) & CAM_CR1_INV_DEN_MASK) |
| #define CAM_CR1_INV_DEN_SHIFT (30U) |
| #define CAM_CR1_INV_HSYNC_GET | ( | x | ) | (((uint32_t)(x) & CAM_CR1_INV_HSYNC_MASK) >> CAM_CR1_INV_HSYNC_SHIFT) |
| #define CAM_CR1_INV_HSYNC_MASK (0x8000000UL) |
| #define CAM_CR1_INV_HSYNC_SET | ( | x | ) | (((uint32_t)(x) << CAM_CR1_INV_HSYNC_SHIFT) & CAM_CR1_INV_HSYNC_MASK) |
| #define CAM_CR1_INV_HSYNC_SHIFT (27U) |
| #define CAM_CR1_INV_PIXCLK_GET | ( | x | ) | (((uint32_t)(x) & CAM_CR1_INV_PIXCLK_MASK) >> CAM_CR1_INV_PIXCLK_SHIFT) |
| #define CAM_CR1_INV_PIXCLK_MASK (0x10000000UL) |
| #define CAM_CR1_INV_PIXCLK_SET | ( | x | ) | (((uint32_t)(x) << CAM_CR1_INV_PIXCLK_SHIFT) & CAM_CR1_INV_PIXCLK_MASK) |
| #define CAM_CR1_INV_PIXCLK_SHIFT (28U) |
| #define CAM_CR1_INV_VSYNC_GET | ( | x | ) | (((uint32_t)(x) & CAM_CR1_INV_VSYNC_MASK) >> CAM_CR1_INV_VSYNC_SHIFT) |
| #define CAM_CR1_INV_VSYNC_MASK (0x4000000UL) |
| #define CAM_CR1_INV_VSYNC_SET | ( | x | ) | (((uint32_t)(x) << CAM_CR1_INV_VSYNC_SHIFT) & CAM_CR1_INV_VSYNC_MASK) |
| #define CAM_CR1_INV_VSYNC_SHIFT (26U) |
| #define CAM_CR1_RESTART_BUSPTR_GET | ( | x | ) | (((uint32_t)(x) & CAM_CR1_RESTART_BUSPTR_MASK) >> CAM_CR1_RESTART_BUSPTR_SHIFT) |
| #define CAM_CR1_RESTART_BUSPTR_MASK (0x800000UL) |
| #define CAM_CR1_RESTART_BUSPTR_SET | ( | x | ) | (((uint32_t)(x) << CAM_CR1_RESTART_BUSPTR_SHIFT) & CAM_CR1_RESTART_BUSPTR_MASK) |
| #define CAM_CR1_RESTART_BUSPTR_SHIFT (23U) |
| #define CAM_CR1_SENSOR_BIT_WIDTH_GET | ( | x | ) | (((uint32_t)(x) & CAM_CR1_SENSOR_BIT_WIDTH_MASK) >> CAM_CR1_SENSOR_BIT_WIDTH_SHIFT) |
| #define CAM_CR1_SENSOR_BIT_WIDTH_MASK (0x7U) |
| #define CAM_CR1_SENSOR_BIT_WIDTH_SET | ( | x | ) | (((uint32_t)(x) << CAM_CR1_SENSOR_BIT_WIDTH_SHIFT) & CAM_CR1_SENSOR_BIT_WIDTH_MASK) |
| #define CAM_CR1_SENSOR_BIT_WIDTH_SHIFT (0U) |
| #define CAM_CR1_SOF_INT_POL_GET | ( | x | ) | (((uint32_t)(x) & CAM_CR1_SOF_INT_POL_MASK) >> CAM_CR1_SOF_INT_POL_SHIFT) |
| #define CAM_CR1_SOF_INT_POL_MASK (0x20000UL) |
| #define CAM_CR1_SOF_INT_POL_SET | ( | x | ) | (((uint32_t)(x) << CAM_CR1_SOF_INT_POL_SHIFT) & CAM_CR1_SOF_INT_POL_MASK) |
| #define CAM_CR1_SOF_INT_POL_SHIFT (17U) |
| #define CAM_CR1_STORAGE_MODE_GET | ( | x | ) | (((uint32_t)(x) & CAM_CR1_STORAGE_MODE_MASK) >> CAM_CR1_STORAGE_MODE_SHIFT) |
| #define CAM_CR1_STORAGE_MODE_MASK (0xC00U) |
| #define CAM_CR1_STORAGE_MODE_SET | ( | x | ) | (((uint32_t)(x) << CAM_CR1_STORAGE_MODE_SHIFT) & CAM_CR1_STORAGE_MODE_MASK) |
| #define CAM_CR1_STORAGE_MODE_SHIFT (10U) |
| #define CAM_CR1_SWAP16_EN_GET | ( | x | ) | (((uint32_t)(x) & CAM_CR1_SWAP16_EN_MASK) >> CAM_CR1_SWAP16_EN_SHIFT) |
| #define CAM_CR1_SWAP16_EN_MASK (0x2000000UL) |
| #define CAM_CR1_SWAP16_EN_SET | ( | x | ) | (((uint32_t)(x) << CAM_CR1_SWAP16_EN_SHIFT) & CAM_CR1_SWAP16_EN_MASK) |
| #define CAM_CR1_SWAP16_EN_SHIFT (25U) |
| #define CAM_CR1_SYNC_RXFIFO_CLR_GET | ( | x | ) | (((uint32_t)(x) & CAM_CR1_SYNC_RXFIFO_CLR_MASK) >> CAM_CR1_SYNC_RXFIFO_CLR_SHIFT) |
| #define CAM_CR1_SYNC_RXFIFO_CLR_MASK (0x80000UL) |
| #define CAM_CR1_SYNC_RXFIFO_CLR_SET | ( | x | ) | (((uint32_t)(x) << CAM_CR1_SYNC_RXFIFO_CLR_SHIFT) & CAM_CR1_SYNC_RXFIFO_CLR_MASK) |
| #define CAM_CR1_SYNC_RXFIFO_CLR_SHIFT (19U) |
| #define CAM_CR20_BIG_END_GET | ( | x | ) | (((uint32_t)(x) & CAM_CR20_BIG_END_MASK) >> CAM_CR20_BIG_END_SHIFT) |
| #define CAM_CR20_BIG_END_MASK (0x100U) |
| #define CAM_CR20_BIG_END_SET | ( | x | ) | (((uint32_t)(x) << CAM_CR20_BIG_END_SHIFT) & CAM_CR20_BIG_END_MASK) |
| #define CAM_CR20_BIG_END_SHIFT (8U) |
| #define CAM_CR20_BINARY_EN_GET | ( | x | ) | (((uint32_t)(x) & CAM_CR20_BINARY_EN_MASK) >> CAM_CR20_BINARY_EN_SHIFT) |
| #define CAM_CR20_BINARY_EN_MASK (0x80000000UL) |
| #define CAM_CR20_BINARY_EN_SET | ( | x | ) | (((uint32_t)(x) << CAM_CR20_BINARY_EN_SHIFT) & CAM_CR20_BINARY_EN_MASK) |
| #define CAM_CR20_BINARY_EN_SHIFT (31U) |
| #define CAM_CR20_HISTOGRAM_EN_GET | ( | x | ) | (((uint32_t)(x) & CAM_CR20_HISTOGRAM_EN_MASK) >> CAM_CR20_HISTOGRAM_EN_SHIFT) |
| #define CAM_CR20_HISTOGRAM_EN_MASK (0x40000000UL) |
| #define CAM_CR20_HISTOGRAM_EN_SET | ( | x | ) | (((uint32_t)(x) << CAM_CR20_HISTOGRAM_EN_SHIFT) & CAM_CR20_HISTOGRAM_EN_MASK) |
| #define CAM_CR20_HISTOGRAM_EN_SHIFT (30U) |
| #define CAM_CR20_THRESHOLD_GET | ( | x | ) | (((uint32_t)(x) & CAM_CR20_THRESHOLD_MASK) >> CAM_CR20_THRESHOLD_SHIFT) |
| #define CAM_CR20_THRESHOLD_MASK (0xFFU) |
| #define CAM_CR20_THRESHOLD_SET | ( | x | ) | (((uint32_t)(x) << CAM_CR20_THRESHOLD_SHIFT) & CAM_CR20_THRESHOLD_MASK) |
| #define CAM_CR20_THRESHOLD_SHIFT (0U) |
| #define CAM_CR2_CLRBITFORMAT_GET | ( | x | ) | (((uint32_t)(x) & CAM_CR2_CLRBITFORMAT_MASK) >> CAM_CR2_CLRBITFORMAT_SHIFT) |
| #define CAM_CR2_CLRBITFORMAT_MASK (0xFU) |
| #define CAM_CR2_CLRBITFORMAT_SET | ( | x | ) | (((uint32_t)(x) << CAM_CR2_CLRBITFORMAT_SHIFT) & CAM_CR2_CLRBITFORMAT_MASK) |
| #define CAM_CR2_CLRBITFORMAT_SHIFT (0U) |
| #define CAM_CR2_DMA_REQ_EN_RFF_GET | ( | x | ) | (((uint32_t)(x) & CAM_CR2_DMA_REQ_EN_RFF_MASK) >> CAM_CR2_DMA_REQ_EN_RFF_SHIFT) |
| #define CAM_CR2_DMA_REQ_EN_RFF_MASK (0x20U) |
| #define CAM_CR2_DMA_REQ_EN_RFF_SET | ( | x | ) | (((uint32_t)(x) << CAM_CR2_DMA_REQ_EN_RFF_SHIFT) & CAM_CR2_DMA_REQ_EN_RFF_MASK) |
| #define CAM_CR2_DMA_REQ_EN_RFF_SHIFT (5U) |
| #define CAM_CR2_FRMCNT_15_0_GET | ( | x | ) | (((uint32_t)(x) & CAM_CR2_FRMCNT_15_0_MASK) >> CAM_CR2_FRMCNT_15_0_SHIFT) |
| #define CAM_CR2_FRMCNT_15_0_MASK (0xFFFF0000UL) |
| #define CAM_CR2_FRMCNT_15_0_SHIFT (16U) |
| #define CAM_CR2_FRMCNT_RST_GET | ( | x | ) | (((uint32_t)(x) & CAM_CR2_FRMCNT_RST_MASK) >> CAM_CR2_FRMCNT_RST_SHIFT) |
| #define CAM_CR2_FRMCNT_RST_MASK (0x8000U) |
| #define CAM_CR2_FRMCNT_RST_SET | ( | x | ) | (((uint32_t)(x) << CAM_CR2_FRMCNT_RST_SHIFT) & CAM_CR2_FRMCNT_RST_MASK) |
| #define CAM_CR2_FRMCNT_RST_SHIFT (15U) |
| #define CAM_CR2_RXFF_LEVEL_GET | ( | x | ) | (((uint32_t)(x) & CAM_CR2_RXFF_LEVEL_MASK) >> CAM_CR2_RXFF_LEVEL_SHIFT) |
| #define CAM_CR2_RXFF_LEVEL_MASK (0xE00U) |
| #define CAM_CR2_RXFF_LEVEL_SET | ( | x | ) | (((uint32_t)(x) << CAM_CR2_RXFF_LEVEL_SHIFT) & CAM_CR2_RXFF_LEVEL_MASK) |
| #define CAM_CR2_RXFF_LEVEL_SHIFT (9U) |
| #define CAM_CSC_COEF0_C0_GET | ( | x | ) | (((uint32_t)(x) & CAM_CSC_COEF0_C0_MASK) >> CAM_CSC_COEF0_C0_SHIFT) |
| #define CAM_CSC_COEF0_C0_MASK (0x1FFC0000UL) |
| #define CAM_CSC_COEF0_C0_SET | ( | x | ) | (((uint32_t)(x) << CAM_CSC_COEF0_C0_SHIFT) & CAM_CSC_COEF0_C0_MASK) |
| #define CAM_CSC_COEF0_C0_SHIFT (18U) |
| #define CAM_CSC_COEF0_ENABLE_GET | ( | x | ) | (((uint32_t)(x) & CAM_CSC_COEF0_ENABLE_MASK) >> CAM_CSC_COEF0_ENABLE_SHIFT) |
| #define CAM_CSC_COEF0_ENABLE_MASK (0x40000000UL) |
| #define CAM_CSC_COEF0_ENABLE_SET | ( | x | ) | (((uint32_t)(x) << CAM_CSC_COEF0_ENABLE_SHIFT) & CAM_CSC_COEF0_ENABLE_MASK) |
| #define CAM_CSC_COEF0_ENABLE_SHIFT (30U) |
| #define CAM_CSC_COEF0_UV_OFFSET_GET | ( | x | ) | (((uint32_t)(x) & CAM_CSC_COEF0_UV_OFFSET_MASK) >> CAM_CSC_COEF0_UV_OFFSET_SHIFT) |
| #define CAM_CSC_COEF0_UV_OFFSET_MASK (0x3FE00UL) |
| #define CAM_CSC_COEF0_UV_OFFSET_SET | ( | x | ) | (((uint32_t)(x) << CAM_CSC_COEF0_UV_OFFSET_SHIFT) & CAM_CSC_COEF0_UV_OFFSET_MASK) |
| #define CAM_CSC_COEF0_UV_OFFSET_SHIFT (9U) |
| #define CAM_CSC_COEF0_Y_OFFSET_GET | ( | x | ) | (((uint32_t)(x) & CAM_CSC_COEF0_Y_OFFSET_MASK) >> CAM_CSC_COEF0_Y_OFFSET_SHIFT) |
| #define CAM_CSC_COEF0_Y_OFFSET_MASK (0x1FFU) |
| #define CAM_CSC_COEF0_Y_OFFSET_SET | ( | x | ) | (((uint32_t)(x) << CAM_CSC_COEF0_Y_OFFSET_SHIFT) & CAM_CSC_COEF0_Y_OFFSET_MASK) |
| #define CAM_CSC_COEF0_Y_OFFSET_SHIFT (0U) |
| #define CAM_CSC_COEF0_YCBCR_MODE_GET | ( | x | ) | (((uint32_t)(x) & CAM_CSC_COEF0_YCBCR_MODE_MASK) >> CAM_CSC_COEF0_YCBCR_MODE_SHIFT) |
| #define CAM_CSC_COEF0_YCBCR_MODE_MASK (0x80000000UL) |
| #define CAM_CSC_COEF0_YCBCR_MODE_SET | ( | x | ) | (((uint32_t)(x) << CAM_CSC_COEF0_YCBCR_MODE_SHIFT) & CAM_CSC_COEF0_YCBCR_MODE_MASK) |
| #define CAM_CSC_COEF0_YCBCR_MODE_SHIFT (31U) |
| #define CAM_CSC_COEF1_C1_GET | ( | x | ) | (((uint32_t)(x) & CAM_CSC_COEF1_C1_MASK) >> CAM_CSC_COEF1_C1_SHIFT) |
| #define CAM_CSC_COEF1_C1_MASK (0x7FF0000UL) |
| #define CAM_CSC_COEF1_C1_SET | ( | x | ) | (((uint32_t)(x) << CAM_CSC_COEF1_C1_SHIFT) & CAM_CSC_COEF1_C1_MASK) |
| #define CAM_CSC_COEF1_C1_SHIFT (16U) |
| #define CAM_CSC_COEF1_C4_GET | ( | x | ) | (((uint32_t)(x) & CAM_CSC_COEF1_C4_MASK) >> CAM_CSC_COEF1_C4_SHIFT) |
| #define CAM_CSC_COEF1_C4_MASK (0x7FFU) |
| #define CAM_CSC_COEF1_C4_SET | ( | x | ) | (((uint32_t)(x) << CAM_CSC_COEF1_C4_SHIFT) & CAM_CSC_COEF1_C4_MASK) |
| #define CAM_CSC_COEF1_C4_SHIFT (0U) |
| #define CAM_CSC_COEF2_C2_GET | ( | x | ) | (((uint32_t)(x) & CAM_CSC_COEF2_C2_MASK) >> CAM_CSC_COEF2_C2_SHIFT) |
| #define CAM_CSC_COEF2_C2_MASK (0x7FF0000UL) |
| #define CAM_CSC_COEF2_C2_SET | ( | x | ) | (((uint32_t)(x) << CAM_CSC_COEF2_C2_SHIFT) & CAM_CSC_COEF2_C2_MASK) |
| #define CAM_CSC_COEF2_C2_SHIFT (16U) |
| #define CAM_CSC_COEF2_C3_GET | ( | x | ) | (((uint32_t)(x) & CAM_CSC_COEF2_C3_MASK) >> CAM_CSC_COEF2_C3_SHIFT) |
| #define CAM_CSC_COEF2_C3_MASK (0x7FFU) |
| #define CAM_CSC_COEF2_C3_SET | ( | x | ) | (((uint32_t)(x) << CAM_CSC_COEF2_C3_SHIFT) & CAM_CSC_COEF2_C3_MASK) |
| #define CAM_CSC_COEF2_C3_SHIFT (0U) |
| #define CAM_DMASA_FB1_PTR_GET | ( | x | ) | (((uint32_t)(x) & CAM_DMASA_FB1_PTR_MASK) >> CAM_DMASA_FB1_PTR_SHIFT) |
| #define CAM_DMASA_FB1_PTR_MASK (0xFFFFFFFCUL) |
| #define CAM_DMASA_FB1_PTR_SET | ( | x | ) | (((uint32_t)(x) << CAM_DMASA_FB1_PTR_SHIFT) & CAM_DMASA_FB1_PTR_MASK) |
| #define CAM_DMASA_FB1_PTR_SHIFT (2U) |
| #define CAM_DMASA_FB2_PTR_GET | ( | x | ) | (((uint32_t)(x) & CAM_DMASA_FB2_PTR_MASK) >> CAM_DMASA_FB2_PTR_SHIFT) |
| #define CAM_DMASA_FB2_PTR_MASK (0xFFFFFFFCUL) |
| #define CAM_DMASA_FB2_PTR_SET | ( | x | ) | (((uint32_t)(x) << CAM_DMASA_FB2_PTR_SHIFT) & CAM_DMASA_FB2_PTR_MASK) |
| #define CAM_DMASA_FB2_PTR_SHIFT (2U) |
| #define CAM_HISTOGRAM_FIFO_DATA0 (0UL) |
| #define CAM_HISTOGRAM_FIFO_DATA1 (1UL) |
| #define CAM_HISTOGRAM_FIFO_DATA10 (10UL) |
| #define CAM_HISTOGRAM_FIFO_DATA100 (100UL) |
| #define CAM_HISTOGRAM_FIFO_DATA101 (101UL) |
| #define CAM_HISTOGRAM_FIFO_DATA102 (102UL) |
| #define CAM_HISTOGRAM_FIFO_DATA103 (103UL) |
| #define CAM_HISTOGRAM_FIFO_DATA104 (104UL) |
| #define CAM_HISTOGRAM_FIFO_DATA105 (105UL) |
| #define CAM_HISTOGRAM_FIFO_DATA106 (106UL) |
| #define CAM_HISTOGRAM_FIFO_DATA107 (107UL) |
| #define CAM_HISTOGRAM_FIFO_DATA108 (108UL) |
| #define CAM_HISTOGRAM_FIFO_DATA109 (109UL) |
| #define CAM_HISTOGRAM_FIFO_DATA11 (11UL) |
| #define CAM_HISTOGRAM_FIFO_DATA110 (110UL) |
| #define CAM_HISTOGRAM_FIFO_DATA111 (111UL) |
| #define CAM_HISTOGRAM_FIFO_DATA112 (112UL) |
| #define CAM_HISTOGRAM_FIFO_DATA113 (113UL) |
| #define CAM_HISTOGRAM_FIFO_DATA114 (114UL) |
| #define CAM_HISTOGRAM_FIFO_DATA115 (115UL) |
| #define CAM_HISTOGRAM_FIFO_DATA116 (116UL) |
| #define CAM_HISTOGRAM_FIFO_DATA117 (117UL) |
| #define CAM_HISTOGRAM_FIFO_DATA118 (118UL) |
| #define CAM_HISTOGRAM_FIFO_DATA119 (119UL) |
| #define CAM_HISTOGRAM_FIFO_DATA12 (12UL) |
| #define CAM_HISTOGRAM_FIFO_DATA120 (120UL) |
| #define CAM_HISTOGRAM_FIFO_DATA121 (121UL) |
| #define CAM_HISTOGRAM_FIFO_DATA122 (122UL) |
| #define CAM_HISTOGRAM_FIFO_DATA123 (123UL) |
| #define CAM_HISTOGRAM_FIFO_DATA124 (124UL) |
| #define CAM_HISTOGRAM_FIFO_DATA125 (125UL) |
| #define CAM_HISTOGRAM_FIFO_DATA126 (126UL) |
| #define CAM_HISTOGRAM_FIFO_DATA127 (127UL) |
| #define CAM_HISTOGRAM_FIFO_DATA128 (128UL) |
| #define CAM_HISTOGRAM_FIFO_DATA129 (129UL) |
| #define CAM_HISTOGRAM_FIFO_DATA13 (13UL) |
| #define CAM_HISTOGRAM_FIFO_DATA130 (130UL) |
| #define CAM_HISTOGRAM_FIFO_DATA131 (131UL) |
| #define CAM_HISTOGRAM_FIFO_DATA132 (132UL) |
| #define CAM_HISTOGRAM_FIFO_DATA133 (133UL) |
| #define CAM_HISTOGRAM_FIFO_DATA134 (134UL) |
| #define CAM_HISTOGRAM_FIFO_DATA135 (135UL) |
| #define CAM_HISTOGRAM_FIFO_DATA136 (136UL) |
| #define CAM_HISTOGRAM_FIFO_DATA137 (137UL) |
| #define CAM_HISTOGRAM_FIFO_DATA138 (138UL) |
| #define CAM_HISTOGRAM_FIFO_DATA139 (139UL) |
| #define CAM_HISTOGRAM_FIFO_DATA14 (14UL) |
| #define CAM_HISTOGRAM_FIFO_DATA140 (140UL) |
| #define CAM_HISTOGRAM_FIFO_DATA141 (141UL) |
| #define CAM_HISTOGRAM_FIFO_DATA142 (142UL) |
| #define CAM_HISTOGRAM_FIFO_DATA143 (143UL) |
| #define CAM_HISTOGRAM_FIFO_DATA144 (144UL) |
| #define CAM_HISTOGRAM_FIFO_DATA145 (145UL) |
| #define CAM_HISTOGRAM_FIFO_DATA146 (146UL) |
| #define CAM_HISTOGRAM_FIFO_DATA147 (147UL) |
| #define CAM_HISTOGRAM_FIFO_DATA148 (148UL) |
| #define CAM_HISTOGRAM_FIFO_DATA149 (149UL) |
| #define CAM_HISTOGRAM_FIFO_DATA15 (15UL) |
| #define CAM_HISTOGRAM_FIFO_DATA150 (150UL) |
| #define CAM_HISTOGRAM_FIFO_DATA151 (151UL) |
| #define CAM_HISTOGRAM_FIFO_DATA152 (152UL) |
| #define CAM_HISTOGRAM_FIFO_DATA153 (153UL) |
| #define CAM_HISTOGRAM_FIFO_DATA154 (154UL) |
| #define CAM_HISTOGRAM_FIFO_DATA155 (155UL) |
| #define CAM_HISTOGRAM_FIFO_DATA156 (156UL) |
| #define CAM_HISTOGRAM_FIFO_DATA157 (157UL) |
| #define CAM_HISTOGRAM_FIFO_DATA158 (158UL) |
| #define CAM_HISTOGRAM_FIFO_DATA159 (159UL) |
| #define CAM_HISTOGRAM_FIFO_DATA16 (16UL) |
| #define CAM_HISTOGRAM_FIFO_DATA160 (160UL) |
| #define CAM_HISTOGRAM_FIFO_DATA161 (161UL) |
| #define CAM_HISTOGRAM_FIFO_DATA162 (162UL) |
| #define CAM_HISTOGRAM_FIFO_DATA163 (163UL) |
| #define CAM_HISTOGRAM_FIFO_DATA164 (164UL) |
| #define CAM_HISTOGRAM_FIFO_DATA165 (165UL) |
| #define CAM_HISTOGRAM_FIFO_DATA166 (166UL) |
| #define CAM_HISTOGRAM_FIFO_DATA167 (167UL) |
| #define CAM_HISTOGRAM_FIFO_DATA168 (168UL) |
| #define CAM_HISTOGRAM_FIFO_DATA169 (169UL) |
| #define CAM_HISTOGRAM_FIFO_DATA17 (17UL) |
| #define CAM_HISTOGRAM_FIFO_DATA170 (170UL) |
| #define CAM_HISTOGRAM_FIFO_DATA171 (171UL) |
| #define CAM_HISTOGRAM_FIFO_DATA172 (172UL) |
| #define CAM_HISTOGRAM_FIFO_DATA173 (173UL) |
| #define CAM_HISTOGRAM_FIFO_DATA174 (174UL) |
| #define CAM_HISTOGRAM_FIFO_DATA175 (175UL) |
| #define CAM_HISTOGRAM_FIFO_DATA176 (176UL) |
| #define CAM_HISTOGRAM_FIFO_DATA177 (177UL) |
| #define CAM_HISTOGRAM_FIFO_DATA178 (178UL) |
| #define CAM_HISTOGRAM_FIFO_DATA179 (179UL) |
| #define CAM_HISTOGRAM_FIFO_DATA18 (18UL) |
| #define CAM_HISTOGRAM_FIFO_DATA180 (180UL) |
| #define CAM_HISTOGRAM_FIFO_DATA181 (181UL) |
| #define CAM_HISTOGRAM_FIFO_DATA182 (182UL) |
| #define CAM_HISTOGRAM_FIFO_DATA183 (183UL) |
| #define CAM_HISTOGRAM_FIFO_DATA184 (184UL) |
| #define CAM_HISTOGRAM_FIFO_DATA185 (185UL) |
| #define CAM_HISTOGRAM_FIFO_DATA186 (186UL) |
| #define CAM_HISTOGRAM_FIFO_DATA187 (187UL) |
| #define CAM_HISTOGRAM_FIFO_DATA188 (188UL) |
| #define CAM_HISTOGRAM_FIFO_DATA189 (189UL) |
| #define CAM_HISTOGRAM_FIFO_DATA19 (19UL) |
| #define CAM_HISTOGRAM_FIFO_DATA190 (190UL) |
| #define CAM_HISTOGRAM_FIFO_DATA191 (191UL) |
| #define CAM_HISTOGRAM_FIFO_DATA192 (192UL) |
| #define CAM_HISTOGRAM_FIFO_DATA193 (193UL) |
| #define CAM_HISTOGRAM_FIFO_DATA194 (194UL) |
| #define CAM_HISTOGRAM_FIFO_DATA195 (195UL) |
| #define CAM_HISTOGRAM_FIFO_DATA196 (196UL) |
| #define CAM_HISTOGRAM_FIFO_DATA197 (197UL) |
| #define CAM_HISTOGRAM_FIFO_DATA198 (198UL) |
| #define CAM_HISTOGRAM_FIFO_DATA199 (199UL) |
| #define CAM_HISTOGRAM_FIFO_DATA2 (2UL) |
| #define CAM_HISTOGRAM_FIFO_DATA20 (20UL) |
| #define CAM_HISTOGRAM_FIFO_DATA200 (200UL) |
| #define CAM_HISTOGRAM_FIFO_DATA201 (201UL) |
| #define CAM_HISTOGRAM_FIFO_DATA202 (202UL) |
| #define CAM_HISTOGRAM_FIFO_DATA203 (203UL) |
| #define CAM_HISTOGRAM_FIFO_DATA204 (204UL) |
| #define CAM_HISTOGRAM_FIFO_DATA205 (205UL) |
| #define CAM_HISTOGRAM_FIFO_DATA206 (206UL) |
| #define CAM_HISTOGRAM_FIFO_DATA207 (207UL) |
| #define CAM_HISTOGRAM_FIFO_DATA208 (208UL) |
| #define CAM_HISTOGRAM_FIFO_DATA209 (209UL) |
| #define CAM_HISTOGRAM_FIFO_DATA21 (21UL) |
| #define CAM_HISTOGRAM_FIFO_DATA210 (210UL) |
| #define CAM_HISTOGRAM_FIFO_DATA211 (211UL) |
| #define CAM_HISTOGRAM_FIFO_DATA212 (212UL) |
| #define CAM_HISTOGRAM_FIFO_DATA213 (213UL) |
| #define CAM_HISTOGRAM_FIFO_DATA214 (214UL) |
| #define CAM_HISTOGRAM_FIFO_DATA215 (215UL) |
| #define CAM_HISTOGRAM_FIFO_DATA216 (216UL) |
| #define CAM_HISTOGRAM_FIFO_DATA217 (217UL) |
| #define CAM_HISTOGRAM_FIFO_DATA218 (218UL) |
| #define CAM_HISTOGRAM_FIFO_DATA219 (219UL) |
| #define CAM_HISTOGRAM_FIFO_DATA22 (22UL) |
| #define CAM_HISTOGRAM_FIFO_DATA220 (220UL) |
| #define CAM_HISTOGRAM_FIFO_DATA221 (221UL) |
| #define CAM_HISTOGRAM_FIFO_DATA222 (222UL) |
| #define CAM_HISTOGRAM_FIFO_DATA223 (223UL) |
| #define CAM_HISTOGRAM_FIFO_DATA224 (224UL) |
| #define CAM_HISTOGRAM_FIFO_DATA225 (225UL) |
| #define CAM_HISTOGRAM_FIFO_DATA226 (226UL) |
| #define CAM_HISTOGRAM_FIFO_DATA227 (227UL) |
| #define CAM_HISTOGRAM_FIFO_DATA228 (228UL) |
| #define CAM_HISTOGRAM_FIFO_DATA229 (229UL) |
| #define CAM_HISTOGRAM_FIFO_DATA23 (23UL) |
| #define CAM_HISTOGRAM_FIFO_DATA230 (230UL) |
| #define CAM_HISTOGRAM_FIFO_DATA231 (231UL) |
| #define CAM_HISTOGRAM_FIFO_DATA232 (232UL) |
| #define CAM_HISTOGRAM_FIFO_DATA233 (233UL) |
| #define CAM_HISTOGRAM_FIFO_DATA234 (234UL) |
| #define CAM_HISTOGRAM_FIFO_DATA235 (235UL) |
| #define CAM_HISTOGRAM_FIFO_DATA236 (236UL) |
| #define CAM_HISTOGRAM_FIFO_DATA237 (237UL) |
| #define CAM_HISTOGRAM_FIFO_DATA238 (238UL) |
| #define CAM_HISTOGRAM_FIFO_DATA239 (239UL) |
| #define CAM_HISTOGRAM_FIFO_DATA24 (24UL) |
| #define CAM_HISTOGRAM_FIFO_DATA240 (240UL) |
| #define CAM_HISTOGRAM_FIFO_DATA241 (241UL) |
| #define CAM_HISTOGRAM_FIFO_DATA242 (242UL) |
| #define CAM_HISTOGRAM_FIFO_DATA243 (243UL) |
| #define CAM_HISTOGRAM_FIFO_DATA244 (244UL) |
| #define CAM_HISTOGRAM_FIFO_DATA245 (245UL) |
| #define CAM_HISTOGRAM_FIFO_DATA246 (246UL) |
| #define CAM_HISTOGRAM_FIFO_DATA247 (247UL) |
| #define CAM_HISTOGRAM_FIFO_DATA248 (248UL) |
| #define CAM_HISTOGRAM_FIFO_DATA249 (249UL) |
| #define CAM_HISTOGRAM_FIFO_DATA25 (25UL) |
| #define CAM_HISTOGRAM_FIFO_DATA250 (250UL) |
| #define CAM_HISTOGRAM_FIFO_DATA251 (251UL) |
| #define CAM_HISTOGRAM_FIFO_DATA252 (252UL) |
| #define CAM_HISTOGRAM_FIFO_DATA253 (253UL) |
| #define CAM_HISTOGRAM_FIFO_DATA254 (254UL) |
| #define CAM_HISTOGRAM_FIFO_DATA255 (255UL) |
| #define CAM_HISTOGRAM_FIFO_DATA26 (26UL) |
| #define CAM_HISTOGRAM_FIFO_DATA27 (27UL) |
| #define CAM_HISTOGRAM_FIFO_DATA28 (28UL) |
| #define CAM_HISTOGRAM_FIFO_DATA29 (29UL) |
| #define CAM_HISTOGRAM_FIFO_DATA3 (3UL) |
| #define CAM_HISTOGRAM_FIFO_DATA30 (30UL) |
| #define CAM_HISTOGRAM_FIFO_DATA31 (31UL) |
| #define CAM_HISTOGRAM_FIFO_DATA32 (32UL) |
| #define CAM_HISTOGRAM_FIFO_DATA33 (33UL) |
| #define CAM_HISTOGRAM_FIFO_DATA34 (34UL) |
| #define CAM_HISTOGRAM_FIFO_DATA35 (35UL) |
| #define CAM_HISTOGRAM_FIFO_DATA36 (36UL) |
| #define CAM_HISTOGRAM_FIFO_DATA37 (37UL) |
| #define CAM_HISTOGRAM_FIFO_DATA38 (38UL) |
| #define CAM_HISTOGRAM_FIFO_DATA39 (39UL) |
| #define CAM_HISTOGRAM_FIFO_DATA4 (4UL) |
| #define CAM_HISTOGRAM_FIFO_DATA40 (40UL) |
| #define CAM_HISTOGRAM_FIFO_DATA41 (41UL) |
| #define CAM_HISTOGRAM_FIFO_DATA42 (42UL) |
| #define CAM_HISTOGRAM_FIFO_DATA43 (43UL) |
| #define CAM_HISTOGRAM_FIFO_DATA44 (44UL) |
| #define CAM_HISTOGRAM_FIFO_DATA45 (45UL) |
| #define CAM_HISTOGRAM_FIFO_DATA46 (46UL) |
| #define CAM_HISTOGRAM_FIFO_DATA47 (47UL) |
| #define CAM_HISTOGRAM_FIFO_DATA48 (48UL) |
| #define CAM_HISTOGRAM_FIFO_DATA49 (49UL) |
| #define CAM_HISTOGRAM_FIFO_DATA5 (5UL) |
| #define CAM_HISTOGRAM_FIFO_DATA50 (50UL) |
| #define CAM_HISTOGRAM_FIFO_DATA51 (51UL) |
| #define CAM_HISTOGRAM_FIFO_DATA52 (52UL) |
| #define CAM_HISTOGRAM_FIFO_DATA53 (53UL) |
| #define CAM_HISTOGRAM_FIFO_DATA54 (54UL) |
| #define CAM_HISTOGRAM_FIFO_DATA55 (55UL) |
| #define CAM_HISTOGRAM_FIFO_DATA56 (56UL) |
| #define CAM_HISTOGRAM_FIFO_DATA57 (57UL) |
| #define CAM_HISTOGRAM_FIFO_DATA58 (58UL) |
| #define CAM_HISTOGRAM_FIFO_DATA59 (59UL) |
| #define CAM_HISTOGRAM_FIFO_DATA6 (6UL) |
| #define CAM_HISTOGRAM_FIFO_DATA60 (60UL) |
| #define CAM_HISTOGRAM_FIFO_DATA61 (61UL) |
| #define CAM_HISTOGRAM_FIFO_DATA62 (62UL) |
| #define CAM_HISTOGRAM_FIFO_DATA63 (63UL) |
| #define CAM_HISTOGRAM_FIFO_DATA64 (64UL) |
| #define CAM_HISTOGRAM_FIFO_DATA65 (65UL) |
| #define CAM_HISTOGRAM_FIFO_DATA66 (66UL) |
| #define CAM_HISTOGRAM_FIFO_DATA67 (67UL) |
| #define CAM_HISTOGRAM_FIFO_DATA68 (68UL) |
| #define CAM_HISTOGRAM_FIFO_DATA69 (69UL) |
| #define CAM_HISTOGRAM_FIFO_DATA7 (7UL) |
| #define CAM_HISTOGRAM_FIFO_DATA70 (70UL) |
| #define CAM_HISTOGRAM_FIFO_DATA71 (71UL) |
| #define CAM_HISTOGRAM_FIFO_DATA72 (72UL) |
| #define CAM_HISTOGRAM_FIFO_DATA73 (73UL) |
| #define CAM_HISTOGRAM_FIFO_DATA74 (74UL) |
| #define CAM_HISTOGRAM_FIFO_DATA75 (75UL) |
| #define CAM_HISTOGRAM_FIFO_DATA76 (76UL) |
| #define CAM_HISTOGRAM_FIFO_DATA77 (77UL) |
| #define CAM_HISTOGRAM_FIFO_DATA78 (78UL) |
| #define CAM_HISTOGRAM_FIFO_DATA79 (79UL) |
| #define CAM_HISTOGRAM_FIFO_DATA8 (8UL) |
| #define CAM_HISTOGRAM_FIFO_DATA80 (80UL) |
| #define CAM_HISTOGRAM_FIFO_DATA81 (81UL) |
| #define CAM_HISTOGRAM_FIFO_DATA82 (82UL) |
| #define CAM_HISTOGRAM_FIFO_DATA83 (83UL) |
| #define CAM_HISTOGRAM_FIFO_DATA84 (84UL) |
| #define CAM_HISTOGRAM_FIFO_DATA85 (85UL) |
| #define CAM_HISTOGRAM_FIFO_DATA86 (86UL) |
| #define CAM_HISTOGRAM_FIFO_DATA87 (87UL) |
| #define CAM_HISTOGRAM_FIFO_DATA88 (88UL) |
| #define CAM_HISTOGRAM_FIFO_DATA89 (89UL) |
| #define CAM_HISTOGRAM_FIFO_DATA9 (9UL) |
| #define CAM_HISTOGRAM_FIFO_DATA90 (90UL) |
| #define CAM_HISTOGRAM_FIFO_DATA91 (91UL) |
| #define CAM_HISTOGRAM_FIFO_DATA92 (92UL) |
| #define CAM_HISTOGRAM_FIFO_DATA93 (93UL) |
| #define CAM_HISTOGRAM_FIFO_DATA94 (94UL) |
| #define CAM_HISTOGRAM_FIFO_DATA95 (95UL) |
| #define CAM_HISTOGRAM_FIFO_DATA96 (96UL) |
| #define CAM_HISTOGRAM_FIFO_DATA97 (97UL) |
| #define CAM_HISTOGRAM_FIFO_DATA98 (98UL) |
| #define CAM_HISTOGRAM_FIFO_DATA99 (99UL) |
| #define CAM_HISTOGRAM_FIFO_HIST_Y_GET | ( | x | ) | (((uint32_t)(x) & CAM_HISTOGRAM_FIFO_HIST_Y_MASK) >> CAM_HISTOGRAM_FIFO_HIST_Y_SHIFT) |
| #define CAM_HISTOGRAM_FIFO_HIST_Y_MASK (0xFFFFFFUL) |
| #define CAM_HISTOGRAM_FIFO_HIST_Y_SHIFT (0U) |
| #define CAM_IDEAL_WN_SIZE_HEIGHT_GET | ( | x | ) | (((uint32_t)(x) & CAM_IDEAL_WN_SIZE_HEIGHT_MASK) >> CAM_IDEAL_WN_SIZE_HEIGHT_SHIFT) |
| #define CAM_IDEAL_WN_SIZE_HEIGHT_MASK (0xFFFF0000UL) |
| #define CAM_IDEAL_WN_SIZE_HEIGHT_SET | ( | x | ) | (((uint32_t)(x) << CAM_IDEAL_WN_SIZE_HEIGHT_SHIFT) & CAM_IDEAL_WN_SIZE_HEIGHT_MASK) |
| #define CAM_IDEAL_WN_SIZE_HEIGHT_SHIFT (16U) |
| #define CAM_IDEAL_WN_SIZE_WIDTH_GET | ( | x | ) | (((uint32_t)(x) & CAM_IDEAL_WN_SIZE_WIDTH_MASK) >> CAM_IDEAL_WN_SIZE_WIDTH_SHIFT) |
| #define CAM_IDEAL_WN_SIZE_WIDTH_MASK (0xFFFFU) |
| #define CAM_IDEAL_WN_SIZE_WIDTH_SET | ( | x | ) | (((uint32_t)(x) << CAM_IDEAL_WN_SIZE_WIDTH_SHIFT) & CAM_IDEAL_WN_SIZE_WIDTH_MASK) |
| #define CAM_IDEAL_WN_SIZE_WIDTH_SHIFT (0U) |
| #define CAM_INT_EN_EOF_INT_EN_GET | ( | x | ) | (((uint32_t)(x) & CAM_INT_EN_EOF_INT_EN_MASK) >> CAM_INT_EN_EOF_INT_EN_SHIFT) |
| #define CAM_INT_EN_EOF_INT_EN_MASK (0x200U) |
| #define CAM_INT_EN_EOF_INT_EN_SET | ( | x | ) | (((uint32_t)(x) << CAM_INT_EN_EOF_INT_EN_SHIFT) & CAM_INT_EN_EOF_INT_EN_MASK) |
| #define CAM_INT_EN_EOF_INT_EN_SHIFT (9U) |
| #define CAM_INT_EN_ERR_CL_BWID_CFG_INT_EN_GET | ( | x | ) | (((uint32_t)(x) & CAM_INT_EN_ERR_CL_BWID_CFG_INT_EN_MASK) >> CAM_INT_EN_ERR_CL_BWID_CFG_INT_EN_SHIFT) |
| #define CAM_INT_EN_ERR_CL_BWID_CFG_INT_EN_MASK (0x2000U) |
| #define CAM_INT_EN_ERR_CL_BWID_CFG_INT_EN_SET | ( | x | ) | (((uint32_t)(x) << CAM_INT_EN_ERR_CL_BWID_CFG_INT_EN_SHIFT) & CAM_INT_EN_ERR_CL_BWID_CFG_INT_EN_MASK) |
| #define CAM_INT_EN_ERR_CL_BWID_CFG_INT_EN_SHIFT (13U) |
| #define CAM_INT_EN_FB1_DMA_DONE_INTEN_GET | ( | x | ) | (((uint32_t)(x) & CAM_INT_EN_FB1_DMA_DONE_INTEN_MASK) >> CAM_INT_EN_FB1_DMA_DONE_INTEN_SHIFT) |
| #define CAM_INT_EN_FB1_DMA_DONE_INTEN_MASK (0x4U) |
| #define CAM_INT_EN_FB1_DMA_DONE_INTEN_SET | ( | x | ) | (((uint32_t)(x) << CAM_INT_EN_FB1_DMA_DONE_INTEN_SHIFT) & CAM_INT_EN_FB1_DMA_DONE_INTEN_MASK) |
| #define CAM_INT_EN_FB1_DMA_DONE_INTEN_SHIFT (2U) |
| #define CAM_INT_EN_FB2_DMA_DONE_INTEN_GET | ( | x | ) | (((uint32_t)(x) & CAM_INT_EN_FB2_DMA_DONE_INTEN_MASK) >> CAM_INT_EN_FB2_DMA_DONE_INTEN_SHIFT) |
| #define CAM_INT_EN_FB2_DMA_DONE_INTEN_MASK (0x8U) |
| #define CAM_INT_EN_FB2_DMA_DONE_INTEN_SET | ( | x | ) | (((uint32_t)(x) << CAM_INT_EN_FB2_DMA_DONE_INTEN_SHIFT) & CAM_INT_EN_FB2_DMA_DONE_INTEN_MASK) |
| #define CAM_INT_EN_FB2_DMA_DONE_INTEN_SHIFT (3U) |
| #define CAM_INT_EN_HIST_DONE_INT_EN_GET | ( | x | ) | (((uint32_t)(x) & CAM_INT_EN_HIST_DONE_INT_EN_MASK) >> CAM_INT_EN_HIST_DONE_INT_EN_SHIFT) |
| #define CAM_INT_EN_HIST_DONE_INT_EN_MASK (0x1000U) |
| #define CAM_INT_EN_HIST_DONE_INT_EN_SET | ( | x | ) | (((uint32_t)(x) << CAM_INT_EN_HIST_DONE_INT_EN_SHIFT) & CAM_INT_EN_HIST_DONE_INT_EN_MASK) |
| #define CAM_INT_EN_HIST_DONE_INT_EN_SHIFT (12U) |
| #define CAM_INT_EN_HRESP_ERR_EN_GET | ( | x | ) | (((uint32_t)(x) & CAM_INT_EN_HRESP_ERR_EN_MASK) >> CAM_INT_EN_HRESP_ERR_EN_SHIFT) |
| #define CAM_INT_EN_HRESP_ERR_EN_MASK (0x800U) |
| #define CAM_INT_EN_HRESP_ERR_EN_SET | ( | x | ) | (((uint32_t)(x) << CAM_INT_EN_HRESP_ERR_EN_SHIFT) & CAM_INT_EN_HRESP_ERR_EN_MASK) |
| #define CAM_INT_EN_HRESP_ERR_EN_SHIFT (11U) |
| #define CAM_INT_EN_RF_OR_INTEN_GET | ( | x | ) | (((uint32_t)(x) & CAM_INT_EN_RF_OR_INTEN_MASK) >> CAM_INT_EN_RF_OR_INTEN_SHIFT) |
| #define CAM_INT_EN_RF_OR_INTEN_MASK (0x40U) |
| #define CAM_INT_EN_RF_OR_INTEN_SET | ( | x | ) | (((uint32_t)(x) << CAM_INT_EN_RF_OR_INTEN_SHIFT) & CAM_INT_EN_RF_OR_INTEN_MASK) |
| #define CAM_INT_EN_RF_OR_INTEN_SHIFT (6U) |
| #define CAM_INT_EN_SOF_INT_EN_GET | ( | x | ) | (((uint32_t)(x) & CAM_INT_EN_SOF_INT_EN_MASK) >> CAM_INT_EN_SOF_INT_EN_SHIFT) |
| #define CAM_INT_EN_SOF_INT_EN_MASK (0x1U) |
| #define CAM_INT_EN_SOF_INT_EN_SET | ( | x | ) | (((uint32_t)(x) << CAM_INT_EN_SOF_INT_EN_SHIFT) & CAM_INT_EN_SOF_INT_EN_MASK) |
| #define CAM_INT_EN_SOF_INT_EN_SHIFT (0U) |
| #define CAM_PRO_CTRL_ERR_INJECT_GET | ( | x | ) | (((uint32_t)(x) & CAM_PRO_CTRL_ERR_INJECT_MASK) >> CAM_PRO_CTRL_ERR_INJECT_SHIFT) |
| #define CAM_PRO_CTRL_ERR_INJECT_MASK (0x4000U) |
| #define CAM_PRO_CTRL_ERR_INJECT_SET | ( | x | ) | (((uint32_t)(x) << CAM_PRO_CTRL_ERR_INJECT_SHIFT) & CAM_PRO_CTRL_ERR_INJECT_MASK) |
| #define CAM_PRO_CTRL_ERR_INJECT_SHIFT (14U) |
| #define CAM_PRO_CTRL_ROI_UPDATE_GET | ( | x | ) | (((uint32_t)(x) & CAM_PRO_CTRL_ROI_UPDATE_MASK) >> CAM_PRO_CTRL_ROI_UPDATE_SHIFT) |
| #define CAM_PRO_CTRL_ROI_UPDATE_MASK (0x80U) |
| #define CAM_PRO_CTRL_ROI_UPDATE_SET | ( | x | ) | (((uint32_t)(x) << CAM_PRO_CTRL_ROI_UPDATE_SHIFT) & CAM_PRO_CTRL_ROI_UPDATE_MASK) |
| #define CAM_PRO_CTRL_ROI_UPDATE_SHIFT (7U) |
| #define CAM_PRO_CTRL_SCALE_HEIGHT_SELECT_GET | ( | x | ) | (((uint32_t)(x) & CAM_PRO_CTRL_SCALE_HEIGHT_SELECT_MASK) >> CAM_PRO_CTRL_SCALE_HEIGHT_SELECT_SHIFT) |
| #define CAM_PRO_CTRL_SCALE_HEIGHT_SELECT_MASK (0x38U) |
| #define CAM_PRO_CTRL_SCALE_HEIGHT_SELECT_SET | ( | x | ) | (((uint32_t)(x) << CAM_PRO_CTRL_SCALE_HEIGHT_SELECT_SHIFT) & CAM_PRO_CTRL_SCALE_HEIGHT_SELECT_MASK) |
| #define CAM_PRO_CTRL_SCALE_HEIGHT_SELECT_SHIFT (3U) |
| #define CAM_PRO_CTRL_SCALE_UPDATE_GET | ( | x | ) | (((uint32_t)(x) & CAM_PRO_CTRL_SCALE_UPDATE_MASK) >> CAM_PRO_CTRL_SCALE_UPDATE_SHIFT) |
| #define CAM_PRO_CTRL_SCALE_UPDATE_MASK (0x40U) |
| #define CAM_PRO_CTRL_SCALE_UPDATE_SET | ( | x | ) | (((uint32_t)(x) << CAM_PRO_CTRL_SCALE_UPDATE_SHIFT) & CAM_PRO_CTRL_SCALE_UPDATE_MASK) |
| #define CAM_PRO_CTRL_SCALE_UPDATE_SHIFT (6U) |
| #define CAM_PRO_CTRL_SCALE_WIDTH_SELECT_GET | ( | x | ) | (((uint32_t)(x) & CAM_PRO_CTRL_SCALE_WIDTH_SELECT_MASK) >> CAM_PRO_CTRL_SCALE_WIDTH_SELECT_SHIFT) |
| #define CAM_PRO_CTRL_SCALE_WIDTH_SELECT_MASK (0x7U) |
| #define CAM_PRO_CTRL_SCALE_WIDTH_SELECT_SET | ( | x | ) | (((uint32_t)(x) << CAM_PRO_CTRL_SCALE_WIDTH_SELECT_SHIFT) & CAM_PRO_CTRL_SCALE_WIDTH_SELECT_MASK) |
| #define CAM_PRO_CTRL_SCALE_WIDTH_SELECT_SHIFT (0U) |
| #define CAM_ROI_HEIGHT_ROI_HEIGHT_END_GET | ( | x | ) | (((uint32_t)(x) & CAM_ROI_HEIGHT_ROI_HEIGHT_END_MASK) >> CAM_ROI_HEIGHT_ROI_HEIGHT_END_SHIFT) |
| #define CAM_ROI_HEIGHT_ROI_HEIGHT_END_MASK (0xFFFF0000UL) |
| #define CAM_ROI_HEIGHT_ROI_HEIGHT_END_SET | ( | x | ) | (((uint32_t)(x) << CAM_ROI_HEIGHT_ROI_HEIGHT_END_SHIFT) & CAM_ROI_HEIGHT_ROI_HEIGHT_END_MASK) |
| #define CAM_ROI_HEIGHT_ROI_HEIGHT_END_SHIFT (16U) |
| #define CAM_ROI_HEIGHT_ROI_HEIGHT_START_GET | ( | x | ) | (((uint32_t)(x) & CAM_ROI_HEIGHT_ROI_HEIGHT_START_MASK) >> CAM_ROI_HEIGHT_ROI_HEIGHT_START_SHIFT) |
| #define CAM_ROI_HEIGHT_ROI_HEIGHT_START_MASK (0xFFFFU) |
| #define CAM_ROI_HEIGHT_ROI_HEIGHT_START_SET | ( | x | ) | (((uint32_t)(x) << CAM_ROI_HEIGHT_ROI_HEIGHT_START_SHIFT) & CAM_ROI_HEIGHT_ROI_HEIGHT_START_MASK) |
| #define CAM_ROI_HEIGHT_ROI_HEIGHT_START_SHIFT (0U) |
| #define CAM_ROI_WIDTH_ROI_WIDTH_END_GET | ( | x | ) | (((uint32_t)(x) & CAM_ROI_WIDTH_ROI_WIDTH_END_MASK) >> CAM_ROI_WIDTH_ROI_WIDTH_END_SHIFT) |
| #define CAM_ROI_WIDTH_ROI_WIDTH_END_MASK (0xFFFF0000UL) |
| #define CAM_ROI_WIDTH_ROI_WIDTH_END_SET | ( | x | ) | (((uint32_t)(x) << CAM_ROI_WIDTH_ROI_WIDTH_END_SHIFT) & CAM_ROI_WIDTH_ROI_WIDTH_END_MASK) |
| #define CAM_ROI_WIDTH_ROI_WIDTH_END_SHIFT (16U) |
| #define CAM_ROI_WIDTH_ROI_WIDTH_START_GET | ( | x | ) | (((uint32_t)(x) & CAM_ROI_WIDTH_ROI_WIDTH_START_MASK) >> CAM_ROI_WIDTH_ROI_WIDTH_START_SHIFT) |
| #define CAM_ROI_WIDTH_ROI_WIDTH_START_MASK (0xFFFFU) |
| #define CAM_ROI_WIDTH_ROI_WIDTH_START_SET | ( | x | ) | (((uint32_t)(x) << CAM_ROI_WIDTH_ROI_WIDTH_START_SHIFT) & CAM_ROI_WIDTH_ROI_WIDTH_START_MASK) |
| #define CAM_ROI_WIDTH_ROI_WIDTH_START_SHIFT (0U) |
| #define CAM_STA_DMA_TSF_DONE_FB1_GET | ( | x | ) | (((uint32_t)(x) & CAM_STA_DMA_TSF_DONE_FB1_MASK) >> CAM_STA_DMA_TSF_DONE_FB1_SHIFT) |
| #define CAM_STA_DMA_TSF_DONE_FB1_MASK (0x200U) |
| #define CAM_STA_DMA_TSF_DONE_FB1_SET | ( | x | ) | (((uint32_t)(x) << CAM_STA_DMA_TSF_DONE_FB1_SHIFT) & CAM_STA_DMA_TSF_DONE_FB1_MASK) |
| #define CAM_STA_DMA_TSF_DONE_FB1_SHIFT (9U) |
| #define CAM_STA_DMA_TSF_DONE_FB2_GET | ( | x | ) | (((uint32_t)(x) & CAM_STA_DMA_TSF_DONE_FB2_MASK) >> CAM_STA_DMA_TSF_DONE_FB2_SHIFT) |
| #define CAM_STA_DMA_TSF_DONE_FB2_MASK (0x400U) |
| #define CAM_STA_DMA_TSF_DONE_FB2_SET | ( | x | ) | (((uint32_t)(x) << CAM_STA_DMA_TSF_DONE_FB2_SHIFT) & CAM_STA_DMA_TSF_DONE_FB2_MASK) |
| #define CAM_STA_DMA_TSF_DONE_FB2_SHIFT (10U) |
| #define CAM_STA_EOF_INT_GET | ( | x | ) | (((uint32_t)(x) & CAM_STA_EOF_INT_MASK) >> CAM_STA_EOF_INT_SHIFT) |
| #define CAM_STA_EOF_INT_MASK (0x80U) |
| #define CAM_STA_EOF_INT_SET | ( | x | ) | (((uint32_t)(x) << CAM_STA_EOF_INT_SHIFT) & CAM_STA_EOF_INT_MASK) |
| #define CAM_STA_EOF_INT_SHIFT (7U) |
| #define CAM_STA_ERR_CL_BWID_CFG_GET | ( | x | ) | (((uint32_t)(x) & CAM_STA_ERR_CL_BWID_CFG_MASK) >> CAM_STA_ERR_CL_BWID_CFG_SHIFT) |
| #define CAM_STA_ERR_CL_BWID_CFG_MASK (0x80000UL) |
| #define CAM_STA_ERR_CL_BWID_CFG_SET | ( | x | ) | (((uint32_t)(x) << CAM_STA_ERR_CL_BWID_CFG_SHIFT) & CAM_STA_ERR_CL_BWID_CFG_MASK) |
| #define CAM_STA_ERR_CL_BWID_CFG_SHIFT (19U) |
| #define CAM_STA_HIST_DONE_GET | ( | x | ) | (((uint32_t)(x) & CAM_STA_HIST_DONE_MASK) >> CAM_STA_HIST_DONE_SHIFT) |
| #define CAM_STA_HIST_DONE_MASK (0x40000UL) |
| #define CAM_STA_HIST_DONE_SET | ( | x | ) | (((uint32_t)(x) << CAM_STA_HIST_DONE_SHIFT) & CAM_STA_HIST_DONE_MASK) |
| #define CAM_STA_HIST_DONE_SHIFT (18U) |
| #define CAM_STA_HRESP_ERR_INT_GET | ( | x | ) | (((uint32_t)(x) & CAM_STA_HRESP_ERR_INT_MASK) >> CAM_STA_HRESP_ERR_INT_SHIFT) |
| #define CAM_STA_HRESP_ERR_INT_MASK (0x4U) |
| #define CAM_STA_HRESP_ERR_INT_SET | ( | x | ) | (((uint32_t)(x) << CAM_STA_HRESP_ERR_INT_SHIFT) & CAM_STA_HRESP_ERR_INT_MASK) |
| #define CAM_STA_HRESP_ERR_INT_SHIFT (2U) |
| #define CAM_STA_RF_OR_INT_GET | ( | x | ) | (((uint32_t)(x) & CAM_STA_RF_OR_INT_MASK) >> CAM_STA_RF_OR_INT_SHIFT) |
| #define CAM_STA_RF_OR_INT_MASK (0x2000U) |
| #define CAM_STA_RF_OR_INT_SET | ( | x | ) | (((uint32_t)(x) << CAM_STA_RF_OR_INT_SHIFT) & CAM_STA_RF_OR_INT_MASK) |
| #define CAM_STA_RF_OR_INT_SHIFT (13U) |
| #define CAM_STA_SOF_INT_GET | ( | x | ) | (((uint32_t)(x) & CAM_STA_SOF_INT_MASK) >> CAM_STA_SOF_INT_SHIFT) |
| #define CAM_STA_SOF_INT_MASK (0x40U) |
| #define CAM_STA_SOF_INT_SET | ( | x | ) | (((uint32_t)(x) << CAM_STA_SOF_INT_SHIFT) & CAM_STA_SOF_INT_MASK) |
| #define CAM_STA_SOF_INT_SHIFT (6U) |