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Data Structures | |
| struct | SDP_Type |
| #define SDP_CIPHIV_CIPHIV0 (0UL) |
| #define SDP_CIPHIV_CIPHIV1 (1UL) |
| #define SDP_CIPHIV_CIPHIV2 (2UL) |
| #define SDP_CIPHIV_CIPHIV3 (3UL) |
| #define SDP_CIPHIV_CIPHIV_GET | ( | x | ) | (((uint32_t)(x) & SDP_CIPHIV_CIPHIV_MASK) >> SDP_CIPHIV_CIPHIV_SHIFT) |
| #define SDP_CIPHIV_CIPHIV_MASK (0xFFFFFFFFUL) |
| #define SDP_CIPHIV_CIPHIV_SET | ( | x | ) | (((uint32_t)(x) << SDP_CIPHIV_CIPHIV_SHIFT) & SDP_CIPHIV_CIPHIV_MASK) |
| #define SDP_CIPHIV_CIPHIV_SHIFT (0U) |
| #define SDP_CMDPTR_CMDPTR_GET | ( | x | ) | (((uint32_t)(x) & SDP_CMDPTR_CMDPTR_MASK) >> SDP_CMDPTR_CMDPTR_SHIFT) |
| #define SDP_CMDPTR_CMDPTR_MASK (0xFFFFFFFFUL) |
| #define SDP_CMDPTR_CMDPTR_SET | ( | x | ) | (((uint32_t)(x) << SDP_CMDPTR_CMDPTR_SHIFT) & SDP_CMDPTR_CMDPTR_MASK) |
| #define SDP_CMDPTR_CMDPTR_SHIFT (0U) |
| #define SDP_HASWRD_HASWRD0 (0UL) |
| #define SDP_HASWRD_HASWRD1 (1UL) |
| #define SDP_HASWRD_HASWRD2 (2UL) |
| #define SDP_HASWRD_HASWRD3 (3UL) |
| #define SDP_HASWRD_HASWRD4 (4UL) |
| #define SDP_HASWRD_HASWRD5 (5UL) |
| #define SDP_HASWRD_HASWRD6 (6UL) |
| #define SDP_HASWRD_HASWRD7 (7UL) |
| #define SDP_HASWRD_HASWRD_GET | ( | x | ) | (((uint32_t)(x) & SDP_HASWRD_HASWRD_MASK) >> SDP_HASWRD_HASWRD_SHIFT) |
| #define SDP_HASWRD_HASWRD_MASK (0xFFFFFFFFUL) |
| #define SDP_HASWRD_HASWRD_SET | ( | x | ) | (((uint32_t)(x) << SDP_HASWRD_HASWRD_SHIFT) & SDP_HASWRD_HASWRD_MASK) |
| #define SDP_HASWRD_HASWRD_SHIFT (0U) |
| #define SDP_KEYADDR_INDEX_GET | ( | x | ) | (((uint32_t)(x) & SDP_KEYADDR_INDEX_MASK) >> SDP_KEYADDR_INDEX_SHIFT) |
| #define SDP_KEYADDR_INDEX_MASK (0xFF0000UL) |
| #define SDP_KEYADDR_INDEX_SET | ( | x | ) | (((uint32_t)(x) << SDP_KEYADDR_INDEX_SHIFT) & SDP_KEYADDR_INDEX_MASK) |
| #define SDP_KEYADDR_INDEX_SHIFT (16U) |
| #define SDP_KEYADDR_SUBWRD_GET | ( | x | ) | (((uint32_t)(x) & SDP_KEYADDR_SUBWRD_MASK) >> SDP_KEYADDR_SUBWRD_SHIFT) |
| #define SDP_KEYADDR_SUBWRD_MASK (0x3U) |
| #define SDP_KEYADDR_SUBWRD_SET | ( | x | ) | (((uint32_t)(x) << SDP_KEYADDR_SUBWRD_SHIFT) & SDP_KEYADDR_SUBWRD_MASK) |
| #define SDP_KEYADDR_SUBWRD_SHIFT (0U) |
| #define SDP_KEYDAT_KEYDAT_GET | ( | x | ) | (((uint32_t)(x) & SDP_KEYDAT_KEYDAT_MASK) >> SDP_KEYDAT_KEYDAT_SHIFT) |
| #define SDP_KEYDAT_KEYDAT_MASK (0xFFFFFFFFUL) |
| #define SDP_KEYDAT_KEYDAT_SET | ( | x | ) | (((uint32_t)(x) << SDP_KEYDAT_KEYDAT_SHIFT) & SDP_KEYDAT_KEYDAT_MASK) |
| #define SDP_KEYDAT_KEYDAT_SHIFT (0U) |
| #define SDP_MODCTRL_AESALG_GET | ( | x | ) | (((uint32_t)(x) & SDP_MODCTRL_AESALG_MASK) >> SDP_MODCTRL_AESALG_SHIFT) |
| #define SDP_MODCTRL_AESALG_MASK (0xF0000000UL) |
| #define SDP_MODCTRL_AESALG_SET | ( | x | ) | (((uint32_t)(x) << SDP_MODCTRL_AESALG_SHIFT) & SDP_MODCTRL_AESALG_MASK) |
| #define SDP_MODCTRL_AESALG_SHIFT (28U) |
| #define SDP_MODCTRL_AESDIR_GET | ( | x | ) | (((uint32_t)(x) & SDP_MODCTRL_AESDIR_MASK) >> SDP_MODCTRL_AESDIR_SHIFT) |
| #define SDP_MODCTRL_AESDIR_MASK (0x10000UL) |
| #define SDP_MODCTRL_AESDIR_SET | ( | x | ) | (((uint32_t)(x) << SDP_MODCTRL_AESDIR_SHIFT) & SDP_MODCTRL_AESDIR_MASK) |
| #define SDP_MODCTRL_AESDIR_SHIFT (16U) |
| #define SDP_MODCTRL_AESKS_GET | ( | x | ) | (((uint32_t)(x) & SDP_MODCTRL_AESKS_MASK) >> SDP_MODCTRL_AESKS_SHIFT) |
| #define SDP_MODCTRL_AESKS_MASK (0xFC0000UL) |
| #define SDP_MODCTRL_AESKS_SET | ( | x | ) | (((uint32_t)(x) << SDP_MODCTRL_AESKS_SHIFT) & SDP_MODCTRL_AESKS_MASK) |
| #define SDP_MODCTRL_AESKS_SHIFT (18U) |
| #define SDP_MODCTRL_AESMOD_GET | ( | x | ) | (((uint32_t)(x) & SDP_MODCTRL_AESMOD_MASK) >> SDP_MODCTRL_AESMOD_SHIFT) |
| #define SDP_MODCTRL_AESMOD_MASK (0xF000000UL) |
| #define SDP_MODCTRL_AESMOD_SET | ( | x | ) | (((uint32_t)(x) << SDP_MODCTRL_AESMOD_SHIFT) & SDP_MODCTRL_AESMOD_MASK) |
| #define SDP_MODCTRL_AESMOD_SHIFT (24U) |
| #define SDP_MODCTRL_DINSWP_GET | ( | x | ) | (((uint32_t)(x) & SDP_MODCTRL_DINSWP_MASK) >> SDP_MODCTRL_DINSWP_SHIFT) |
| #define SDP_MODCTRL_DINSWP_MASK (0x30U) |
| #define SDP_MODCTRL_DINSWP_SET | ( | x | ) | (((uint32_t)(x) << SDP_MODCTRL_DINSWP_SHIFT) & SDP_MODCTRL_DINSWP_MASK) |
| #define SDP_MODCTRL_DINSWP_SHIFT (4U) |
| #define SDP_MODCTRL_DOUTSWP_GET | ( | x | ) | (((uint32_t)(x) & SDP_MODCTRL_DOUTSWP_MASK) >> SDP_MODCTRL_DOUTSWP_SHIFT) |
| #define SDP_MODCTRL_DOUTSWP_MASK (0xCU) |
| #define SDP_MODCTRL_DOUTSWP_SET | ( | x | ) | (((uint32_t)(x) << SDP_MODCTRL_DOUTSWP_SHIFT) & SDP_MODCTRL_DOUTSWP_MASK) |
| #define SDP_MODCTRL_DOUTSWP_SHIFT (2U) |
| #define SDP_MODCTRL_HASALG_GET | ( | x | ) | (((uint32_t)(x) & SDP_MODCTRL_HASALG_MASK) >> SDP_MODCTRL_HASALG_SHIFT) |
| #define SDP_MODCTRL_HASALG_MASK (0xF000U) |
| #define SDP_MODCTRL_HASALG_SET | ( | x | ) | (((uint32_t)(x) << SDP_MODCTRL_HASALG_SHIFT) & SDP_MODCTRL_HASALG_MASK) |
| #define SDP_MODCTRL_HASALG_SHIFT (12U) |
| #define SDP_MODCTRL_HASCHK_GET | ( | x | ) | (((uint32_t)(x) & SDP_MODCTRL_HASCHK_MASK) >> SDP_MODCTRL_HASCHK_SHIFT) |
| #define SDP_MODCTRL_HASCHK_MASK (0x400U) |
| #define SDP_MODCTRL_HASCHK_SET | ( | x | ) | (((uint32_t)(x) << SDP_MODCTRL_HASCHK_SHIFT) & SDP_MODCTRL_HASCHK_MASK) |
| #define SDP_MODCTRL_HASCHK_SHIFT (10U) |
| #define SDP_MODCTRL_HASOUT_GET | ( | x | ) | (((uint32_t)(x) & SDP_MODCTRL_HASOUT_MASK) >> SDP_MODCTRL_HASOUT_SHIFT) |
| #define SDP_MODCTRL_HASOUT_MASK (0x200U) |
| #define SDP_MODCTRL_HASOUT_SET | ( | x | ) | (((uint32_t)(x) << SDP_MODCTRL_HASOUT_SHIFT) & SDP_MODCTRL_HASOUT_MASK) |
| #define SDP_MODCTRL_HASOUT_SHIFT (9U) |
| #define SDP_MODCTRL_KEYSWP_GET | ( | x | ) | (((uint32_t)(x) & SDP_MODCTRL_KEYSWP_MASK) >> SDP_MODCTRL_KEYSWP_SHIFT) |
| #define SDP_MODCTRL_KEYSWP_MASK (0x3U) |
| #define SDP_MODCTRL_KEYSWP_SET | ( | x | ) | (((uint32_t)(x) << SDP_MODCTRL_KEYSWP_SHIFT) & SDP_MODCTRL_KEYSWP_MASK) |
| #define SDP_MODCTRL_KEYSWP_SHIFT (0U) |
| #define SDP_NPKTPTR_NPKTPTR_GET | ( | x | ) | (((uint32_t)(x) & SDP_NPKTPTR_NPKTPTR_MASK) >> SDP_NPKTPTR_NPKTPTR_SHIFT) |
| #define SDP_NPKTPTR_NPKTPTR_MASK (0xFFFFFFFFUL) |
| #define SDP_NPKTPTR_NPKTPTR_SET | ( | x | ) | (((uint32_t)(x) << SDP_NPKTPTR_NPKTPTR_SHIFT) & SDP_NPKTPTR_NPKTPTR_MASK) |
| #define SDP_NPKTPTR_NPKTPTR_SHIFT (0U) |
| #define SDP_PKTBUF_PKTBUF_GET | ( | x | ) | (((uint32_t)(x) & SDP_PKTBUF_PKTBUF_MASK) >> SDP_PKTBUF_PKTBUF_SHIFT) |
| #define SDP_PKTBUF_PKTBUF_MASK (0xFFFFFFFFUL) |
| #define SDP_PKTBUF_PKTBUF_SET | ( | x | ) | (((uint32_t)(x) << SDP_PKTBUF_PKTBUF_SHIFT) & SDP_PKTBUF_PKTBUF_MASK) |
| #define SDP_PKTBUF_PKTBUF_SHIFT (0U) |
| #define SDP_PKTCNT_CNTINCR_GET | ( | x | ) | (((uint32_t)(x) & SDP_PKTCNT_CNTINCR_MASK) >> SDP_PKTCNT_CNTINCR_SHIFT) |
| #define SDP_PKTCNT_CNTINCR_MASK (0xFFU) |
| #define SDP_PKTCNT_CNTINCR_SET | ( | x | ) | (((uint32_t)(x) << SDP_PKTCNT_CNTINCR_SHIFT) & SDP_PKTCNT_CNTINCR_MASK) |
| #define SDP_PKTCNT_CNTINCR_SHIFT (0U) |
| #define SDP_PKTCNT_CNTVAL_GET | ( | x | ) | (((uint32_t)(x) & SDP_PKTCNT_CNTVAL_MASK) >> SDP_PKTCNT_CNTVAL_SHIFT) |
| #define SDP_PKTCNT_CNTVAL_MASK (0xFF0000UL) |
| #define SDP_PKTCNT_CNTVAL_SHIFT (16U) |
| #define SDP_PKTCTL_CHAIN_GET | ( | x | ) | (((uint32_t)(x) & SDP_PKTCTL_CHAIN_MASK) >> SDP_PKTCTL_CHAIN_SHIFT) |
| #define SDP_PKTCTL_CHAIN_MASK (0x8U) |
| #define SDP_PKTCTL_CHAIN_SET | ( | x | ) | (((uint32_t)(x) << SDP_PKTCTL_CHAIN_SHIFT) & SDP_PKTCTL_CHAIN_MASK) |
| #define SDP_PKTCTL_CHAIN_SHIFT (3U) |
| #define SDP_PKTCTL_CIPHIV_GET | ( | x | ) | (((uint32_t)(x) & SDP_PKTCTL_CIPHIV_MASK) >> SDP_PKTCTL_CIPHIV_SHIFT) |
| #define SDP_PKTCTL_CIPHIV_MASK (0x40U) |
| #define SDP_PKTCTL_CIPHIV_SET | ( | x | ) | (((uint32_t)(x) << SDP_PKTCTL_CIPHIV_SHIFT) & SDP_PKTCTL_CIPHIV_MASK) |
| #define SDP_PKTCTL_CIPHIV_SHIFT (6U) |
| #define SDP_PKTCTL_DCRSEMA_GET | ( | x | ) | (((uint32_t)(x) & SDP_PKTCTL_DCRSEMA_MASK) >> SDP_PKTCTL_DCRSEMA_SHIFT) |
| #define SDP_PKTCTL_DCRSEMA_MASK (0x4U) |
| #define SDP_PKTCTL_DCRSEMA_SET | ( | x | ) | (((uint32_t)(x) << SDP_PKTCTL_DCRSEMA_SHIFT) & SDP_PKTCTL_DCRSEMA_MASK) |
| #define SDP_PKTCTL_DCRSEMA_SHIFT (2U) |
| #define SDP_PKTCTL_HASFNL_GET | ( | x | ) | (((uint32_t)(x) & SDP_PKTCTL_HASFNL_MASK) >> SDP_PKTCTL_HASFNL_SHIFT) |
| #define SDP_PKTCTL_HASFNL_MASK (0x20U) |
| #define SDP_PKTCTL_HASFNL_SET | ( | x | ) | (((uint32_t)(x) << SDP_PKTCTL_HASFNL_SHIFT) & SDP_PKTCTL_HASFNL_MASK) |
| #define SDP_PKTCTL_HASFNL_SHIFT (5U) |
| #define SDP_PKTCTL_HASINI_GET | ( | x | ) | (((uint32_t)(x) & SDP_PKTCTL_HASINI_MASK) >> SDP_PKTCTL_HASINI_SHIFT) |
| #define SDP_PKTCTL_HASINI_MASK (0x10U) |
| #define SDP_PKTCTL_HASINI_SET | ( | x | ) | (((uint32_t)(x) << SDP_PKTCTL_HASINI_SHIFT) & SDP_PKTCTL_HASINI_MASK) |
| #define SDP_PKTCTL_HASINI_SHIFT (4U) |
| #define SDP_PKTCTL_PKTINT_GET | ( | x | ) | (((uint32_t)(x) & SDP_PKTCTL_PKTINT_MASK) >> SDP_PKTCTL_PKTINT_SHIFT) |
| #define SDP_PKTCTL_PKTINT_MASK (0x2U) |
| #define SDP_PKTCTL_PKTINT_SET | ( | x | ) | (((uint32_t)(x) << SDP_PKTCTL_PKTINT_SHIFT) & SDP_PKTCTL_PKTINT_MASK) |
| #define SDP_PKTCTL_PKTINT_SHIFT (1U) |
| #define SDP_PKTCTL_PKTTAG_GET | ( | x | ) | (((uint32_t)(x) & SDP_PKTCTL_PKTTAG_MASK) >> SDP_PKTCTL_PKTTAG_SHIFT) |
| #define SDP_PKTCTL_PKTTAG_MASK (0xFF000000UL) |
| #define SDP_PKTCTL_PKTTAG_SET | ( | x | ) | (((uint32_t)(x) << SDP_PKTCTL_PKTTAG_SHIFT) & SDP_PKTCTL_PKTTAG_MASK) |
| #define SDP_PKTCTL_PKTTAG_SHIFT (24U) |
| #define SDP_PKTDST_PKTDST_GET | ( | x | ) | (((uint32_t)(x) & SDP_PKTDST_PKTDST_MASK) >> SDP_PKTDST_PKTDST_SHIFT) |
| #define SDP_PKTDST_PKTDST_MASK (0xFFFFFFFFUL) |
| #define SDP_PKTDST_PKTDST_SET | ( | x | ) | (((uint32_t)(x) << SDP_PKTDST_PKTDST_SHIFT) & SDP_PKTDST_PKTDST_MASK) |
| #define SDP_PKTDST_PKTDST_SHIFT (0U) |
| #define SDP_PKTSRC_PKTSRC_GET | ( | x | ) | (((uint32_t)(x) & SDP_PKTSRC_PKTSRC_MASK) >> SDP_PKTSRC_PKTSRC_SHIFT) |
| #define SDP_PKTSRC_PKTSRC_MASK (0xFFFFFFFFUL) |
| #define SDP_PKTSRC_PKTSRC_SET | ( | x | ) | (((uint32_t)(x) << SDP_PKTSRC_PKTSRC_SHIFT) & SDP_PKTSRC_PKTSRC_MASK) |
| #define SDP_PKTSRC_PKTSRC_SHIFT (0U) |
| #define SDP_SDPCR_CIPDIS_GET | ( | x | ) | (((uint32_t)(x) & SDP_SDPCR_CIPDIS_MASK) >> SDP_SDPCR_CIPDIS_SHIFT) |
| #define SDP_SDPCR_CIPDIS_MASK (0x20000000UL) |
| #define SDP_SDPCR_CIPDIS_SHIFT (29U) |
| #define SDP_SDPCR_CIPHEN_GET | ( | x | ) | (((uint32_t)(x) & SDP_SDPCR_CIPHEN_MASK) >> SDP_SDPCR_CIPHEN_SHIFT) |
| #define SDP_SDPCR_CIPHEN_MASK (0x800000UL) |
| #define SDP_SDPCR_CIPHEN_SET | ( | x | ) | (((uint32_t)(x) << SDP_SDPCR_CIPHEN_SHIFT) & SDP_SDPCR_CIPHEN_MASK) |
| #define SDP_SDPCR_CIPHEN_SHIFT (23U) |
| #define SDP_SDPCR_CLKGAT_GET | ( | x | ) | (((uint32_t)(x) & SDP_SDPCR_CLKGAT_MASK) >> SDP_SDPCR_CLKGAT_SHIFT) |
| #define SDP_SDPCR_CLKGAT_MASK (0x40000000UL) |
| #define SDP_SDPCR_CLKGAT_SET | ( | x | ) | (((uint32_t)(x) << SDP_SDPCR_CLKGAT_SHIFT) & SDP_SDPCR_CLKGAT_MASK) |
| #define SDP_SDPCR_CLKGAT_SHIFT (30U) |
| #define SDP_SDPCR_CONFEN_GET | ( | x | ) | (((uint32_t)(x) & SDP_SDPCR_CONFEN_MASK) >> SDP_SDPCR_CONFEN_SHIFT) |
| #define SDP_SDPCR_CONFEN_MASK (0x100000UL) |
| #define SDP_SDPCR_CONFEN_SET | ( | x | ) | (((uint32_t)(x) << SDP_SDPCR_CONFEN_SHIFT) & SDP_SDPCR_CONFEN_MASK) |
| #define SDP_SDPCR_CONFEN_SHIFT (20U) |
| #define SDP_SDPCR_DCRPDI_GET | ( | x | ) | (((uint32_t)(x) & SDP_SDPCR_DCRPDI_MASK) >> SDP_SDPCR_DCRPDI_SHIFT) |
| #define SDP_SDPCR_DCRPDI_MASK (0x80000UL) |
| #define SDP_SDPCR_DCRPDI_SET | ( | x | ) | (((uint32_t)(x) << SDP_SDPCR_DCRPDI_SHIFT) & SDP_SDPCR_DCRPDI_MASK) |
| #define SDP_SDPCR_DCRPDI_SHIFT (19U) |
| #define SDP_SDPCR_HASDIS_GET | ( | x | ) | (((uint32_t)(x) & SDP_SDPCR_HASDIS_MASK) >> SDP_SDPCR_HASDIS_SHIFT) |
| #define SDP_SDPCR_HASDIS_MASK (0x10000000UL) |
| #define SDP_SDPCR_HASDIS_SHIFT (28U) |
| #define SDP_SDPCR_HASHEN_GET | ( | x | ) | (((uint32_t)(x) & SDP_SDPCR_HASHEN_MASK) >> SDP_SDPCR_HASHEN_SHIFT) |
| #define SDP_SDPCR_HASHEN_MASK (0x400000UL) |
| #define SDP_SDPCR_HASHEN_SET | ( | x | ) | (((uint32_t)(x) << SDP_SDPCR_HASHEN_SHIFT) & SDP_SDPCR_HASHEN_MASK) |
| #define SDP_SDPCR_HASHEN_SHIFT (22U) |
| #define SDP_SDPCR_INTEN_GET | ( | x | ) | (((uint32_t)(x) & SDP_SDPCR_INTEN_MASK) >> SDP_SDPCR_INTEN_SHIFT) |
| #define SDP_SDPCR_INTEN_MASK (0x1U) |
| #define SDP_SDPCR_INTEN_SET | ( | x | ) | (((uint32_t)(x) << SDP_SDPCR_INTEN_SHIFT) & SDP_SDPCR_INTEN_MASK) |
| #define SDP_SDPCR_INTEN_SHIFT (0U) |
| #define SDP_SDPCR_MCPEN_GET | ( | x | ) | (((uint32_t)(x) & SDP_SDPCR_MCPEN_MASK) >> SDP_SDPCR_MCPEN_SHIFT) |
| #define SDP_SDPCR_MCPEN_MASK (0x200000UL) |
| #define SDP_SDPCR_MCPEN_SET | ( | x | ) | (((uint32_t)(x) << SDP_SDPCR_MCPEN_SHIFT) & SDP_SDPCR_MCPEN_MASK) |
| #define SDP_SDPCR_MCPEN_SHIFT (21U) |
| #define SDP_SDPCR_RDSCEN_GET | ( | x | ) | (((uint32_t)(x) & SDP_SDPCR_RDSCEN_MASK) >> SDP_SDPCR_RDSCEN_SHIFT) |
| #define SDP_SDPCR_RDSCEN_MASK (0x100U) |
| #define SDP_SDPCR_RDSCEN_SET | ( | x | ) | (((uint32_t)(x) << SDP_SDPCR_RDSCEN_SHIFT) & SDP_SDPCR_RDSCEN_MASK) |
| #define SDP_SDPCR_RDSCEN_SHIFT (8U) |
| #define SDP_SDPCR_SFTRST_GET | ( | x | ) | (((uint32_t)(x) & SDP_SDPCR_SFTRST_MASK) >> SDP_SDPCR_SFTRST_SHIFT) |
| #define SDP_SDPCR_SFTRST_MASK (0x80000000UL) |
| #define SDP_SDPCR_SFTRST_SET | ( | x | ) | (((uint32_t)(x) << SDP_SDPCR_SFTRST_SHIFT) & SDP_SDPCR_SFTRST_MASK) |
| #define SDP_SDPCR_SFTRST_SHIFT (31U) |
| #define SDP_SDPCR_TSTPKT0IRQ_GET | ( | x | ) | (((uint32_t)(x) & SDP_SDPCR_TSTPKT0IRQ_MASK) >> SDP_SDPCR_TSTPKT0IRQ_SHIFT) |
| #define SDP_SDPCR_TSTPKT0IRQ_MASK (0x20000UL) |
| #define SDP_SDPCR_TSTPKT0IRQ_SET | ( | x | ) | (((uint32_t)(x) << SDP_SDPCR_TSTPKT0IRQ_SHIFT) & SDP_SDPCR_TSTPKT0IRQ_MASK) |
| #define SDP_SDPCR_TSTPKT0IRQ_SHIFT (17U) |
| #define SDP_STA_AESBSY_GET | ( | x | ) | (((uint32_t)(x) & SDP_STA_AESBSY_MASK) >> SDP_STA_AESBSY_SHIFT) |
| #define SDP_STA_AESBSY_MASK (0x80000UL) |
| #define SDP_STA_AESBSY_SHIFT (19U) |
| #define SDP_STA_CHN1PKT0_GET | ( | x | ) | (((uint32_t)(x) & SDP_STA_CHN1PKT0_MASK) >> SDP_STA_CHN1PKT0_SHIFT) |
| #define SDP_STA_CHN1PKT0_MASK (0x100000UL) |
| #define SDP_STA_CHN1PKT0_SET | ( | x | ) | (((uint32_t)(x) << SDP_STA_CHN1PKT0_SHIFT) & SDP_STA_CHN1PKT0_MASK) |
| #define SDP_STA_CHN1PKT0_SHIFT (20U) |
| #define SDP_STA_ERRCHAIN_GET | ( | x | ) | (((uint32_t)(x) & SDP_STA_ERRCHAIN_MASK) >> SDP_STA_ERRCHAIN_SHIFT) |
| #define SDP_STA_ERRCHAIN_MASK (0x1U) |
| #define SDP_STA_ERRCHAIN_SET | ( | x | ) | (((uint32_t)(x) << SDP_STA_ERRCHAIN_SHIFT) & SDP_STA_ERRCHAIN_MASK) |
| #define SDP_STA_ERRCHAIN_SHIFT (0U) |
| #define SDP_STA_ERRDST_GET | ( | x | ) | (((uint32_t)(x) & SDP_STA_ERRDST_MASK) >> SDP_STA_ERRDST_SHIFT) |
| #define SDP_STA_ERRDST_MASK (0x4U) |
| #define SDP_STA_ERRDST_SET | ( | x | ) | (((uint32_t)(x) << SDP_STA_ERRDST_SHIFT) & SDP_STA_ERRDST_MASK) |
| #define SDP_STA_ERRDST_SHIFT (2U) |
| #define SDP_STA_ERRHAS_GET | ( | x | ) | (((uint32_t)(x) & SDP_STA_ERRHAS_MASK) >> SDP_STA_ERRHAS_SHIFT) |
| #define SDP_STA_ERRHAS_MASK (0x2U) |
| #define SDP_STA_ERRHAS_SET | ( | x | ) | (((uint32_t)(x) << SDP_STA_ERRHAS_SHIFT) & SDP_STA_ERRHAS_MASK) |
| #define SDP_STA_ERRHAS_SHIFT (1U) |
| #define SDP_STA_ERRPKT_GET | ( | x | ) | (((uint32_t)(x) & SDP_STA_ERRPKT_MASK) >> SDP_STA_ERRPKT_SHIFT) |
| #define SDP_STA_ERRPKT_MASK (0x10U) |
| #define SDP_STA_ERRPKT_SET | ( | x | ) | (((uint32_t)(x) << SDP_STA_ERRPKT_SHIFT) & SDP_STA_ERRPKT_MASK) |
| #define SDP_STA_ERRPKT_SHIFT (4U) |
| #define SDP_STA_ERRSET_GET | ( | x | ) | (((uint32_t)(x) & SDP_STA_ERRSET_MASK) >> SDP_STA_ERRSET_SHIFT) |
| #define SDP_STA_ERRSET_MASK (0x20U) |
| #define SDP_STA_ERRSET_SET | ( | x | ) | (((uint32_t)(x) << SDP_STA_ERRSET_SHIFT) & SDP_STA_ERRSET_MASK) |
| #define SDP_STA_ERRSET_SHIFT (5U) |
| #define SDP_STA_ERRSRC_GET | ( | x | ) | (((uint32_t)(x) & SDP_STA_ERRSRC_MASK) >> SDP_STA_ERRSRC_SHIFT) |
| #define SDP_STA_ERRSRC_MASK (0x8U) |
| #define SDP_STA_ERRSRC_SET | ( | x | ) | (((uint32_t)(x) << SDP_STA_ERRSRC_SHIFT) & SDP_STA_ERRSRC_MASK) |
| #define SDP_STA_ERRSRC_SHIFT (3U) |
| #define SDP_STA_HASBSY_GET | ( | x | ) | (((uint32_t)(x) & SDP_STA_HASBSY_MASK) >> SDP_STA_HASBSY_SHIFT) |
| #define SDP_STA_HASBSY_MASK (0x40000UL) |
| #define SDP_STA_HASBSY_SHIFT (18U) |
| #define SDP_STA_IRQ_GET | ( | x | ) | (((uint32_t)(x) & SDP_STA_IRQ_MASK) >> SDP_STA_IRQ_SHIFT) |
| #define SDP_STA_IRQ_MASK (0x800000UL) |
| #define SDP_STA_IRQ_SET | ( | x | ) | (((uint32_t)(x) << SDP_STA_IRQ_SHIFT) & SDP_STA_IRQ_MASK) |
| #define SDP_STA_IRQ_SHIFT (23U) |
| #define SDP_STA_PKTCNT0_GET | ( | x | ) | (((uint32_t)(x) & SDP_STA_PKTCNT0_MASK) >> SDP_STA_PKTCNT0_SHIFT) |
| #define SDP_STA_PKTCNT0_MASK (0x20000UL) |
| #define SDP_STA_PKTCNT0_SET | ( | x | ) | (((uint32_t)(x) << SDP_STA_PKTCNT0_SHIFT) & SDP_STA_PKTCNT0_MASK) |
| #define SDP_STA_PKTCNT0_SHIFT (17U) |
| #define SDP_STA_PKTDON_GET | ( | x | ) | (((uint32_t)(x) & SDP_STA_PKTDON_MASK) >> SDP_STA_PKTDON_SHIFT) |
| #define SDP_STA_PKTDON_MASK (0x10000UL) |
| #define SDP_STA_PKTDON_SET | ( | x | ) | (((uint32_t)(x) << SDP_STA_PKTDON_SHIFT) & SDP_STA_PKTDON_MASK) |
| #define SDP_STA_PKTDON_SHIFT (16U) |
| #define SDP_STA_TAG_GET | ( | x | ) | (((uint32_t)(x) & SDP_STA_TAG_MASK) >> SDP_STA_TAG_SHIFT) |
| #define SDP_STA_TAG_MASK (0xFF000000UL) |
| #define SDP_STA_TAG_SHIFT (24U) |