Go to the source code of this file.
◆ HPM_IP_FEATURE_ACMP_12BIT_DAC
| #define HPM_IP_FEATURE_ACMP_12BIT_DAC 1 |
◆ HPM_IP_FEATURE_ACMP_DAC_MATRIX
| #define HPM_IP_FEATURE_ACMP_DAC_MATRIX 1 |
◆ HPM_IP_FEATURE_ACMP_DAC_MAX_LIMIT
| #define HPM_IP_FEATURE_ACMP_DAC_MAX_LIMIT 1 |
◆ HPM_IP_FEATURE_ACMP_FILT_LEN_EXTEND
| #define HPM_IP_FEATURE_ACMP_FILT_LEN_EXTEND 1 |
◆ HPM_IP_FEATURE_ACMP_HAS_CAP_SEL
| #define HPM_IP_FEATURE_ACMP_HAS_CAP_SEL 1 |
◆ HPM_IP_FEATURE_ADC16_HAS_DIFF_MODE
| #define HPM_IP_FEATURE_ADC16_HAS_DIFF_MODE 1 |
◆ HPM_IP_FEATURE_ADC16_HAS_MOT_EN
| #define HPM_IP_FEATURE_ADC16_HAS_MOT_EN 1 |
◆ HPM_IP_FEATURE_CLC_DECOUPLING
| #define HPM_IP_FEATURE_CLC_DECOUPLING 1 |
◆ HPM_IP_FEATURE_DAO_DATA_FORMAT_CONFIG
| #define HPM_IP_FEATURE_DAO_DATA_FORMAT_CONFIG 1 |
◆ HPM_IP_FEATURE_DMAV2_BURST_IN_FIXED_TRANS
| #define HPM_IP_FEATURE_DMAV2_BURST_IN_FIXED_TRANS 1 |
◆ HPM_IP_FEATURE_DMAV2_BYTE_ORDER_SWAP
| #define HPM_IP_FEATURE_DMAV2_BYTE_ORDER_SWAP 1 |
◆ HPM_IP_FEATURE_ENET_HAS_MII_MODE
| #define HPM_IP_FEATURE_ENET_HAS_MII_MODE 1 |
◆ HPM_IP_FEATURE_EWDG_SOC_SUPPORT_TIMEOUT_INTERRUPT
| #define HPM_IP_FEATURE_EWDG_SOC_SUPPORT_TIMEOUT_INTERRUPT 1 |
◆ HPM_IP_FEATURE_FEMC_SRAM_CS1_CS2
| #define HPM_IP_FEATURE_FEMC_SRAM_CS1_CS2 1 |
◆ HPM_IP_FEATURE_FFA_FP32
| #define HPM_IP_FEATURE_FFA_FP32 1 |
◆ HPM_IP_FEATURE_GPTMR_BURST_MODE
| #define HPM_IP_FEATURE_GPTMR_BURST_MODE 1 |
◆ HPM_IP_FEATURE_GPTMR_CNT_MODE
| #define HPM_IP_FEATURE_GPTMR_CNT_MODE 1 |
◆ HPM_IP_FEATURE_GPTMR_MONITOR
| #define HPM_IP_FEATURE_GPTMR_MONITOR 1 |
◆ HPM_IP_FEATURE_GPTMR_OP_MODE
| #define HPM_IP_FEATURE_GPTMR_OP_MODE 1 |
◆ HPM_IP_FEATURE_I2C_SUPPORT_RESET
| #define HPM_IP_FEATURE_I2C_SUPPORT_RESET 1 |
◆ HPM_IP_FEATURE_I2S_BUFF_ALIGN_FRAME
| #define HPM_IP_FEATURE_I2S_BUFF_ALIGN_FRAME 1 |
◆ HPM_IP_FEATURE_PLB_COUNTER_READ_REAL_TIME
| #define HPM_IP_FEATURE_PLB_COUNTER_READ_REAL_TIME 1 |
◆ HPM_IP_FEATURE_PPI_DM_POLARITY_EACH_CS
| #define HPM_IP_FEATURE_PPI_DM_POLARITY_EACH_CS 1 |
◆ HPM_IP_FEATURE_PWMV2_ASYNC_FAULT_CFG
| #define HPM_IP_FEATURE_PWMV2_ASYNC_FAULT_CFG 1 |
◆ HPM_IP_FEATURE_QEIV2_ADC_THRESHOLD
| #define HPM_IP_FEATURE_QEIV2_ADC_THRESHOLD 1 |
◆ HPM_IP_FEATURE_QEIV2_ONESHOT_MODE
| #define HPM_IP_FEATURE_QEIV2_ONESHOT_MODE 1 |
◆ HPM_IP_FEATURE_QEIV2_SIN_TOGI
| #define HPM_IP_FEATURE_QEIV2_SIN_TOGI 1 |
◆ HPM_IP_FEATURE_QEIV2_SW_RESTART_TRG
| #define HPM_IP_FEATURE_QEIV2_SW_RESTART_TRG 1 |
◆ HPM_IP_FEATURE_QEIV2_TIMESTAMP
| #define HPM_IP_FEATURE_QEIV2_TIMESTAMP 1 |
◆ HPM_IP_FEATURE_RDC_IIR
| #define HPM_IP_FEATURE_RDC_IIR 1 |
◆ HPM_IP_FEATURE_SDM_GATE_FUNC
| #define HPM_IP_FEATURE_SDM_GATE_FUNC 1 |
◆ HPM_IP_FEATURE_SDM_TIMESTAMP_FUNC
| #define HPM_IP_FEATURE_SDM_TIMESTAMP_FUNC 1 |
◆ HPM_IP_FEATURE_SEI_ASYNCHRONOUS_MODE_V2
| #define HPM_IP_FEATURE_SEI_ASYNCHRONOUS_MODE_V2 1 |
◆ HPM_IP_FEATURE_SEI_DIV_STS
| #define HPM_IP_FEATURE_SEI_DIV_STS 1 |
◆ HPM_IP_FEATURE_SEI_HAVE_CTRL2_12
| #define HPM_IP_FEATURE_SEI_HAVE_CTRL2_12 1 |
◆ HPM_IP_FEATURE_SEI_HAVE_DAT10_31
| #define HPM_IP_FEATURE_SEI_HAVE_DAT10_31 1 |
◆ HPM_IP_FEATURE_SEI_HAVE_INTR64_255
| #define HPM_IP_FEATURE_SEI_HAVE_INTR64_255 1 |
◆ HPM_IP_FEATURE_SEI_HAVE_PTCD
| #define HPM_IP_FEATURE_SEI_HAVE_PTCD 1 |
◆ HPM_IP_FEATURE_SEI_IN_DIV
| #define HPM_IP_FEATURE_SEI_IN_DIV 1 |
◆ HPM_IP_FEATURE_SEI_RX_LATCH_FEATURE
| #define HPM_IP_FEATURE_SEI_RX_LATCH_FEATURE 1 |
◆ HPM_IP_FEATURE_SEI_TIMEOUT_REWIND_FEATURE
| #define HPM_IP_FEATURE_SEI_TIMEOUT_REWIND_FEATURE 1 |
◆ HPM_IP_FEATURE_SPI_CS_SELECT
| #define HPM_IP_FEATURE_SPI_CS_SELECT 1 |
◆ HPM_IP_FEATURE_SPI_NEW_TRANS_COUNT
| #define HPM_IP_FEATURE_SPI_NEW_TRANS_COUNT 1 |
◆ HPM_IP_FEATURE_SPI_SUPPORT_DIRECTIO
| #define HPM_IP_FEATURE_SPI_SUPPORT_DIRECTIO 1 |
◆ HPM_IP_FEATURE_TRGM_HAS_TRGM_IN_OUT_STATUS
| #define HPM_IP_FEATURE_TRGM_HAS_TRGM_IN_OUT_STATUS 1 |
◆ HPM_IP_FEATURE_TRGM_HRPWM_CALIBRATION_2
| #define HPM_IP_FEATURE_TRGM_HRPWM_CALIBRATION_2 1 |
◆ HPM_IP_FEATURE_UART_9BIT_MODE
| #define HPM_IP_FEATURE_UART_9BIT_MODE 1 |
◆ HPM_IP_FEATURE_UART_ADDR_MATCH
| #define HPM_IP_FEATURE_UART_ADDR_MATCH 1 |
◆ HPM_IP_FEATURE_UART_DISABLE_DMA_TIMEOUT
| #define HPM_IP_FEATURE_UART_DISABLE_DMA_TIMEOUT 1 |
◆ HPM_IP_FEATURE_UART_E00018_FIX
| #define HPM_IP_FEATURE_UART_E00018_FIX 1 |
◆ HPM_IP_FEATURE_UART_FCRR
| #define HPM_IP_FEATURE_UART_FCRR 1 |
◆ HPM_IP_FEATURE_UART_FINE_FIFO_THRLD
| #define HPM_IP_FEATURE_UART_FINE_FIFO_THRLD 1 |
◆ HPM_IP_FEATURE_UART_IIR2
| #define HPM_IP_FEATURE_UART_IIR2 1 |
◆ HPM_IP_FEATURE_UART_RX_EN
| #define HPM_IP_FEATURE_UART_RX_EN 1 |
◆ HPM_IP_FEATURE_UART_RX_IDLE_DETECT
| #define HPM_IP_FEATURE_UART_RX_IDLE_DETECT 1 |
◆ HPM_IP_FEATURE_UART_STOP_BIT
| #define HPM_IP_FEATURE_UART_STOP_BIT 1 |
◆ HPM_IP_FEATURE_UART_TRIG_MODE
| #define HPM_IP_FEATURE_UART_TRIG_MODE 1 |