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Data Structures | |
| struct | UART_Type |
| #define UART_ADDR_CFG_A0_EN_GET | ( | x | ) | (((uint32_t)(x) & UART_ADDR_CFG_A0_EN_MASK) >> UART_ADDR_CFG_A0_EN_SHIFT) |
| #define UART_ADDR_CFG_A0_EN_MASK (0x10000UL) |
| #define UART_ADDR_CFG_A0_EN_SET | ( | x | ) | (((uint32_t)(x) << UART_ADDR_CFG_A0_EN_SHIFT) & UART_ADDR_CFG_A0_EN_MASK) |
| #define UART_ADDR_CFG_A0_EN_SHIFT (16U) |
| #define UART_ADDR_CFG_A1_EN_GET | ( | x | ) | (((uint32_t)(x) & UART_ADDR_CFG_A1_EN_MASK) >> UART_ADDR_CFG_A1_EN_SHIFT) |
| #define UART_ADDR_CFG_A1_EN_MASK (0x20000UL) |
| #define UART_ADDR_CFG_A1_EN_SET | ( | x | ) | (((uint32_t)(x) << UART_ADDR_CFG_A1_EN_SHIFT) & UART_ADDR_CFG_A1_EN_MASK) |
| #define UART_ADDR_CFG_A1_EN_SHIFT (17U) |
| #define UART_ADDR_CFG_ADDR0_GET | ( | x | ) | (((uint32_t)(x) & UART_ADDR_CFG_ADDR0_MASK) >> UART_ADDR_CFG_ADDR0_SHIFT) |
| #define UART_ADDR_CFG_ADDR0_MASK (0xFFU) |
| #define UART_ADDR_CFG_ADDR0_SET | ( | x | ) | (((uint32_t)(x) << UART_ADDR_CFG_ADDR0_SHIFT) & UART_ADDR_CFG_ADDR0_MASK) |
| #define UART_ADDR_CFG_ADDR0_SHIFT (0U) |
| #define UART_ADDR_CFG_ADDR1_GET | ( | x | ) | (((uint32_t)(x) & UART_ADDR_CFG_ADDR1_MASK) >> UART_ADDR_CFG_ADDR1_SHIFT) |
| #define UART_ADDR_CFG_ADDR1_MASK (0xFF00U) |
| #define UART_ADDR_CFG_ADDR1_SET | ( | x | ) | (((uint32_t)(x) << UART_ADDR_CFG_ADDR1_SHIFT) & UART_ADDR_CFG_ADDR1_MASK) |
| #define UART_ADDR_CFG_ADDR1_SHIFT (8U) |
| #define UART_ADDR_CFG_RXEN_9BIT_GET | ( | x | ) | (((uint32_t)(x) & UART_ADDR_CFG_RXEN_9BIT_MASK) >> UART_ADDR_CFG_RXEN_9BIT_SHIFT) |
| #define UART_ADDR_CFG_RXEN_9BIT_MASK (0x40000UL) |
| #define UART_ADDR_CFG_RXEN_9BIT_SET | ( | x | ) | (((uint32_t)(x) << UART_ADDR_CFG_RXEN_9BIT_SHIFT) & UART_ADDR_CFG_RXEN_9BIT_MASK) |
| #define UART_ADDR_CFG_RXEN_9BIT_SHIFT (18U) |
| #define UART_ADDR_CFG_RXEN_ADDR_MSB_GET | ( | x | ) | (((uint32_t)(x) & UART_ADDR_CFG_RXEN_ADDR_MSB_MASK) >> UART_ADDR_CFG_RXEN_ADDR_MSB_SHIFT) |
| #define UART_ADDR_CFG_RXEN_ADDR_MSB_MASK (0x80000UL) |
| #define UART_ADDR_CFG_RXEN_ADDR_MSB_SET | ( | x | ) | (((uint32_t)(x) << UART_ADDR_CFG_RXEN_ADDR_MSB_SHIFT) & UART_ADDR_CFG_RXEN_ADDR_MSB_MASK) |
| #define UART_ADDR_CFG_RXEN_ADDR_MSB_SHIFT (19U) |
| #define UART_ADDR_CFG_TXEN_9BIT_GET | ( | x | ) | (((uint32_t)(x) & UART_ADDR_CFG_TXEN_9BIT_MASK) >> UART_ADDR_CFG_TXEN_9BIT_SHIFT) |
| #define UART_ADDR_CFG_TXEN_9BIT_MASK (0x100000UL) |
| #define UART_ADDR_CFG_TXEN_9BIT_SET | ( | x | ) | (((uint32_t)(x) << UART_ADDR_CFG_TXEN_9BIT_SHIFT) & UART_ADDR_CFG_TXEN_9BIT_MASK) |
| #define UART_ADDR_CFG_TXEN_9BIT_SHIFT (20U) |
| #define UART_CFG_FIFOSIZE_GET | ( | x | ) | (((uint32_t)(x) & UART_CFG_FIFOSIZE_MASK) >> UART_CFG_FIFOSIZE_SHIFT) |
| #define UART_CFG_FIFOSIZE_MASK (0x3U) |
| #define UART_CFG_FIFOSIZE_SHIFT (0U) |
| #define UART_DLL_DLL_GET | ( | x | ) | (((uint32_t)(x) & UART_DLL_DLL_MASK) >> UART_DLL_DLL_SHIFT) |
| #define UART_DLL_DLL_MASK (0xFFU) |
| #define UART_DLL_DLL_SET | ( | x | ) | (((uint32_t)(x) << UART_DLL_DLL_SHIFT) & UART_DLL_DLL_MASK) |
| #define UART_DLL_DLL_SHIFT (0U) |
| #define UART_DLM_DLM_GET | ( | x | ) | (((uint32_t)(x) & UART_DLM_DLM_MASK) >> UART_DLM_DLM_SHIFT) |
| #define UART_DLM_DLM_MASK (0xFFU) |
| #define UART_DLM_DLM_SET | ( | x | ) | (((uint32_t)(x) << UART_DLM_DLM_SHIFT) & UART_DLM_DLM_MASK) |
| #define UART_DLM_DLM_SHIFT (0U) |
| #define UART_FCR_DMAE_GET | ( | x | ) | (((uint32_t)(x) & UART_FCR_DMAE_MASK) >> UART_FCR_DMAE_SHIFT) |
| #define UART_FCR_DMAE_MASK (0x8U) |
| #define UART_FCR_DMAE_SET | ( | x | ) | (((uint32_t)(x) << UART_FCR_DMAE_SHIFT) & UART_FCR_DMAE_MASK) |
| #define UART_FCR_DMAE_SHIFT (3U) |
| #define UART_FCR_FIFOE_GET | ( | x | ) | (((uint32_t)(x) & UART_FCR_FIFOE_MASK) >> UART_FCR_FIFOE_SHIFT) |
| #define UART_FCR_FIFOE_MASK (0x1U) |
| #define UART_FCR_FIFOE_SET | ( | x | ) | (((uint32_t)(x) << UART_FCR_FIFOE_SHIFT) & UART_FCR_FIFOE_MASK) |
| #define UART_FCR_FIFOE_SHIFT (0U) |
| #define UART_FCR_RFIFORST_GET | ( | x | ) | (((uint32_t)(x) & UART_FCR_RFIFORST_MASK) >> UART_FCR_RFIFORST_SHIFT) |
| #define UART_FCR_RFIFORST_MASK (0x2U) |
| #define UART_FCR_RFIFORST_SET | ( | x | ) | (((uint32_t)(x) << UART_FCR_RFIFORST_SHIFT) & UART_FCR_RFIFORST_MASK) |
| #define UART_FCR_RFIFORST_SHIFT (1U) |
| #define UART_FCR_RFIFOT_GET | ( | x | ) | (((uint32_t)(x) & UART_FCR_RFIFOT_MASK) >> UART_FCR_RFIFOT_SHIFT) |
| #define UART_FCR_RFIFOT_MASK (0xC0U) |
| #define UART_FCR_RFIFOT_SET | ( | x | ) | (((uint32_t)(x) << UART_FCR_RFIFOT_SHIFT) & UART_FCR_RFIFOT_MASK) |
| #define UART_FCR_RFIFOT_SHIFT (6U) |
| #define UART_FCR_TFIFORST_GET | ( | x | ) | (((uint32_t)(x) & UART_FCR_TFIFORST_MASK) >> UART_FCR_TFIFORST_SHIFT) |
| #define UART_FCR_TFIFORST_MASK (0x4U) |
| #define UART_FCR_TFIFORST_SET | ( | x | ) | (((uint32_t)(x) << UART_FCR_TFIFORST_SHIFT) & UART_FCR_TFIFORST_MASK) |
| #define UART_FCR_TFIFORST_SHIFT (2U) |
| #define UART_FCR_TFIFOT_GET | ( | x | ) | (((uint32_t)(x) & UART_FCR_TFIFOT_MASK) >> UART_FCR_TFIFOT_SHIFT) |
| #define UART_FCR_TFIFOT_MASK (0x30U) |
| #define UART_FCR_TFIFOT_SET | ( | x | ) | (((uint32_t)(x) << UART_FCR_TFIFOT_SHIFT) & UART_FCR_TFIFOT_MASK) |
| #define UART_FCR_TFIFOT_SHIFT (4U) |
| #define UART_FCRR_DMAE_GET | ( | x | ) | (((uint32_t)(x) & UART_FCRR_DMAE_MASK) >> UART_FCRR_DMAE_SHIFT) |
| #define UART_FCRR_DMAE_MASK (0x8U) |
| #define UART_FCRR_DMAE_SET | ( | x | ) | (((uint32_t)(x) << UART_FCRR_DMAE_SHIFT) & UART_FCRR_DMAE_MASK) |
| #define UART_FCRR_DMAE_SHIFT (3U) |
| #define UART_FCRR_FIFOE_GET | ( | x | ) | (((uint32_t)(x) & UART_FCRR_FIFOE_MASK) >> UART_FCRR_FIFOE_SHIFT) |
| #define UART_FCRR_FIFOE_MASK (0x1U) |
| #define UART_FCRR_FIFOE_SET | ( | x | ) | (((uint32_t)(x) << UART_FCRR_FIFOE_SHIFT) & UART_FCRR_FIFOE_MASK) |
| #define UART_FCRR_FIFOE_SHIFT (0U) |
| #define UART_FCRR_FIFOT4EN_GET | ( | x | ) | (((uint32_t)(x) & UART_FCRR_FIFOT4EN_MASK) >> UART_FCRR_FIFOT4EN_SHIFT) |
| #define UART_FCRR_FIFOT4EN_MASK (0x800000UL) |
| #define UART_FCRR_FIFOT4EN_SET | ( | x | ) | (((uint32_t)(x) << UART_FCRR_FIFOT4EN_SHIFT) & UART_FCRR_FIFOT4EN_MASK) |
| #define UART_FCRR_FIFOT4EN_SHIFT (23U) |
| #define UART_FCRR_RFIFORST_GET | ( | x | ) | (((uint32_t)(x) & UART_FCRR_RFIFORST_MASK) >> UART_FCRR_RFIFORST_SHIFT) |
| #define UART_FCRR_RFIFORST_MASK (0x2U) |
| #define UART_FCRR_RFIFORST_SET | ( | x | ) | (((uint32_t)(x) << UART_FCRR_RFIFORST_SHIFT) & UART_FCRR_RFIFORST_MASK) |
| #define UART_FCRR_RFIFORST_SHIFT (1U) |
| #define UART_FCRR_RFIFOT4_GET | ( | x | ) | (((uint32_t)(x) & UART_FCRR_RFIFOT4_MASK) >> UART_FCRR_RFIFOT4_SHIFT) |
| #define UART_FCRR_RFIFOT4_MASK (0x1F00U) |
| #define UART_FCRR_RFIFOT4_SET | ( | x | ) | (((uint32_t)(x) << UART_FCRR_RFIFOT4_SHIFT) & UART_FCRR_RFIFOT4_MASK) |
| #define UART_FCRR_RFIFOT4_SHIFT (8U) |
| #define UART_FCRR_RFIFOT_GET | ( | x | ) | (((uint32_t)(x) & UART_FCRR_RFIFOT_MASK) >> UART_FCRR_RFIFOT_SHIFT) |
| #define UART_FCRR_RFIFOT_MASK (0xC0U) |
| #define UART_FCRR_RFIFOT_SET | ( | x | ) | (((uint32_t)(x) << UART_FCRR_RFIFOT_SHIFT) & UART_FCRR_RFIFOT_MASK) |
| #define UART_FCRR_RFIFOT_SHIFT (6U) |
| #define UART_FCRR_TFIFORST_GET | ( | x | ) | (((uint32_t)(x) & UART_FCRR_TFIFORST_MASK) >> UART_FCRR_TFIFORST_SHIFT) |
| #define UART_FCRR_TFIFORST_MASK (0x4U) |
| #define UART_FCRR_TFIFORST_SET | ( | x | ) | (((uint32_t)(x) << UART_FCRR_TFIFORST_SHIFT) & UART_FCRR_TFIFORST_MASK) |
| #define UART_FCRR_TFIFORST_SHIFT (2U) |
| #define UART_FCRR_TFIFOT4_GET | ( | x | ) | (((uint32_t)(x) & UART_FCRR_TFIFOT4_MASK) >> UART_FCRR_TFIFOT4_SHIFT) |
| #define UART_FCRR_TFIFOT4_MASK (0x1F0000UL) |
| #define UART_FCRR_TFIFOT4_SET | ( | x | ) | (((uint32_t)(x) << UART_FCRR_TFIFOT4_SHIFT) & UART_FCRR_TFIFOT4_MASK) |
| #define UART_FCRR_TFIFOT4_SHIFT (16U) |
| #define UART_FCRR_TFIFOT_GET | ( | x | ) | (((uint32_t)(x) & UART_FCRR_TFIFOT_MASK) >> UART_FCRR_TFIFOT_SHIFT) |
| #define UART_FCRR_TFIFOT_MASK (0x30U) |
| #define UART_FCRR_TFIFOT_SET | ( | x | ) | (((uint32_t)(x) << UART_FCRR_TFIFOT_SHIFT) & UART_FCRR_TFIFOT_MASK) |
| #define UART_FCRR_TFIFOT_SHIFT (4U) |
| #define UART_FCRR_TMOUT_RXDMA_DIS_GET | ( | x | ) | (((uint32_t)(x) & UART_FCRR_TMOUT_RXDMA_DIS_MASK) >> UART_FCRR_TMOUT_RXDMA_DIS_SHIFT) |
| #define UART_FCRR_TMOUT_RXDMA_DIS_MASK (0x1000000UL) |
| #define UART_FCRR_TMOUT_RXDMA_DIS_SET | ( | x | ) | (((uint32_t)(x) << UART_FCRR_TMOUT_RXDMA_DIS_SHIFT) & UART_FCRR_TMOUT_RXDMA_DIS_MASK) |
| #define UART_FCRR_TMOUT_RXDMA_DIS_SHIFT (24U) |
| #define UART_GPR_DATA_GET | ( | x | ) | (((uint32_t)(x) & UART_GPR_DATA_MASK) >> UART_GPR_DATA_SHIFT) |
| #define UART_GPR_DATA_MASK (0xFFU) |
| #define UART_GPR_DATA_SET | ( | x | ) | (((uint32_t)(x) << UART_GPR_DATA_SHIFT) & UART_GPR_DATA_MASK) |
| #define UART_GPR_DATA_SHIFT (0U) |
| #define UART_IDLE_CFG_RX_IDLE_COND_GET | ( | x | ) | (((uint32_t)(x) & UART_IDLE_CFG_RX_IDLE_COND_MASK) >> UART_IDLE_CFG_RX_IDLE_COND_SHIFT) |
| #define UART_IDLE_CFG_RX_IDLE_COND_MASK (0x200U) |
| #define UART_IDLE_CFG_RX_IDLE_COND_SET | ( | x | ) | (((uint32_t)(x) << UART_IDLE_CFG_RX_IDLE_COND_SHIFT) & UART_IDLE_CFG_RX_IDLE_COND_MASK) |
| #define UART_IDLE_CFG_RX_IDLE_COND_SHIFT (9U) |
| #define UART_IDLE_CFG_RX_IDLE_EN_GET | ( | x | ) | (((uint32_t)(x) & UART_IDLE_CFG_RX_IDLE_EN_MASK) >> UART_IDLE_CFG_RX_IDLE_EN_SHIFT) |
| #define UART_IDLE_CFG_RX_IDLE_EN_MASK (0x100U) |
| #define UART_IDLE_CFG_RX_IDLE_EN_SET | ( | x | ) | (((uint32_t)(x) << UART_IDLE_CFG_RX_IDLE_EN_SHIFT) & UART_IDLE_CFG_RX_IDLE_EN_MASK) |
| #define UART_IDLE_CFG_RX_IDLE_EN_SHIFT (8U) |
| #define UART_IDLE_CFG_RX_IDLE_THR_GET | ( | x | ) | (((uint32_t)(x) & UART_IDLE_CFG_RX_IDLE_THR_MASK) >> UART_IDLE_CFG_RX_IDLE_THR_SHIFT) |
| #define UART_IDLE_CFG_RX_IDLE_THR_MASK (0xFFU) |
| #define UART_IDLE_CFG_RX_IDLE_THR_SET | ( | x | ) | (((uint32_t)(x) << UART_IDLE_CFG_RX_IDLE_THR_SHIFT) & UART_IDLE_CFG_RX_IDLE_THR_MASK) |
| #define UART_IDLE_CFG_RX_IDLE_THR_SHIFT (0U) |
| #define UART_IDLE_CFG_RXEN_GET | ( | x | ) | (((uint32_t)(x) & UART_IDLE_CFG_RXEN_MASK) >> UART_IDLE_CFG_RXEN_SHIFT) |
| #define UART_IDLE_CFG_RXEN_MASK (0x800U) |
| #define UART_IDLE_CFG_RXEN_SET | ( | x | ) | (((uint32_t)(x) << UART_IDLE_CFG_RXEN_SHIFT) & UART_IDLE_CFG_RXEN_MASK) |
| #define UART_IDLE_CFG_RXEN_SHIFT (11U) |
| #define UART_IDLE_CFG_TX_IDLE_COND_GET | ( | x | ) | (((uint32_t)(x) & UART_IDLE_CFG_TX_IDLE_COND_MASK) >> UART_IDLE_CFG_TX_IDLE_COND_SHIFT) |
| #define UART_IDLE_CFG_TX_IDLE_COND_MASK (0x2000000UL) |
| #define UART_IDLE_CFG_TX_IDLE_COND_SET | ( | x | ) | (((uint32_t)(x) << UART_IDLE_CFG_TX_IDLE_COND_SHIFT) & UART_IDLE_CFG_TX_IDLE_COND_MASK) |
| #define UART_IDLE_CFG_TX_IDLE_COND_SHIFT (25U) |
| #define UART_IDLE_CFG_TX_IDLE_EN_GET | ( | x | ) | (((uint32_t)(x) & UART_IDLE_CFG_TX_IDLE_EN_MASK) >> UART_IDLE_CFG_TX_IDLE_EN_SHIFT) |
| #define UART_IDLE_CFG_TX_IDLE_EN_MASK (0x1000000UL) |
| #define UART_IDLE_CFG_TX_IDLE_EN_SET | ( | x | ) | (((uint32_t)(x) << UART_IDLE_CFG_TX_IDLE_EN_SHIFT) & UART_IDLE_CFG_TX_IDLE_EN_MASK) |
| #define UART_IDLE_CFG_TX_IDLE_EN_SHIFT (24U) |
| #define UART_IDLE_CFG_TX_IDLE_THR_GET | ( | x | ) | (((uint32_t)(x) & UART_IDLE_CFG_TX_IDLE_THR_MASK) >> UART_IDLE_CFG_TX_IDLE_THR_SHIFT) |
| #define UART_IDLE_CFG_TX_IDLE_THR_MASK (0xFF0000UL) |
| #define UART_IDLE_CFG_TX_IDLE_THR_SET | ( | x | ) | (((uint32_t)(x) << UART_IDLE_CFG_TX_IDLE_THR_SHIFT) & UART_IDLE_CFG_TX_IDLE_THR_MASK) |
| #define UART_IDLE_CFG_TX_IDLE_THR_SHIFT (16U) |
| #define UART_IER_EADDRM_GET | ( | x | ) | (((uint32_t)(x) & UART_IER_EADDRM_MASK) >> UART_IER_EADDRM_SHIFT) |
| #define UART_IER_EADDRM_IDLE_GET | ( | x | ) | (((uint32_t)(x) & UART_IER_EADDRM_IDLE_MASK) >> UART_IER_EADDRM_IDLE_SHIFT) |
| #define UART_IER_EADDRM_IDLE_MASK (0x10000000UL) |
| #define UART_IER_EADDRM_IDLE_SET | ( | x | ) | (((uint32_t)(x) << UART_IER_EADDRM_IDLE_SHIFT) & UART_IER_EADDRM_IDLE_MASK) |
| #define UART_IER_EADDRM_IDLE_SHIFT (28U) |
| #define UART_IER_EADDRM_MASK (0x20000000UL) |
| #define UART_IER_EADDRM_SET | ( | x | ) | (((uint32_t)(x) << UART_IER_EADDRM_SHIFT) & UART_IER_EADDRM_MASK) |
| #define UART_IER_EADDRM_SHIFT (29U) |
| #define UART_IER_EDATLOST_GET | ( | x | ) | (((uint32_t)(x) & UART_IER_EDATLOST_MASK) >> UART_IER_EDATLOST_SHIFT) |
| #define UART_IER_EDATLOST_MASK (0x8000000UL) |
| #define UART_IER_EDATLOST_SET | ( | x | ) | (((uint32_t)(x) << UART_IER_EDATLOST_SHIFT) & UART_IER_EDATLOST_MASK) |
| #define UART_IER_EDATLOST_SHIFT (27U) |
| #define UART_IER_ELSI_GET | ( | x | ) | (((uint32_t)(x) & UART_IER_ELSI_MASK) >> UART_IER_ELSI_SHIFT) |
| #define UART_IER_ELSI_MASK (0x4U) |
| #define UART_IER_ELSI_SET | ( | x | ) | (((uint32_t)(x) << UART_IER_ELSI_SHIFT) & UART_IER_ELSI_MASK) |
| #define UART_IER_ELSI_SHIFT (2U) |
| #define UART_IER_EMSI_GET | ( | x | ) | (((uint32_t)(x) & UART_IER_EMSI_MASK) >> UART_IER_EMSI_SHIFT) |
| #define UART_IER_EMSI_MASK (0x8U) |
| #define UART_IER_EMSI_SET | ( | x | ) | (((uint32_t)(x) << UART_IER_EMSI_SHIFT) & UART_IER_EMSI_MASK) |
| #define UART_IER_EMSI_SHIFT (3U) |
| #define UART_IER_ERBI_GET | ( | x | ) | (((uint32_t)(x) & UART_IER_ERBI_MASK) >> UART_IER_ERBI_SHIFT) |
| #define UART_IER_ERBI_MASK (0x1U) |
| #define UART_IER_ERBI_SET | ( | x | ) | (((uint32_t)(x) << UART_IER_ERBI_SHIFT) & UART_IER_ERBI_MASK) |
| #define UART_IER_ERBI_SHIFT (0U) |
| #define UART_IER_ERXIDLE_GET | ( | x | ) | (((uint32_t)(x) & UART_IER_ERXIDLE_MASK) >> UART_IER_ERXIDLE_SHIFT) |
| #define UART_IER_ERXIDLE_MASK (0x80000000UL) |
| #define UART_IER_ERXIDLE_SET | ( | x | ) | (((uint32_t)(x) << UART_IER_ERXIDLE_SHIFT) & UART_IER_ERXIDLE_MASK) |
| #define UART_IER_ERXIDLE_SHIFT (31U) |
| #define UART_IER_ETHEI_GET | ( | x | ) | (((uint32_t)(x) & UART_IER_ETHEI_MASK) >> UART_IER_ETHEI_SHIFT) |
| #define UART_IER_ETHEI_MASK (0x2U) |
| #define UART_IER_ETHEI_SET | ( | x | ) | (((uint32_t)(x) << UART_IER_ETHEI_SHIFT) & UART_IER_ETHEI_MASK) |
| #define UART_IER_ETHEI_SHIFT (1U) |
| #define UART_IER_ETXIDLE_GET | ( | x | ) | (((uint32_t)(x) & UART_IER_ETXIDLE_MASK) >> UART_IER_ETXIDLE_SHIFT) |
| #define UART_IER_ETXIDLE_MASK (0x40000000UL) |
| #define UART_IER_ETXIDLE_SET | ( | x | ) | (((uint32_t)(x) << UART_IER_ETXIDLE_SHIFT) & UART_IER_ETXIDLE_MASK) |
| #define UART_IER_ETXIDLE_SHIFT (30U) |
| #define UART_IIR2_ADDR_MATCH_GET | ( | x | ) | (((uint32_t)(x) & UART_IIR2_ADDR_MATCH_MASK) >> UART_IIR2_ADDR_MATCH_SHIFT) |
| #define UART_IIR2_ADDR_MATCH_IDLE_GET | ( | x | ) | (((uint32_t)(x) & UART_IIR2_ADDR_MATCH_IDLE_MASK) >> UART_IIR2_ADDR_MATCH_IDLE_SHIFT) |
| #define UART_IIR2_ADDR_MATCH_IDLE_MASK (0x10000000UL) |
| #define UART_IIR2_ADDR_MATCH_IDLE_SET | ( | x | ) | (((uint32_t)(x) << UART_IIR2_ADDR_MATCH_IDLE_SHIFT) & UART_IIR2_ADDR_MATCH_IDLE_MASK) |
| #define UART_IIR2_ADDR_MATCH_IDLE_SHIFT (28U) |
| #define UART_IIR2_ADDR_MATCH_MASK (0x20000000UL) |
| #define UART_IIR2_ADDR_MATCH_SET | ( | x | ) | (((uint32_t)(x) << UART_IIR2_ADDR_MATCH_SHIFT) & UART_IIR2_ADDR_MATCH_MASK) |
| #define UART_IIR2_ADDR_MATCH_SHIFT (29U) |
| #define UART_IIR2_DATA_LOST_GET | ( | x | ) | (((uint32_t)(x) & UART_IIR2_DATA_LOST_MASK) >> UART_IIR2_DATA_LOST_SHIFT) |
| #define UART_IIR2_DATA_LOST_MASK (0x8000000UL) |
| #define UART_IIR2_DATA_LOST_SET | ( | x | ) | (((uint32_t)(x) << UART_IIR2_DATA_LOST_SHIFT) & UART_IIR2_DATA_LOST_MASK) |
| #define UART_IIR2_DATA_LOST_SHIFT (27U) |
| #define UART_IIR2_FIFOED_GET | ( | x | ) | (((uint32_t)(x) & UART_IIR2_FIFOED_MASK) >> UART_IIR2_FIFOED_SHIFT) |
| #define UART_IIR2_FIFOED_MASK (0xC0U) |
| #define UART_IIR2_FIFOED_SHIFT (6U) |
| #define UART_IIR2_INTRID_GET | ( | x | ) | (((uint32_t)(x) & UART_IIR2_INTRID_MASK) >> UART_IIR2_INTRID_SHIFT) |
| #define UART_IIR2_INTRID_MASK (0xFU) |
| #define UART_IIR2_INTRID_SHIFT (0U) |
| #define UART_IIR2_RXIDLE_FLAG_GET | ( | x | ) | (((uint32_t)(x) & UART_IIR2_RXIDLE_FLAG_MASK) >> UART_IIR2_RXIDLE_FLAG_SHIFT) |
| #define UART_IIR2_RXIDLE_FLAG_MASK (0x80000000UL) |
| #define UART_IIR2_RXIDLE_FLAG_SET | ( | x | ) | (((uint32_t)(x) << UART_IIR2_RXIDLE_FLAG_SHIFT) & UART_IIR2_RXIDLE_FLAG_MASK) |
| #define UART_IIR2_RXIDLE_FLAG_SHIFT (31U) |
| #define UART_IIR2_TXIDLE_FLAG_GET | ( | x | ) | (((uint32_t)(x) & UART_IIR2_TXIDLE_FLAG_MASK) >> UART_IIR2_TXIDLE_FLAG_SHIFT) |
| #define UART_IIR2_TXIDLE_FLAG_MASK (0x40000000UL) |
| #define UART_IIR2_TXIDLE_FLAG_SET | ( | x | ) | (((uint32_t)(x) << UART_IIR2_TXIDLE_FLAG_SHIFT) & UART_IIR2_TXIDLE_FLAG_MASK) |
| #define UART_IIR2_TXIDLE_FLAG_SHIFT (30U) |
| #define UART_IIR_FIFOED_GET | ( | x | ) | (((uint32_t)(x) & UART_IIR_FIFOED_MASK) >> UART_IIR_FIFOED_SHIFT) |
| #define UART_IIR_FIFOED_MASK (0xC0U) |
| #define UART_IIR_FIFOED_SHIFT (6U) |
| #define UART_IIR_INTRID_GET | ( | x | ) | (((uint32_t)(x) & UART_IIR_INTRID_MASK) >> UART_IIR_INTRID_SHIFT) |
| #define UART_IIR_INTRID_MASK (0xFU) |
| #define UART_IIR_INTRID_SHIFT (0U) |
| #define UART_IIR_RXIDLE_FLAG_GET | ( | x | ) | (((uint32_t)(x) & UART_IIR_RXIDLE_FLAG_MASK) >> UART_IIR_RXIDLE_FLAG_SHIFT) |
| #define UART_IIR_RXIDLE_FLAG_MASK (0x80000000UL) |
| #define UART_IIR_RXIDLE_FLAG_SET | ( | x | ) | (((uint32_t)(x) << UART_IIR_RXIDLE_FLAG_SHIFT) & UART_IIR_RXIDLE_FLAG_MASK) |
| #define UART_IIR_RXIDLE_FLAG_SHIFT (31U) |
| #define UART_LCR_BC_GET | ( | x | ) | (((uint32_t)(x) & UART_LCR_BC_MASK) >> UART_LCR_BC_SHIFT) |
| #define UART_LCR_BC_MASK (0x40U) |
| #define UART_LCR_BC_SET | ( | x | ) | (((uint32_t)(x) << UART_LCR_BC_SHIFT) & UART_LCR_BC_MASK) |
| #define UART_LCR_BC_SHIFT (6U) |
| #define UART_LCR_DLAB_GET | ( | x | ) | (((uint32_t)(x) & UART_LCR_DLAB_MASK) >> UART_LCR_DLAB_SHIFT) |
| #define UART_LCR_DLAB_MASK (0x80U) |
| #define UART_LCR_DLAB_SET | ( | x | ) | (((uint32_t)(x) << UART_LCR_DLAB_SHIFT) & UART_LCR_DLAB_MASK) |
| #define UART_LCR_DLAB_SHIFT (7U) |
| #define UART_LCR_EPS_GET | ( | x | ) | (((uint32_t)(x) & UART_LCR_EPS_MASK) >> UART_LCR_EPS_SHIFT) |
| #define UART_LCR_EPS_MASK (0x10U) |
| #define UART_LCR_EPS_SET | ( | x | ) | (((uint32_t)(x) << UART_LCR_EPS_SHIFT) & UART_LCR_EPS_MASK) |
| #define UART_LCR_EPS_SHIFT (4U) |
| #define UART_LCR_PEN_GET | ( | x | ) | (((uint32_t)(x) & UART_LCR_PEN_MASK) >> UART_LCR_PEN_SHIFT) |
| #define UART_LCR_PEN_MASK (0x8U) |
| #define UART_LCR_PEN_SET | ( | x | ) | (((uint32_t)(x) << UART_LCR_PEN_SHIFT) & UART_LCR_PEN_MASK) |
| #define UART_LCR_PEN_SHIFT (3U) |
| #define UART_LCR_SPS_GET | ( | x | ) | (((uint32_t)(x) & UART_LCR_SPS_MASK) >> UART_LCR_SPS_SHIFT) |
| #define UART_LCR_SPS_MASK (0x20U) |
| #define UART_LCR_SPS_SET | ( | x | ) | (((uint32_t)(x) << UART_LCR_SPS_SHIFT) & UART_LCR_SPS_MASK) |
| #define UART_LCR_SPS_SHIFT (5U) |
| #define UART_LCR_STB_GET | ( | x | ) | (((uint32_t)(x) & UART_LCR_STB_MASK) >> UART_LCR_STB_SHIFT) |
| #define UART_LCR_STB_MASK (0x4U) |
| #define UART_LCR_STB_SET | ( | x | ) | (((uint32_t)(x) << UART_LCR_STB_SHIFT) & UART_LCR_STB_MASK) |
| #define UART_LCR_STB_SHIFT (2U) |
| #define UART_LCR_WLS_GET | ( | x | ) | (((uint32_t)(x) & UART_LCR_WLS_MASK) >> UART_LCR_WLS_SHIFT) |
| #define UART_LCR_WLS_MASK (0x3U) |
| #define UART_LCR_WLS_SET | ( | x | ) | (((uint32_t)(x) << UART_LCR_WLS_SHIFT) & UART_LCR_WLS_MASK) |
| #define UART_LCR_WLS_SHIFT (0U) |
| #define UART_LSR_DR_GET | ( | x | ) | (((uint32_t)(x) & UART_LSR_DR_MASK) >> UART_LSR_DR_SHIFT) |
| #define UART_LSR_DR_MASK (0x1U) |
| #define UART_LSR_DR_SHIFT (0U) |
| #define UART_LSR_ERRF_GET | ( | x | ) | (((uint32_t)(x) & UART_LSR_ERRF_MASK) >> UART_LSR_ERRF_SHIFT) |
| #define UART_LSR_ERRF_MASK (0x80U) |
| #define UART_LSR_ERRF_SHIFT (7U) |
| #define UART_LSR_FE_GET | ( | x | ) | (((uint32_t)(x) & UART_LSR_FE_MASK) >> UART_LSR_FE_SHIFT) |
| #define UART_LSR_FE_MASK (0x8U) |
| #define UART_LSR_FE_SHIFT (3U) |
| #define UART_LSR_LBREAK_GET | ( | x | ) | (((uint32_t)(x) & UART_LSR_LBREAK_MASK) >> UART_LSR_LBREAK_SHIFT) |
| #define UART_LSR_LBREAK_MASK (0x10U) |
| #define UART_LSR_LBREAK_SHIFT (4U) |
| #define UART_LSR_OE_GET | ( | x | ) | (((uint32_t)(x) & UART_LSR_OE_MASK) >> UART_LSR_OE_SHIFT) |
| #define UART_LSR_OE_MASK (0x2U) |
| #define UART_LSR_OE_SHIFT (1U) |
| #define UART_LSR_PE_GET | ( | x | ) | (((uint32_t)(x) & UART_LSR_PE_MASK) >> UART_LSR_PE_SHIFT) |
| #define UART_LSR_PE_MASK (0x4U) |
| #define UART_LSR_PE_SHIFT (2U) |
| #define UART_LSR_RFIFO_NUM_GET | ( | x | ) | (((uint32_t)(x) & UART_LSR_RFIFO_NUM_MASK) >> UART_LSR_RFIFO_NUM_SHIFT) |
| #define UART_LSR_RFIFO_NUM_MASK (0x1F0000UL) |
| #define UART_LSR_RFIFO_NUM_SHIFT (16U) |
| #define UART_LSR_RXIDLE_GET | ( | x | ) | (((uint32_t)(x) & UART_LSR_RXIDLE_MASK) >> UART_LSR_RXIDLE_SHIFT) |
| #define UART_LSR_RXIDLE_MASK (0x80000000UL) |
| #define UART_LSR_RXIDLE_SHIFT (31U) |
| #define UART_LSR_TEMT_GET | ( | x | ) | (((uint32_t)(x) & UART_LSR_TEMT_MASK) >> UART_LSR_TEMT_SHIFT) |
| #define UART_LSR_TEMT_MASK (0x40U) |
| #define UART_LSR_TEMT_SHIFT (6U) |
| #define UART_LSR_TFIFO_NUM_GET | ( | x | ) | (((uint32_t)(x) & UART_LSR_TFIFO_NUM_MASK) >> UART_LSR_TFIFO_NUM_SHIFT) |
| #define UART_LSR_TFIFO_NUM_MASK (0x1F00U) |
| #define UART_LSR_TFIFO_NUM_SHIFT (8U) |
| #define UART_LSR_THRE_GET | ( | x | ) | (((uint32_t)(x) & UART_LSR_THRE_MASK) >> UART_LSR_THRE_SHIFT) |
| #define UART_LSR_THRE_MASK (0x20U) |
| #define UART_LSR_THRE_SHIFT (5U) |
| #define UART_LSR_TXIDLE_GET | ( | x | ) | (((uint32_t)(x) & UART_LSR_TXIDLE_MASK) >> UART_LSR_TXIDLE_SHIFT) |
| #define UART_LSR_TXIDLE_MASK (0x40000000UL) |
| #define UART_LSR_TXIDLE_SHIFT (30U) |
| #define UART_MCR_AFE_GET | ( | x | ) | (((uint32_t)(x) & UART_MCR_AFE_MASK) >> UART_MCR_AFE_SHIFT) |
| #define UART_MCR_AFE_MASK (0x20U) |
| #define UART_MCR_AFE_SET | ( | x | ) | (((uint32_t)(x) << UART_MCR_AFE_SHIFT) & UART_MCR_AFE_MASK) |
| #define UART_MCR_AFE_SHIFT (5U) |
| #define UART_MCR_LOOP_GET | ( | x | ) | (((uint32_t)(x) & UART_MCR_LOOP_MASK) >> UART_MCR_LOOP_SHIFT) |
| #define UART_MCR_LOOP_MASK (0x10U) |
| #define UART_MCR_LOOP_SET | ( | x | ) | (((uint32_t)(x) << UART_MCR_LOOP_SHIFT) & UART_MCR_LOOP_MASK) |
| #define UART_MCR_LOOP_SHIFT (4U) |
| #define UART_MCR_RTS_GET | ( | x | ) | (((uint32_t)(x) & UART_MCR_RTS_MASK) >> UART_MCR_RTS_SHIFT) |
| #define UART_MCR_RTS_MASK (0x2U) |
| #define UART_MCR_RTS_SET | ( | x | ) | (((uint32_t)(x) << UART_MCR_RTS_SHIFT) & UART_MCR_RTS_MASK) |
| #define UART_MCR_RTS_SHIFT (1U) |
| #define UART_MOTO_CFG_HWTRG_EN_GET | ( | x | ) | (((uint32_t)(x) & UART_MOTO_CFG_HWTRG_EN_MASK) >> UART_MOTO_CFG_HWTRG_EN_SHIFT) |
| #define UART_MOTO_CFG_HWTRG_EN_MASK (0x80U) |
| #define UART_MOTO_CFG_HWTRG_EN_SET | ( | x | ) | (((uint32_t)(x) << UART_MOTO_CFG_HWTRG_EN_SHIFT) & UART_MOTO_CFG_HWTRG_EN_MASK) |
| #define UART_MOTO_CFG_HWTRG_EN_SHIFT (7U) |
| #define UART_MOTO_CFG_SWTRG_GET | ( | x | ) | (((uint32_t)(x) & UART_MOTO_CFG_SWTRG_MASK) >> UART_MOTO_CFG_SWTRG_SHIFT) |
| #define UART_MOTO_CFG_SWTRG_MASK (0x80000000UL) |
| #define UART_MOTO_CFG_SWTRG_SET | ( | x | ) | (((uint32_t)(x) << UART_MOTO_CFG_SWTRG_SHIFT) & UART_MOTO_CFG_SWTRG_MASK) |
| #define UART_MOTO_CFG_SWTRG_SHIFT (31U) |
| #define UART_MOTO_CFG_TRG_CLR_RFIFO_GET | ( | x | ) | (((uint32_t)(x) & UART_MOTO_CFG_TRG_CLR_RFIFO_MASK) >> UART_MOTO_CFG_TRG_CLR_RFIFO_SHIFT) |
| #define UART_MOTO_CFG_TRG_CLR_RFIFO_MASK (0x20U) |
| #define UART_MOTO_CFG_TRG_CLR_RFIFO_SET | ( | x | ) | (((uint32_t)(x) << UART_MOTO_CFG_TRG_CLR_RFIFO_SHIFT) & UART_MOTO_CFG_TRG_CLR_RFIFO_MASK) |
| #define UART_MOTO_CFG_TRG_CLR_RFIFO_SHIFT (5U) |
| #define UART_MOTO_CFG_TRG_MODE_GET | ( | x | ) | (((uint32_t)(x) & UART_MOTO_CFG_TRG_MODE_MASK) >> UART_MOTO_CFG_TRG_MODE_SHIFT) |
| #define UART_MOTO_CFG_TRG_MODE_MASK (0x40U) |
| #define UART_MOTO_CFG_TRG_MODE_SET | ( | x | ) | (((uint32_t)(x) << UART_MOTO_CFG_TRG_MODE_SHIFT) & UART_MOTO_CFG_TRG_MODE_MASK) |
| #define UART_MOTO_CFG_TRG_MODE_SHIFT (6U) |
| #define UART_MOTO_CFG_TXSTOP_INSERT_GET | ( | x | ) | (((uint32_t)(x) & UART_MOTO_CFG_TXSTOP_INSERT_MASK) >> UART_MOTO_CFG_TXSTOP_INSERT_SHIFT) |
| #define UART_MOTO_CFG_TXSTOP_INSERT_MASK (0x10U) |
| #define UART_MOTO_CFG_TXSTOP_INSERT_SET | ( | x | ) | (((uint32_t)(x) << UART_MOTO_CFG_TXSTOP_INSERT_SHIFT) & UART_MOTO_CFG_TXSTOP_INSERT_MASK) |
| #define UART_MOTO_CFG_TXSTOP_INSERT_SHIFT (4U) |
| #define UART_MOTO_CFG_TXSTP_BITS_GET | ( | x | ) | (((uint32_t)(x) & UART_MOTO_CFG_TXSTP_BITS_MASK) >> UART_MOTO_CFG_TXSTP_BITS_SHIFT) |
| #define UART_MOTO_CFG_TXSTP_BITS_MASK (0xFF00U) |
| #define UART_MOTO_CFG_TXSTP_BITS_SET | ( | x | ) | (((uint32_t)(x) << UART_MOTO_CFG_TXSTP_BITS_SHIFT) & UART_MOTO_CFG_TXSTP_BITS_MASK) |
| #define UART_MOTO_CFG_TXSTP_BITS_SHIFT (8U) |
| #define UART_MSR_CTS_GET | ( | x | ) | (((uint32_t)(x) & UART_MSR_CTS_MASK) >> UART_MSR_CTS_SHIFT) |
| #define UART_MSR_CTS_MASK (0x10U) |
| #define UART_MSR_CTS_SHIFT (4U) |
| #define UART_MSR_DCTS_GET | ( | x | ) | (((uint32_t)(x) & UART_MSR_DCTS_MASK) >> UART_MSR_DCTS_SHIFT) |
| #define UART_MSR_DCTS_MASK (0x1U) |
| #define UART_MSR_DCTS_SHIFT (0U) |
| #define UART_OSCR_OSC_GET | ( | x | ) | (((uint32_t)(x) & UART_OSCR_OSC_MASK) >> UART_OSCR_OSC_SHIFT) |
| #define UART_OSCR_OSC_MASK (0x1FU) |
| #define UART_OSCR_OSC_SET | ( | x | ) | (((uint32_t)(x) << UART_OSCR_OSC_SHIFT) & UART_OSCR_OSC_MASK) |
| #define UART_OSCR_OSC_SHIFT (0U) |
| #define UART_RBR_RBR_GET | ( | x | ) | (((uint32_t)(x) & UART_RBR_RBR_MASK) >> UART_RBR_RBR_SHIFT) |
| #define UART_RBR_RBR_MASK (0xFFU) |
| #define UART_RBR_RBR_SHIFT (0U) |
| #define UART_THR_THR_GET | ( | x | ) | (((uint32_t)(x) & UART_THR_THR_MASK) >> UART_THR_THR_SHIFT) |
| #define UART_THR_THR_MASK (0xFFU) |
| #define UART_THR_THR_SET | ( | x | ) | (((uint32_t)(x) << UART_THR_THR_SHIFT) & UART_THR_THR_MASK) |
| #define UART_THR_THR_SHIFT (0U) |