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Enumerations | |
| enum | JL1111_REG_Type { JL1111_BMCR = 0 , JL1111_BMSR = 1 , JL1111_PHYID1 = 2 , JL1111_PHYID2 = 3 , JL1111_ANAR = 4 , JL1111_ANLPAR = 5 , JL1111_MMDAC = 13 , JL1111_MMDAAD = 14 , JL1111_RMSR_P7 = 16 , JL1111_INTSQI = 30 , JL1111_PAGESEL = 31 , JL1111_BMCR = 0 , JL1111_BMSR = 1 , JL1111_PHYID1 = 2 , JL1111_PHYID2 = 3 , JL1111_ANAR = 4 , JL1111_ANLPAR = 5 , JL1111_MMDAC = 19 , JL1111_MMDAAD = 20 , JL1111_RMSR_P7 = 22 , JL1111_INTSQI = 48 , JL1111_PAGESEL = 49 } |
| #define JL1111_ANAR_100BASE_T4_GET | ( | x | ) | (((uint16_t)(x) & JL1111_ANAR_100BASE_T4_MASK) >> JL1111_ANAR_100BASE_T4_SHIFT) |
| #define JL1111_ANAR_100BASE_T4_MASK (0x200U) |
| #define JL1111_ANAR_100BASE_T4_SHIFT (9U) |
| #define JL1111_ANAR_100BASE_TX_FD_GET | ( | x | ) | (((uint16_t)(x) & JL1111_ANAR_100BASE_TX_FD_MASK) >> JL1111_ANAR_100BASE_TX_FD_SHIFT) |
| #define JL1111_ANAR_100BASE_TX_FD_MASK (0x100U) |
| #define JL1111_ANAR_100BASE_TX_FD_SET | ( | x | ) | (((uint16_t)(x) << JL1111_ANAR_100BASE_TX_FD_SHIFT) & JL1111_ANAR_100BASE_TX_FD_MASK) |
| #define JL1111_ANAR_100BASE_TX_FD_SHIFT (8U) |
| #define JL1111_ANAR_100BASE_TX_GET | ( | x | ) | (((uint16_t)(x) & JL1111_ANAR_100BASE_TX_MASK) >> JL1111_ANAR_100BASE_TX_SHIFT) |
| #define JL1111_ANAR_100BASE_TX_MASK (0x80U) |
| #define JL1111_ANAR_100BASE_TX_SET | ( | x | ) | (((uint16_t)(x) << JL1111_ANAR_100BASE_TX_SHIFT) & JL1111_ANAR_100BASE_TX_MASK) |
| #define JL1111_ANAR_100BASE_TX_SHIFT (7U) |
| #define JL1111_ANAR_10BASE_T_FD_GET | ( | x | ) | (((uint16_t)(x) & JL1111_ANAR_10BASE_T_FD_MASK) >> JL1111_ANAR_10BASE_T_FD_SHIFT) |
| #define JL1111_ANAR_10BASE_T_FD_MASK (0x40U) |
| #define JL1111_ANAR_10BASE_T_FD_SET | ( | x | ) | (((uint16_t)(x) << JL1111_ANAR_10BASE_T_FD_SHIFT) & JL1111_ANAR_10BASE_T_FD_MASK) |
| #define JL1111_ANAR_10BASE_T_FD_SHIFT (6U) |
| #define JL1111_ANAR_10BASE_T_GET | ( | x | ) | (((uint16_t)(x) & JL1111_ANAR_10BASE_T_MASK) >> JL1111_ANAR_10BASE_T_SHIFT) |
| #define JL1111_ANAR_10BASE_T_MASK (0x20U) |
| #define JL1111_ANAR_10BASE_T_SET | ( | x | ) | (((uint16_t)(x) << JL1111_ANAR_10BASE_T_SHIFT) & JL1111_ANAR_10BASE_T_MASK) |
| #define JL1111_ANAR_10BASE_T_SHIFT (5U) |
| #define JL1111_ANAR_ACKNOWLEDGE_GET | ( | x | ) | (((uint16_t)(x) & JL1111_ANAR_ACKNOWLEDGE_MASK) >> JL1111_ANAR_ACKNOWLEDGE_SHIFT) |
| #define JL1111_ANAR_ACKNOWLEDGE_MASK (0x4000U) |
| #define JL1111_ANAR_ACKNOWLEDGE_SHIFT (14U) |
| #define JL1111_ANAR_ASYMMETRIC_PAUSE_GET | ( | x | ) | (((uint16_t)(x) & JL1111_ANAR_ASYMMETRIC_PAUSE_MASK) >> JL1111_ANAR_ASYMMETRIC_PAUSE_SHIFT) |
| #define JL1111_ANAR_ASYMMETRIC_PAUSE_MASK (0x800U) |
| #define JL1111_ANAR_ASYMMETRIC_PAUSE_SET | ( | x | ) | (((uint16_t)(x) << JL1111_ANAR_ASYMMETRIC_PAUSE_SHIFT) & JL1111_ANAR_ASYMMETRIC_PAUSE_MASK) |
| #define JL1111_ANAR_ASYMMETRIC_PAUSE_SHIFT (11U) |
| #define JL1111_ANAR_NEXT_PAGE_GET | ( | x | ) | (((uint16_t)(x) & JL1111_ANAR_NEXT_PAGE_MASK) >> JL1111_ANAR_NEXT_PAGE_SHIFT) |
| #define JL1111_ANAR_NEXT_PAGE_MASK (0x8000U) |
| #define JL1111_ANAR_NEXT_PAGE_SET | ( | x | ) | (((uint16_t)(x) << JL1111_ANAR_NEXT_PAGE_SHIFT) & JL1111_ANAR_NEXT_PAGE_MASK) |
| #define JL1111_ANAR_NEXT_PAGE_SHIFT (15U) |
| #define JL1111_ANAR_PAUSE_GET | ( | x | ) | (((uint16_t)(x) & JL1111_ANAR_PAUSE_MASK) >> JL1111_ANAR_PAUSE_SHIFT) |
| #define JL1111_ANAR_PAUSE_MASK (0x400U) |
| #define JL1111_ANAR_PAUSE_SET | ( | x | ) | (((uint16_t)(x) << JL1111_ANAR_PAUSE_SHIFT) & JL1111_ANAR_PAUSE_MASK) |
| #define JL1111_ANAR_PAUSE_SHIFT (10U) |
| #define JL1111_ANAR_REMOTE_FAULT_GET | ( | x | ) | (((uint16_t)(x) & JL1111_ANAR_REMOTE_FAULT_MASK) >> JL1111_ANAR_REMOTE_FAULT_SHIFT) |
| #define JL1111_ANAR_REMOTE_FAULT_MASK (0x2000U) |
| #define JL1111_ANAR_REMOTE_FAULT_SHIFT (13U) |
| #define JL1111_ANAR_SELECTOR_FIELD_GET | ( | x | ) | (((uint16_t)(x) & JL1111_ANAR_SELECTOR_FIELD_MASK) >> JL1111_ANAR_SELECTOR_FIELD_SHIFT) |
| #define JL1111_ANAR_SELECTOR_FIELD_MASK (0x1FU) |
| #define JL1111_ANAR_SELECTOR_FIELD_SHIFT (0U) |
| #define JL1111_ANLPAR_100BASE_T4_GET | ( | x | ) | (((uint16_t)(x) & JL1111_ANLPAR_100BASE_T4_MASK) >> JL1111_ANLPAR_100BASE_T4_SHIFT) |
| #define JL1111_ANLPAR_100BASE_T4_MASK (0x200U) |
| #define JL1111_ANLPAR_100BASE_T4_SHIFT (9U) |
| #define JL1111_ANLPAR_100BASE_TX_FD_GET | ( | x | ) | (((uint16_t)(x) & JL1111_ANLPAR_100BASE_TX_FD_MASK) >> JL1111_ANLPAR_100BASE_TX_FD_SHIFT) |
| #define JL1111_ANLPAR_100BASE_TX_FD_MASK (0x100U) |
| #define JL1111_ANLPAR_100BASE_TX_FD_SHIFT (8U) |
| #define JL1111_ANLPAR_100BASE_TX_GET | ( | x | ) | (((uint16_t)(x) & JL1111_ANLPAR_100BASE_TX_MASK) >> JL1111_ANLPAR_100BASE_TX_SHIFT) |
| #define JL1111_ANLPAR_100BASE_TX_MASK (0x80U) |
| #define JL1111_ANLPAR_100BASE_TX_SHIFT (7U) |
| #define JL1111_ANLPAR_10BASE_T_FD_GET | ( | x | ) | (((uint16_t)(x) & JL1111_ANLPAR_10BASE_T_FD_MASK) >> JL1111_ANLPAR_10BASE_T_FD_SHIFT) |
| #define JL1111_ANLPAR_10BASE_T_FD_MASK (0x40U) |
| #define JL1111_ANLPAR_10BASE_T_FD_SHIFT (6U) |
| #define JL1111_ANLPAR_10BASE_T_GET | ( | x | ) | (((uint16_t)(x) & JL1111_ANLPAR_10BASE_T_MASK) >> JL1111_ANLPAR_10BASE_T_SHIFT) |
| #define JL1111_ANLPAR_10BASE_T_MASK (0x20U) |
| #define JL1111_ANLPAR_10BASE_T_SHIFT (5U) |
| #define JL1111_ANLPAR_ACKNOWLEDGE_GET | ( | x | ) | (((uint16_t)(x) & JL1111_ANLPAR_ACKNOWLEDGE_MASK) >> JL1111_ANLPAR_ACKNOWLEDGE_SHIFT) |
| #define JL1111_ANLPAR_ACKNOWLEDGE_MASK (0x4000U) |
| #define JL1111_ANLPAR_ACKNOWLEDGE_SHIFT (14U) |
| #define JL1111_ANLPAR_ASYMMETRIC_PAUSE_GET | ( | x | ) | (((uint16_t)(x) & JL1111_ANLPAR_ASYMMETRIC_PAUSE_MASK) >> JL1111_ANLPAR_ASYMMETRIC_PAUSE_SHIFT) |
| #define JL1111_ANLPAR_ASYMMETRIC_PAUSE_MASK (0x800U) |
| #define JL1111_ANLPAR_ASYMMETRIC_PAUSE_SHIFT (11U) |
| #define JL1111_ANLPAR_NEXT_PAGE_GET | ( | x | ) | (((uint16_t)(x) & JL1111_ANLPAR_NEXT_PAGE_MASK) >> JL1111_ANLPAR_NEXT_PAGE_SHIFT) |
| #define JL1111_ANLPAR_NEXT_PAGE_MASK (0x8000U) |
| #define JL1111_ANLPAR_NEXT_PAGE_SHIFT (15U) |
| #define JL1111_ANLPAR_PAUSE_GET | ( | x | ) | (((uint16_t)(x) & JL1111_ANLPAR_PAUSE_MASK) >> JL1111_ANLPAR_PAUSE_SHIFT) |
| #define JL1111_ANLPAR_PAUSE_MASK (0x400U) |
| #define JL1111_ANLPAR_PAUSE_SHIFT (10U) |
| #define JL1111_ANLPAR_REMOTE_FAULT_GET | ( | x | ) | (((uint16_t)(x) & JL1111_ANLPAR_REMOTE_FAULT_MASK) >> JL1111_ANLPAR_REMOTE_FAULT_SHIFT) |
| #define JL1111_ANLPAR_REMOTE_FAULT_MASK (0x2000U) |
| #define JL1111_ANLPAR_REMOTE_FAULT_SHIFT (13U) |
| #define JL1111_ANLPAR_SELECTOR_FIELD_GET | ( | x | ) | (((uint16_t)(x) & JL1111_ANLPAR_SELECTOR_FIELD_MASK) >> JL1111_ANLPAR_SELECTOR_FIELD_SHIFT) |
| #define JL1111_ANLPAR_SELECTOR_FIELD_MASK (0x1FU) |
| #define JL1111_ANLPAR_SELECTOR_FIELD_SHIFT (0U) |
| #define JL1111_BMCR_ANE_GET | ( | x | ) | (((uint16_t)(x) & JL1111_BMCR_ANE_MASK) >> JL1111_BMCR_ANE_SHIFT) |
| #define JL1111_BMCR_ANE_MASK (0x1000U) |
| #define JL1111_BMCR_ANE_SET | ( | x | ) | (((uint16_t)(x) << JL1111_BMCR_ANE_SHIFT) & JL1111_BMCR_ANE_MASK) |
| #define JL1111_BMCR_ANE_SHIFT (12U) |
| #define JL1111_BMCR_COLLISION_TEST_GET | ( | x | ) | (((uint16_t)(x) & JL1111_BMCR_COLLISION_TEST_MASK) >> JL1111_BMCR_COLLISION_TEST_SHIFT) |
| #define JL1111_BMCR_COLLISION_TEST_MASK (0x80U) |
| #define JL1111_BMCR_COLLISION_TEST_SET | ( | x | ) | (((uint16_t)(x) << JL1111_BMCR_COLLISION_TEST_SHIFT) & JL1111_BMCR_COLLISION_TEST_MASK) |
| #define JL1111_BMCR_COLLISION_TEST_SHIFT (7U) |
| #define JL1111_BMCR_DUPLEX_GET | ( | x | ) | (((uint16_t)(x) & JL1111_BMCR_DUPLEX_MASK) >> JL1111_BMCR_DUPLEX_SHIFT) |
| #define JL1111_BMCR_DUPLEX_MASK (0x100U) |
| #define JL1111_BMCR_DUPLEX_SET | ( | x | ) | (((uint16_t)(x) << JL1111_BMCR_DUPLEX_SHIFT) & JL1111_BMCR_DUPLEX_MASK) |
| #define JL1111_BMCR_DUPLEX_SHIFT (8U) |
| #define JL1111_BMCR_ISOLATE_GET | ( | x | ) | (((uint16_t)(x) & JL1111_BMCR_ISOLATE_MASK) >> JL1111_BMCR_ISOLATE_SHIFT) |
| #define JL1111_BMCR_ISOLATE_MASK (0x400U) |
| #define JL1111_BMCR_ISOLATE_SET | ( | x | ) | (((uint16_t)(x) << JL1111_BMCR_ISOLATE_SHIFT) & JL1111_BMCR_ISOLATE_MASK) |
| #define JL1111_BMCR_ISOLATE_SHIFT (10U) |
| #define JL1111_BMCR_LOOPBACK_GET | ( | x | ) | (((uint16_t)(x) & JL1111_BMCR_LOOPBACK_MASK) >> JL1111_BMCR_LOOPBACK_SHIFT) |
| #define JL1111_BMCR_LOOPBACK_MASK (0x4000U) |
| #define JL1111_BMCR_LOOPBACK_SET | ( | x | ) | (((uint16_t)(x) << JL1111_BMCR_LOOPBACK_SHIFT) & JL1111_BMCR_LOOPBACK_MASK) |
| #define JL1111_BMCR_LOOPBACK_SHIFT (14U) |
| #define JL1111_BMCR_PWD_GET | ( | x | ) | (((uint16_t)(x) & JL1111_BMCR_PWD_MASK) >> JL1111_BMCR_PWD_SHIFT) |
| #define JL1111_BMCR_PWD_MASK (0x800U) |
| #define JL1111_BMCR_PWD_SET | ( | x | ) | (((uint16_t)(x) << JL1111_BMCR_PWD_SHIFT) & JL1111_BMCR_PWD_MASK) |
| #define JL1111_BMCR_PWD_SHIFT (11U) |
| #define JL1111_BMCR_RESET_GET | ( | x | ) | (((uint16_t)(x) & JL1111_BMCR_RESET_MASK) >> JL1111_BMCR_RESET_SHIFT) |
| #define JL1111_BMCR_RESET_MASK (0x8000U) |
| #define JL1111_BMCR_RESET_SET | ( | x | ) | (((uint16_t)(x) << JL1111_BMCR_RESET_SHIFT) & JL1111_BMCR_RESET_MASK) |
| #define JL1111_BMCR_RESET_SHIFT (15U) |
| #define JL1111_BMCR_RESTART_AN_GET | ( | x | ) | (((uint16_t)(x) & JL1111_BMCR_RESTART_AN_MASK) >> JL1111_BMCR_RESTART_AN_SHIFT) |
| #define JL1111_BMCR_RESTART_AN_MASK (0x200U) |
| #define JL1111_BMCR_RESTART_AN_SET | ( | x | ) | (((uint16_t)(x) << JL1111_BMCR_RESTART_AN_SHIFT) & JL1111_BMCR_RESTART_AN_MASK) |
| #define JL1111_BMCR_RESTART_AN_SHIFT (9U) |
| #define JL1111_BMCR_SPEED0_GET | ( | x | ) | (((uint16_t)(x) & JL1111_BMCR_SPEED0_MASK) >> JL1111_BMCR_SPEED0_SHIFT) |
| #define JL1111_BMCR_SPEED0_MASK (0x2000U) |
| #define JL1111_BMCR_SPEED0_SET | ( | x | ) | (((uint16_t)(x) << JL1111_BMCR_SPEED0_SHIFT) & JL1111_BMCR_SPEED0_MASK) |
| #define JL1111_BMCR_SPEED0_SHIFT (13U) |
| #define JL1111_BMCR_SPEED1_GET | ( | x | ) | (((uint16_t)(x) & JL1111_BMCR_SPEED1_MASK) >> JL1111_BMCR_SPEED1_SHIFT) |
| #define JL1111_BMCR_SPEED1_MASK (0x40U) |
| #define JL1111_BMCR_SPEED1_SET | ( | x | ) | (((uint16_t)(x) << JL1111_BMCR_SPEED1_SHIFT) & JL1111_BMCR_SPEED1_MASK) |
| #define JL1111_BMCR_SPEED1_SHIFT (6U) |
| #define JL1111_BMSR_AUTO_NEGOTIATION_ABILITY_GET | ( | x | ) | (((uint16_t)(x) & JL1111_BMSR_AUTO_NEGOTIATION_ABILITY_MASK) >> JL1111_BMSR_AUTO_NEGOTIATION_ABILITY_SHIFT) |
| #define JL1111_BMSR_AUTO_NEGOTIATION_ABILITY_MASK (0x8U) |
| #define JL1111_BMSR_AUTO_NEGOTIATION_ABILITY_SHIFT (3U) |
| #define JL1111_BMSR_AUTO_NEGOTIATION_COMPLETE_GET | ( | x | ) | (((uint16_t)(x) & JL1111_BMSR_AUTO_NEGOTIATION_COMPLETE_MASK) >> JL1111_BMSR_AUTO_NEGOTIATION_COMPLETE_SHIFT) |
| #define JL1111_BMSR_AUTO_NEGOTIATION_COMPLETE_MASK (0x20U) |
| #define JL1111_BMSR_AUTO_NEGOTIATION_COMPLETE_SHIFT (5U) |
| #define JL1111_BMSR_BASE100_T4_1_GET | ( | x | ) | (((uint16_t)(x) & JL1111_BMSR_BASE100_T4_1_MASK) >> JL1111_BMSR_BASE100_T4_1_SHIFT) |
| #define JL1111_BMSR_BASE100_T4_1_MASK (0x8000U) |
| #define JL1111_BMSR_BASE100_T4_1_SHIFT (15U) |
| #define JL1111_BMSR_BASE100_TX_FD_1_GET | ( | x | ) | (((uint16_t)(x) & JL1111_BMSR_BASE100_TX_FD_1_MASK) >> JL1111_BMSR_BASE100_TX_FD_1_SHIFT) |
| #define JL1111_BMSR_BASE100_TX_FD_1_MASK (0x4000U) |
| #define JL1111_BMSR_BASE100_TX_FD_1_SHIFT (14U) |
| #define JL1111_BMSR_BASE100_TX_HD_1_GET | ( | x | ) | (((uint16_t)(x) & JL1111_BMSR_BASE100_TX_HD_1_MASK) >> JL1111_BMSR_BASE100_TX_HD_1_SHIFT) |
| #define JL1111_BMSR_BASE100_TX_HD_1_MASK (0x2000U) |
| #define JL1111_BMSR_BASE100_TX_HD_1_SHIFT (13U) |
| #define JL1111_BMSR_BASE10_TX_FD_GET | ( | x | ) | (((uint16_t)(x) & JL1111_BMSR_BASE10_TX_FD_MASK) >> JL1111_BMSR_BASE10_TX_FD_SHIFT) |
| #define JL1111_BMSR_BASE10_TX_FD_MASK (0x1000U) |
| #define JL1111_BMSR_BASE10_TX_FD_SHIFT (12U) |
| #define JL1111_BMSR_BASE10_TX_HD_GET | ( | x | ) | (((uint16_t)(x) & JL1111_BMSR_BASE10_TX_HD_MASK) >> JL1111_BMSR_BASE10_TX_HD_SHIFT) |
| #define JL1111_BMSR_BASE10_TX_HD_MASK (0x800U) |
| #define JL1111_BMSR_BASE10_TX_HD_SHIFT (11U) |
| #define JL1111_BMSR_EXTENDED_CAPABILITY_GET | ( | x | ) | (((uint16_t)(x) & JL1111_BMSR_EXTENDED_CAPABILITY_MASK) >> JL1111_BMSR_EXTENDED_CAPABILITY_SHIFT) |
| #define JL1111_BMSR_EXTENDED_CAPABILITY_MASK (0x1U) |
| #define JL1111_BMSR_EXTENDED_CAPABILITY_SHIFT (0U) |
| #define JL1111_BMSR_JABBER_DETECT_GET | ( | x | ) | (((uint16_t)(x) & JL1111_BMSR_JABBER_DETECT_MASK) >> JL1111_BMSR_JABBER_DETECT_SHIFT) |
| #define JL1111_BMSR_JABBER_DETECT_MASK (0x2U) |
| #define JL1111_BMSR_JABBER_DETECT_SHIFT (1U) |
| #define JL1111_BMSR_LINK_STATUS_GET | ( | x | ) | (((uint16_t)(x) & JL1111_BMSR_LINK_STATUS_MASK) >> JL1111_BMSR_LINK_STATUS_SHIFT) |
| #define JL1111_BMSR_LINK_STATUS_MASK (0x4U) |
| #define JL1111_BMSR_LINK_STATUS_SHIFT (2U) |
| #define JL1111_BMSR_MDIO_MFPS_GET | ( | x | ) | (((uint16_t)(x) & JL1111_BMSR_MDIO_MFPS_MASK) >> JL1111_BMSR_MDIO_MFPS_SHIFT) |
| #define JL1111_BMSR_MDIO_MFPS_MASK (0x40U) |
| #define JL1111_BMSR_MDIO_MFPS_SHIFT (6U) |
| #define JL1111_BMSR_REMOTE_FAULT_GET | ( | x | ) | (((uint16_t)(x) & JL1111_BMSR_REMOTE_FAULT_MASK) >> JL1111_BMSR_REMOTE_FAULT_SHIFT) |
| #define JL1111_BMSR_REMOTE_FAULT_MASK (0x10U) |
| #define JL1111_BMSR_REMOTE_FAULT_SHIFT (4U) |
| #define JL1111_INTSQI_AUTONEG_ERROR_GET | ( | x | ) | (((uint16_t)(x) & JL1111_INTSQI_AUTONEG_ERROR_MASK) >> JL1111_INTSQI_AUTONEG_ERROR_SHIFT) |
| #define JL1111_INTSQI_AUTONEG_ERROR_MASK (0x8000U) |
| #define JL1111_INTSQI_AUTONEG_ERROR_SHIFT (15U) |
| #define JL1111_INTSQI_LINK_STATUS_CHANGE_GET | ( | x | ) | (((uint16_t)(x) & JL1111_INTSQI_LINK_STATUS_CHANGE_MASK) >> JL1111_INTSQI_LINK_STATUS_CHANGE_SHIFT) |
| #define JL1111_INTSQI_LINK_STATUS_CHANGE_MASK (0x800U) |
| #define JL1111_INTSQI_LINK_STATUS_CHANGE_SHIFT (11U) |
| #define JL1111_INTSQI_SIGNAL_QUALITY_INDICATOR_GET | ( | x | ) | (((uint16_t)(x) & JL1111_INTSQI_SIGNAL_QUALITY_INDICATOR_MASK) >> JL1111_INTSQI_SIGNAL_QUALITY_INDICATOR_SHIFT) |
| #define JL1111_INTSQI_SIGNAL_QUALITY_INDICATOR_MASK (0x1FU) |
| #define JL1111_INTSQI_SIGNAL_QUALITY_INDICATOR_SHIFT (0U) |
| #define JL1111_MMDAAD_MMD_ADDRESS_DATA_GET | ( | x | ) | (((uint16_t)(x) & JL1111_MMDAAD_MMD_ADDRESS_DATA_MASK) >> JL1111_MMDAAD_MMD_ADDRESS_DATA_SHIFT) |
| #define JL1111_MMDAAD_MMD_ADDRESS_DATA_MASK (0xFFFFU) |
| #define JL1111_MMDAAD_MMD_ADDRESS_DATA_SET | ( | x | ) | (((uint16_t)(x) << JL1111_MMDAAD_MMD_ADDRESS_DATA_SHIFT) & JL1111_MMDAAD_MMD_ADDRESS_DATA_MASK) |
| #define JL1111_MMDAAD_MMD_ADDRESS_DATA_SHIFT (0U) |
| #define JL1111_MMDAC_MMD_DEVAD_GET | ( | x | ) | (((uint16_t)(x) & JL1111_MMDAC_MMD_DEVAD_MASK) >> JL1111_MMDAC_MMD_DEVAD_SHIFT) |
| #define JL1111_MMDAC_MMD_DEVAD_MASK (0x1FU) |
| #define JL1111_MMDAC_MMD_DEVAD_SET | ( | x | ) | (((uint16_t)(x) << JL1111_MMDAC_MMD_DEVAD_SHIFT) & JL1111_MMDAC_MMD_DEVAD_MASK) |
| #define JL1111_MMDAC_MMD_DEVAD_SHIFT (0U) |
| #define JL1111_MMDAC_MMD_FUNCTION_GET | ( | x | ) | (((uint16_t)(x) & JL1111_MMDAC_MMD_FUNCTION_MASK) >> JL1111_MMDAC_MMD_FUNCTION_SHIFT) |
| #define JL1111_MMDAC_MMD_FUNCTION_MASK (0xC000U) |
| #define JL1111_MMDAC_MMD_FUNCTION_SET | ( | x | ) | (((uint16_t)(x) << JL1111_MMDAC_MMD_FUNCTION_SHIFT) & JL1111_MMDAC_MMD_FUNCTION_MASK) |
| #define JL1111_MMDAC_MMD_FUNCTION_SHIFT (14U) |
| #define JL1111_MMDAC_RESERVERD_GET | ( | x | ) | (((uint16_t)(x) & JL1111_MMDAC_RESERVERD_MASK) >> JL1111_MMDAC_RESERVERD_SHIFT) |
| #define JL1111_MMDAC_RESERVERD_MASK (0x3FE0U) |
| #define JL1111_MMDAC_RESERVERD_SET | ( | x | ) | (((uint16_t)(x) << JL1111_MMDAC_RESERVERD_SHIFT) & JL1111_MMDAC_RESERVERD_MASK) |
| #define JL1111_MMDAC_RESERVERD_SHIFT (5U) |
| #define JL1111_PAGESEL_PAGE_SELECTION_GET | ( | x | ) | (((uint16_t)(x) & JL1111_PAGESEL_PAGE_SELECTION_MASK) >> JL1111_PAGESEL_PAGE_SELECTION_SHIFT) |
| #define JL1111_PAGESEL_PAGE_SELECTION_MASK (0xFFU) |
| #define JL1111_PAGESEL_PAGE_SELECTION_SET | ( | x | ) | (((uint16_t)(x) << JL1111_PAGESEL_PAGE_SELECTION_SHIFT) & JL1111_PAGESEL_PAGE_SELECTION_MASK) |
| #define JL1111_PAGESEL_PAGE_SELECTION_SHIFT (0U) |
| #define JL1111_PHYID1_OUI_MSB_GET | ( | x | ) | (((uint16_t)(x) & JL1111_PHYID1_OUI_MSB_MASK) >> JL1111_PHYID1_OUI_MSB_SHIFT) |
| #define JL1111_PHYID1_OUI_MSB_MASK (0xFFFFU) |
| #define JL1111_PHYID1_OUI_MSB_SHIFT (0U) |
| #define JL1111_PHYID2_MODEL_NUMBER_GET | ( | x | ) | (((uint16_t)(x) & JL1111_PHYID2_MODEL_NUMBER_MASK) >> JL1111_PHYID2_MODEL_NUMBER_SHIFT) |
| #define JL1111_PHYID2_MODEL_NUMBER_MASK (0x3F0U) |
| #define JL1111_PHYID2_MODEL_NUMBER_SHIFT (4U) |
| #define JL1111_PHYID2_OUI_LSB_GET | ( | x | ) | (((uint16_t)(x) & JL1111_PHYID2_OUI_LSB_MASK) >> JL1111_PHYID2_OUI_LSB_SHIFT) |
| #define JL1111_PHYID2_OUI_LSB_MASK (0xFC00U) |
| #define JL1111_PHYID2_OUI_LSB_SHIFT (10U) |
| #define JL1111_PHYID2_REVISION_NUMBER_GET | ( | x | ) | (((uint16_t)(x) & JL1111_PHYID2_REVISION_NUMBER_MASK) >> JL1111_PHYID2_REVISION_NUMBER_SHIFT) |
| #define JL1111_PHYID2_REVISION_NUMBER_MASK (0xFU) |
| #define JL1111_PHYID2_REVISION_NUMBER_SHIFT (0U) |
| #define JL1111_RMSR_P7_MII_RMII_MODE_SELECTION_GET | ( | x | ) | (((uint16_t)(x) & JL1111_RMSR_P7_MII_RMII_MODE_SELECTION_MASK) >> JL1111_RMSR_P7_MII_RMII_MODE_SELECTION_SHIFT) |
| #define JL1111_RMSR_P7_MII_RMII_MODE_SELECTION_MASK (0x8U) |
| #define JL1111_RMSR_P7_MII_RMII_MODE_SELECTION_SET | ( | x | ) | (((uint16_t)(x) << JL1111_RMSR_P7_MII_RMII_MODE_SELECTION_SHIFT) & JL1111_RMSR_P7_MII_RMII_MODE_SELECTION_MASK) |
| #define JL1111_RMSR_P7_MII_RMII_MODE_SELECTION_SHIFT (3U) |
| #define JL1111_RMSR_P7_RMII_CLOCK_DIRECTION_GET | ( | x | ) | (((uint16_t)(x) & JL1111_RMSR_P7_RMII_CLOCK_DIRECTION_MASK) >> JL1111_RMSR_P7_RMII_CLOCK_DIRECTION_SHIFT) |
| #define JL1111_RMSR_P7_RMII_CLOCK_DIRECTION_MASK (0x1000U) |
| #define JL1111_RMSR_P7_RMII_CLOCK_DIRECTION_SET | ( | x | ) | (((uint16_t)(x) << JL1111_RMSR_P7_RMII_CLOCK_DIRECTION_SHIFT) & JL1111_RMSR_P7_RMII_CLOCK_DIRECTION_MASK) |
| #define JL1111_RMSR_P7_RMII_CLOCK_DIRECTION_SHIFT (12U) |
| #define JL1111_RMSR_P7_RMII_CRS_DV_FUNCTIONAL_GET | ( | x | ) | (((uint16_t)(x) & JL1111_RMSR_P7_RMII_CRS_DV_FUNCTIONAL_MASK) >> JL1111_RMSR_P7_RMII_CRS_DV_FUNCTIONAL_SHIFT) |
| #define JL1111_RMSR_P7_RMII_CRS_DV_FUNCTIONAL_MASK (0x4U) |
| #define JL1111_RMSR_P7_RMII_CRS_DV_FUNCTIONAL_SET | ( | x | ) | (((uint16_t)(x) << JL1111_RMSR_P7_RMII_CRS_DV_FUNCTIONAL_SHIFT) & JL1111_RMSR_P7_RMII_CRS_DV_FUNCTIONAL_MASK) |
| #define JL1111_RMSR_P7_RMII_CRS_DV_FUNCTIONAL_SHIFT (2U) |
| #define JL1111_RMSR_P7_RMII_RX_ER_IN_RXD_GET | ( | x | ) | (((uint16_t)(x) & JL1111_RMSR_P7_RMII_RX_ER_IN_RXD_MASK) >> JL1111_RMSR_P7_RMII_RX_ER_IN_RXD_SHIFT) |
| #define JL1111_RMSR_P7_RMII_RX_ER_IN_RXD_MASK (0x2000U) |
| #define JL1111_RMSR_P7_RMII_RX_ER_IN_RXD_SET | ( | x | ) | (((uint16_t)(x) << JL1111_RMSR_P7_RMII_RX_ER_IN_RXD_SHIFT) & JL1111_RMSR_P7_RMII_RX_ER_IN_RXD_MASK) |
| #define JL1111_RMSR_P7_RMII_RX_ER_IN_RXD_SHIFT (13U) |
| #define JL1111_RMSR_P7_RMII_RX_LPI_ENABLE_GET | ( | x | ) | (((uint16_t)(x) & JL1111_RMSR_P7_RMII_RX_LPI_ENABLE_MASK) >> JL1111_RMSR_P7_RMII_RX_LPI_ENABLE_SHIFT) |
| #define JL1111_RMSR_P7_RMII_RX_LPI_ENABLE_MASK (0x4000U) |
| #define JL1111_RMSR_P7_RMII_RX_LPI_ENABLE_SET | ( | x | ) | (((uint16_t)(x) << JL1111_RMSR_P7_RMII_RX_LPI_ENABLE_SHIFT) & JL1111_RMSR_P7_RMII_RX_LPI_ENABLE_MASK) |
| #define JL1111_RMSR_P7_RMII_RX_LPI_ENABLE_SHIFT (14U) |
| #define JL1111_RMSR_P7_RMII_RX_SKEW_GET | ( | x | ) | (((uint16_t)(x) & JL1111_RMSR_P7_RMII_RX_SKEW_MASK) >> JL1111_RMSR_P7_RMII_RX_SKEW_SHIFT) |
| #define JL1111_RMSR_P7_RMII_RX_SKEW_MASK (0xF0U) |
| #define JL1111_RMSR_P7_RMII_RX_SKEW_SET | ( | x | ) | (((uint16_t)(x) << JL1111_RMSR_P7_RMII_RX_SKEW_SHIFT) & JL1111_RMSR_P7_RMII_RX_SKEW_MASK) |
| #define JL1111_RMSR_P7_RMII_RX_SKEW_SHIFT (4U) |
| #define JL1111_RMSR_P7_RMII_RXD_BAD_SSD_ENABLE_GET | ( | x | ) | (((uint16_t)(x) & JL1111_RMSR_P7_RMII_RXD_BAD_SSD_ENABLE_MASK) >> JL1111_RMSR_P7_RMII_RXD_BAD_SSD_ENABLE_SHIFT) |
| #define JL1111_RMSR_P7_RMII_RXD_BAD_SSD_ENABLE_MASK (0x2U) |
| #define JL1111_RMSR_P7_RMII_RXD_BAD_SSD_ENABLE_SET | ( | x | ) | (((uint16_t)(x) << JL1111_RMSR_P7_RMII_RXD_BAD_SSD_ENABLE_SHIFT) & JL1111_RMSR_P7_RMII_RXD_BAD_SSD_ENABLE_MASK) |
| #define JL1111_RMSR_P7_RMII_RXD_BAD_SSD_ENABLE_SHIFT (1U) |
| #define JL1111_RMSR_P7_RMII_TX_LPI_ENABLE_GET | ( | x | ) | (((uint16_t)(x) & JL1111_RMSR_P7_RMII_TX_LPI_ENABLE_MASK) >> JL1111_RMSR_P7_RMII_TX_LPI_ENABLE_SHIFT) |
| #define JL1111_RMSR_P7_RMII_TX_LPI_ENABLE_MASK (0x8000U) |
| #define JL1111_RMSR_P7_RMII_TX_LPI_ENABLE_SET | ( | x | ) | (((uint16_t)(x) << JL1111_RMSR_P7_RMII_TX_LPI_ENABLE_SHIFT) & JL1111_RMSR_P7_RMII_TX_LPI_ENABLE_MASK) |
| #define JL1111_RMSR_P7_RMII_TX_LPI_ENABLE_SHIFT (15U) |
| #define JL1111_RMSR_P7_RMII_TX_SKEW_GET | ( | x | ) | (((uint16_t)(x) & JL1111_RMSR_P7_RMII_TX_SKEW_MASK) >> JL1111_RMSR_P7_RMII_TX_SKEW_SHIFT) |
| #define JL1111_RMSR_P7_RMII_TX_SKEW_MASK (0xF00U) |
| #define JL1111_RMSR_P7_RMII_TX_SKEW_SET | ( | x | ) | (((uint16_t)(x) << JL1111_RMSR_P7_RMII_TX_SKEW_SHIFT) & JL1111_RMSR_P7_RMII_TX_SKEW_MASK) |
| #define JL1111_RMSR_P7_RMII_TX_SKEW_SHIFT (8U) |
| enum JL1111_REG_Type |