DMA driver APIs. More...

Data Structures
struct	dma_linked_descriptor
	Linked descriptor. More...

struct	dma_channel_config

struct	dma_handshake_config

Macros
#define	DMA_CHANNEL_PRIORITY_LOW (0U)

#define	DMA_CHANNEL_PRIORITY_HIGH (1U)

#define	DMA_NUM_TRANSFER_PER_BURST_1T (0U)

#define	DMA_NUM_TRANSFER_PER_BURST_2T (1U)

#define	DMA_NUM_TRANSFER_PER_BURST_4T (2U)

#define	DMA_NUM_TRANSFER_PER_BURST_8T (3U)

#define	DMA_NUM_TRANSFER_PER_BURST_16T (4U)

#define	DMA_NUM_TRANSFER_PER_BURST_32T (5U)

#define	DMA_NUM_TRANSFER_PER_BURST_64T (6U)

#define	DMA_NUM_TRANSFER_PER_BURST_128T (7U)

#define	DMA_NUM_TRANSFER_PER_BURST_256T (8U)

#define	DMA_NUM_TRANSFER_PER_BURST_512T (9U)

#define	DMA_NUM_TRANSFER_PER_BURST_1024T (10U)

#define	DMA_TRANSFER_WIDTH_BYTE (0U)

#define	DMA_TRANSFER_WIDTH_HALF_WORD (1U)

#define	DMA_TRANSFER_WIDTH_WORD (2U)

#define	DMA_TRANSFER_WIDTH_DOUBLE_WORD (3U)

#define	DMA_ALIGN_HALF_WORD(x) (x & ~(1u))

#define	DMA_ALIGN_WORD(x) (x & ~(3u))

#define	DMA_ALIGN_DOUBLE_WORD(x) (x & ~(7u))

#define	DMA_STATUS_ERROR_SHIFT (0U)

#define	DMA_STATUS_ABORT_SHIFT (8U)

#define	DMA_STATUS_TC_SHIFT (16U)

#define	DMA_CHANNEL_STATUS_ONGOING (1U)

#define	DMA_CHANNEL_STATUS_ERROR (2U)

#define	DMA_CHANNEL_STATUS_ABORT (4U)

#define	DMA_CHANNEL_STATUS_TC (8U)

#define	DMA_CHANNEL_IRQ_STATUS_ERROR(x) (uint32_t)(1 << (DMA_STATUS_ERROR_SHIFT + x))

#define	DMA_CHANNEL_IRQ_STATUS_ABORT(x) (uint32_t)(1 << (DMA_STATUS_ABORT_SHIFT + x))

#define	DMA_CHANNEL_IRQ_STATUS_TC(x) (uint32_t)(1 << (DMA_STATUS_TC_SHIFT + x))

#define	DMA_CHANNEL_IRQ_STATUS(x)

#define	DMA_CHANNEL_IRQ_STATUS_GET_ALL_TC(x) ((x) & (((0x01UL << DMA_SOC_CHANNEL_NUM) - 1) << DMA_STATUS_TC_SHIFT))

#define	DMA_CHANNEL_IRQ_STATUS_GET_ALL_ABORT(x) ((x) & (((0x01UL << DMA_SOC_CHANNEL_NUM) - 1) << DMA_STATUS_ABORT_SHIFT))

#define	DMA_CHANNEL_IRQ_STATUS_GET_ALL_ERROR(x) ((x) & (((0x01UL << DMA_SOC_CHANNEL_NUM) - 1) << DMA_STATUS_ERROR_SHIFT))

#define	DMA_HANDSHAKE_MODE_NORMAL (0U)

#define	DMA_HANDSHAKE_MODE_HANDSHAKE (1U)

#define	DMA_ADDRESS_CONTROL_INCREMENT (0U)

#define	DMA_ADDRESS_CONTROL_DECREMENT (1U)

#define	DMA_ADDRESS_CONTROL_FIXED (2U)

#define	DMA_INTERRUPT_MASK_NONE (0U)

#define	DMA_INTERRUPT_MASK_ERROR DMA_CHCTRL_CTRL_INTERRMASK_MASK

#define	DMA_INTERRUPT_MASK_ABORT DMA_CHCTRL_CTRL_INTABTMASK_MASK

#define	DMA_INTERRUPT_MASK_TERMINAL_COUNT DMA_CHCTRL_CTRL_INTTCMASK_MASK

#define	DMA_INTERRUPT_MASK_ALL

#define	DMA_SUPPORT_64BIT_ADDR (0)

#define	DMA_Type DMAV2_Type

#define	DMA_CHANNEL_PRIORITY_LOW (0U)

#define	DMA_CHANNEL_PRIORITY_HIGH (1U)

#define	DMA_NUM_TRANSFER_PER_BURST_1T (0U)

#define	DMA_NUM_TRANSFER_PER_BURST_2T (1U)

#define	DMA_NUM_TRANSFER_PER_BURST_4T (2U)

#define	DMA_NUM_TRANSFER_PER_BURST_8T (3U)

#define	DMA_NUM_TRANSFER_PER_BURST_16T (4U)

#define	DMA_NUM_TRANSFER_PER_BURST_32T (5U)

#define	DMA_NUM_TRANSFER_PER_BURST_64T (6U)

#define	DMA_NUM_TRANSFER_PER_BURST_128T (7U)

#define	DMA_NUM_TRANSFER_PER_BURST_256T (8U)

#define	DMA_NUM_TRANSFER_PER_BURST_512T (9U)

#define	DMA_NUM_TRANSFER_PER_BURST_1024T (10U)

#define	DMA_TRANSFER_WIDTH_BYTE (0U)

#define	DMA_TRANSFER_WIDTH_HALF_WORD (1U)

#define	DMA_TRANSFER_WIDTH_WORD (2U)

#define	DMA_TRANSFER_WIDTH_DOUBLE_WORD (3U)

#define	DMA_ALIGN_HALF_WORD(x) (x & ~(1u))

#define	DMA_ALIGN_WORD(x) (x & ~(3u))

#define	DMA_ALIGN_DOUBLE_WORD(x) (x & ~(7u))

#define	DMA_CHANNEL_STATUS_ONGOING (1U)

#define	DMA_CHANNEL_STATUS_ERROR (2U)

#define	DMA_CHANNEL_STATUS_ABORT (4U)

#define	DMA_CHANNEL_STATUS_TC (8U)

#define	DMA_CHANNEL_STATUS_HALF_TC (16U)

#define	DMA_CHANNEL_IRQ_STATUS_ERROR(x) (uint32_t)(1 << x)

#define	DMA_CHANNEL_IRQ_STATUS_ABORT(x) (uint32_t)(1 << x)

#define	DMA_CHANNEL_IRQ_STATUS_TC(x) (uint32_t)(1 << x)

#define	DMA_CHANNEL_IRQ_STATUS_HALF_TC(x) (uint32_t)(1 << x)

#define	DMA_HANDSHAKE_MODE_NORMAL (0U)

#define	DMA_HANDSHAKE_MODE_HANDSHAKE (1U)

#define	DMA_ADDRESS_CONTROL_INCREMENT (0U)

#define	DMA_ADDRESS_CONTROL_DECREMENT (1U)

#define	DMA_ADDRESS_CONTROL_FIXED (2U)

#define	DMA_SRC_BURST_OPT_STANDAND_SIZE (0U)

#define	DMA_SRC_BURST_OPT_CUSTOM_SIZE (1U)

#define	DMA_HANDSHAKE_OPT_ONE_BURST (0U)

#define	DMA_HANDSHAKE_OPT_ALL_TRANSIZE (1U)

#define	DMA_SWAP_MODE_TABLE (0U)

#define	DMA_SWAP_MODE_BYTE (1U)

#define	DMA_SWAP_MODE_HALF_WORD (2U)

#define	DMA_SWAP_MODE_WORD (3U)

#define	DMA_INTERRUPT_MASK_NONE (0U)

#define	DMA_INTERRUPT_MASK_ERROR DMAV2_CHCTRL_CTRL_INTERRMASK_MASK

#define	DMA_INTERRUPT_MASK_ABORT DMAV2_CHCTRL_CTRL_INTABTMASK_MASK

#define	DMA_INTERRUPT_MASK_TERMINAL_COUNT DMAV2_CHCTRL_CTRL_INTTCMASK_MASK

#define	DMA_INTERRUPT_MASK_HALF_TC DMAV2_CHCTRL_CTRL_INTHALFCNTMASK_MASK

#define	DMA_INTERRUPT_MASK_ALL

#define	DMA_SUPPORT_64BIT_ADDR (0)

Typedefs
typedef struct dma_linked_descriptor	dma_linked_descriptor_t
	Linked descriptor. More...

typedef struct dma_channel_config	dma_channel_config_t

typedef struct dma_handshake_config	dma_handshake_config_t

typedef struct dma_linked_descriptor	dma_linked_descriptor_t
	Linked descriptor. More...

typedef struct dma_channel_config	dma_channel_config_t

typedef struct dma_handshake_config	dma_handshake_config_t

Enumerations
enum	{ status_dma_transfer_done = ((uint32_t)( status_group_dma )1000U + (uint32_t)( 0 )) , status_dma_transfer_error = ((uint32_t)( status_group_dma )1000U + (uint32_t)( 1 )) , status_dma_transfer_abort = ((uint32_t)( status_group_dma )1000U + (uint32_t)( 2 )) , status_dma_transfer_ongoing = ((uint32_t)( status_group_dma )1000U + (uint32_t)( 3 )) , status_dma_alignment_error = ((uint32_t)( status_group_dma )*1000U + (uint32_t)( 4 )) }

enum	{ dmav2_state_idle = 0 , dmav2_state_read , dmav2_state_read_ack , dmav2_state_write , dmav2_state_write_ack , dmav2_state_ll , dmav2_state_end , dmav2_state_end_wait }

enum	{ status_dma_transfer_done = ((uint32_t)( status_group_dma )1000U + (uint32_t)( 0 )) , status_dma_transfer_error = ((uint32_t)( status_group_dma )1000U + (uint32_t)( 1 )) , status_dma_transfer_abort = ((uint32_t)( status_group_dma )1000U + (uint32_t)( 2 )) , status_dma_transfer_ongoing = ((uint32_t)( status_group_dma )1000U + (uint32_t)( 3 )) , status_dma_alignment_error = ((uint32_t)( status_group_dma )1000U + (uint32_t)( 4 )) , status_dma_transfer_half_done = ((uint32_t)( status_group_dma )1000U + (uint32_t)( 5 )) }

Functions
static void	dma_reset (DMA_Type *ptr)
	Reset DMA. More...

static hpm_stat_t	dma_enable_channel (DMA_Type *ptr, uint32_t ch_index)
	Enable DMA channel. More...

static void	dma_disable_channel (DMA_Type *ptr, uint32_t ch_index)
	Disable DMA channel. More...

static bool	dma_channel_is_enable (DMA_Type *ptr, uint32_t ch_index)
	Check whether DMA channel is enable. More...

static void	dma_set_priority (DMA_Type *ptr, uint32_t ch_index, uint8_t priority)
	Set DMA channel priority. More...

static void	dma_set_source_work_mode (DMA_Type *ptr, uint32_t ch_index, uint8_t mode)
	Set DMA channel source work mode. More...

static void	dma_set_destination_work_mode (DMA_Type *ptr, uint32_t ch_index, uint8_t mode)
	Set DMA channel destination work mode. More...

static void	dma_set_source_burst_size (DMA_Type *ptr, uint32_t ch_index, uint8_t burstsize)
	Set DMA channel source burst size. More...

static uint32_t	dma_get_remaining_transfer_size (DMA_Type *ptr, uint32_t ch_index)
	Get DMA channel remaining transfer size. More...

static void	dma_set_transfer_size (DMA_Type *ptr, uint32_t ch_index, uint32_t size_in_width)
	Set DMA channel transfer size. More...

static void	dma_set_source_width (DMA_Type *ptr, uint32_t ch_index, uint8_t width)
	Set DMA channel source width. More...

static void	dma_set_destination_width (DMA_Type *ptr, uint32_t ch_index, uint8_t width)
	Set DMA channel destination width. More...

static void	dma_set_transfer_src_width_byte_size (DMA_Type *ptr, uint32_t ch_index, uint8_t src_width, uint32_t size_in_byte)
	Set DMA channel transfer width and size in byte. More...

static void	dma_set_source_address (DMA_Type *ptr, uint32_t ch_index, uint32_t addr)
	Set DMA channel source address. More...

static void	dma_set_destination_address (DMA_Type *ptr, uint32_t ch_index, uint32_t addr)
	Set DMA channel destination address. More...

static void	dma_set_source_address_ctrl (DMA_Type *ptr, uint32_t ch_index, uint8_t addr_ctrl)
	Set DMA channel source address control mode. More...

static void	dma_set_destination_address_ctrl (DMA_Type *ptr, uint32_t ch_index, uint8_t addr_ctrl)
	Set DMA channel destination address control mode. More...

static void	dma_abort_channel (DMA_Type *ptr, uint32_t ch_index_mask)
	Abort channel transfer with mask. More...

static uint32_t	dma_check_enabled_channel (DMA_Type *ptr, uint32_t ch_index_mask)
	Check if channels are enabled with mask. More...

static bool	dma_has_linked_pointer_configured (DMA_Type *ptr, uint32_t ch_index)
	Check if linked pointer has been configured. More...

static uint32_t	dma_check_transfer_status (DMA_Type *ptr, uint8_t ch_index)
	Check transfer status. More...

static void	dma_clear_transfer_status (DMA_Type *ptr, uint8_t ch_index)
	Clear transfer status. More...

static void	dma_enable_channel_interrupt (DMA_Type *ptr, uint8_t ch_index, int32_t interrupt_mask)
	Enable DMA Channel interrupt. More...

static void	dma_disable_channel_interrupt (DMA_Type *ptr, uint8_t ch_index, int32_t interrupt_mask)
	Disable DMA Channel interrupt. More...

static uint32_t	dma_check_channel_interrupt_mask (DMA_Type *ptr, uint8_t ch_index)
	Check Channel interrupt master. More...

static void	dma_clear_irq_status (DMA_Type *ptr, uint32_t mask)
	Get clear IRQ status. More...

static uint32_t	dma_get_irq_status (DMA_Type *ptr)
	Get IRQ status. More...

void	dma_default_channel_config (DMA_Type ptr, dma_channel_config_t ch)
	Get default channel config. More...

hpm_stat_t	dma_setup_channel (DMA_Type ptr, uint8_t ch_num, dma_channel_config_t ch, bool start_transfer)
	Setup DMA channel. More...

hpm_stat_t	dma_config_linked_descriptor (DMA_Type ptr, dma_linked_descriptor_t descriptor, uint8_t ch_num, dma_channel_config_t *config)
	Config linked descriptor function. More...

hpm_stat_t	dma_start_memcpy (DMA_Type *ptr, uint8_t ch_num, uint32_t dst, uint32_t src, uint32_t size_in_byte, uint32_t burst_len_in_byte)
	Start DMA copy. More...

void	dma_default_handshake_config (DMA_Type ptr, dma_handshake_config_t config)
	Get default handshake config. More...

hpm_stat_t	dma_setup_handshake (DMA_Type ptr, dma_handshake_config_t pconfig, bool start_transfer)
	config dma handshake function More...

static void	dma_reset (DMAV2_Type *ptr)
	Reset DMA. More...

static hpm_stat_t	dma_enable_channel (DMAV2_Type *ptr, uint32_t ch_index)
	Enable DMA channel. More...

static void	dma_disable_channel (DMAV2_Type *ptr, uint32_t ch_index)
	Disable DMA channel. More...

static bool	dma_channel_is_enable (DMAV2_Type *ptr, uint32_t ch_index)
	Check whether DMA channel is enable. More...

static void	dma_set_priority (DMAV2_Type *ptr, uint32_t ch_index, uint8_t priority)
	Set DMA channel priority. More...

static void	dma_set_source_work_mode (DMAV2_Type *ptr, uint32_t ch_index, uint8_t mode)
	Set DMA channel source work mode. More...

static void	dma_set_destination_work_mode (DMAV2_Type *ptr, uint32_t ch_index, uint8_t mode)
	Set DMA channel destination work mode. More...

static void	dma_set_source_burst_size (DMAV2_Type *ptr, uint32_t ch_index, uint8_t burstsize)
	Set DMA channel source burst size. More...

static uint32_t	dma_get_remaining_transfer_size (DMAV2_Type *ptr, uint32_t ch_index)
	Get DMA channel remaining transfer size. More...

static void	dma_set_transfer_size (DMAV2_Type *ptr, uint32_t ch_index, uint32_t size_in_width)
	Set DMA channel transfer size. More...

static void	dma_set_source_width (DMAV2_Type *ptr, uint32_t ch_index, uint8_t width)
	Set DMA channel source width. More...

static void	dma_set_destination_width (DMAV2_Type *ptr, uint32_t ch_index, uint8_t width)
	Set DMA channel destination width. More...

static void	dma_set_transfer_src_width_byte_size (DMAV2_Type *ptr, uint32_t ch_index, uint8_t src_width, uint32_t size_in_byte)
	Set DMA channel transfer width and size in byte. More...

static void	dma_set_source_address (DMAV2_Type *ptr, uint32_t ch_index, uint32_t addr)
	Set DMA channel source address. More...

static void	dma_set_destination_address (DMAV2_Type *ptr, uint32_t ch_index, uint32_t addr)
	Set DMA channel destination address. More...

static void	dma_set_source_address_ctrl (DMAV2_Type *ptr, uint32_t ch_index, uint8_t addr_ctrl)
	Set DMA channel source address control mode. More...

static void	dma_set_destination_address_ctrl (DMAV2_Type *ptr, uint32_t ch_index, uint8_t addr_ctrl)
	Set DMA channel destination address control mode. More...

static void	dma_set_infinite_loop_mode (DMAV2_Type *ptr, uint32_t ch_index, bool infinite_loop)
	Set DMA channel infinite loop mode. More...

static void	dma_set_src_busrt_option (DMAV2_Type *ptr, uint32_t ch_index, uint8_t burst_opt)
	Set DMA channel source burst option. More...

static void	dma_set_handshake_option (DMAV2_Type *ptr, uint32_t ch_index, uint8_t handshake_opt)
	Set DMA channel handshake option. More...

static void	dma_abort_channel (DMAV2_Type *ptr, uint32_t ch_index_mask)
	Abort channel transfer with mask. More...

static uint32_t	dma_check_enabled_channel (DMAV2_Type *ptr, uint32_t ch_index_mask)
	Check if channels are enabled with mask. More...

static bool	dma_has_linked_pointer_configured (DMAV2_Type *ptr, uint32_t ch_index)
	Check if linked pointer has been configured. More...

static uint32_t	dma_check_transfer_status (DMAV2_Type *ptr, uint8_t ch_index)
	Check transfer status. More...

static void	dma_clear_transfer_status (DMAV2_Type *ptr, uint8_t ch_index)
	Clear transfer status. More...

static void	dma_enable_channel_interrupt (DMAV2_Type *ptr, uint8_t ch_index, int32_t interrupt_mask)
	Enable DMA Channel interrupt. More...

static void	dma_disable_channel_interrupt (DMAV2_Type *ptr, uint8_t ch_index, int32_t interrupt_mask)
	Disable DMA Channel interrupt. More...

static uint32_t	dma_check_channel_interrupt_mask (DMAV2_Type *ptr, uint8_t ch_index)
	Check Channel interrupt master. More...

void	dma_default_channel_config (DMAV2_Type ptr, dma_channel_config_t ch)
	Get default channel config. More...

hpm_stat_t	dma_setup_channel (DMAV2_Type ptr, uint8_t ch_num, dma_channel_config_t ch, bool start_transfer)
	Setup DMA channel. More...

hpm_stat_t	dma_config_linked_descriptor (DMAV2_Type ptr, dma_linked_descriptor_t descriptor, uint8_t ch_num, dma_channel_config_t *config)
	Config linked descriptor function. More...

hpm_stat_t	dma_start_memcpy (DMAV2_Type *ptr, uint8_t ch_num, uint32_t dst, uint32_t src, uint32_t size_in_byte, uint32_t burst_len_in_byte)
	Start DMA copy. More...

void	dma_default_handshake_config (DMAV2_Type ptr, dma_handshake_config_t config)
	Get default handshake config. More...

hpm_stat_t	dma_setup_handshake (DMAV2_Type ptr, dma_handshake_config_t pconfig, bool start_transfer)
	config dma handshake function More...

static bool	dma_is_idle (DMAV2_Type *ptr)
	Check whether DMA is idle. More...

Detailed Description

DMA driver APIs.

Macro Definition Documentation

◆ DMA_ADDRESS_CONTROL_DECREMENT [1/2]

#define DMA_ADDRESS_CONTROL_DECREMENT (1U)

#include <drivers/inc/hpm_dma_drv.h>

◆ DMA_ADDRESS_CONTROL_DECREMENT [2/2]

#define DMA_ADDRESS_CONTROL_DECREMENT (1U)

#include <drivers/inc/hpm_dmav2_drv.h>

◆ DMA_ADDRESS_CONTROL_FIXED [1/2]

#define DMA_ADDRESS_CONTROL_FIXED (2U)

#include <drivers/inc/hpm_dma_drv.h>

◆ DMA_ADDRESS_CONTROL_FIXED [2/2]

#define DMA_ADDRESS_CONTROL_FIXED (2U)

#include <drivers/inc/hpm_dmav2_drv.h>

◆ DMA_ADDRESS_CONTROL_INCREMENT [1/2]

#define DMA_ADDRESS_CONTROL_INCREMENT (0U)

#include <drivers/inc/hpm_dma_drv.h>

◆ DMA_ADDRESS_CONTROL_INCREMENT [2/2]

#define DMA_ADDRESS_CONTROL_INCREMENT (0U)

#include <drivers/inc/hpm_dmav2_drv.h>

◆ DMA_ALIGN_DOUBLE_WORD [1/2]

#define DMA_ALIGN_DOUBLE_WORD ( x ) (x & ~(7u))

#include <drivers/inc/hpm_dma_drv.h>

◆ DMA_ALIGN_DOUBLE_WORD [2/2]

#define DMA_ALIGN_DOUBLE_WORD ( x ) (x & ~(7u))

#include <drivers/inc/hpm_dmav2_drv.h>

◆ DMA_ALIGN_HALF_WORD [1/2]

#define DMA_ALIGN_HALF_WORD ( x ) (x & ~(1u))

#include <drivers/inc/hpm_dma_drv.h>

◆ DMA_ALIGN_HALF_WORD [2/2]

#define DMA_ALIGN_HALF_WORD ( x ) (x & ~(1u))

#include <drivers/inc/hpm_dmav2_drv.h>

◆ DMA_ALIGN_WORD [1/2]

#define DMA_ALIGN_WORD ( x ) (x & ~(3u))

#include <drivers/inc/hpm_dma_drv.h>

◆ DMA_ALIGN_WORD [2/2]

#define DMA_ALIGN_WORD ( x ) (x & ~(3u))

#include <drivers/inc/hpm_dmav2_drv.h>

◆ DMA_CHANNEL_IRQ_STATUS

#define DMA_CHANNEL_IRQ_STATUS ( x )

#include <drivers/inc/hpm_dma_drv.h>

Value:

                                                           (uint32_t)(DMA_CHANNEL_IRQ_STATUS_TC(x) | \
                                                           DMA_CHANNEL_IRQ_STATUS_ABORT(x) | \
                                                           DMA_CHANNEL_IRQ_STATUS_ERROR(x))

◆ DMA_CHANNEL_IRQ_STATUS_ABORT [1/2]

#define DMA_CHANNEL_IRQ_STATUS_ABORT ( x ) (uint32_t)(1 << (DMA_STATUS_ABORT_SHIFT + x))

#include <drivers/inc/hpm_dma_drv.h>

◆ DMA_CHANNEL_IRQ_STATUS_ABORT [2/2]

#define DMA_CHANNEL_IRQ_STATUS_ABORT ( x ) (uint32_t)(1 << x)

#include <drivers/inc/hpm_dmav2_drv.h>

◆ DMA_CHANNEL_IRQ_STATUS_ERROR [1/2]

#define DMA_CHANNEL_IRQ_STATUS_ERROR ( x ) (uint32_t)(1 << (DMA_STATUS_ERROR_SHIFT + x))

#include <drivers/inc/hpm_dma_drv.h>

◆ DMA_CHANNEL_IRQ_STATUS_ERROR [2/2]

#define DMA_CHANNEL_IRQ_STATUS_ERROR ( x ) (uint32_t)(1 << x)

#include <drivers/inc/hpm_dmav2_drv.h>

◆ DMA_CHANNEL_IRQ_STATUS_GET_ALL_ABORT

#define DMA_CHANNEL_IRQ_STATUS_GET_ALL_ABORT ( x ) ((x) & (((0x01UL << DMA_SOC_CHANNEL_NUM) - 1) << DMA_STATUS_ABORT_SHIFT))

#include <drivers/inc/hpm_dma_drv.h>

◆ DMA_CHANNEL_IRQ_STATUS_GET_ALL_ERROR

#define DMA_CHANNEL_IRQ_STATUS_GET_ALL_ERROR ( x ) ((x) & (((0x01UL << DMA_SOC_CHANNEL_NUM) - 1) << DMA_STATUS_ERROR_SHIFT))

#include <drivers/inc/hpm_dma_drv.h>

◆ DMA_CHANNEL_IRQ_STATUS_GET_ALL_TC

#define DMA_CHANNEL_IRQ_STATUS_GET_ALL_TC ( x ) ((x) & (((0x01UL << DMA_SOC_CHANNEL_NUM) - 1) << DMA_STATUS_TC_SHIFT))

#include <drivers/inc/hpm_dma_drv.h>

◆ DMA_CHANNEL_IRQ_STATUS_HALF_TC

#define DMA_CHANNEL_IRQ_STATUS_HALF_TC ( x ) (uint32_t)(1 << x)

#include <drivers/inc/hpm_dmav2_drv.h>

◆ DMA_CHANNEL_IRQ_STATUS_TC [1/2]

#define DMA_CHANNEL_IRQ_STATUS_TC ( x ) (uint32_t)(1 << (DMA_STATUS_TC_SHIFT + x))

#include <drivers/inc/hpm_dma_drv.h>

◆ DMA_CHANNEL_IRQ_STATUS_TC [2/2]

#define DMA_CHANNEL_IRQ_STATUS_TC ( x ) (uint32_t)(1 << x)

#include <drivers/inc/hpm_dmav2_drv.h>

◆ DMA_CHANNEL_PRIORITY_HIGH [1/2]

#define DMA_CHANNEL_PRIORITY_HIGH (1U)

#include <drivers/inc/hpm_dma_drv.h>

◆ DMA_CHANNEL_PRIORITY_HIGH [2/2]

#define DMA_CHANNEL_PRIORITY_HIGH (1U)

#include <drivers/inc/hpm_dmav2_drv.h>

◆ DMA_CHANNEL_PRIORITY_LOW [1/2]

#define DMA_CHANNEL_PRIORITY_LOW (0U)

#include <drivers/inc/hpm_dma_drv.h>

◆ DMA_CHANNEL_PRIORITY_LOW [2/2]

#define DMA_CHANNEL_PRIORITY_LOW (0U)

#include <drivers/inc/hpm_dmav2_drv.h>

◆ DMA_CHANNEL_STATUS_ABORT [1/2]

#define DMA_CHANNEL_STATUS_ABORT (4U)

#include <drivers/inc/hpm_dma_drv.h>

◆ DMA_CHANNEL_STATUS_ABORT [2/2]

#define DMA_CHANNEL_STATUS_ABORT (4U)

#include <drivers/inc/hpm_dmav2_drv.h>

◆ DMA_CHANNEL_STATUS_ERROR [1/2]

#define DMA_CHANNEL_STATUS_ERROR (2U)

#include <drivers/inc/hpm_dma_drv.h>

◆ DMA_CHANNEL_STATUS_ERROR [2/2]

#define DMA_CHANNEL_STATUS_ERROR (2U)

#include <drivers/inc/hpm_dmav2_drv.h>

◆ DMA_CHANNEL_STATUS_HALF_TC

#define DMA_CHANNEL_STATUS_HALF_TC (16U)

#include <drivers/inc/hpm_dmav2_drv.h>

◆ DMA_CHANNEL_STATUS_ONGOING [1/2]

#define DMA_CHANNEL_STATUS_ONGOING (1U)

#include <drivers/inc/hpm_dma_drv.h>

◆ DMA_CHANNEL_STATUS_ONGOING [2/2]

#define DMA_CHANNEL_STATUS_ONGOING (1U)

#include <drivers/inc/hpm_dmav2_drv.h>

◆ DMA_CHANNEL_STATUS_TC [1/2]

#define DMA_CHANNEL_STATUS_TC (8U)

#include <drivers/inc/hpm_dma_drv.h>

◆ DMA_CHANNEL_STATUS_TC [2/2]

#define DMA_CHANNEL_STATUS_TC (8U)

#include <drivers/inc/hpm_dmav2_drv.h>

◆ DMA_HANDSHAKE_MODE_HANDSHAKE [1/2]

#define DMA_HANDSHAKE_MODE_HANDSHAKE (1U)

#include <drivers/inc/hpm_dma_drv.h>

◆ DMA_HANDSHAKE_MODE_HANDSHAKE [2/2]

#define DMA_HANDSHAKE_MODE_HANDSHAKE (1U)

#include <drivers/inc/hpm_dmav2_drv.h>

◆ DMA_HANDSHAKE_MODE_NORMAL [1/2]

#define DMA_HANDSHAKE_MODE_NORMAL (0U)

#include <drivers/inc/hpm_dma_drv.h>

◆ DMA_HANDSHAKE_MODE_NORMAL [2/2]

#define DMA_HANDSHAKE_MODE_NORMAL (0U)

#include <drivers/inc/hpm_dmav2_drv.h>

◆ DMA_HANDSHAKE_OPT_ALL_TRANSIZE

#define DMA_HANDSHAKE_OPT_ALL_TRANSIZE (1U)

#include <drivers/inc/hpm_dmav2_drv.h>

◆ DMA_HANDSHAKE_OPT_ONE_BURST

#define DMA_HANDSHAKE_OPT_ONE_BURST (0U)

#include <drivers/inc/hpm_dmav2_drv.h>

◆ DMA_INTERRUPT_MASK_ABORT [1/2]

#define DMA_INTERRUPT_MASK_ABORT DMA_CHCTRL_CTRL_INTABTMASK_MASK

#include <drivers/inc/hpm_dma_drv.h>

◆ DMA_INTERRUPT_MASK_ABORT [2/2]

#define DMA_INTERRUPT_MASK_ABORT DMAV2_CHCTRL_CTRL_INTABTMASK_MASK

#include <drivers/inc/hpm_dmav2_drv.h>

◆ DMA_INTERRUPT_MASK_ALL [1/2]

#define DMA_INTERRUPT_MASK_ALL

#include <drivers/inc/hpm_dma_drv.h>

Value:

    (uint8_t)(DMA_INTERRUPT_MASK_TERMINAL_COUNT \
            | DMA_INTERRUPT_MASK_ABORT \
            | DMA_INTERRUPT_MASK_ERROR)

◆ DMA_INTERRUPT_MASK_ALL [2/2]

#define DMA_INTERRUPT_MASK_ALL

#include <drivers/inc/hpm_dmav2_drv.h>

Value:

    (uint8_t)(DMA_INTERRUPT_MASK_TERMINAL_COUNT \
            | DMA_INTERRUPT_MASK_ABORT \
            | DMA_INTERRUPT_MASK_ERROR \
            | DMA_INTERRUPT_MASK_HALF_TC)

◆ DMA_INTERRUPT_MASK_ERROR [1/2]

#define DMA_INTERRUPT_MASK_ERROR DMA_CHCTRL_CTRL_INTERRMASK_MASK

#include <drivers/inc/hpm_dma_drv.h>

◆ DMA_INTERRUPT_MASK_ERROR [2/2]

#define DMA_INTERRUPT_MASK_ERROR DMAV2_CHCTRL_CTRL_INTERRMASK_MASK

#include <drivers/inc/hpm_dmav2_drv.h>

◆ DMA_INTERRUPT_MASK_HALF_TC

#define DMA_INTERRUPT_MASK_HALF_TC DMAV2_CHCTRL_CTRL_INTHALFCNTMASK_MASK

#include <drivers/inc/hpm_dmav2_drv.h>

◆ DMA_INTERRUPT_MASK_NONE [1/2]

#define DMA_INTERRUPT_MASK_NONE (0U)

#include <drivers/inc/hpm_dma_drv.h>

◆ DMA_INTERRUPT_MASK_NONE [2/2]

#define DMA_INTERRUPT_MASK_NONE (0U)

#include <drivers/inc/hpm_dmav2_drv.h>

◆ DMA_INTERRUPT_MASK_TERMINAL_COUNT [1/2]

#define DMA_INTERRUPT_MASK_TERMINAL_COUNT DMA_CHCTRL_CTRL_INTTCMASK_MASK

#include <drivers/inc/hpm_dma_drv.h>

◆ DMA_INTERRUPT_MASK_TERMINAL_COUNT [2/2]

#define DMA_INTERRUPT_MASK_TERMINAL_COUNT DMAV2_CHCTRL_CTRL_INTTCMASK_MASK

#include <drivers/inc/hpm_dmav2_drv.h>

◆ DMA_NUM_TRANSFER_PER_BURST_1024T [1/2]

#define DMA_NUM_TRANSFER_PER_BURST_1024T (10U)

#include <drivers/inc/hpm_dma_drv.h>

◆ DMA_NUM_TRANSFER_PER_BURST_1024T [2/2]

#define DMA_NUM_TRANSFER_PER_BURST_1024T (10U)

#include <drivers/inc/hpm_dmav2_drv.h>

◆ DMA_NUM_TRANSFER_PER_BURST_128T [1/2]

#define DMA_NUM_TRANSFER_PER_BURST_128T (7U)

#include <drivers/inc/hpm_dma_drv.h>

◆ DMA_NUM_TRANSFER_PER_BURST_128T [2/2]

#define DMA_NUM_TRANSFER_PER_BURST_128T (7U)

#include <drivers/inc/hpm_dmav2_drv.h>

◆ DMA_NUM_TRANSFER_PER_BURST_16T [1/2]

#define DMA_NUM_TRANSFER_PER_BURST_16T (4U)

#include <drivers/inc/hpm_dma_drv.h>

◆ DMA_NUM_TRANSFER_PER_BURST_16T [2/2]

#define DMA_NUM_TRANSFER_PER_BURST_16T (4U)

#include <drivers/inc/hpm_dmav2_drv.h>

◆ DMA_NUM_TRANSFER_PER_BURST_1T [1/2]

#define DMA_NUM_TRANSFER_PER_BURST_1T (0U)

#include <drivers/inc/hpm_dma_drv.h>

◆ DMA_NUM_TRANSFER_PER_BURST_1T [2/2]

#define DMA_NUM_TRANSFER_PER_BURST_1T (0U)

#include <drivers/inc/hpm_dmav2_drv.h>

◆ DMA_NUM_TRANSFER_PER_BURST_256T [1/2]

#define DMA_NUM_TRANSFER_PER_BURST_256T (8U)

#include <drivers/inc/hpm_dma_drv.h>

◆ DMA_NUM_TRANSFER_PER_BURST_256T [2/2]

#define DMA_NUM_TRANSFER_PER_BURST_256T (8U)

#include <drivers/inc/hpm_dmav2_drv.h>

◆ DMA_NUM_TRANSFER_PER_BURST_2T [1/2]

#define DMA_NUM_TRANSFER_PER_BURST_2T (1U)

#include <drivers/inc/hpm_dma_drv.h>

◆ DMA_NUM_TRANSFER_PER_BURST_2T [2/2]

#define DMA_NUM_TRANSFER_PER_BURST_2T (1U)

#include <drivers/inc/hpm_dmav2_drv.h>

◆ DMA_NUM_TRANSFER_PER_BURST_32T [1/2]

#define DMA_NUM_TRANSFER_PER_BURST_32T (5U)

#include <drivers/inc/hpm_dma_drv.h>

◆ DMA_NUM_TRANSFER_PER_BURST_32T [2/2]

#define DMA_NUM_TRANSFER_PER_BURST_32T (5U)

#include <drivers/inc/hpm_dmav2_drv.h>

◆ DMA_NUM_TRANSFER_PER_BURST_4T [1/2]

#define DMA_NUM_TRANSFER_PER_BURST_4T (2U)

#include <drivers/inc/hpm_dma_drv.h>

◆ DMA_NUM_TRANSFER_PER_BURST_4T [2/2]

#define DMA_NUM_TRANSFER_PER_BURST_4T (2U)

#include <drivers/inc/hpm_dmav2_drv.h>

◆ DMA_NUM_TRANSFER_PER_BURST_512T [1/2]

#define DMA_NUM_TRANSFER_PER_BURST_512T (9U)

#include <drivers/inc/hpm_dma_drv.h>

◆ DMA_NUM_TRANSFER_PER_BURST_512T [2/2]

#define DMA_NUM_TRANSFER_PER_BURST_512T (9U)

#include <drivers/inc/hpm_dmav2_drv.h>

◆ DMA_NUM_TRANSFER_PER_BURST_64T [1/2]

#define DMA_NUM_TRANSFER_PER_BURST_64T (6U)

#include <drivers/inc/hpm_dma_drv.h>

◆ DMA_NUM_TRANSFER_PER_BURST_64T [2/2]

#define DMA_NUM_TRANSFER_PER_BURST_64T (6U)

#include <drivers/inc/hpm_dmav2_drv.h>

◆ DMA_NUM_TRANSFER_PER_BURST_8T [1/2]

#define DMA_NUM_TRANSFER_PER_BURST_8T (3U)

#include <drivers/inc/hpm_dma_drv.h>

◆ DMA_NUM_TRANSFER_PER_BURST_8T [2/2]

#define DMA_NUM_TRANSFER_PER_BURST_8T (3U)

#include <drivers/inc/hpm_dmav2_drv.h>

◆ DMA_SRC_BURST_OPT_CUSTOM_SIZE

#define DMA_SRC_BURST_OPT_CUSTOM_SIZE (1U)

#include <drivers/inc/hpm_dmav2_drv.h>

◆ DMA_SRC_BURST_OPT_STANDAND_SIZE

#define DMA_SRC_BURST_OPT_STANDAND_SIZE (0U)

#include <drivers/inc/hpm_dmav2_drv.h>

◆ DMA_STATUS_ABORT_SHIFT

#define DMA_STATUS_ABORT_SHIFT (8U)

#include <drivers/inc/hpm_dma_drv.h>

◆ DMA_STATUS_ERROR_SHIFT

#define DMA_STATUS_ERROR_SHIFT (0U)

#include <drivers/inc/hpm_dma_drv.h>

◆ DMA_STATUS_TC_SHIFT

#define DMA_STATUS_TC_SHIFT (16U)

#include <drivers/inc/hpm_dma_drv.h>

◆ DMA_SUPPORT_64BIT_ADDR [1/2]

#define DMA_SUPPORT_64BIT_ADDR (0)

#include <drivers/inc/hpm_dma_drv.h>

◆ DMA_SUPPORT_64BIT_ADDR [2/2]

#define DMA_SUPPORT_64BIT_ADDR (0)

#include <drivers/inc/hpm_dmav2_drv.h>

◆ DMA_SWAP_MODE_BYTE

#define DMA_SWAP_MODE_BYTE (1U)

#include <drivers/inc/hpm_dmav2_drv.h>

◆ DMA_SWAP_MODE_HALF_WORD

#define DMA_SWAP_MODE_HALF_WORD (2U)

#include <drivers/inc/hpm_dmav2_drv.h>

◆ DMA_SWAP_MODE_TABLE

#define DMA_SWAP_MODE_TABLE (0U)

#include <drivers/inc/hpm_dmav2_drv.h>

◆ DMA_SWAP_MODE_WORD

#define DMA_SWAP_MODE_WORD (3U)

#include <drivers/inc/hpm_dmav2_drv.h>

◆ DMA_TRANSFER_WIDTH_BYTE [1/2]

#define DMA_TRANSFER_WIDTH_BYTE (0U)

#include <drivers/inc/hpm_dma_drv.h>

◆ DMA_TRANSFER_WIDTH_BYTE [2/2]

#define DMA_TRANSFER_WIDTH_BYTE (0U)

#include <drivers/inc/hpm_dmav2_drv.h>

◆ DMA_TRANSFER_WIDTH_DOUBLE_WORD [1/2]

#define DMA_TRANSFER_WIDTH_DOUBLE_WORD (3U)

#include <drivers/inc/hpm_dma_drv.h>

◆ DMA_TRANSFER_WIDTH_DOUBLE_WORD [2/2]

#define DMA_TRANSFER_WIDTH_DOUBLE_WORD (3U)

#include <drivers/inc/hpm_dmav2_drv.h>

◆ DMA_TRANSFER_WIDTH_HALF_WORD [1/2]

#define DMA_TRANSFER_WIDTH_HALF_WORD (1U)

#include <drivers/inc/hpm_dma_drv.h>

◆ DMA_TRANSFER_WIDTH_HALF_WORD [2/2]

#define DMA_TRANSFER_WIDTH_HALF_WORD (1U)

#include <drivers/inc/hpm_dmav2_drv.h>

◆ DMA_TRANSFER_WIDTH_WORD [1/2]

#define DMA_TRANSFER_WIDTH_WORD (2U)

#include <drivers/inc/hpm_dma_drv.h>

◆ DMA_TRANSFER_WIDTH_WORD [2/2]

#define DMA_TRANSFER_WIDTH_WORD (2U)

#include <drivers/inc/hpm_dmav2_drv.h>

◆ DMA_Type

#define DMA_Type DMAV2_Type

#include <drivers/inc/hpm_dmav2_drv.h>

Typedef Documentation

◆ dma_channel_config_t [1/2]

typedef struct dma_channel_config dma_channel_config_t

#include <drivers/inc/hpm_dma_drv.h>

◆ dma_channel_config_t [2/2]

typedef struct dma_channel_config dma_channel_config_t

#include <drivers/inc/hpm_dmav2_drv.h>

◆ dma_handshake_config_t [1/2]

typedef struct dma_handshake_config dma_handshake_config_t

#include <drivers/inc/hpm_dma_drv.h>

◆ dma_handshake_config_t [2/2]

typedef struct dma_handshake_config dma_handshake_config_t

#include <drivers/inc/hpm_dmav2_drv.h>

◆ dma_linked_descriptor_t [1/2]

typedef struct dma_linked_descriptor dma_linked_descriptor_t

#include <drivers/inc/hpm_dma_drv.h>

Linked descriptor.

It is consumed by DMA controlled directly

◆ dma_linked_descriptor_t [2/2]

typedef struct dma_linked_descriptor dma_linked_descriptor_t

#include <drivers/inc/hpm_dmav2_drv.h>

Linked descriptor.

It is consumed by DMA controlled directly

Enumeration Type Documentation

◆ anonymous enum

anonymous enum

#include <drivers/inc/hpm_dma_drv.h>

Enumerator
status_dma_transfer_done
status_dma_transfer_error
status_dma_transfer_abort
status_dma_transfer_ongoing
status_dma_alignment_error

◆ anonymous enum

anonymous enum

#include <drivers/inc/hpm_dmav2_drv.h>

Enumerator
dmav2_state_idle
dmav2_state_read
dmav2_state_read_ack
dmav2_state_write
dmav2_state_write_ack
dmav2_state_ll
dmav2_state_end
dmav2_state_end_wait

◆ anonymous enum

anonymous enum

#include <drivers/inc/hpm_dmav2_drv.h>

Enumerator
status_dma_transfer_done
status_dma_transfer_error
status_dma_transfer_abort
status_dma_transfer_ongoing
status_dma_alignment_error
status_dma_transfer_half_done

Function Documentation

◆ dma_abort_channel() [1/2]

static void dma_abort_channel	(	DMA_Type *	ptr,
		uint32_t	ch_index_mask
	)

inlinestatic

#include <drivers/inc/hpm_dma_drv.h>

Abort channel transfer with mask.

Parameters

[in]	ptr	DMA base address
[in]	ch_index_mask	Mask of channels to be aborted

◆ dma_abort_channel() [2/2]

static void dma_abort_channel	(	DMAV2_Type *	ptr,
		uint32_t	ch_index_mask
	)

inlinestatic

#include <drivers/inc/hpm_dmav2_drv.h>

Abort channel transfer with mask.

Parameters

[in]	ptr	DMA base address
[in]	ch_index_mask	Mask of channels to be aborted

◆ dma_channel_is_enable() [1/2]

static bool dma_channel_is_enable	(	DMA_Type *	ptr,
		uint32_t	ch_index
	)

inlinestatic

#include <drivers/inc/hpm_dma_drv.h>

Check whether DMA channel is enable.

Parameters

[in]	ptr	DMA base address
[in]	ch_index	Index of the channel

Returns: true if DMA channel is enable

◆ dma_channel_is_enable() [2/2]

static bool dma_channel_is_enable	(	DMAV2_Type *	ptr,
		uint32_t	ch_index
	)

inlinestatic

#include <drivers/inc/hpm_dmav2_drv.h>

Check whether DMA channel is enable.

Parameters

[in]	ptr	DMA base address
[in]	ch_index	Index of the channel

Returns: true if DMA channel is enable

◆ dma_check_channel_interrupt_mask() [1/2]

static uint32_t dma_check_channel_interrupt_mask	(	DMA_Type *	ptr,
		uint8_t	ch_index
	)

inlinestatic

#include <drivers/inc/hpm_dma_drv.h>

Check Channel interrupt master.

Parameters

[in]	ptr	DMA base address
[in]	ch_index	Target channel index to be checked

Returns: uint32_t Interrupt mask

◆ dma_check_channel_interrupt_mask() [2/2]

static uint32_t dma_check_channel_interrupt_mask	(	DMAV2_Type *	ptr,
		uint8_t	ch_index
	)

inlinestatic

#include <drivers/inc/hpm_dmav2_drv.h>

Check Channel interrupt master.

Parameters

[in]	ptr	DMA base address
[in]	ch_index	Target channel index to be checked

Returns: uint32_t Interrupt mask

◆ dma_check_enabled_channel() [1/2]

static uint32_t dma_check_enabled_channel	(	DMA_Type *	ptr,
		uint32_t	ch_index_mask
	)

inlinestatic

#include <drivers/inc/hpm_dma_drv.h>

Check if channels are enabled with mask.

Parameters

[in]	ptr	DMA base address
[in]	ch_index_mask	Mask of channels to be checked

Returns: Enabled channel mask

◆ dma_check_enabled_channel() [2/2]

static uint32_t dma_check_enabled_channel	(	DMAV2_Type *	ptr,
		uint32_t	ch_index_mask
	)

inlinestatic

#include <drivers/inc/hpm_dmav2_drv.h>

Check if channels are enabled with mask.

Parameters

[in]	ptr	DMA base address
[in]	ch_index_mask	Mask of channels to be checked

Returns: Enabled channel mask

◆ dma_check_transfer_status() [1/2]

static uint32_t dma_check_transfer_status	(	DMA_Type *	ptr,
		uint8_t	ch_index
	)

inlinestatic

#include <drivers/inc/hpm_dma_drv.h>

Check transfer status.

Parameters

[in]	ptr	DMA base address
[in]	ch_index	Target channel index to be checked

Return values

DMA_CHANNEL_STATUS_ONGOING	if transfer is still ongoing
DMA_CHANNEL_STATUS_ERROR	if any error occurred during transferring
DMA_CHANNEL_STATUS_ABORT	if transfer is aborted
DMA_CHANNEL_STATUS_TC	if transfer is finished without error

◆ dma_check_transfer_status() [2/2]

static uint32_t dma_check_transfer_status	(	DMAV2_Type *	ptr,
		uint8_t	ch_index
	)

inlinestatic

#include <drivers/inc/hpm_dmav2_drv.h>

Check transfer status.

Parameters

[in]	ptr	DMA base address
[in]	ch_index	Target channel index to be checked

Return values

DMA_CHANNEL_STATUS_ONGOING	if transfer is still ongoing
DMA_CHANNEL_STATUS_ERROR	if any error occurred during transferring
DMA_CHANNEL_STATUS_ABORT	if transfer is aborted
DMA_CHANNEL_STATUS_TC	if transfer is finished without error
DMA_CHANNEL_STATUS_HALF_TC	if half transfer complete without error

◆ dma_clear_irq_status()

static void dma_clear_irq_status	(	DMA_Type *	ptr,
		uint32_t	mask
	)

inlinestatic

#include <drivers/inc/hpm_dma_drv.h>

Get clear IRQ status.

Parameters

[in]	ptr	DMA base address
[in]	mask	irq mask to be cleared

◆ dma_clear_transfer_status() [1/2]

static void dma_clear_transfer_status	(	DMA_Type *	ptr,
		uint8_t	ch_index
	)

inlinestatic

#include <drivers/inc/hpm_dma_drv.h>

Clear transfer status.

Parameters

[in]	ptr	DMA base address
[in]	ch_index	Target channel index

◆ dma_clear_transfer_status() [2/2]

static void dma_clear_transfer_status	(	DMAV2_Type *	ptr,
		uint8_t	ch_index
	)

inlinestatic

#include <drivers/inc/hpm_dmav2_drv.h>

Clear transfer status.

Parameters

[in]	ptr	DMA base address
[in]	ch_index	Target channel index

◆ dma_config_linked_descriptor() [1/2]

hpm_stat_t dma_config_linked_descriptor	(	DMA_Type *	ptr,
		dma_linked_descriptor_t *	descriptor,
		uint8_t	ch_num,
		dma_channel_config_t *	config
	)

#include <drivers/inc/hpm_dma_drv.h>

Config linked descriptor function.

Parameters

[in]	ptr	DMA base address
[in]	descriptor	Linked descriptor pointer
[in]	ch_num	Target channel index to be configured
[in]	config	Descriptor config pointer

Returns: status_success if everything is okay

◆ dma_config_linked_descriptor() [2/2]

hpm_stat_t dma_config_linked_descriptor	(	DMAV2_Type *	ptr,
		dma_linked_descriptor_t *	descriptor,
		uint8_t	ch_num,
		dma_channel_config_t *	config
	)

#include <drivers/inc/hpm_dmav2_drv.h>

Config linked descriptor function.

Parameters

[in]	ptr	DMA base address
[in]	descriptor	Linked descriptor pointer
[in]	ch_num	Target channel index to be configured
[in]	config	Descriptor config pointer

Returns: status_success if everything is okay

◆ dma_default_channel_config() [1/2]

void dma_default_channel_config	(	DMA_Type *	ptr,
		dma_channel_config_t *	ch
	)

#include <drivers/inc/hpm_dma_drv.h>

Get default channel config.

Parameters

[in]	ptr	DMA base address
[in]	ch	Channel config

◆ dma_default_channel_config() [2/2]

void dma_default_channel_config	(	DMAV2_Type *	ptr,
		dma_channel_config_t *	ch
	)

#include <drivers/inc/hpm_dmav2_drv.h>

Get default channel config.

Parameters

[in]	ptr	DMA base address
[in]	ch	Channel config

◆ dma_default_handshake_config() [1/2]

void dma_default_handshake_config	(	DMA_Type *	ptr,
		dma_handshake_config_t *	config
	)

#include <drivers/inc/hpm_dma_drv.h>

Get default handshake config.

Parameters

[in]	ptr	DMA base address
[in]	config	default config

◆ dma_default_handshake_config() [2/2]

void dma_default_handshake_config	(	DMAV2_Type *	ptr,
		dma_handshake_config_t *	config
	)

#include <drivers/inc/hpm_dmav2_drv.h>

Get default handshake config.

Parameters

[in]	ptr	DMA base address
[in]	config	default config

◆ dma_disable_channel() [1/2]

static void dma_disable_channel	(	DMA_Type *	ptr,
		uint32_t	ch_index
	)

inlinestatic

#include <drivers/inc/hpm_dma_drv.h>

Disable DMA channel.

Parameters

[in]	ptr	DMA base address
[in]	ch_index	Index of the channel to be disabled

◆ dma_disable_channel() [2/2]

static void dma_disable_channel	(	DMAV2_Type *	ptr,
		uint32_t	ch_index
	)

inlinestatic

#include <drivers/inc/hpm_dmav2_drv.h>

Disable DMA channel.

Parameters

[in]	ptr	DMA base address
[in]	ch_index	Index of the channel to be disabled

◆ dma_disable_channel_interrupt() [1/2]

static void dma_disable_channel_interrupt	(	DMA_Type *	ptr,
		uint8_t	ch_index,
		int32_t	interrupt_mask
	)

inlinestatic

#include <drivers/inc/hpm_dma_drv.h>

Disable DMA Channel interrupt.

Parameters

[in]	ptr	DMA base address
[in]	ch_index	Target channel index
[in]	interrupt_mask	Interrupt mask

◆ dma_disable_channel_interrupt() [2/2]

static void dma_disable_channel_interrupt	(	DMAV2_Type *	ptr,
		uint8_t	ch_index,
		int32_t	interrupt_mask
	)

inlinestatic

#include <drivers/inc/hpm_dmav2_drv.h>

Disable DMA Channel interrupt.

Parameters

[in]	ptr	DMA base address
[in]	ch_index	Target channel index
[in]	interrupt_mask	Interrupt mask

◆ dma_enable_channel() [1/2]

static hpm_stat_t dma_enable_channel	(	DMA_Type *	ptr,
		uint32_t	ch_index
	)

inlinestatic

#include <drivers/inc/hpm_dma_drv.h>

Enable DMA channel.

Parameters

[in]	ptr	DMA base address
[in]	ch_index	Index of the channel to be enabled

Returns: status_success if everything's okay

◆ dma_enable_channel() [2/2]

static hpm_stat_t dma_enable_channel	(	DMAV2_Type *	ptr,
		uint32_t	ch_index
	)

inlinestatic

#include <drivers/inc/hpm_dmav2_drv.h>

Enable DMA channel.

Parameters

[in]	ptr	DMA base address
[in]	ch_index	Index of the channel to be enabled

Returns: status_success if everything's okay

◆ dma_enable_channel_interrupt() [1/2]

static void dma_enable_channel_interrupt	(	DMA_Type *	ptr,
		uint8_t	ch_index,
		int32_t	interrupt_mask
	)

inlinestatic

#include <drivers/inc/hpm_dma_drv.h>

Enable DMA Channel interrupt.

Parameters

[in]	ptr	DMA base address
[in]	ch_index	Target channel index
[in]	interrupt_mask	Interrupt mask

◆ dma_enable_channel_interrupt() [2/2]

static void dma_enable_channel_interrupt	(	DMAV2_Type *	ptr,
		uint8_t	ch_index,
		int32_t	interrupt_mask
	)

inlinestatic

#include <drivers/inc/hpm_dmav2_drv.h>

Enable DMA Channel interrupt.

Parameters

[in]	ptr	DMA base address
[in]	ch_index	Target channel index
[in]	interrupt_mask	Interrupt mask

◆ dma_get_irq_status()

static uint32_t dma_get_irq_status ( DMA_Type * ptr )

inlinestatic

#include <drivers/inc/hpm_dma_drv.h>

Get IRQ status.

Parameters

[in] ptr DMA base address

◆ dma_get_remaining_transfer_size() [1/2]

static uint32_t dma_get_remaining_transfer_size	(	DMA_Type *	ptr,
		uint32_t	ch_index
	)

inlinestatic

#include <drivers/inc/hpm_dma_drv.h>

Get DMA channel remaining transfer size.

Parameters

[in]	ptr	DMA base address
[in]	ch_index	Index of the channel

Returns: remaining transfer size

◆ dma_get_remaining_transfer_size() [2/2]

static uint32_t dma_get_remaining_transfer_size	(	DMAV2_Type *	ptr,
		uint32_t	ch_index
	)

inlinestatic

#include <drivers/inc/hpm_dmav2_drv.h>

Get DMA channel remaining transfer size.

Parameters

[in]	ptr	DMA base address
[in]	ch_index	Index of the channel

Returns: remaining transfer size

◆ dma_has_linked_pointer_configured() [1/2]

static bool dma_has_linked_pointer_configured	(	DMA_Type *	ptr,
		uint32_t	ch_index
	)

inlinestatic

#include <drivers/inc/hpm_dma_drv.h>

Check if linked pointer has been configured.

Parameters

[in]	ptr	DMA base address
[in]	ch_index	Target channel index to be checked

Returns: true if linked pointer has been configured

◆ dma_has_linked_pointer_configured() [2/2]

static bool dma_has_linked_pointer_configured	(	DMAV2_Type *	ptr,
		uint32_t	ch_index
	)

inlinestatic

#include <drivers/inc/hpm_dmav2_drv.h>

Check if linked pointer has been configured.

Parameters

[in]	ptr	DMA base address
[in]	ch_index	Target channel index to be checked

Returns: true if linked pointer has been configured

◆ dma_is_idle()

static bool dma_is_idle ( DMAV2_Type * ptr )

inlinestatic

#include <drivers/inc/hpm_dmav2_drv.h>

Check whether DMA is idle.

Parameters

[in] ptr DMA base address

Returns: true DMA is idle; false DMA is busy

◆ dma_reset() [1/2]

static void dma_reset ( DMA_Type * ptr )

inlinestatic

#include <drivers/inc/hpm_dma_drv.h>

Reset DMA.

Parameters

[in] ptr DMA base address

◆ dma_reset() [2/2]

static void dma_reset ( DMAV2_Type * ptr )

inlinestatic

#include <drivers/inc/hpm_dmav2_drv.h>

Reset DMA.

Parameters

[in] ptr DMA base address

◆ dma_set_destination_address() [1/2]

static void dma_set_destination_address	(	DMA_Type *	ptr,
		uint32_t	ch_index,
		uint32_t	addr
	)

inlinestatic

#include <drivers/inc/hpm_dma_drv.h>

Set DMA channel destination address.

Parameters

[in]	ptr	DMA base address
[in]	ch_index	Index of the channel
[in]	addr	destination address

◆ dma_set_destination_address() [2/2]

static void dma_set_destination_address	(	DMAV2_Type *	ptr,
		uint32_t	ch_index,
		uint32_t	addr
	)

inlinestatic

#include <drivers/inc/hpm_dmav2_drv.h>

Set DMA channel destination address.

Parameters

[in]	ptr	DMA base address
[in]	ch_index	Index of the channel
[in]	addr	destination address

◆ dma_set_destination_address_ctrl() [1/2]

static void dma_set_destination_address_ctrl	(	DMA_Type *	ptr,
		uint32_t	ch_index,
		uint8_t	addr_ctrl
	)

inlinestatic

#include <drivers/inc/hpm_dma_drv.h>

Set DMA channel destination address control mode.

Parameters

[in]	ptr	DMA base address
[in]	ch_index	Index of the channel
[in]	addr_ctrl	destination address control mode DMA_ADDRESS_CONTROL_INCREMENT DMA_ADDRESS_CONTROL_DECREMENT DMA_ADDRESS_CONTROL_FIXED

◆ dma_set_destination_address_ctrl() [2/2]

static void dma_set_destination_address_ctrl	(	DMAV2_Type *	ptr,
		uint32_t	ch_index,
		uint8_t	addr_ctrl
	)

inlinestatic

#include <drivers/inc/hpm_dmav2_drv.h>

Set DMA channel destination address control mode.

Parameters

[in]	ptr	DMA base address
[in]	ch_index	Index of the channel
[in]	addr_ctrl	destination address control mode DMA_ADDRESS_CONTROL_INCREMENT DMA_ADDRESS_CONTROL_DECREMENT DMA_ADDRESS_CONTROL_FIXED

◆ dma_set_destination_width() [1/2]

static void dma_set_destination_width	(	DMA_Type *	ptr,
		uint32_t	ch_index,
		uint8_t	width
	)

inlinestatic

#include <drivers/inc/hpm_dma_drv.h>

Set DMA channel destination width.

Parameters

[in]	ptr	DMA base address
[in]	ch_index	Index of the channel
[in]	width	transfer destination width of the channel DMA_TRANSFER_WIDTH_BYTE DMA_TRANSFER_WIDTH_HALF_WORD DMA_TRANSFER_WIDTH_WORD DMA_TRANSFER_WIDTH_DOUBLE_WORD

◆ dma_set_destination_width() [2/2]

static void dma_set_destination_width	(	DMAV2_Type *	ptr,
		uint32_t	ch_index,
		uint8_t	width
	)

inlinestatic

#include <drivers/inc/hpm_dmav2_drv.h>

Set DMA channel destination width.

Parameters

[in]	ptr	DMA base address
[in]	ch_index	Index of the channel
[in]	width	transfer destination width of the channel DMA_TRANSFER_WIDTH_BYTE DMA_TRANSFER_WIDTH_HALF_WORD DMA_TRANSFER_WIDTH_WORD DMA_TRANSFER_WIDTH_DOUBLE_WORD

◆ dma_set_destination_work_mode() [1/2]

static void dma_set_destination_work_mode	(	DMA_Type *	ptr,
		uint32_t	ch_index,
		uint8_t	mode
	)

inlinestatic

#include <drivers/inc/hpm_dma_drv.h>

Set DMA channel destination work mode.

Parameters

[in]	ptr	DMA base address
[in]	ch_index	Index of the channel
[in]	mode	destination work mode DMA_HANDSHAKE_MODE_NORMAL DMA_HANDSHAKE_MODE_HANDSHAKE

◆ dma_set_destination_work_mode() [2/2]

static void dma_set_destination_work_mode	(	DMAV2_Type *	ptr,
		uint32_t	ch_index,
		uint8_t	mode
	)

inlinestatic

#include <drivers/inc/hpm_dmav2_drv.h>

Set DMA channel destination work mode.

Parameters

[in]	ptr	DMA base address
[in]	ch_index	Index of the channel
[in]	mode	destination work mode DMA_HANDSHAKE_MODE_NORMAL DMA_HANDSHAKE_MODE_HANDSHAKE

◆ dma_set_handshake_option()

static void dma_set_handshake_option	(	DMAV2_Type *	ptr,
		uint32_t	ch_index,
		uint8_t	handshake_opt
	)

inlinestatic

#include <drivers/inc/hpm_dmav2_drv.h>

Set DMA channel handshake option.

Parameters

[in]	ptr	DMA base address
[in]	ch_index	Index of the channel
[in]	handshake_opt	handshake option DMA_HANDSHAKE_OPT_ONE_BURST DMA_HANDSHAKE_OPT_ALL_TRANSIZE

◆ dma_set_infinite_loop_mode()

static void dma_set_infinite_loop_mode	(	DMAV2_Type *	ptr,
		uint32_t	ch_index,
		bool	infinite_loop
	)

inlinestatic

#include <drivers/inc/hpm_dmav2_drv.h>

Set DMA channel infinite loop mode.

Parameters

[in]	ptr	DMA base address
[in]	ch_index	Index of the channel
[in]	infinite_loop	false - normal mode(single times mode); true - infinite loop mode(cycle mode)

◆ dma_set_priority() [1/2]

static void dma_set_priority	(	DMA_Type *	ptr,
		uint32_t	ch_index,
		uint8_t	priority
	)

inlinestatic

#include <drivers/inc/hpm_dma_drv.h>

Set DMA channel priority.

Parameters

[in]	ptr	DMA base address
[in]	ch_index	Index of the channel
[in]	priority	dma priority DMA_CHANNEL_PRIORITY_LOW DMA_CHANNEL_PRIORITY_HIGH

◆ dma_set_priority() [2/2]

static void dma_set_priority	(	DMAV2_Type *	ptr,
		uint32_t	ch_index,
		uint8_t	priority
	)

inlinestatic

#include <drivers/inc/hpm_dmav2_drv.h>

Set DMA channel priority.

Parameters

[in]	ptr	DMA base address
[in]	ch_index	Index of the channel
[in]	priority	dma priority DMA_CHANNEL_PRIORITY_LOW DMA_CHANNEL_PRIORITY_HIGH

◆ dma_set_source_address() [1/2]

static void dma_set_source_address	(	DMA_Type *	ptr,
		uint32_t	ch_index,
		uint32_t	addr
	)

inlinestatic

#include <drivers/inc/hpm_dma_drv.h>

Set DMA channel source address.

Parameters

[in]	ptr	DMA base address
[in]	ch_index	Index of the channel
[in]	addr	source address

◆ dma_set_source_address() [2/2]

static void dma_set_source_address	(	DMAV2_Type *	ptr,
		uint32_t	ch_index,
		uint32_t	addr
	)

inlinestatic

#include <drivers/inc/hpm_dmav2_drv.h>

Set DMA channel source address.

Parameters

[in]	ptr	DMA base address
[in]	ch_index	Index of the channel
[in]	addr	source address

◆ dma_set_source_address_ctrl() [1/2]

static void dma_set_source_address_ctrl	(	DMA_Type *	ptr,
		uint32_t	ch_index,
		uint8_t	addr_ctrl
	)

inlinestatic

#include <drivers/inc/hpm_dma_drv.h>

Set DMA channel source address control mode.

Parameters

[in]	ptr	DMA base address
[in]	ch_index	Index of the channel
[in]	addr_ctrl	source address control mode DMA_ADDRESS_CONTROL_INCREMENT DMA_ADDRESS_CONTROL_DECREMENT DMA_ADDRESS_CONTROL_FIXED

◆ dma_set_source_address_ctrl() [2/2]

static void dma_set_source_address_ctrl	(	DMAV2_Type *	ptr,
		uint32_t	ch_index,
		uint8_t	addr_ctrl
	)

inlinestatic

#include <drivers/inc/hpm_dmav2_drv.h>

Set DMA channel source address control mode.

Parameters

[in]	ptr	DMA base address
[in]	ch_index	Index of the channel
[in]	addr_ctrl	source address control mode DMA_ADDRESS_CONTROL_INCREMENT DMA_ADDRESS_CONTROL_DECREMENT DMA_ADDRESS_CONTROL_FIXED

◆ dma_set_source_burst_size() [1/2]

static void dma_set_source_burst_size	(	DMA_Type *	ptr,
		uint32_t	ch_index,
		uint8_t	burstsize
	)

inlinestatic

#include <drivers/inc/hpm_dma_drv.h>

Set DMA channel source burst size.

Parameters

[in]	ptr	DMA base address
[in]	ch_index	Index of the channel
[in]	burstsize	source burst size DMA_NUM_TRANSFER_PER_BURST_1T DMA_NUM_TRANSFER_PER_BURST_2T DMA_NUM_TRANSFER_PER_BURST_4T DMA_NUM_TRANSFER_PER_BURST_8T DMA_NUM_TRANSFER_PER_BURST_16T DMA_NUM_TRANSFER_PER_BURST_32T DMA_NUM_TRANSFER_PER_BURST_64T DMA_NUM_TRANSFER_PER_BURST_128T DMA_NUM_TRANSFER_PER_BURST_256T DMA_NUM_TRANSFER_PER_BURST_512T DMA_NUM_TRANSFER_PER_BURST_1024T

◆ dma_set_source_burst_size() [2/2]

static void dma_set_source_burst_size	(	DMAV2_Type *	ptr,
		uint32_t	ch_index,
		uint8_t	burstsize
	)

inlinestatic

#include <drivers/inc/hpm_dmav2_drv.h>

Set DMA channel source burst size.

Parameters

[in]	ptr	DMA base address
[in]	ch_index	Index of the channel
[in]	burstsize	source burst size when BURSTOPT is 0, please reference follows: DMA_NUM_TRANSFER_PER_BURST_1T DMA_NUM_TRANSFER_PER_BURST_2T DMA_NUM_TRANSFER_PER_BURST_4T DMA_NUM_TRANSFER_PER_BURST_8T DMA_NUM_TRANSFER_PER_BURST_16T DMA_NUM_TRANSFER_PER_BURST_32T DMA_NUM_TRANSFER_PER_BURST_64T DMA_NUM_TRANSFER_PER_BURST_128T DMA_NUM_TRANSFER_PER_BURST_256T DMA_NUM_TRANSFER_PER_BURST_512T DMA_NUM_TRANSFER_PER_BURST_1024T when BURSTOPT is 1, burst size is (burstsize + 1).

◆ dma_set_source_width() [1/2]

static void dma_set_source_width	(	DMA_Type *	ptr,
		uint32_t	ch_index,
		uint8_t	width
	)

inlinestatic

#include <drivers/inc/hpm_dma_drv.h>

Set DMA channel source width.

Parameters

[in]	ptr	DMA base address
[in]	ch_index	Index of the channel
[in]	width	transfer source width of the channel DMA_TRANSFER_WIDTH_BYTE DMA_TRANSFER_WIDTH_HALF_WORD DMA_TRANSFER_WIDTH_WORD DMA_TRANSFER_WIDTH_DOUBLE_WORD

◆ dma_set_source_width() [2/2]

static void dma_set_source_width	(	DMAV2_Type *	ptr,
		uint32_t	ch_index,
		uint8_t	width
	)

inlinestatic

#include <drivers/inc/hpm_dmav2_drv.h>

Set DMA channel source width.

Parameters

[in]	ptr	DMA base address
[in]	ch_index	Index of the channel
[in]	width	transfer source width of the channel DMA_TRANSFER_WIDTH_BYTE DMA_TRANSFER_WIDTH_HALF_WORD DMA_TRANSFER_WIDTH_WORD DMA_TRANSFER_WIDTH_DOUBLE_WORD

◆ dma_set_source_work_mode() [1/2]

static void dma_set_source_work_mode	(	DMA_Type *	ptr,
		uint32_t	ch_index,
		uint8_t	mode
	)

inlinestatic

#include <drivers/inc/hpm_dma_drv.h>

Set DMA channel source work mode.

Parameters

[in]	ptr	DMA base address
[in]	ch_index	Index of the channel
[in]	mode	source work mode DMA_HANDSHAKE_MODE_NORMAL DMA_HANDSHAKE_MODE_HANDSHAKE

◆ dma_set_source_work_mode() [2/2]

static void dma_set_source_work_mode	(	DMAV2_Type *	ptr,
		uint32_t	ch_index,
		uint8_t	mode
	)

inlinestatic

#include <drivers/inc/hpm_dmav2_drv.h>

Set DMA channel source work mode.

Parameters

[in]	ptr	DMA base address
[in]	ch_index	Index of the channel
[in]	mode	source work mode DMA_HANDSHAKE_MODE_NORMAL DMA_HANDSHAKE_MODE_HANDSHAKE

◆ dma_set_src_busrt_option()

static void dma_set_src_busrt_option	(	DMAV2_Type *	ptr,
		uint32_t	ch_index,
		uint8_t	burst_opt
	)

inlinestatic

#include <drivers/inc/hpm_dmav2_drv.h>

Set DMA channel source burst option.

Parameters

[in]	ptr	DMA base address
[in]	ch_index	Index of the channel
[in]	burst_opt	burst option DMA_SRC_BURST_OPT_STANDAND_SIZE DMA_SRC_BURST_OPT_CUSTOM_SIZE

◆ dma_set_transfer_size() [1/2]

static void dma_set_transfer_size	(	DMA_Type *	ptr,
		uint32_t	ch_index,
		uint32_t	size_in_width
	)

inlinestatic

#include <drivers/inc/hpm_dma_drv.h>

Set DMA channel transfer size.

Parameters

[in]	ptr	DMA base address
[in]	ch_index	Index of the channel
[in]	size_in_width	transfer size of the channel. The width is current dma channel configured source width. Transfer total bytes are (size_in_width * source width).

◆ dma_set_transfer_size() [2/2]

static void dma_set_transfer_size	(	DMAV2_Type *	ptr,
		uint32_t	ch_index,
		uint32_t	size_in_width
	)

inlinestatic

#include <drivers/inc/hpm_dmav2_drv.h>

Set DMA channel transfer size.

Parameters

[in]	ptr	DMA base address
[in]	ch_index	Index of the channel
[in]	size_in_width	transfer size of the channel. The width is current dma channel configured source width. Transfer total bytes are (size_in_width * source width).

◆ dma_set_transfer_src_width_byte_size() [1/2]

static void dma_set_transfer_src_width_byte_size	(	DMA_Type *	ptr,
		uint32_t	ch_index,
		uint8_t	src_width,
		uint32_t	size_in_byte
	)

inlinestatic

#include <drivers/inc/hpm_dma_drv.h>

Set DMA channel transfer width and size in byte.

Parameters

[in]	ptr	DMA base address
[in]	ch_index	Index of the channel
[in]	src_width	transfer source width of the channel DMA_TRANSFER_WIDTH_BYTE DMA_TRANSFER_WIDTH_HALF_WORD DMA_TRANSFER_WIDTH_WORD DMA_TRANSFER_WIDTH_DOUBLE_WORD
[in]	size_in_byte	transfer size in byte of the channel. The dma transfer size is (size_in_byte >> src_width).

◆ dma_set_transfer_src_width_byte_size() [2/2]

static void dma_set_transfer_src_width_byte_size	(	DMAV2_Type *	ptr,
		uint32_t	ch_index,
		uint8_t	src_width,
		uint32_t	size_in_byte
	)

inlinestatic

#include <drivers/inc/hpm_dmav2_drv.h>

Set DMA channel transfer width and size in byte.

Parameters

[in]	ptr	DMA base address
[in]	ch_index	Index of the channel
[in]	src_width	transfer source width of the channel DMA_TRANSFER_WIDTH_BYTE DMA_TRANSFER_WIDTH_HALF_WORD DMA_TRANSFER_WIDTH_WORD DMA_TRANSFER_WIDTH_DOUBLE_WORD
[in]	size_in_byte	transfer size in byte of the channel. The dma transfer size is (size_in_byte >> src_width).

◆ dma_setup_channel() [1/2]

hpm_stat_t dma_setup_channel	(	DMA_Type *	ptr,
		uint8_t	ch_num,
		dma_channel_config_t *	ch,
		bool	start_transfer
	)

#include <drivers/inc/hpm_dma_drv.h>

Setup DMA channel.

Parameters

[in]	ptr	DMA base address
[in]	ch_num	Target channel index to be configured
[in]	ch	Channel config
[in]	start_transfer	Set true to start transfer

Returns: status_success if everything is okay

◆ dma_setup_channel() [2/2]

hpm_stat_t dma_setup_channel	(	DMAV2_Type *	ptr,
		uint8_t	ch_num,
		dma_channel_config_t *	ch,
		bool	start_transfer
	)

#include <drivers/inc/hpm_dmav2_drv.h>

Setup DMA channel.

Parameters

[in]	ptr	DMA base address
[in]	ch_num	Target channel index to be configured
[in]	ch	Channel config
[in]	start_transfer	Set true to start transfer

Returns: status_success if everything is okay

◆ dma_setup_handshake() [1/2]

hpm_stat_t dma_setup_handshake	(	DMA_Type *	ptr,
		dma_handshake_config_t *	pconfig,
		bool	start_transfer
	)

#include <drivers/inc/hpm_dma_drv.h>

config dma handshake function

Parameters

[in]	ptr	DMA base address
[in]	pconfig	dma handshake config pointer
[in]	start_transfer	Set true to start transfer

Returns: status_success if everything is okay

◆ dma_setup_handshake() [2/2]

hpm_stat_t dma_setup_handshake	(	DMAV2_Type *	ptr,
		dma_handshake_config_t *	pconfig,
		bool	start_transfer
	)

#include <drivers/inc/hpm_dmav2_drv.h>

config dma handshake function

Parameters

[in]	ptr	DMA base address
[in]	pconfig	dma handshake config pointer
[in]	start_transfer	Set true to start transfer

Returns: status_success if everything is okay

◆ dma_start_memcpy() [1/2]

hpm_stat_t dma_start_memcpy	(	DMA_Type *	ptr,
		uint8_t	ch_num,
		uint32_t	dst,
		uint32_t	src,
		uint32_t	size_in_byte,
		uint32_t	burst_len_in_byte
	)

#include <drivers/inc/hpm_dma_drv.h>

Start DMA copy.

Parameters

[in]	ptr	DMA base address
[in]	ch_num	Target channel index
[in]	dst	Destination address
[in]	src	Source Address
[in]	size_in_byte	Size in byte
[in]	burst_len_in_byte	Burst length in byte

Returns: status_success if everthing is okay

Note: : dst, src, size should be aligned with burst_len_in_byte

◆ dma_start_memcpy() [2/2]

hpm_stat_t dma_start_memcpy	(	DMAV2_Type *	ptr,
		uint8_t	ch_num,
		uint32_t	dst,
		uint32_t	src,
		uint32_t	size_in_byte,
		uint32_t	burst_len_in_byte
	)

#include <drivers/inc/hpm_dmav2_drv.h>

Start DMA copy.

Parameters

[in]	ptr	DMA base address
[in]	ch_num	Target channel index
[in]	dst	Destination address
[in]	src	Source Address
[in]	size_in_byte	Size in byte
[in]	burst_len_in_byte	Burst length in byte

Returns: status_success if everthing is okay

Note: : dst, src, size should be aligned with burst_len_in_byte

Data Structures

Macros

Typedefs

Enumerations

Functions

Detailed Description

Macro Definition Documentation

◆ DMA_ADDRESS_CONTROL_DECREMENT [1/2]

◆ DMA_ADDRESS_CONTROL_DECREMENT [2/2]

◆ DMA_ADDRESS_CONTROL_FIXED [1/2]

◆ DMA_ADDRESS_CONTROL_FIXED [2/2]

◆ DMA_ADDRESS_CONTROL_INCREMENT [1/2]

◆ DMA_ADDRESS_CONTROL_INCREMENT [2/2]

◆ DMA_ALIGN_DOUBLE_WORD [1/2]

◆ DMA_ALIGN_DOUBLE_WORD [2/2]

◆ DMA_ALIGN_HALF_WORD [1/2]

◆ DMA_ALIGN_HALF_WORD [2/2]

◆ DMA_ALIGN_WORD [1/2]

◆ DMA_ALIGN_WORD [2/2]

◆ DMA_CHANNEL_IRQ_STATUS

◆ DMA_CHANNEL_IRQ_STATUS_ABORT [1/2]

◆ DMA_CHANNEL_IRQ_STATUS_ABORT [2/2]

◆ DMA_CHANNEL_IRQ_STATUS_ERROR [1/2]

◆ DMA_CHANNEL_IRQ_STATUS_ERROR [2/2]

◆ DMA_CHANNEL_IRQ_STATUS_GET_ALL_ABORT

◆ DMA_CHANNEL_IRQ_STATUS_GET_ALL_ERROR

◆ DMA_CHANNEL_IRQ_STATUS_GET_ALL_TC

◆ DMA_CHANNEL_IRQ_STATUS_HALF_TC

◆ DMA_CHANNEL_IRQ_STATUS_TC [1/2]

◆ DMA_CHANNEL_IRQ_STATUS_TC [2/2]

◆ DMA_CHANNEL_PRIORITY_HIGH [1/2]

◆ DMA_CHANNEL_PRIORITY_HIGH [2/2]

◆ DMA_CHANNEL_PRIORITY_LOW [1/2]

◆ DMA_CHANNEL_PRIORITY_LOW [2/2]

◆ DMA_CHANNEL_STATUS_ABORT [1/2]

◆ DMA_CHANNEL_STATUS_ABORT [2/2]

◆ DMA_CHANNEL_STATUS_ERROR [1/2]

◆ DMA_CHANNEL_STATUS_ERROR [2/2]

◆ DMA_CHANNEL_STATUS_HALF_TC

◆ DMA_CHANNEL_STATUS_ONGOING [1/2]

◆ DMA_CHANNEL_STATUS_ONGOING [2/2]

◆ DMA_CHANNEL_STATUS_TC [1/2]

◆ DMA_CHANNEL_STATUS_TC [2/2]

◆ DMA_HANDSHAKE_MODE_HANDSHAKE [1/2]

◆ DMA_HANDSHAKE_MODE_HANDSHAKE [2/2]

◆ DMA_HANDSHAKE_MODE_NORMAL [1/2]

◆ DMA_HANDSHAKE_MODE_NORMAL [2/2]

◆ DMA_HANDSHAKE_OPT_ALL_TRANSIZE

◆ DMA_HANDSHAKE_OPT_ONE_BURST

◆ DMA_INTERRUPT_MASK_ABORT [1/2]

◆ DMA_INTERRUPT_MASK_ABORT [2/2]

◆ DMA_INTERRUPT_MASK_ALL [1/2]

◆ DMA_INTERRUPT_MASK_ALL [2/2]

◆ DMA_INTERRUPT_MASK_ERROR [1/2]

◆ DMA_INTERRUPT_MASK_ERROR [2/2]

◆ DMA_INTERRUPT_MASK_HALF_TC

◆ DMA_INTERRUPT_MASK_NONE [1/2]

◆ DMA_INTERRUPT_MASK_NONE [2/2]

◆ DMA_INTERRUPT_MASK_TERMINAL_COUNT [1/2]

◆ DMA_INTERRUPT_MASK_TERMINAL_COUNT [2/2]

◆ DMA_NUM_TRANSFER_PER_BURST_1024T [1/2]

◆ DMA_NUM_TRANSFER_PER_BURST_1024T [2/2]

◆ DMA_NUM_TRANSFER_PER_BURST_128T [1/2]

◆ DMA_NUM_TRANSFER_PER_BURST_128T [2/2]

◆ DMA_NUM_TRANSFER_PER_BURST_16T [1/2]

◆ DMA_NUM_TRANSFER_PER_BURST_16T [2/2]

◆ DMA_NUM_TRANSFER_PER_BURST_1T [1/2]

◆ DMA_NUM_TRANSFER_PER_BURST_1T [2/2]

◆ DMA_NUM_TRANSFER_PER_BURST_256T [1/2]

◆ DMA_NUM_TRANSFER_PER_BURST_256T [2/2]

◆ DMA_NUM_TRANSFER_PER_BURST_2T [1/2]

◆ DMA_NUM_TRANSFER_PER_BURST_2T [2/2]

◆ DMA_NUM_TRANSFER_PER_BURST_32T [1/2]

◆ DMA_NUM_TRANSFER_PER_BURST_32T [2/2]

◆ DMA_NUM_TRANSFER_PER_BURST_4T [1/2]

◆ DMA_NUM_TRANSFER_PER_BURST_4T [2/2]

◆ DMA_NUM_TRANSFER_PER_BURST_512T [1/2]

◆ DMA_NUM_TRANSFER_PER_BURST_512T [2/2]

◆ DMA_NUM_TRANSFER_PER_BURST_64T [1/2]

◆ DMA_NUM_TRANSFER_PER_BURST_64T [2/2]