HPM SDK
HPMicro Software Development Kit
Macros | Functions
L1CACHE driver APIs

L1CACHE driver APIs. More...

Macros

#define HPM_MCACHE_CTL_IC_EN_SHIFT   (0UL)
 
#define HPM_MCACHE_CTL_IC_EN_MASK   (1UL << HPM_MCACHE_CTL_IC_EN_SHIFT)
 
#define HPM_MCACHE_CTL_IC_EN(x)    (uint32_t)(((x) << HPM_MCACHE_CTL_IC_EN_SHIFT) & HPM_MCACHE_CTL_IC_EN_MASK)
 
#define HPM_MCACHE_CTL_DC_EN_SHIFT   (1UL)
 
#define HPM_MCACHE_CTL_DC_EN_MASK   (1UL << HPM_MCACHE_CTL_DC_EN_SHIFT)
 
#define HPM_MCACHE_CTL_DC_EN(x)    (uint32_t)(((x) << HPM_MCACHE_CTL_DC_EN_SHIFT) & HPM_MCACHE_CTL_DC_EN_MASK)
 
#define HPM_MCACHE_CTL_IC_ECCEN_SHIFT   (2UL)
 
#define HPM_MCACHE_CTL_IC_ECCEN_MASK   (0x3UL << HPM_MCACHE_CTL_IC_ECCEN_SHIFT)
 
#define HPM_MCACHE_CTL_IC_ECCEN(x)    (uint32_t)(((x) << HPM_MCACHE_CTL_IC_ECCEN_SHIFT) & HPM_MCACHE_CTL_IC_ECCEN_MASK)
 
#define HPM_MCACHE_CTL_DC_ECCEN_SHIFT   (4UL)
 
#define HPM_MCACHE_CTL_DC_ECCEN_MASK   (0x3UL << HPM_MCACHE_CTL_DC_ECCEN_SHIFT)
 
#define HPM_MCACHE_CTL_DC_ECCEN(x)    (uint32_t)(((x) << HPM_MCACHE_CTL_DC_ECCEN_SHIFT) & HPM_MCACHE_CTL_DC_ECCEN_MASK)
 
#define HPM_MCACHE_CTL_IC_RWECC_SHIFT   (6UL)
 
#define HPM_MCACHE_CTL_IC_RWECC_MASK   (0x1UL << HPM_MCACHE_CTL_IC_RWECC_SHIFT)
 
#define HPM_MCACHE_CTL_IC_RWECC(x)    (uint32_t)(((x) << HPM_MCACHE_CTL_IC_RWECC_SHIFT) & HPM_MCACHE_CTL_IC_RWECC_MASK)
 
#define HPM_MCACHE_CTL_DC_RWECC_SHIFT   (7UL)
 
#define HPM_MCACHE_CTL_DC_RWECC_MASK   (0x1UL << HPM_MCACHE_CTL_DC_RWECC_SHIFT)
 
#define HPM_MCACHE_CTL_DC_RWECC(x)    (uint32_t)(((x) << HPM_MCACHE_CTL_DC_RWECC_SHIFT) & HPM_MCACHE_CTL_DC_RWECC_MASK)
 
#define HPM_MCACHE_CTL_CCTL_SUEN_SHIFT   (8UL)
 
#define HPM_MCACHE_CTL_CCTL_SUEN_MASK   (0x1UL << HPM_MCACHE_CTL_CCTL_SUEN_SHIFT)
 
#define HPM_MCACHE_CTL_CCTL_SUEN(x)    (uint32_t)(((x) << HPM_MCACHE_CTL_CCTL_SUEN_SHIFT) & HPM_MCACHE_CTL_CCTL_SUEN_MASK)
 
#define HPM_MCACHE_CTL_IPREF_EN_SHIFT   (9UL)
 
#define HPM_MCACHE_CTL_IPREF_EN_MASK   (0x1UL << HPM_MCACHE_CTL_IPREF_EN_SHIFT)
 
#define HPM_MCACHE_CTL_IPREF_EN(x)    (uint32_t)(((x) << HPM_MCACHE_CTL_IPREF_EN_SHIFT) & HPM_MCACHE_CTL_IPREF_EN_MASK)
 
#define HPM_MCACHE_CTL_DPREF_EN_SHIFT   (10UL)
 
#define HPM_MCACHE_CTL_DPREF_EN_MASK   (0x1UL << HPM_MCACHE_CTL_DPREF_EN_SHIFT)
 
#define HPM_MCACHE_CTL_DPREF_EN(x)    (uint32_t)(((x) << HPM_MCACHE_CTL_DPREF_EN_SHIFT) & HPM_MCACHE_CTL_DPREF_EN_MASK)
 
#define HPM_MCACHE_CTL_IC_FIRST_WORD_SHIFT   (11UL)
 
#define HPM_MCACHE_CTL_IC_FIRST_WORD_MASK   (0x1UL << HPM_MCACHE_CTL_IC_FIRST_WORD_SHIFT)
 
#define HPM_MCACHE_CTL_IC_FIRST_WORD(x)    (uint32_t)(((x) << HPM_MCACHE_CTL_IC_FIRST_WORD_SHIFT) & HPM_MCACHE_CTL_IC_FIRST_WORD_MASK)
 
#define HPM_MCACHE_CTL_DC_FIRST_WORD_SHIFT   (12UL)
 
#define HPM_MCACHE_CTL_DC_FIRST_WORD_MASK   (0x1UL << HPM_MCACHE_CTL_DC_FIRST_WORD_SHIFT)
 
#define HPM_MCACHE_CTL_DC_FIRST_WORD(x)    (uint32_t)(((x) << HPM_MCACHE_CTL_DC_FIRST_WORD_SHIFT) & HPM_MCACHE_CTL_DC_FIRST_WORD_MASK)
 
#define HPM_MCACHE_CTL_DC_WAROUND_SHIFT   (13UL)
 
#define HPM_MCACHE_CTL_DC_WAROUND_MASK   (0x3UL << HPM_MCACHE_CTL_DC_WAROUND_SHIFT)
 
#define HPM_MCACHE_CTL_DC_WAROUND(x)    (uint32_t)(((x) << HPM_MCACHE_CTL_DC_WAROUND_SHIFT) & HPM_MCACHE_CTL_DC_WAROUND_MASK)
 
#define HPM_L1C_CCTL_CMD_L1D_VA_INVAL   (0UL)
 
#define HPM_L1C_CCTL_CMD_L1D_VA_WB   (1UL)
 
#define HPM_L1C_CCTL_CMD_L1D_VA_WBINVAL   (2UL)
 
#define HPM_L1C_CCTL_CMD_L1D_VA_LOCK   (3UL)
 
#define HPM_L1C_CCTL_CMD_L1D_VA_UNLOCK   (4UL)
 
#define HPM_L1C_CCTL_CMD_L1D_WBINVAL_ALL   (6UL)
 
#define HPM_L1C_CCTL_CMD_L1D_WB_ALL   (7UL)
 
#define HPM_L1C_CCTL_CMD_L1I_VA_INVAL   (8UL)
 
#define HPM_L1C_CCTL_CMD_L1I_VA_LOCK   (11UL)
 
#define HPM_L1C_CCTL_CMD_L1I_VA_UNLOCK   (12UL)
 
#define HPM_L1C_CCTL_CMD_L1D_IX_INVAL   (16UL)
 
#define HPM_L1C_CCTL_CMD_L1D_IX_WB   (17UL)
 
#define HPM_L1C_CCTL_CMD_L1D_IX_WBINVAL   (18UL)
 
#define HPM_L1C_CCTL_CMD_L1D_IX_RTAG   (19UL)
 
#define HPM_L1C_CCTL_CMD_L1D_IX_RDATA   (20UL)
 
#define HPM_L1C_CCTL_CMD_L1D_IX_WTAG   (21UL)
 
#define HPM_L1C_CCTL_CMD_L1D_IX_WDATA   (22UL)
 
#define HPM_L1C_CCTL_CMD_L1D_INVAL_ALL   (23UL)
 
#define HPM_L1C_CCTL_CMD_L1I_IX_INVAL   (24UL)
 
#define HPM_L1C_CCTL_CMD_L1I_IX_RTAG   (27UL)
 
#define HPM_L1C_CCTL_CMD_L1I_IX_RDATA   (28UL)
 
#define HPM_L1C_CCTL_CMD_L1I_IX_WTAG   (29UL)
 
#define HPM_L1C_CCTL_CMD_L1I_IX_WDATA   (30UL)
 
#define HPM_L1C_CCTL_CMD_SUCCESS   (1UL)
 
#define HPM_L1C_CCTL_CMD_FAIL   (0UL)
 
#define HPM_MCCTLBEGINADDR_OFFSET_SHIFT   (2UL)
 
#define HPM_MCCTLBEGINADDR_OFFSET_MASK   ((uint32_t) 0xF << HPM_MCCTLBEGINADDR_OFFSET_SHIFT)
 
#define HPM_MCCTLBEGINADDR_OFFSET(x)    (uint32_t)(((x) << HPM_MCCTLBEGINADDR_OFFSET_SHIFT) & HPM_MCCTLBEGINADDR_OFFSET_MASK)
 
#define HPM_MCCTLBEGINADDR_INDEX_SHIFT   (6UL)
 
#define HPM_MCCTLBEGINADDR_INDEX_MASK   ((uint32_t) 0x3F << HPM_MCCTLBEGINADDR_INDEX_SHIFT)
 
#define HPM_MCCTLBEGINADDR_INDEX(x)    (uint32_t)(((x) << HPM_MCCTLBEGINADDR_INDEX_SHIFT) & HPM_MCCTLBEGINADDR_INDEX_MASK)
 
#define HPM_MCCTLBEGINADDR_WAY_SHIFT   (13UL)
 
#define HPM_MCCTLBEGINADDR_WAY_MASK   ((uint32_t) 0x3 << HPM_MCCTLBEGINADDR_WAY_SHIFT)
 
#define HPM_MCCTLBEGINADDR_WAY(x)    (uint32_t)(((x) << HPM_MCCTLBEGINADDR_WAY_SHIFT) & HPM_MCCTLBEGINADDR_WAY_MASK)
 
#define HPM_MCCTLDATA_I_TAG_ADDRESS_SHIFT   (2UL)
 
#define HPM_MCCTLDATA_I_TAG_ADDRESS_MASK   (uint32_t)(0XFFFFF << HPM_MCCTLDATA_I_TAG_ADDRESS_SHIFT)
 
#define HPM_MCCTLDATA_I_TAG_ADDRESS(x)    (uint32_t)(((x) << HPM_MCCTLDATA_I_TAG_ADDRESS_SHIFT) & HPM_MCCTLDATA_I_TAG_ADDRESS_MASK)
 
#define HPM_MCCTLDATA_I_TAG_LOCK_DUP_SHIFT   (29UL)
 
#define HPM_MCCTLDATA_I_TAG_LOCK_DUP_MASK   (uint32_t)(1 << HPM_MCCTLDATA_I_TAG_LOCK_DUP_SHIFT)
 
#define HPM_MCCTLDATA_I_TAG_LOCK_DUP(x)    (uint32_t)(((x) << HPM_MCCTLDATA_I_TAG_LOCK_DUP_SHIFT) & HPM_MCCTLDATA_I_TAG_LOCK_DUP_MASK)
 
#define HPM_MCCTLDATA_I_TAG_LOCK_SHIFT   (30UL)
 
#define HPM_MCCTLDATA_I_TAG_LOCK_MASK   (uint32_t)(1 << HPM_MCCTLDATA_I_TAG_LOCK_SHIFT)
 
#define HPM_MCCTLDATA_I_TAG_LOCK(x)    (uint32_t)(((x) << HPM_MCCTLDATA_I_TAG_LOCK_SHIFT) & HPM_MCCTLDATA_I_TAG_LOCK_MASK)
 
#define HPM_MCCTLDATA_I_TAG_VALID_SHIFT   (31UL)
 
#define HPM_MCCTLDATA_I_TAG_VALID_MASK   (uint32_t)(1 << HPM_MCCTLDATA_I_TAG_VALID_SHIFT)
 
#define HPM_MCCTLDATA_I_TAG_VALID(x)    (uint32_t)(((x) << HPM_MCCTLDATA_I_TAG_VALID_SHIFT) & HPM_MCCTLDATA_I_TAG_VALID_MASK)
 
#define HPM_MCCTLDATA_D_TAG_MESI_SHIFT   (0UL)
 
#define HPM_MCCTLDATA_D_TAG_MESI_MASK   (uint32_t)(0x3 << HPM_MCCTLDATA_D_TAG_MESI_SHIFT)
 
#define HPM_MCCTLDATA_D_TAG_MESI(x)    (uint32_t)(((x) << HPM_MCCTLDATA_D_TAG_MESI_SHIFT) & HPM_MCCTLDATA_D_TAG_MESI_MASK)
 
#define HPM_MCCTLDATA_D_TAG_LOCK_SHIFT   (3UL)
 
#define HPM_MCCTLDATA_D_TAG_LOCK_MASK   (uint32_t)(0x1 << HPM_MCCTLDATA_D_TAG_LOCK_SHIFT)
 
#define HPM_MCCTLDATA_D_TAG_LOCK(x)    (uint32_t)(((x) << HPM_MCCTLDATA_D_TAG_LOCK_SHIFT) & HPM_MCCTLDATA_D_TAG_LOCK_MASK)
 
#define HPM_MCCTLDATA_D_TAG_TAG_SHIFT   (4UL)
 
#define HPM_MCCTLDATA_D_TAG_TAG_MASK   (uint32_t)(0xFFFF << HPM_MCCTLDATA_D_TAG_LOCK_SHIFT)
 
#define HPM_MCCTLDATA_D_TAG_TAG(x)    (uint32_t)(((x) << HPM_MCCTLDATA_D_TAG_TAG_SHIFT) & HPM_MCCTLDATA_D_TAG_TAG_MASK)
 
#define HPM_L1C_CFG_SET_SHIFT   (0UL)
 
#define HPM_L1C_CFG_SET_MASK   (uint32_t)(0x7 << HPM_L1C_CFG_SET_SHIFT)
 
#define HPM_L1C_CFG_WAY_SHIFT   (3UL)
 
#define HPM_L1C_CFG_WAY_MASK   (uint32_t)(0x7 << HPM_L1C_CFG_WAY_SHIFT)
 
#define HPM_L1C_CFG_SIZE_SHIFT   (6UL)
 
#define HPM_L1C_CFG_SIZE_MASK   (uint32_t)(0x7 << HPM_L1C_CFG_SIZE_SHIFT)
 
#define HPM_L1C_CFG_LOCK_SHIFT   (9UL)
 
#define HPM_L1C_CFG_LOCK_MASK   (uint32_t)(0x1 << HPM_L1C_CFG_LOCK_SHIFT)
 
#define HPM_L1C_CFG_ECC_SHIFT   (10UL)
 
#define HPM_L1C_CFG_ECC_MASK   (uint32_t)(0x3 << HPM_L1C_CFG_ECC_SHIFT)
 
#define HPM_L1C_CFG_LMB_SHIFT   (12UL)
 
#define HPM_L1C_CFG_LMB_MASK   (uint32_t)(0x7 << HPM_L1C_CFG_LMB_SHIFT)
 
#define HPM_L1C_CFG_LM_SIZE_SHIFT   (15UL)
 
#define HPM_L1C_CFG_LM_SIZE_MASK   (uint32_t)(0x1F << HPM_L1C_CFG_LM_SIZE_SHIFT)
 
#define HPM_L1C_CFG_LM_ECC_SHIFT   (21UL)
 
#define HPM_L1C_CFG_LM_ECC_MASK   (uint32_t)(0x3 << HPM_L1C_CFG_LM_ECC_SHIFT)
 
#define HPM_L1C_CFG_SETH_SHIFT   (24UL)
 
#define HPM_L1C_CFG_SETH_MASK   (uint32_t)(0x1 << HPM_L1C_CFG_SETH_SHIFT)
 

Functions

static ATTR_ALWAYS_INLINE uint32_t l1c_get_control (void)
 
static ATTR_ALWAYS_INLINE bool l1c_dc_is_enabled (void)
 
static ATTR_ALWAYS_INLINE bool l1c_ic_is_enabled (void)
 
static ATTR_ALWAYS_INLINE void l1c_cctl_address (uint32_t address)
 
static ATTR_ALWAYS_INLINE void l1c_cctl_cmd (uint8_t cmd)
 
static ATTR_ALWAYS_INLINE uint32_t l1c_cctl_get_address (void)
 
static ATTR_ALWAYS_INLINE void l1c_cctl_address_cmd (uint8_t cmd, uint32_t address)
 
static ATTR_ALWAYS_INLINE uint32_t l1c_cctl_get_data (void)
 
static ATTR_ALWAYS_INLINE void l1c_cctl_data (uint32_t data)
 
static ATTR_ALWAYS_INLINE uint32_t l1c_ic_get_config (void)
 Get I-cache configuration. More...
 
static ATTR_ALWAYS_INLINE uint32_t l1c_dc_get_config (void)
 Get D-cache configuration. More...
 
void l1c_dc_disable (void)
 
void l1c_dc_enable (void)
 
void l1c_dc_invalidate (uint32_t address, uint32_t size)
 
void l1c_dc_writeback (uint32_t address, uint32_t size)
 
void l1c_dc_flush (uint32_t address, uint32_t size)
 
void l1c_dc_fill_lock (uint32_t address, uint32_t size)
 
void l1c_dc_unlock (uint32_t address, uint32_t size)
 
void l1c_ic_disable (void)
 
void l1c_ic_enable (void)
 
void l1c_ic_invalidate (uint32_t address, uint32_t size)
 
void l1c_ic_fill_lock (uint32_t address, uint32_t size)
 
void l1c_ic_unlock (uint32_t address, uint32_t size)
 
void l1c_fence_i (void)
 
void l1c_dc_invalidate_all (void)
 
void l1c_dc_writeback_all (void)
 
void l1c_dc_flush_all (void)
 
void l1c_dc_enable_writearound (void)
 
void l1c_dc_disable_writearound (void)
 

Detailed Description

L1CACHE driver APIs.

Macro Definition Documentation

◆ HPM_L1C_CCTL_CMD_FAIL

#define HPM_L1C_CCTL_CMD_FAIL   (0UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_L1C_CCTL_CMD_L1D_INVAL_ALL

#define HPM_L1C_CCTL_CMD_L1D_INVAL_ALL   (23UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_L1C_CCTL_CMD_L1D_IX_INVAL

#define HPM_L1C_CCTL_CMD_L1D_IX_INVAL   (16UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_L1C_CCTL_CMD_L1D_IX_RDATA

#define HPM_L1C_CCTL_CMD_L1D_IX_RDATA   (20UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_L1C_CCTL_CMD_L1D_IX_RTAG

#define HPM_L1C_CCTL_CMD_L1D_IX_RTAG   (19UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_L1C_CCTL_CMD_L1D_IX_WB

#define HPM_L1C_CCTL_CMD_L1D_IX_WB   (17UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_L1C_CCTL_CMD_L1D_IX_WBINVAL

#define HPM_L1C_CCTL_CMD_L1D_IX_WBINVAL   (18UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_L1C_CCTL_CMD_L1D_IX_WDATA

#define HPM_L1C_CCTL_CMD_L1D_IX_WDATA   (22UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_L1C_CCTL_CMD_L1D_IX_WTAG

#define HPM_L1C_CCTL_CMD_L1D_IX_WTAG   (21UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_L1C_CCTL_CMD_L1D_VA_INVAL

#define HPM_L1C_CCTL_CMD_L1D_VA_INVAL   (0UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_L1C_CCTL_CMD_L1D_VA_LOCK

#define HPM_L1C_CCTL_CMD_L1D_VA_LOCK   (3UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_L1C_CCTL_CMD_L1D_VA_UNLOCK

#define HPM_L1C_CCTL_CMD_L1D_VA_UNLOCK   (4UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_L1C_CCTL_CMD_L1D_VA_WB

#define HPM_L1C_CCTL_CMD_L1D_VA_WB   (1UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_L1C_CCTL_CMD_L1D_VA_WBINVAL

#define HPM_L1C_CCTL_CMD_L1D_VA_WBINVAL   (2UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_L1C_CCTL_CMD_L1D_WB_ALL

#define HPM_L1C_CCTL_CMD_L1D_WB_ALL   (7UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_L1C_CCTL_CMD_L1D_WBINVAL_ALL

#define HPM_L1C_CCTL_CMD_L1D_WBINVAL_ALL   (6UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_L1C_CCTL_CMD_L1I_IX_INVAL

#define HPM_L1C_CCTL_CMD_L1I_IX_INVAL   (24UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_L1C_CCTL_CMD_L1I_IX_RDATA

#define HPM_L1C_CCTL_CMD_L1I_IX_RDATA   (28UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_L1C_CCTL_CMD_L1I_IX_RTAG

#define HPM_L1C_CCTL_CMD_L1I_IX_RTAG   (27UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_L1C_CCTL_CMD_L1I_IX_WDATA

#define HPM_L1C_CCTL_CMD_L1I_IX_WDATA   (30UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_L1C_CCTL_CMD_L1I_IX_WTAG

#define HPM_L1C_CCTL_CMD_L1I_IX_WTAG   (29UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_L1C_CCTL_CMD_L1I_VA_INVAL

#define HPM_L1C_CCTL_CMD_L1I_VA_INVAL   (8UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_L1C_CCTL_CMD_L1I_VA_LOCK

#define HPM_L1C_CCTL_CMD_L1I_VA_LOCK   (11UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_L1C_CCTL_CMD_L1I_VA_UNLOCK

#define HPM_L1C_CCTL_CMD_L1I_VA_UNLOCK   (12UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_L1C_CCTL_CMD_SUCCESS

#define HPM_L1C_CCTL_CMD_SUCCESS   (1UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_L1C_CFG_ECC_MASK

#define HPM_L1C_CFG_ECC_MASK   (uint32_t)(0x3 << HPM_L1C_CFG_ECC_SHIFT)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_L1C_CFG_ECC_SHIFT

#define HPM_L1C_CFG_ECC_SHIFT   (10UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_L1C_CFG_LM_ECC_MASK

#define HPM_L1C_CFG_LM_ECC_MASK   (uint32_t)(0x3 << HPM_L1C_CFG_LM_ECC_SHIFT)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_L1C_CFG_LM_ECC_SHIFT

#define HPM_L1C_CFG_LM_ECC_SHIFT   (21UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_L1C_CFG_LM_SIZE_MASK

#define HPM_L1C_CFG_LM_SIZE_MASK   (uint32_t)(0x1F << HPM_L1C_CFG_LM_SIZE_SHIFT)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_L1C_CFG_LM_SIZE_SHIFT

#define HPM_L1C_CFG_LM_SIZE_SHIFT   (15UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_L1C_CFG_LMB_MASK

#define HPM_L1C_CFG_LMB_MASK   (uint32_t)(0x7 << HPM_L1C_CFG_LMB_SHIFT)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_L1C_CFG_LMB_SHIFT

#define HPM_L1C_CFG_LMB_SHIFT   (12UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_L1C_CFG_LOCK_MASK

#define HPM_L1C_CFG_LOCK_MASK   (uint32_t)(0x1 << HPM_L1C_CFG_LOCK_SHIFT)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_L1C_CFG_LOCK_SHIFT

#define HPM_L1C_CFG_LOCK_SHIFT   (9UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_L1C_CFG_SET_MASK

#define HPM_L1C_CFG_SET_MASK   (uint32_t)(0x7 << HPM_L1C_CFG_SET_SHIFT)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_L1C_CFG_SET_SHIFT

#define HPM_L1C_CFG_SET_SHIFT   (0UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_L1C_CFG_SETH_MASK

#define HPM_L1C_CFG_SETH_MASK   (uint32_t)(0x1 << HPM_L1C_CFG_SETH_SHIFT)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_L1C_CFG_SETH_SHIFT

#define HPM_L1C_CFG_SETH_SHIFT   (24UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_L1C_CFG_SIZE_MASK

#define HPM_L1C_CFG_SIZE_MASK   (uint32_t)(0x7 << HPM_L1C_CFG_SIZE_SHIFT)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_L1C_CFG_SIZE_SHIFT

#define HPM_L1C_CFG_SIZE_SHIFT   (6UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_L1C_CFG_WAY_MASK

#define HPM_L1C_CFG_WAY_MASK   (uint32_t)(0x7 << HPM_L1C_CFG_WAY_SHIFT)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_L1C_CFG_WAY_SHIFT

#define HPM_L1C_CFG_WAY_SHIFT   (3UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCACHE_CTL_CCTL_SUEN

#define HPM_MCACHE_CTL_CCTL_SUEN (   x)     (uint32_t)(((x) << HPM_MCACHE_CTL_CCTL_SUEN_SHIFT) & HPM_MCACHE_CTL_CCTL_SUEN_MASK)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCACHE_CTL_CCTL_SUEN_MASK

#define HPM_MCACHE_CTL_CCTL_SUEN_MASK   (0x1UL << HPM_MCACHE_CTL_CCTL_SUEN_SHIFT)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCACHE_CTL_CCTL_SUEN_SHIFT

#define HPM_MCACHE_CTL_CCTL_SUEN_SHIFT   (8UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCACHE_CTL_DC_ECCEN

#define HPM_MCACHE_CTL_DC_ECCEN (   x)     (uint32_t)(((x) << HPM_MCACHE_CTL_DC_ECCEN_SHIFT) & HPM_MCACHE_CTL_DC_ECCEN_MASK)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCACHE_CTL_DC_ECCEN_MASK

#define HPM_MCACHE_CTL_DC_ECCEN_MASK   (0x3UL << HPM_MCACHE_CTL_DC_ECCEN_SHIFT)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCACHE_CTL_DC_ECCEN_SHIFT

#define HPM_MCACHE_CTL_DC_ECCEN_SHIFT   (4UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCACHE_CTL_DC_EN

#define HPM_MCACHE_CTL_DC_EN (   x)     (uint32_t)(((x) << HPM_MCACHE_CTL_DC_EN_SHIFT) & HPM_MCACHE_CTL_DC_EN_MASK)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCACHE_CTL_DC_EN_MASK

#define HPM_MCACHE_CTL_DC_EN_MASK   (1UL << HPM_MCACHE_CTL_DC_EN_SHIFT)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCACHE_CTL_DC_EN_SHIFT

#define HPM_MCACHE_CTL_DC_EN_SHIFT   (1UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCACHE_CTL_DC_FIRST_WORD

#define HPM_MCACHE_CTL_DC_FIRST_WORD (   x)     (uint32_t)(((x) << HPM_MCACHE_CTL_DC_FIRST_WORD_SHIFT) & HPM_MCACHE_CTL_DC_FIRST_WORD_MASK)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCACHE_CTL_DC_FIRST_WORD_MASK

#define HPM_MCACHE_CTL_DC_FIRST_WORD_MASK   (0x1UL << HPM_MCACHE_CTL_DC_FIRST_WORD_SHIFT)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCACHE_CTL_DC_FIRST_WORD_SHIFT

#define HPM_MCACHE_CTL_DC_FIRST_WORD_SHIFT   (12UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCACHE_CTL_DC_RWECC

#define HPM_MCACHE_CTL_DC_RWECC (   x)     (uint32_t)(((x) << HPM_MCACHE_CTL_DC_RWECC_SHIFT) & HPM_MCACHE_CTL_DC_RWECC_MASK)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCACHE_CTL_DC_RWECC_MASK

#define HPM_MCACHE_CTL_DC_RWECC_MASK   (0x1UL << HPM_MCACHE_CTL_DC_RWECC_SHIFT)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCACHE_CTL_DC_RWECC_SHIFT

#define HPM_MCACHE_CTL_DC_RWECC_SHIFT   (7UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCACHE_CTL_DC_WAROUND

#define HPM_MCACHE_CTL_DC_WAROUND (   x)     (uint32_t)(((x) << HPM_MCACHE_CTL_DC_WAROUND_SHIFT) & HPM_MCACHE_CTL_DC_WAROUND_MASK)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCACHE_CTL_DC_WAROUND_MASK

#define HPM_MCACHE_CTL_DC_WAROUND_MASK   (0x3UL << HPM_MCACHE_CTL_DC_WAROUND_SHIFT)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCACHE_CTL_DC_WAROUND_SHIFT

#define HPM_MCACHE_CTL_DC_WAROUND_SHIFT   (13UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCACHE_CTL_DPREF_EN

#define HPM_MCACHE_CTL_DPREF_EN (   x)     (uint32_t)(((x) << HPM_MCACHE_CTL_DPREF_EN_SHIFT) & HPM_MCACHE_CTL_DPREF_EN_MASK)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCACHE_CTL_DPREF_EN_MASK

#define HPM_MCACHE_CTL_DPREF_EN_MASK   (0x1UL << HPM_MCACHE_CTL_DPREF_EN_SHIFT)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCACHE_CTL_DPREF_EN_SHIFT

#define HPM_MCACHE_CTL_DPREF_EN_SHIFT   (10UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCACHE_CTL_IC_ECCEN

#define HPM_MCACHE_CTL_IC_ECCEN (   x)     (uint32_t)(((x) << HPM_MCACHE_CTL_IC_ECCEN_SHIFT) & HPM_MCACHE_CTL_IC_ECCEN_MASK)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCACHE_CTL_IC_ECCEN_MASK

#define HPM_MCACHE_CTL_IC_ECCEN_MASK   (0x3UL << HPM_MCACHE_CTL_IC_ECCEN_SHIFT)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCACHE_CTL_IC_ECCEN_SHIFT

#define HPM_MCACHE_CTL_IC_ECCEN_SHIFT   (2UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCACHE_CTL_IC_EN

#define HPM_MCACHE_CTL_IC_EN (   x)     (uint32_t)(((x) << HPM_MCACHE_CTL_IC_EN_SHIFT) & HPM_MCACHE_CTL_IC_EN_MASK)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCACHE_CTL_IC_EN_MASK

#define HPM_MCACHE_CTL_IC_EN_MASK   (1UL << HPM_MCACHE_CTL_IC_EN_SHIFT)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCACHE_CTL_IC_EN_SHIFT

#define HPM_MCACHE_CTL_IC_EN_SHIFT   (0UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCACHE_CTL_IC_FIRST_WORD

#define HPM_MCACHE_CTL_IC_FIRST_WORD (   x)     (uint32_t)(((x) << HPM_MCACHE_CTL_IC_FIRST_WORD_SHIFT) & HPM_MCACHE_CTL_IC_FIRST_WORD_MASK)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCACHE_CTL_IC_FIRST_WORD_MASK

#define HPM_MCACHE_CTL_IC_FIRST_WORD_MASK   (0x1UL << HPM_MCACHE_CTL_IC_FIRST_WORD_SHIFT)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCACHE_CTL_IC_FIRST_WORD_SHIFT

#define HPM_MCACHE_CTL_IC_FIRST_WORD_SHIFT   (11UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCACHE_CTL_IC_RWECC

#define HPM_MCACHE_CTL_IC_RWECC (   x)     (uint32_t)(((x) << HPM_MCACHE_CTL_IC_RWECC_SHIFT) & HPM_MCACHE_CTL_IC_RWECC_MASK)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCACHE_CTL_IC_RWECC_MASK

#define HPM_MCACHE_CTL_IC_RWECC_MASK   (0x1UL << HPM_MCACHE_CTL_IC_RWECC_SHIFT)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCACHE_CTL_IC_RWECC_SHIFT

#define HPM_MCACHE_CTL_IC_RWECC_SHIFT   (6UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCACHE_CTL_IPREF_EN

#define HPM_MCACHE_CTL_IPREF_EN (   x)     (uint32_t)(((x) << HPM_MCACHE_CTL_IPREF_EN_SHIFT) & HPM_MCACHE_CTL_IPREF_EN_MASK)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCACHE_CTL_IPREF_EN_MASK

#define HPM_MCACHE_CTL_IPREF_EN_MASK   (0x1UL << HPM_MCACHE_CTL_IPREF_EN_SHIFT)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCACHE_CTL_IPREF_EN_SHIFT

#define HPM_MCACHE_CTL_IPREF_EN_SHIFT   (9UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCCTLBEGINADDR_INDEX

#define HPM_MCCTLBEGINADDR_INDEX (   x)     (uint32_t)(((x) << HPM_MCCTLBEGINADDR_INDEX_SHIFT) & HPM_MCCTLBEGINADDR_INDEX_MASK)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCCTLBEGINADDR_INDEX_MASK

#define HPM_MCCTLBEGINADDR_INDEX_MASK   ((uint32_t) 0x3F << HPM_MCCTLBEGINADDR_INDEX_SHIFT)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCCTLBEGINADDR_INDEX_SHIFT

#define HPM_MCCTLBEGINADDR_INDEX_SHIFT   (6UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCCTLBEGINADDR_OFFSET

#define HPM_MCCTLBEGINADDR_OFFSET (   x)     (uint32_t)(((x) << HPM_MCCTLBEGINADDR_OFFSET_SHIFT) & HPM_MCCTLBEGINADDR_OFFSET_MASK)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCCTLBEGINADDR_OFFSET_MASK

#define HPM_MCCTLBEGINADDR_OFFSET_MASK   ((uint32_t) 0xF << HPM_MCCTLBEGINADDR_OFFSET_SHIFT)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCCTLBEGINADDR_OFFSET_SHIFT

#define HPM_MCCTLBEGINADDR_OFFSET_SHIFT   (2UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCCTLBEGINADDR_WAY

#define HPM_MCCTLBEGINADDR_WAY (   x)     (uint32_t)(((x) << HPM_MCCTLBEGINADDR_WAY_SHIFT) & HPM_MCCTLBEGINADDR_WAY_MASK)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCCTLBEGINADDR_WAY_MASK

#define HPM_MCCTLBEGINADDR_WAY_MASK   ((uint32_t) 0x3 << HPM_MCCTLBEGINADDR_WAY_SHIFT)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCCTLBEGINADDR_WAY_SHIFT

#define HPM_MCCTLBEGINADDR_WAY_SHIFT   (13UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCCTLDATA_D_TAG_LOCK

#define HPM_MCCTLDATA_D_TAG_LOCK (   x)     (uint32_t)(((x) << HPM_MCCTLDATA_D_TAG_LOCK_SHIFT) & HPM_MCCTLDATA_D_TAG_LOCK_MASK)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCCTLDATA_D_TAG_LOCK_MASK

#define HPM_MCCTLDATA_D_TAG_LOCK_MASK   (uint32_t)(0x1 << HPM_MCCTLDATA_D_TAG_LOCK_SHIFT)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCCTLDATA_D_TAG_LOCK_SHIFT

#define HPM_MCCTLDATA_D_TAG_LOCK_SHIFT   (3UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCCTLDATA_D_TAG_MESI

#define HPM_MCCTLDATA_D_TAG_MESI (   x)     (uint32_t)(((x) << HPM_MCCTLDATA_D_TAG_MESI_SHIFT) & HPM_MCCTLDATA_D_TAG_MESI_MASK)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCCTLDATA_D_TAG_MESI_MASK

#define HPM_MCCTLDATA_D_TAG_MESI_MASK   (uint32_t)(0x3 << HPM_MCCTLDATA_D_TAG_MESI_SHIFT)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCCTLDATA_D_TAG_MESI_SHIFT

#define HPM_MCCTLDATA_D_TAG_MESI_SHIFT   (0UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCCTLDATA_D_TAG_TAG

#define HPM_MCCTLDATA_D_TAG_TAG (   x)     (uint32_t)(((x) << HPM_MCCTLDATA_D_TAG_TAG_SHIFT) & HPM_MCCTLDATA_D_TAG_TAG_MASK)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCCTLDATA_D_TAG_TAG_MASK

#define HPM_MCCTLDATA_D_TAG_TAG_MASK   (uint32_t)(0xFFFF << HPM_MCCTLDATA_D_TAG_LOCK_SHIFT)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCCTLDATA_D_TAG_TAG_SHIFT

#define HPM_MCCTLDATA_D_TAG_TAG_SHIFT   (4UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCCTLDATA_I_TAG_ADDRESS

#define HPM_MCCTLDATA_I_TAG_ADDRESS (   x)     (uint32_t)(((x) << HPM_MCCTLDATA_I_TAG_ADDRESS_SHIFT) & HPM_MCCTLDATA_I_TAG_ADDRESS_MASK)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCCTLDATA_I_TAG_ADDRESS_MASK

#define HPM_MCCTLDATA_I_TAG_ADDRESS_MASK   (uint32_t)(0XFFFFF << HPM_MCCTLDATA_I_TAG_ADDRESS_SHIFT)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCCTLDATA_I_TAG_ADDRESS_SHIFT

#define HPM_MCCTLDATA_I_TAG_ADDRESS_SHIFT   (2UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCCTLDATA_I_TAG_LOCK

#define HPM_MCCTLDATA_I_TAG_LOCK (   x)     (uint32_t)(((x) << HPM_MCCTLDATA_I_TAG_LOCK_SHIFT) & HPM_MCCTLDATA_I_TAG_LOCK_MASK)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCCTLDATA_I_TAG_LOCK_DUP

#define HPM_MCCTLDATA_I_TAG_LOCK_DUP (   x)     (uint32_t)(((x) << HPM_MCCTLDATA_I_TAG_LOCK_DUP_SHIFT) & HPM_MCCTLDATA_I_TAG_LOCK_DUP_MASK)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCCTLDATA_I_TAG_LOCK_DUP_MASK

#define HPM_MCCTLDATA_I_TAG_LOCK_DUP_MASK   (uint32_t)(1 << HPM_MCCTLDATA_I_TAG_LOCK_DUP_SHIFT)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCCTLDATA_I_TAG_LOCK_DUP_SHIFT

#define HPM_MCCTLDATA_I_TAG_LOCK_DUP_SHIFT   (29UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCCTLDATA_I_TAG_LOCK_MASK

#define HPM_MCCTLDATA_I_TAG_LOCK_MASK   (uint32_t)(1 << HPM_MCCTLDATA_I_TAG_LOCK_SHIFT)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCCTLDATA_I_TAG_LOCK_SHIFT

#define HPM_MCCTLDATA_I_TAG_LOCK_SHIFT   (30UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCCTLDATA_I_TAG_VALID

#define HPM_MCCTLDATA_I_TAG_VALID (   x)     (uint32_t)(((x) << HPM_MCCTLDATA_I_TAG_VALID_SHIFT) & HPM_MCCTLDATA_I_TAG_VALID_MASK)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCCTLDATA_I_TAG_VALID_MASK

#define HPM_MCCTLDATA_I_TAG_VALID_MASK   (uint32_t)(1 << HPM_MCCTLDATA_I_TAG_VALID_SHIFT)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ HPM_MCCTLDATA_I_TAG_VALID_SHIFT

#define HPM_MCCTLDATA_I_TAG_VALID_SHIFT   (31UL)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

Function Documentation

◆ l1c_cctl_address()

static ATTR_ALWAYS_INLINE void l1c_cctl_address ( uint32_t  address)
inlinestatic

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ l1c_cctl_address_cmd()

static ATTR_ALWAYS_INLINE void l1c_cctl_address_cmd ( uint8_t  cmd,
uint32_t  address 
)
inlinestatic

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ l1c_cctl_cmd()

static ATTR_ALWAYS_INLINE void l1c_cctl_cmd ( uint8_t  cmd)
inlinestatic

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ l1c_cctl_data()

static ATTR_ALWAYS_INLINE void l1c_cctl_data ( uint32_t  data)
inlinestatic

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ l1c_cctl_get_address()

static ATTR_ALWAYS_INLINE uint32_t l1c_cctl_get_address ( void  )
inlinestatic

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ l1c_cctl_get_data()

static ATTR_ALWAYS_INLINE uint32_t l1c_cctl_get_data ( void  )
inlinestatic

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ l1c_dc_disable()

void l1c_dc_disable ( void  )

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ l1c_dc_disable_writearound()

void l1c_dc_disable_writearound ( void  )

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ l1c_dc_enable()

void l1c_dc_enable ( void  )

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ l1c_dc_enable_writearound()

void l1c_dc_enable_writearound ( void  )

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ l1c_dc_fill_lock()

void l1c_dc_fill_lock ( uint32_t  address,
uint32_t  size 
)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ l1c_dc_flush()

void l1c_dc_flush ( uint32_t  address,
uint32_t  size 
)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ l1c_dc_flush_all()

void l1c_dc_flush_all ( void  )

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ l1c_dc_get_config()

static ATTR_ALWAYS_INLINE uint32_t l1c_dc_get_config ( void  )
inlinestatic

#include <arch/riscv/l1c/hpm_l1c_drv.h>

Get D-cache configuration.

Returns
D-cache config register

◆ l1c_dc_invalidate()

void l1c_dc_invalidate ( uint32_t  address,
uint32_t  size 
)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ l1c_dc_invalidate_all()

void l1c_dc_invalidate_all ( void  )

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ l1c_dc_is_enabled()

static ATTR_ALWAYS_INLINE bool l1c_dc_is_enabled ( void  )
inlinestatic

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ l1c_dc_unlock()

void l1c_dc_unlock ( uint32_t  address,
uint32_t  size 
)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ l1c_dc_writeback()

void l1c_dc_writeback ( uint32_t  address,
uint32_t  size 
)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ l1c_dc_writeback_all()

void l1c_dc_writeback_all ( void  )

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ l1c_fence_i()

void l1c_fence_i ( void  )

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ l1c_get_control()

static ATTR_ALWAYS_INLINE uint32_t l1c_get_control ( void  )
inlinestatic

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ l1c_ic_disable()

void l1c_ic_disable ( void  )

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ l1c_ic_enable()

void l1c_ic_enable ( void  )

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ l1c_ic_fill_lock()

void l1c_ic_fill_lock ( uint32_t  address,
uint32_t  size 
)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ l1c_ic_get_config()

static ATTR_ALWAYS_INLINE uint32_t l1c_ic_get_config ( void  )
inlinestatic

#include <arch/riscv/l1c/hpm_l1c_drv.h>

Get I-cache configuration.

Returns
I-cache config register

◆ l1c_ic_invalidate()

void l1c_ic_invalidate ( uint32_t  address,
uint32_t  size 
)

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ l1c_ic_is_enabled()

static ATTR_ALWAYS_INLINE bool l1c_ic_is_enabled ( void  )
inlinestatic

#include <arch/riscv/l1c/hpm_l1c_drv.h>

◆ l1c_ic_unlock()

void l1c_ic_unlock ( uint32_t  address,
uint32_t  size 
)

#include <arch/riscv/l1c/hpm_l1c_drv.h>