Data Structures
struct	ESC_Type

Macros
#define	ESC_TYPE_TYPE_MASK (0xFFU)

#define	ESC_TYPE_TYPE_SHIFT (0U)

#define	ESC_TYPE_TYPE_GET(x) (((uint8_t)(x) & ESC_TYPE_TYPE_MASK) >> ESC_TYPE_TYPE_SHIFT)

#define	ESC_REVISION_X_MASK (0xFFU)

#define	ESC_REVISION_X_SHIFT (0U)

#define	ESC_REVISION_X_GET(x) (((uint8_t)(x) & ESC_REVISION_X_MASK) >> ESC_REVISION_X_SHIFT)

#define	ESC_BUILD_BUILD_MASK (0xFF00U)

#define	ESC_BUILD_BUILD_SHIFT (8U)

#define	ESC_BUILD_BUILD_GET(x) (((uint16_t)(x) & ESC_BUILD_BUILD_MASK) >> ESC_BUILD_BUILD_SHIFT)

#define	ESC_BUILD_Y_MASK (0xF0U)

#define	ESC_BUILD_Y_SHIFT (4U)

#define	ESC_BUILD_Y_GET(x) (((uint16_t)(x) & ESC_BUILD_Y_MASK) >> ESC_BUILD_Y_SHIFT)

#define	ESC_BUILD_Z_MASK (0xFU)

#define	ESC_BUILD_Z_SHIFT (0U)

#define	ESC_BUILD_Z_GET(x) (((uint16_t)(x) & ESC_BUILD_Z_MASK) >> ESC_BUILD_Z_SHIFT)

#define	ESC_FMMU_NUM_NUM_MASK (0xFFU)

#define	ESC_FMMU_NUM_NUM_SHIFT (0U)

#define	ESC_FMMU_NUM_NUM_GET(x) (((uint8_t)(x) & ESC_FMMU_NUM_NUM_MASK) >> ESC_FMMU_NUM_NUM_SHIFT)

#define	ESC_SYNCM_NUM_NUM_MASK (0xFFU)

#define	ESC_SYNCM_NUM_NUM_SHIFT (0U)

#define	ESC_SYNCM_NUM_NUM_GET(x) (((uint8_t)(x) & ESC_SYNCM_NUM_NUM_MASK) >> ESC_SYNCM_NUM_NUM_SHIFT)

#define	ESC_RAM_SIZE_SIZE_MASK (0xFFU)

#define	ESC_RAM_SIZE_SIZE_SHIFT (0U)

#define	ESC_RAM_SIZE_SIZE_GET(x) (((uint8_t)(x) & ESC_RAM_SIZE_SIZE_MASK) >> ESC_RAM_SIZE_SIZE_SHIFT)

#define	ESC_PORT_DESC_PORT3_MASK (0xC0U)

#define	ESC_PORT_DESC_PORT3_SHIFT (6U)

#define	ESC_PORT_DESC_PORT3_GET(x) (((uint8_t)(x) & ESC_PORT_DESC_PORT3_MASK) >> ESC_PORT_DESC_PORT3_SHIFT)

#define	ESC_PORT_DESC_PORT2_MASK (0x30U)

#define	ESC_PORT_DESC_PORT2_SHIFT (4U)

#define	ESC_PORT_DESC_PORT2_GET(x) (((uint8_t)(x) & ESC_PORT_DESC_PORT2_MASK) >> ESC_PORT_DESC_PORT2_SHIFT)

#define	ESC_PORT_DESC_PORT1_MASK (0xCU)

#define	ESC_PORT_DESC_PORT1_SHIFT (2U)

#define	ESC_PORT_DESC_PORT1_GET(x) (((uint8_t)(x) & ESC_PORT_DESC_PORT1_MASK) >> ESC_PORT_DESC_PORT1_SHIFT)

#define	ESC_PORT_DESC_PORT0_MASK (0x3U)

#define	ESC_PORT_DESC_PORT0_SHIFT (0U)

#define	ESC_PORT_DESC_PORT0_GET(x) (((uint8_t)(x) & ESC_PORT_DESC_PORT0_MASK) >> ESC_PORT_DESC_PORT0_SHIFT)

#define	ESC_FEATURE_FFSC_MASK (0x800U)

#define	ESC_FEATURE_FFSC_SHIFT (11U)

#define	ESC_FEATURE_FFSC_GET(x) (((uint16_t)(x) & ESC_FEATURE_FFSC_MASK) >> ESC_FEATURE_FFSC_SHIFT)

#define	ESC_FEATURE_RWC_MASK (0x400U)

#define	ESC_FEATURE_RWC_SHIFT (10U)

#define	ESC_FEATURE_RWC_GET(x) (((uint16_t)(x) & ESC_FEATURE_RWC_MASK) >> ESC_FEATURE_RWC_SHIFT)

#define	ESC_FEATURE_LRW_MASK (0x200U)

#define	ESC_FEATURE_LRW_SHIFT (9U)

#define	ESC_FEATURE_LRW_GET(x) (((uint16_t)(x) & ESC_FEATURE_LRW_MASK) >> ESC_FEATURE_LRW_SHIFT)

#define	ESC_FEATURE_EDSA_MASK (0x100U)

#define	ESC_FEATURE_EDSA_SHIFT (8U)

#define	ESC_FEATURE_EDSA_GET(x) (((uint16_t)(x) & ESC_FEATURE_EDSA_MASK) >> ESC_FEATURE_EDSA_SHIFT)

#define	ESC_FEATURE_SHFE_MASK (0x80U)

#define	ESC_FEATURE_SHFE_SHIFT (7U)

#define	ESC_FEATURE_SHFE_GET(x) (((uint16_t)(x) & ESC_FEATURE_SHFE_MASK) >> ESC_FEATURE_SHFE_SHIFT)

#define	ESC_FEATURE_ELDM_MASK (0x40U)

#define	ESC_FEATURE_ELDM_SHIFT (6U)

#define	ESC_FEATURE_ELDM_GET(x) (((uint16_t)(x) & ESC_FEATURE_ELDM_MASK) >> ESC_FEATURE_ELDM_SHIFT)

#define	ESC_FEATURE_DCW_MASK (0x8U)

#define	ESC_FEATURE_DCW_SHIFT (3U)

#define	ESC_FEATURE_DCW_GET(x) (((uint16_t)(x) & ESC_FEATURE_DCW_MASK) >> ESC_FEATURE_DCW_SHIFT)

#define	ESC_FEATURE_DC_MASK (0x4U)

#define	ESC_FEATURE_DC_SHIFT (2U)

#define	ESC_FEATURE_DC_GET(x) (((uint16_t)(x) & ESC_FEATURE_DC_MASK) >> ESC_FEATURE_DC_SHIFT)

#define	ESC_FEATURE_FMMU_MASK (0x1U)

#define	ESC_FEATURE_FMMU_SHIFT (0U)

#define	ESC_FEATURE_FMMU_GET(x) (((uint16_t)(x) & ESC_FEATURE_FMMU_MASK) >> ESC_FEATURE_FMMU_SHIFT)

#define	ESC_STATION_ADDR_ADDR_MASK (0xFFFFU)

#define	ESC_STATION_ADDR_ADDR_SHIFT (0U)

#define	ESC_STATION_ADDR_ADDR_GET(x) (((uint16_t)(x) & ESC_STATION_ADDR_ADDR_MASK) >> ESC_STATION_ADDR_ADDR_SHIFT)

#define	ESC_STATION_ALS_ADDR_MASK (0xFFFFU)

#define	ESC_STATION_ALS_ADDR_SHIFT (0U)

#define	ESC_STATION_ALS_ADDR_SET(x) (((uint16_t)(x) << ESC_STATION_ALS_ADDR_SHIFT) & ESC_STATION_ALS_ADDR_MASK)

#define	ESC_STATION_ALS_ADDR_GET(x) (((uint16_t)(x) & ESC_STATION_ALS_ADDR_MASK) >> ESC_STATION_ALS_ADDR_SHIFT)

#define	ESC_REG_WEN_EN_MASK (0x1U)

#define	ESC_REG_WEN_EN_SHIFT (0U)

#define	ESC_REG_WEN_EN_GET(x) (((uint8_t)(x) & ESC_REG_WEN_EN_MASK) >> ESC_REG_WEN_EN_SHIFT)

#define	ESC_REG_WP_WP_MASK (0x1U)

#define	ESC_REG_WP_WP_SHIFT (0U)

#define	ESC_REG_WP_WP_GET(x) (((uint8_t)(x) & ESC_REG_WP_WP_MASK) >> ESC_REG_WP_WP_SHIFT)

#define	ESC_ESC_WEN_EN_MASK (0x1U)

#define	ESC_ESC_WEN_EN_SHIFT (0U)

#define	ESC_ESC_WEN_EN_GET(x) (((uint8_t)(x) & ESC_ESC_WEN_EN_MASK) >> ESC_ESC_WEN_EN_SHIFT)

#define	ESC_ESC_WP_WP_MASK (0x1U)

#define	ESC_ESC_WP_WP_SHIFT (0U)

#define	ESC_ESC_WP_WP_GET(x) (((uint8_t)(x) & ESC_ESC_WP_WP_MASK) >> ESC_ESC_WP_WP_SHIFT)

#define	ESC_ESC_RST_ECAT_PR_MASK (0x3U)

#define	ESC_ESC_RST_ECAT_PR_SHIFT (0U)

#define	ESC_ESC_RST_ECAT_PR_GET(x) (((uint8_t)(x) & ESC_ESC_RST_ECAT_PR_MASK) >> ESC_ESC_RST_ECAT_PR_SHIFT)

#define	ESC_ESC_RST_PDI_RST_MASK (0xFFU)

#define	ESC_ESC_RST_PDI_RST_SHIFT (0U)

#define	ESC_ESC_RST_PDI_RST_SET(x) (((uint8_t)(x) << ESC_ESC_RST_PDI_RST_SHIFT) & ESC_ESC_RST_PDI_RST_MASK)

#define	ESC_ESC_RST_PDI_RST_GET(x) (((uint8_t)(x) & ESC_ESC_RST_PDI_RST_MASK) >> ESC_ESC_RST_PDI_RST_SHIFT)

#define	ESC_ESC_DL_CTRL_SA_MASK (0x1000000UL)

#define	ESC_ESC_DL_CTRL_SA_SHIFT (24U)

#define	ESC_ESC_DL_CTRL_SA_GET(x) (((uint32_t)(x) & ESC_ESC_DL_CTRL_SA_MASK) >> ESC_ESC_DL_CTRL_SA_SHIFT)

#define	ESC_ESC_DL_CTRL_RFS_MASK (0x70000UL)

#define	ESC_ESC_DL_CTRL_RFS_SHIFT (16U)

#define	ESC_ESC_DL_CTRL_RFS_GET(x) (((uint32_t)(x) & ESC_ESC_DL_CTRL_RFS_MASK) >> ESC_ESC_DL_CTRL_RFS_SHIFT)

#define	ESC_ESC_DL_CTRL_LP3_MASK (0xC000U)

#define	ESC_ESC_DL_CTRL_LP3_SHIFT (14U)

#define	ESC_ESC_DL_CTRL_LP3_GET(x) (((uint32_t)(x) & ESC_ESC_DL_CTRL_LP3_MASK) >> ESC_ESC_DL_CTRL_LP3_SHIFT)

#define	ESC_ESC_DL_CTRL_LP2_MASK (0x3000U)

#define	ESC_ESC_DL_CTRL_LP2_SHIFT (12U)

#define	ESC_ESC_DL_CTRL_LP2_GET(x) (((uint32_t)(x) & ESC_ESC_DL_CTRL_LP2_MASK) >> ESC_ESC_DL_CTRL_LP2_SHIFT)

#define	ESC_ESC_DL_CTRL_LP1_MASK (0xC00U)

#define	ESC_ESC_DL_CTRL_LP1_SHIFT (10U)

#define	ESC_ESC_DL_CTRL_LP1_GET(x) (((uint32_t)(x) & ESC_ESC_DL_CTRL_LP1_MASK) >> ESC_ESC_DL_CTRL_LP1_SHIFT)

#define	ESC_ESC_DL_CTRL_LP0_MASK (0x300U)

#define	ESC_ESC_DL_CTRL_LP0_SHIFT (8U)

#define	ESC_ESC_DL_CTRL_LP0_GET(x) (((uint32_t)(x) & ESC_ESC_DL_CTRL_LP0_MASK) >> ESC_ESC_DL_CTRL_LP0_SHIFT)

#define	ESC_ESC_DL_CTRL_TU_MASK (0x2U)

#define	ESC_ESC_DL_CTRL_TU_SHIFT (1U)

#define	ESC_ESC_DL_CTRL_TU_GET(x) (((uint32_t)(x) & ESC_ESC_DL_CTRL_TU_MASK) >> ESC_ESC_DL_CTRL_TU_SHIFT)

#define	ESC_ESC_DL_CTRL_FR_MASK (0x1U)

#define	ESC_ESC_DL_CTRL_FR_SHIFT (0U)

#define	ESC_ESC_DL_CTRL_FR_GET(x) (((uint32_t)(x) & ESC_ESC_DL_CTRL_FR_MASK) >> ESC_ESC_DL_CTRL_FR_SHIFT)

#define	ESC_PHYSICAL_RW_OFFSET_OFFSET_MASK (0xFFFFU)

#define	ESC_PHYSICAL_RW_OFFSET_OFFSET_SHIFT (0U)

#define	ESC_PHYSICAL_RW_OFFSET_OFFSET_GET(x) (((uint16_t)(x) & ESC_PHYSICAL_RW_OFFSET_OFFSET_MASK) >> ESC_PHYSICAL_RW_OFFSET_OFFSET_SHIFT)

#define	ESC_ESC_DL_STAT_CP3_MASK (0x8000U)

#define	ESC_ESC_DL_STAT_CP3_SHIFT (15U)

#define	ESC_ESC_DL_STAT_CP3_GET(x) (((uint16_t)(x) & ESC_ESC_DL_STAT_CP3_MASK) >> ESC_ESC_DL_STAT_CP3_SHIFT)

#define	ESC_ESC_DL_STAT_LP3_MASK (0x4000U)

#define	ESC_ESC_DL_STAT_LP3_SHIFT (14U)

#define	ESC_ESC_DL_STAT_LP3_GET(x) (((uint16_t)(x) & ESC_ESC_DL_STAT_LP3_MASK) >> ESC_ESC_DL_STAT_LP3_SHIFT)

#define	ESC_ESC_DL_STAT_CP2_MASK (0x2000U)

#define	ESC_ESC_DL_STAT_CP2_SHIFT (13U)

#define	ESC_ESC_DL_STAT_CP2_GET(x) (((uint16_t)(x) & ESC_ESC_DL_STAT_CP2_MASK) >> ESC_ESC_DL_STAT_CP2_SHIFT)

#define	ESC_ESC_DL_STAT_LP2_MASK (0x1000U)

#define	ESC_ESC_DL_STAT_LP2_SHIFT (12U)

#define	ESC_ESC_DL_STAT_LP2_GET(x) (((uint16_t)(x) & ESC_ESC_DL_STAT_LP2_MASK) >> ESC_ESC_DL_STAT_LP2_SHIFT)

#define	ESC_ESC_DL_STAT_CP1_MASK (0x800U)

#define	ESC_ESC_DL_STAT_CP1_SHIFT (11U)

#define	ESC_ESC_DL_STAT_CP1_GET(x) (((uint16_t)(x) & ESC_ESC_DL_STAT_CP1_MASK) >> ESC_ESC_DL_STAT_CP1_SHIFT)

#define	ESC_ESC_DL_STAT_LP1_MASK (0x400U)

#define	ESC_ESC_DL_STAT_LP1_SHIFT (10U)

#define	ESC_ESC_DL_STAT_LP1_GET(x) (((uint16_t)(x) & ESC_ESC_DL_STAT_LP1_MASK) >> ESC_ESC_DL_STAT_LP1_SHIFT)

#define	ESC_ESC_DL_STAT_CP0_MASK (0x200U)

#define	ESC_ESC_DL_STAT_CP0_SHIFT (9U)

#define	ESC_ESC_DL_STAT_CP0_GET(x) (((uint16_t)(x) & ESC_ESC_DL_STAT_CP0_MASK) >> ESC_ESC_DL_STAT_CP0_SHIFT)

#define	ESC_ESC_DL_STAT_LP0_MASK (0x100U)

#define	ESC_ESC_DL_STAT_LP0_SHIFT (8U)

#define	ESC_ESC_DL_STAT_LP0_GET(x) (((uint16_t)(x) & ESC_ESC_DL_STAT_LP0_MASK) >> ESC_ESC_DL_STAT_LP0_SHIFT)

#define	ESC_ESC_DL_STAT_PLP3_MASK (0x80U)

#define	ESC_ESC_DL_STAT_PLP3_SHIFT (7U)

#define	ESC_ESC_DL_STAT_PLP3_GET(x) (((uint16_t)(x) & ESC_ESC_DL_STAT_PLP3_MASK) >> ESC_ESC_DL_STAT_PLP3_SHIFT)

#define	ESC_ESC_DL_STAT_PLP2_MASK (0x40U)

#define	ESC_ESC_DL_STAT_PLP2_SHIFT (6U)

#define	ESC_ESC_DL_STAT_PLP2_GET(x) (((uint16_t)(x) & ESC_ESC_DL_STAT_PLP2_MASK) >> ESC_ESC_DL_STAT_PLP2_SHIFT)

#define	ESC_ESC_DL_STAT_PLP1_MASK (0x20U)

#define	ESC_ESC_DL_STAT_PLP1_SHIFT (5U)

#define	ESC_ESC_DL_STAT_PLP1_GET(x) (((uint16_t)(x) & ESC_ESC_DL_STAT_PLP1_MASK) >> ESC_ESC_DL_STAT_PLP1_SHIFT)

#define	ESC_ESC_DL_STAT_PLP0_MASK (0x10U)

#define	ESC_ESC_DL_STAT_PLP0_SHIFT (4U)

#define	ESC_ESC_DL_STAT_PLP0_GET(x) (((uint16_t)(x) & ESC_ESC_DL_STAT_PLP0_MASK) >> ESC_ESC_DL_STAT_PLP0_SHIFT)

#define	ESC_ESC_DL_STAT_ELD_MASK (0x4U)

#define	ESC_ESC_DL_STAT_ELD_SHIFT (2U)

#define	ESC_ESC_DL_STAT_ELD_GET(x) (((uint16_t)(x) & ESC_ESC_DL_STAT_ELD_MASK) >> ESC_ESC_DL_STAT_ELD_SHIFT)

#define	ESC_ESC_DL_STAT_WDS_MASK (0x2U)

#define	ESC_ESC_DL_STAT_WDS_SHIFT (1U)

#define	ESC_ESC_DL_STAT_WDS_GET(x) (((uint16_t)(x) & ESC_ESC_DL_STAT_WDS_MASK) >> ESC_ESC_DL_STAT_WDS_SHIFT)

#define	ESC_ESC_DL_STAT_EPLC_MASK (0x1U)

#define	ESC_ESC_DL_STAT_EPLC_SHIFT (0U)

#define	ESC_ESC_DL_STAT_EPLC_GET(x) (((uint16_t)(x) & ESC_ESC_DL_STAT_EPLC_MASK) >> ESC_ESC_DL_STAT_EPLC_SHIFT)

#define	ESC_AL_CTRL_DI_MASK (0x20U)

#define	ESC_AL_CTRL_DI_SHIFT (5U)

#define	ESC_AL_CTRL_DI_SET(x) (((uint16_t)(x) << ESC_AL_CTRL_DI_SHIFT) & ESC_AL_CTRL_DI_MASK)

#define	ESC_AL_CTRL_DI_GET(x) (((uint16_t)(x) & ESC_AL_CTRL_DI_MASK) >> ESC_AL_CTRL_DI_SHIFT)

#define	ESC_AL_CTRL_EIA_MASK (0x10U)

#define	ESC_AL_CTRL_EIA_SHIFT (4U)

#define	ESC_AL_CTRL_EIA_SET(x) (((uint16_t)(x) << ESC_AL_CTRL_EIA_SHIFT) & ESC_AL_CTRL_EIA_MASK)

#define	ESC_AL_CTRL_EIA_GET(x) (((uint16_t)(x) & ESC_AL_CTRL_EIA_MASK) >> ESC_AL_CTRL_EIA_SHIFT)

#define	ESC_AL_CTRL_IST_MASK (0xFU)

#define	ESC_AL_CTRL_IST_SHIFT (0U)

#define	ESC_AL_CTRL_IST_SET(x) (((uint16_t)(x) << ESC_AL_CTRL_IST_SHIFT) & ESC_AL_CTRL_IST_MASK)

#define	ESC_AL_CTRL_IST_GET(x) (((uint16_t)(x) & ESC_AL_CTRL_IST_MASK) >> ESC_AL_CTRL_IST_SHIFT)

#define	ESC_AL_STAT_DI_MASK (0x20U)

#define	ESC_AL_STAT_DI_SHIFT (5U)

#define	ESC_AL_STAT_DI_SET(x) (((uint16_t)(x) << ESC_AL_STAT_DI_SHIFT) & ESC_AL_STAT_DI_MASK)

#define	ESC_AL_STAT_DI_GET(x) (((uint16_t)(x) & ESC_AL_STAT_DI_MASK) >> ESC_AL_STAT_DI_SHIFT)

#define	ESC_AL_STAT_EI_MASK (0x10U)

#define	ESC_AL_STAT_EI_SHIFT (4U)

#define	ESC_AL_STAT_EI_SET(x) (((uint16_t)(x) << ESC_AL_STAT_EI_SHIFT) & ESC_AL_STAT_EI_MASK)

#define	ESC_AL_STAT_EI_GET(x) (((uint16_t)(x) & ESC_AL_STAT_EI_MASK) >> ESC_AL_STAT_EI_SHIFT)

#define	ESC_AL_STAT_AS_MASK (0xFU)

#define	ESC_AL_STAT_AS_SHIFT (0U)

#define	ESC_AL_STAT_AS_SET(x) (((uint16_t)(x) << ESC_AL_STAT_AS_SHIFT) & ESC_AL_STAT_AS_MASK)

#define	ESC_AL_STAT_AS_GET(x) (((uint16_t)(x) & ESC_AL_STAT_AS_MASK) >> ESC_AL_STAT_AS_SHIFT)

#define	ESC_AL_STAT_CODE_CODE_MASK (0xFFFFU)

#define	ESC_AL_STAT_CODE_CODE_SHIFT (0U)

#define	ESC_AL_STAT_CODE_CODE_SET(x) (((uint16_t)(x) << ESC_AL_STAT_CODE_CODE_SHIFT) & ESC_AL_STAT_CODE_CODE_MASK)

#define	ESC_AL_STAT_CODE_CODE_GET(x) (((uint16_t)(x) & ESC_AL_STAT_CODE_CODE_MASK) >> ESC_AL_STAT_CODE_CODE_SHIFT)

#define	ESC_RUN_LED_OVRD_EN_OVRD_MASK (0x10U)

#define	ESC_RUN_LED_OVRD_EN_OVRD_SHIFT (4U)

#define	ESC_RUN_LED_OVRD_EN_OVRD_SET(x) (((uint8_t)(x) << ESC_RUN_LED_OVRD_EN_OVRD_SHIFT) & ESC_RUN_LED_OVRD_EN_OVRD_MASK)

#define	ESC_RUN_LED_OVRD_EN_OVRD_GET(x) (((uint8_t)(x) & ESC_RUN_LED_OVRD_EN_OVRD_MASK) >> ESC_RUN_LED_OVRD_EN_OVRD_SHIFT)

#define	ESC_RUN_LED_OVRD_LED_CODE_MASK (0xFU)

#define	ESC_RUN_LED_OVRD_LED_CODE_SHIFT (0U)

#define	ESC_RUN_LED_OVRD_LED_CODE_SET(x) (((uint8_t)(x) << ESC_RUN_LED_OVRD_LED_CODE_SHIFT) & ESC_RUN_LED_OVRD_LED_CODE_MASK)

#define	ESC_RUN_LED_OVRD_LED_CODE_GET(x) (((uint8_t)(x) & ESC_RUN_LED_OVRD_LED_CODE_MASK) >> ESC_RUN_LED_OVRD_LED_CODE_SHIFT)

#define	ESC_ERR_LED_OVRD_EN_OVRD_MASK (0x10U)

#define	ESC_ERR_LED_OVRD_EN_OVRD_SHIFT (4U)

#define	ESC_ERR_LED_OVRD_EN_OVRD_SET(x) (((uint8_t)(x) << ESC_ERR_LED_OVRD_EN_OVRD_SHIFT) & ESC_ERR_LED_OVRD_EN_OVRD_MASK)

#define	ESC_ERR_LED_OVRD_EN_OVRD_GET(x) (((uint8_t)(x) & ESC_ERR_LED_OVRD_EN_OVRD_MASK) >> ESC_ERR_LED_OVRD_EN_OVRD_SHIFT)

#define	ESC_ERR_LED_OVRD_LED_CODE_MASK (0xFU)

#define	ESC_ERR_LED_OVRD_LED_CODE_SHIFT (0U)

#define	ESC_ERR_LED_OVRD_LED_CODE_SET(x) (((uint8_t)(x) << ESC_ERR_LED_OVRD_LED_CODE_SHIFT) & ESC_ERR_LED_OVRD_LED_CODE_MASK)

#define	ESC_ERR_LED_OVRD_LED_CODE_GET(x) (((uint8_t)(x) & ESC_ERR_LED_OVRD_LED_CODE_MASK) >> ESC_ERR_LED_OVRD_LED_CODE_SHIFT)

#define	ESC_PDI_CTRL_PDI_MASK (0xFFU)

#define	ESC_PDI_CTRL_PDI_SHIFT (0U)

#define	ESC_PDI_CTRL_PDI_GET(x) (((uint8_t)(x) & ESC_PDI_CTRL_PDI_MASK) >> ESC_PDI_CTRL_PDI_SHIFT)

#define	ESC_ESC_CFG_ELP3_MASK (0x80U)

#define	ESC_ESC_CFG_ELP3_SHIFT (7U)

#define	ESC_ESC_CFG_ELP3_GET(x) (((uint8_t)(x) & ESC_ESC_CFG_ELP3_MASK) >> ESC_ESC_CFG_ELP3_SHIFT)

#define	ESC_ESC_CFG_ELP2_MASK (0x40U)

#define	ESC_ESC_CFG_ELP2_SHIFT (6U)

#define	ESC_ESC_CFG_ELP2_GET(x) (((uint8_t)(x) & ESC_ESC_CFG_ELP2_MASK) >> ESC_ESC_CFG_ELP2_SHIFT)

#define	ESC_ESC_CFG_ELP1_MASK (0x20U)

#define	ESC_ESC_CFG_ELP1_SHIFT (5U)

#define	ESC_ESC_CFG_ELP1_GET(x) (((uint8_t)(x) & ESC_ESC_CFG_ELP1_MASK) >> ESC_ESC_CFG_ELP1_SHIFT)

#define	ESC_ESC_CFG_ELP0_MASK (0x10U)

#define	ESC_ESC_CFG_ELP0_SHIFT (4U)

#define	ESC_ESC_CFG_ELP0_GET(x) (((uint8_t)(x) & ESC_ESC_CFG_ELP0_MASK) >> ESC_ESC_CFG_ELP0_SHIFT)

#define	ESC_ESC_CFG_CDLIU_MASK (0x8U)

#define	ESC_ESC_CFG_CDLIU_SHIFT (3U)

#define	ESC_ESC_CFG_CDLIU_GET(x) (((uint8_t)(x) & ESC_ESC_CFG_CDLIU_MASK) >> ESC_ESC_CFG_CDLIU_SHIFT)

#define	ESC_ESC_CFG_DCSOU_MASK (0x4U)

#define	ESC_ESC_CFG_DCSOU_SHIFT (2U)

#define	ESC_ESC_CFG_DCSOU_GET(x) (((uint8_t)(x) & ESC_ESC_CFG_DCSOU_MASK) >> ESC_ESC_CFG_DCSOU_SHIFT)

#define	ESC_ESC_CFG_ELDAP_MASK (0x2U)

#define	ESC_ESC_CFG_ELDAP_SHIFT (1U)

#define	ESC_ESC_CFG_ELDAP_GET(x) (((uint8_t)(x) & ESC_ESC_CFG_ELDAP_MASK) >> ESC_ESC_CFG_ELDAP_SHIFT)

#define	ESC_ESC_CFG_DEV_EMU_MASK (0x1U)

#define	ESC_ESC_CFG_DEV_EMU_SHIFT (0U)

#define	ESC_ESC_CFG_DEV_EMU_GET(x) (((uint8_t)(x) & ESC_ESC_CFG_DEV_EMU_MASK) >> ESC_ESC_CFG_DEV_EMU_SHIFT)

#define	ESC_PDI_INFO_PDICN_MASK (0x8U)

#define	ESC_PDI_INFO_PDICN_SHIFT (3U)

#define	ESC_PDI_INFO_PDICN_GET(x) (((uint16_t)(x) & ESC_PDI_INFO_PDICN_MASK) >> ESC_PDI_INFO_PDICN_SHIFT)

#define	ESC_PDI_INFO_PDIA_MASK (0x4U)

#define	ESC_PDI_INFO_PDIA_SHIFT (2U)

#define	ESC_PDI_INFO_PDIA_GET(x) (((uint16_t)(x) & ESC_PDI_INFO_PDIA_MASK) >> ESC_PDI_INFO_PDIA_SHIFT)

#define	ESC_PDI_INFO_ECLFE_MASK (0x2U)

#define	ESC_PDI_INFO_ECLFE_SHIFT (1U)

#define	ESC_PDI_INFO_ECLFE_GET(x) (((uint16_t)(x) & ESC_PDI_INFO_ECLFE_MASK) >> ESC_PDI_INFO_ECLFE_SHIFT)

#define	ESC_PDI_INFO_PFABW_MASK (0x1U)

#define	ESC_PDI_INFO_PFABW_SHIFT (0U)

#define	ESC_PDI_INFO_PFABW_GET(x) (((uint16_t)(x) & ESC_PDI_INFO_PFABW_MASK) >> ESC_PDI_INFO_PFABW_SHIFT)

#define	ESC_PDI_CFG_BUS_MASK (0xE0U)

#define	ESC_PDI_CFG_BUS_SHIFT (5U)

#define	ESC_PDI_CFG_BUS_GET(x) (((uint8_t)(x) & ESC_PDI_CFG_BUS_MASK) >> ESC_PDI_CFG_BUS_SHIFT)

#define	ESC_PDI_CFG_CLK_MASK (0x1FU)

#define	ESC_PDI_CFG_CLK_SHIFT (0U)

#define	ESC_PDI_CFG_CLK_GET(x) (((uint8_t)(x) & ESC_PDI_CFG_CLK_MASK) >> ESC_PDI_CFG_CLK_SHIFT)

#define	ESC_PDI_SL_CFG_SYNC1_MAER_MASK (0x80U)

#define	ESC_PDI_SL_CFG_SYNC1_MAER_SHIFT (7U)

#define	ESC_PDI_SL_CFG_SYNC1_MAER_GET(x) (((uint8_t)(x) & ESC_PDI_SL_CFG_SYNC1_MAER_MASK) >> ESC_PDI_SL_CFG_SYNC1_MAER_SHIFT)

#define	ESC_PDI_SL_CFG_SYNC1_CFG_MASK (0x40U)

#define	ESC_PDI_SL_CFG_SYNC1_CFG_SHIFT (6U)

#define	ESC_PDI_SL_CFG_SYNC1_CFG_GET(x) (((uint8_t)(x) & ESC_PDI_SL_CFG_SYNC1_CFG_MASK) >> ESC_PDI_SL_CFG_SYNC1_CFG_SHIFT)

#define	ESC_PDI_SL_CFG_SYNC1_ODP_MASK (0x30U)

#define	ESC_PDI_SL_CFG_SYNC1_ODP_SHIFT (4U)

#define	ESC_PDI_SL_CFG_SYNC1_ODP_GET(x) (((uint8_t)(x) & ESC_PDI_SL_CFG_SYNC1_ODP_MASK) >> ESC_PDI_SL_CFG_SYNC1_ODP_SHIFT)

#define	ESC_PDI_SL_CFG_SYNC0_MAER_MASK (0x8U)

#define	ESC_PDI_SL_CFG_SYNC0_MAER_SHIFT (3U)

#define	ESC_PDI_SL_CFG_SYNC0_MAER_GET(x) (((uint8_t)(x) & ESC_PDI_SL_CFG_SYNC0_MAER_MASK) >> ESC_PDI_SL_CFG_SYNC0_MAER_SHIFT)

#define	ESC_PDI_SL_CFG_SYNC0_CFG_MASK (0x4U)

#define	ESC_PDI_SL_CFG_SYNC0_CFG_SHIFT (2U)

#define	ESC_PDI_SL_CFG_SYNC0_CFG_GET(x) (((uint8_t)(x) & ESC_PDI_SL_CFG_SYNC0_CFG_MASK) >> ESC_PDI_SL_CFG_SYNC0_CFG_SHIFT)

#define	ESC_PDI_SL_CFG_SYNC0_ODP_MASK (0x3U)

#define	ESC_PDI_SL_CFG_SYNC0_ODP_SHIFT (0U)

#define	ESC_PDI_SL_CFG_SYNC0_ODP_GET(x) (((uint8_t)(x) & ESC_PDI_SL_CFG_SYNC0_ODP_MASK) >> ESC_PDI_SL_CFG_SYNC0_ODP_SHIFT)

#define	ESC_PDI_EXT_CFG_OCBST_MASK (0x700U)

#define	ESC_PDI_EXT_CFG_OCBST_SHIFT (8U)

#define	ESC_PDI_EXT_CFG_OCBST_SET(x) (((uint16_t)(x) << ESC_PDI_EXT_CFG_OCBST_SHIFT) & ESC_PDI_EXT_CFG_OCBST_MASK)

#define	ESC_PDI_EXT_CFG_OCBST_GET(x) (((uint16_t)(x) & ESC_PDI_EXT_CFG_OCBST_MASK) >> ESC_PDI_EXT_CFG_OCBST_SHIFT)

#define	ESC_PDI_EXT_CFG_RPS_MASK (0x3U)

#define	ESC_PDI_EXT_CFG_RPS_SHIFT (0U)

#define	ESC_PDI_EXT_CFG_RPS_GET(x) (((uint16_t)(x) & ESC_PDI_EXT_CFG_RPS_MASK) >> ESC_PDI_EXT_CFG_RPS_SHIFT)

#define	ESC_ECAT_EVT_MSK_MASK_MASK (0xFFFFU)

#define	ESC_ECAT_EVT_MSK_MASK_SHIFT (0U)

#define	ESC_ECAT_EVT_MSK_MASK_GET(x) (((uint16_t)(x) & ESC_ECAT_EVT_MSK_MASK_MASK) >> ESC_ECAT_EVT_MSK_MASK_SHIFT)

#define	ESC_PDI_AL_EVT_MSK_MASK_MASK (0xFFFFFFFFUL)

#define	ESC_PDI_AL_EVT_MSK_MASK_SHIFT (0U)

#define	ESC_PDI_AL_EVT_MSK_MASK_SET(x) (((uint32_t)(x) << ESC_PDI_AL_EVT_MSK_MASK_SHIFT) & ESC_PDI_AL_EVT_MSK_MASK_MASK)

#define	ESC_PDI_AL_EVT_MSK_MASK_GET(x) (((uint32_t)(x) & ESC_PDI_AL_EVT_MSK_MASK_MASK) >> ESC_PDI_AL_EVT_MSK_MASK_SHIFT)

#define	ESC_ECAT_EVT_REQ_MV_MASK (0xFF0U)

#define	ESC_ECAT_EVT_REQ_MV_SHIFT (4U)

#define	ESC_ECAT_EVT_REQ_MV_GET(x) (((uint16_t)(x) & ESC_ECAT_EVT_REQ_MV_MASK) >> ESC_ECAT_EVT_REQ_MV_SHIFT)

#define	ESC_ECAT_EVT_REQ_ALS_EVT_MASK (0x8U)

#define	ESC_ECAT_EVT_REQ_ALS_EVT_SHIFT (3U)

#define	ESC_ECAT_EVT_REQ_ALS_EVT_GET(x) (((uint16_t)(x) & ESC_ECAT_EVT_REQ_ALS_EVT_MASK) >> ESC_ECAT_EVT_REQ_ALS_EVT_SHIFT)

#define	ESC_ECAT_EVT_REQ_DLS_EVT_MASK (0x4U)

#define	ESC_ECAT_EVT_REQ_DLS_EVT_SHIFT (2U)

#define	ESC_ECAT_EVT_REQ_DLS_EVT_GET(x) (((uint16_t)(x) & ESC_ECAT_EVT_REQ_DLS_EVT_MASK) >> ESC_ECAT_EVT_REQ_DLS_EVT_SHIFT)

#define	ESC_ECAT_EVT_REQ_DCL_EVT_MASK (0x1U)

#define	ESC_ECAT_EVT_REQ_DCL_EVT_SHIFT (0U)

#define	ESC_ECAT_EVT_REQ_DCL_EVT_GET(x) (((uint16_t)(x) & ESC_ECAT_EVT_REQ_DCL_EVT_MASK) >> ESC_ECAT_EVT_REQ_DCL_EVT_SHIFT)

#define	ESC_AL_EVT_REQ_SM_INT_MASK (0xFFFF00UL)

#define	ESC_AL_EVT_REQ_SM_INT_SHIFT (8U)

#define	ESC_AL_EVT_REQ_SM_INT_GET(x) (((uint32_t)(x) & ESC_AL_EVT_REQ_SM_INT_MASK) >> ESC_AL_EVT_REQ_SM_INT_SHIFT)

#define	ESC_AL_EVT_REQ_WDG_PD_MASK (0x40U)

#define	ESC_AL_EVT_REQ_WDG_PD_SHIFT (6U)

#define	ESC_AL_EVT_REQ_WDG_PD_GET(x) (((uint32_t)(x) & ESC_AL_EVT_REQ_WDG_PD_MASK) >> ESC_AL_EVT_REQ_WDG_PD_SHIFT)

#define	ESC_AL_EVT_REQ_EE_EMU_MASK (0x20U)

#define	ESC_AL_EVT_REQ_EE_EMU_SHIFT (5U)

#define	ESC_AL_EVT_REQ_EE_EMU_GET(x) (((uint32_t)(x) & ESC_AL_EVT_REQ_EE_EMU_MASK) >> ESC_AL_EVT_REQ_EE_EMU_SHIFT)

#define	ESC_AL_EVT_REQ_SM_ACT_MASK (0x10U)

#define	ESC_AL_EVT_REQ_SM_ACT_SHIFT (4U)

#define	ESC_AL_EVT_REQ_SM_ACT_GET(x) (((uint32_t)(x) & ESC_AL_EVT_REQ_SM_ACT_MASK) >> ESC_AL_EVT_REQ_SM_ACT_SHIFT)

#define	ESC_AL_EVT_REQ_ST_DC_SYNC1_MASK (0x8U)

#define	ESC_AL_EVT_REQ_ST_DC_SYNC1_SHIFT (3U)

#define	ESC_AL_EVT_REQ_ST_DC_SYNC1_GET(x) (((uint32_t)(x) & ESC_AL_EVT_REQ_ST_DC_SYNC1_MASK) >> ESC_AL_EVT_REQ_ST_DC_SYNC1_SHIFT)

#define	ESC_AL_EVT_REQ_ST_DC_SYNC0_MASK (0x4U)

#define	ESC_AL_EVT_REQ_ST_DC_SYNC0_SHIFT (2U)

#define	ESC_AL_EVT_REQ_ST_DC_SYNC0_GET(x) (((uint32_t)(x) & ESC_AL_EVT_REQ_ST_DC_SYNC0_MASK) >> ESC_AL_EVT_REQ_ST_DC_SYNC0_SHIFT)

#define	ESC_AL_EVT_REQ_DCL_EVT_MASK (0x2U)

#define	ESC_AL_EVT_REQ_DCL_EVT_SHIFT (1U)

#define	ESC_AL_EVT_REQ_DCL_EVT_GET(x) (((uint32_t)(x) & ESC_AL_EVT_REQ_DCL_EVT_MASK) >> ESC_AL_EVT_REQ_DCL_EVT_SHIFT)

#define	ESC_AL_EVT_REQ_ALC_EVT_MASK (0x1U)

#define	ESC_AL_EVT_REQ_ALC_EVT_SHIFT (0U)

#define	ESC_AL_EVT_REQ_ALC_EVT_GET(x) (((uint32_t)(x) & ESC_AL_EVT_REQ_ALC_EVT_MASK) >> ESC_AL_EVT_REQ_ALC_EVT_SHIFT)

#define	ESC_RX_ERR_CNT_RX_ERR_MASK (0xFF00U)

#define	ESC_RX_ERR_CNT_RX_ERR_SHIFT (8U)

#define	ESC_RX_ERR_CNT_RX_ERR_GET(x) (((uint16_t)(x) & ESC_RX_ERR_CNT_RX_ERR_MASK) >> ESC_RX_ERR_CNT_RX_ERR_SHIFT)

#define	ESC_RX_ERR_CNT_IVD_FRM_MASK (0xFFU)

#define	ESC_RX_ERR_CNT_IVD_FRM_SHIFT (0U)

#define	ESC_RX_ERR_CNT_IVD_FRM_GET(x) (((uint16_t)(x) & ESC_RX_ERR_CNT_IVD_FRM_MASK) >> ESC_RX_ERR_CNT_IVD_FRM_SHIFT)

#define	ESC_FWD_RX_ERR_CNT_ERR_CNT_MASK (0xFFU)

#define	ESC_FWD_RX_ERR_CNT_ERR_CNT_SHIFT (0U)

#define	ESC_FWD_RX_ERR_CNT_ERR_CNT_GET(x) (((uint8_t)(x) & ESC_FWD_RX_ERR_CNT_ERR_CNT_MASK) >> ESC_FWD_RX_ERR_CNT_ERR_CNT_SHIFT)

#define	ESC_ECAT_PU_ERR_CNT_CNT_MASK (0xFFU)

#define	ESC_ECAT_PU_ERR_CNT_CNT_SHIFT (0U)

#define	ESC_ECAT_PU_ERR_CNT_CNT_GET(x) (((uint8_t)(x) & ESC_ECAT_PU_ERR_CNT_CNT_MASK) >> ESC_ECAT_PU_ERR_CNT_CNT_SHIFT)

#define	ESC_PDI_ERR_CNT_CNT_MASK (0xFFU)

#define	ESC_PDI_ERR_CNT_CNT_SHIFT (0U)

#define	ESC_PDI_ERR_CNT_CNT_GET(x) (((uint8_t)(x) & ESC_PDI_ERR_CNT_CNT_MASK) >> ESC_PDI_ERR_CNT_CNT_SHIFT)

#define	ESC_LOST_LINK_CNT_CNT_MASK (0xFFU)

#define	ESC_LOST_LINK_CNT_CNT_SHIFT (0U)

#define	ESC_LOST_LINK_CNT_CNT_GET(x) (((uint8_t)(x) & ESC_LOST_LINK_CNT_CNT_MASK) >> ESC_LOST_LINK_CNT_CNT_SHIFT)

#define	ESC_WDG_DIV_DIV_MASK (0xFFFFU)

#define	ESC_WDG_DIV_DIV_SHIFT (0U)

#define	ESC_WDG_DIV_DIV_GET(x) (((uint16_t)(x) & ESC_WDG_DIV_DIV_MASK) >> ESC_WDG_DIV_DIV_SHIFT)

#define	ESC_WDG_TIME_PDI_TIME_MASK (0xFFFFU)

#define	ESC_WDG_TIME_PDI_TIME_SHIFT (0U)

#define	ESC_WDG_TIME_PDI_TIME_GET(x) (((uint16_t)(x) & ESC_WDG_TIME_PDI_TIME_MASK) >> ESC_WDG_TIME_PDI_TIME_SHIFT)

#define	ESC_WDG_TIME_PDAT_TIME_MASK (0xFFFFU)

#define	ESC_WDG_TIME_PDAT_TIME_SHIFT (0U)

#define	ESC_WDG_TIME_PDAT_TIME_GET(x) (((uint16_t)(x) & ESC_WDG_TIME_PDAT_TIME_MASK) >> ESC_WDG_TIME_PDAT_TIME_SHIFT)

#define	ESC_WDG_STAT_PDAT_ST_MASK (0x1U)

#define	ESC_WDG_STAT_PDAT_ST_SHIFT (0U)

#define	ESC_WDG_STAT_PDAT_ST_SET(x) (((uint16_t)(x) << ESC_WDG_STAT_PDAT_ST_SHIFT) & ESC_WDG_STAT_PDAT_ST_MASK)

#define	ESC_WDG_STAT_PDAT_ST_GET(x) (((uint16_t)(x) & ESC_WDG_STAT_PDAT_ST_MASK) >> ESC_WDG_STAT_PDAT_ST_SHIFT)

#define	ESC_WDG_CNT_PDAT_CNT_MASK (0xFFU)

#define	ESC_WDG_CNT_PDAT_CNT_SHIFT (0U)

#define	ESC_WDG_CNT_PDAT_CNT_GET(x) (((uint8_t)(x) & ESC_WDG_CNT_PDAT_CNT_MASK) >> ESC_WDG_CNT_PDAT_CNT_SHIFT)

#define	ESC_WDG_CNT_PDI_CNT_MASK (0xFFU)

#define	ESC_WDG_CNT_PDI_CNT_SHIFT (0U)

#define	ESC_WDG_CNT_PDI_CNT_GET(x) (((uint8_t)(x) & ESC_WDG_CNT_PDI_CNT_MASK) >> ESC_WDG_CNT_PDI_CNT_SHIFT)

#define	ESC_EEPROM_CFG_FORCE_ECAT_MASK (0x2U)

#define	ESC_EEPROM_CFG_FORCE_ECAT_SHIFT (1U)

#define	ESC_EEPROM_CFG_FORCE_ECAT_GET(x) (((uint8_t)(x) & ESC_EEPROM_CFG_FORCE_ECAT_MASK) >> ESC_EEPROM_CFG_FORCE_ECAT_SHIFT)

#define	ESC_EEPROM_CFG_PDI_MASK (0x1U)

#define	ESC_EEPROM_CFG_PDI_SHIFT (0U)

#define	ESC_EEPROM_CFG_PDI_GET(x) (((uint8_t)(x) & ESC_EEPROM_CFG_PDI_MASK) >> ESC_EEPROM_CFG_PDI_SHIFT)

#define	ESC_EEPROM_PDI_ACC_STAT_ACCESS_MASK (0x1U)

#define	ESC_EEPROM_PDI_ACC_STAT_ACCESS_SHIFT (0U)

#define	ESC_EEPROM_PDI_ACC_STAT_ACCESS_SET(x) (((uint8_t)(x) << ESC_EEPROM_PDI_ACC_STAT_ACCESS_SHIFT) & ESC_EEPROM_PDI_ACC_STAT_ACCESS_MASK)

#define	ESC_EEPROM_PDI_ACC_STAT_ACCESS_GET(x) (((uint8_t)(x) & ESC_EEPROM_PDI_ACC_STAT_ACCESS_MASK) >> ESC_EEPROM_PDI_ACC_STAT_ACCESS_SHIFT)

#define	ESC_EEPROM_CTRL_STAT_BUSY_MASK (0x8000U)

#define	ESC_EEPROM_CTRL_STAT_BUSY_SHIFT (15U)

#define	ESC_EEPROM_CTRL_STAT_BUSY_GET(x) (((uint16_t)(x) & ESC_EEPROM_CTRL_STAT_BUSY_MASK) >> ESC_EEPROM_CTRL_STAT_BUSY_SHIFT)

#define	ESC_EEPROM_CTRL_STAT_ERR_WEN_MASK (0x4000U)

#define	ESC_EEPROM_CTRL_STAT_ERR_WEN_SHIFT (14U)

#define	ESC_EEPROM_CTRL_STAT_ERR_WEN_GET(x) (((uint16_t)(x) & ESC_EEPROM_CTRL_STAT_ERR_WEN_MASK) >> ESC_EEPROM_CTRL_STAT_ERR_WEN_SHIFT)

#define	ESC_EEPROM_CTRL_STAT_ERR_ACK_CMD_MASK (0x2000U)

#define	ESC_EEPROM_CTRL_STAT_ERR_ACK_CMD_SHIFT (13U)

#define	ESC_EEPROM_CTRL_STAT_ERR_ACK_CMD_SET(x) (((uint16_t)(x) << ESC_EEPROM_CTRL_STAT_ERR_ACK_CMD_SHIFT) & ESC_EEPROM_CTRL_STAT_ERR_ACK_CMD_MASK)

#define	ESC_EEPROM_CTRL_STAT_ERR_ACK_CMD_GET(x) (((uint16_t)(x) & ESC_EEPROM_CTRL_STAT_ERR_ACK_CMD_MASK) >> ESC_EEPROM_CTRL_STAT_ERR_ACK_CMD_SHIFT)

#define	ESC_EEPROM_CTRL_STAT_EE_LDS_MASK (0x1000U)

#define	ESC_EEPROM_CTRL_STAT_EE_LDS_SHIFT (12U)

#define	ESC_EEPROM_CTRL_STAT_EE_LDS_GET(x) (((uint16_t)(x) & ESC_EEPROM_CTRL_STAT_EE_LDS_MASK) >> ESC_EEPROM_CTRL_STAT_EE_LDS_SHIFT)

#define	ESC_EEPROM_CTRL_STAT_CKSM_ERR_MASK (0x800U)

#define	ESC_EEPROM_CTRL_STAT_CKSM_ERR_SHIFT (11U)

#define	ESC_EEPROM_CTRL_STAT_CKSM_ERR_SET(x) (((uint16_t)(x) << ESC_EEPROM_CTRL_STAT_CKSM_ERR_SHIFT) & ESC_EEPROM_CTRL_STAT_CKSM_ERR_MASK)

#define	ESC_EEPROM_CTRL_STAT_CKSM_ERR_GET(x) (((uint16_t)(x) & ESC_EEPROM_CTRL_STAT_CKSM_ERR_MASK) >> ESC_EEPROM_CTRL_STAT_CKSM_ERR_SHIFT)

#define	ESC_EEPROM_CTRL_STAT_CMD_MASK (0x700U)

#define	ESC_EEPROM_CTRL_STAT_CMD_SHIFT (8U)

#define	ESC_EEPROM_CTRL_STAT_CMD_SET(x) (((uint16_t)(x) << ESC_EEPROM_CTRL_STAT_CMD_SHIFT) & ESC_EEPROM_CTRL_STAT_CMD_MASK)

#define	ESC_EEPROM_CTRL_STAT_CMD_GET(x) (((uint16_t)(x) & ESC_EEPROM_CTRL_STAT_CMD_MASK) >> ESC_EEPROM_CTRL_STAT_CMD_SHIFT)

#define	ESC_EEPROM_CTRL_STAT_EE_ALGM_MASK (0x80U)

#define	ESC_EEPROM_CTRL_STAT_EE_ALGM_SHIFT (7U)

#define	ESC_EEPROM_CTRL_STAT_EE_ALGM_GET(x) (((uint16_t)(x) & ESC_EEPROM_CTRL_STAT_EE_ALGM_MASK) >> ESC_EEPROM_CTRL_STAT_EE_ALGM_SHIFT)

#define	ESC_EEPROM_CTRL_STAT_NUM_RD_BYTE_MASK (0x40U)

#define	ESC_EEPROM_CTRL_STAT_NUM_RD_BYTE_SHIFT (6U)

#define	ESC_EEPROM_CTRL_STAT_NUM_RD_BYTE_GET(x) (((uint16_t)(x) & ESC_EEPROM_CTRL_STAT_NUM_RD_BYTE_MASK) >> ESC_EEPROM_CTRL_STAT_NUM_RD_BYTE_SHIFT)

#define	ESC_EEPROM_CTRL_STAT_EE_EMU_MASK (0x20U)

#define	ESC_EEPROM_CTRL_STAT_EE_EMU_SHIFT (5U)

#define	ESC_EEPROM_CTRL_STAT_EE_EMU_GET(x) (((uint16_t)(x) & ESC_EEPROM_CTRL_STAT_EE_EMU_MASK) >> ESC_EEPROM_CTRL_STAT_EE_EMU_SHIFT)

#define	ESC_EEPROM_CTRL_STAT_ECAT_WEN_MASK (0x1U)

#define	ESC_EEPROM_CTRL_STAT_ECAT_WEN_SHIFT (0U)

#define	ESC_EEPROM_CTRL_STAT_ECAT_WEN_GET(x) (((uint16_t)(x) & ESC_EEPROM_CTRL_STAT_ECAT_WEN_MASK) >> ESC_EEPROM_CTRL_STAT_ECAT_WEN_SHIFT)

#define	ESC_EEPROM_ADDR_ADDR_MASK (0xFFFFFFFFUL)

#define	ESC_EEPROM_ADDR_ADDR_SHIFT (0U)

#define	ESC_EEPROM_ADDR_ADDR_SET(x) (((uint32_t)(x) << ESC_EEPROM_ADDR_ADDR_SHIFT) & ESC_EEPROM_ADDR_ADDR_MASK)

#define	ESC_EEPROM_ADDR_ADDR_GET(x) (((uint32_t)(x) & ESC_EEPROM_ADDR_ADDR_MASK) >> ESC_EEPROM_ADDR_ADDR_SHIFT)

#define	ESC_EEPROM_DATA_HI_MASK (0xFFFFFFFFFFFF0000ULL)

#define	ESC_EEPROM_DATA_HI_SHIFT (16U)

#define	ESC_EEPROM_DATA_HI_SET(x) (((uint64_t)(x) << ESC_EEPROM_DATA_HI_SHIFT) & ESC_EEPROM_DATA_HI_MASK)

#define	ESC_EEPROM_DATA_HI_GET(x) (((uint64_t)(x) & ESC_EEPROM_DATA_HI_MASK) >> ESC_EEPROM_DATA_HI_SHIFT)

#define	ESC_EEPROM_DATA_LO_MASK (0xFFFFU)

#define	ESC_EEPROM_DATA_LO_SHIFT (0U)

#define	ESC_EEPROM_DATA_LO_SET(x) (((uint64_t)(x) << ESC_EEPROM_DATA_LO_SHIFT) & ESC_EEPROM_DATA_LO_MASK)

#define	ESC_EEPROM_DATA_LO_GET(x) (((uint64_t)(x) & ESC_EEPROM_DATA_LO_MASK) >> ESC_EEPROM_DATA_LO_SHIFT)

#define	ESC_MII_MNG_CS_BUSY_MASK (0x8000U)

#define	ESC_MII_MNG_CS_BUSY_SHIFT (15U)

#define	ESC_MII_MNG_CS_BUSY_GET(x) (((uint16_t)(x) & ESC_MII_MNG_CS_BUSY_MASK) >> ESC_MII_MNG_CS_BUSY_SHIFT)

#define	ESC_MII_MNG_CS_CMD_ERR_MASK (0x4000U)

#define	ESC_MII_MNG_CS_CMD_ERR_SHIFT (14U)

#define	ESC_MII_MNG_CS_CMD_ERR_GET(x) (((uint16_t)(x) & ESC_MII_MNG_CS_CMD_ERR_MASK) >> ESC_MII_MNG_CS_CMD_ERR_SHIFT)

#define	ESC_MII_MNG_CS_RD_ERR_MASK (0x2000U)

#define	ESC_MII_MNG_CS_RD_ERR_SHIFT (13U)

#define	ESC_MII_MNG_CS_RD_ERR_GET(x) (((uint16_t)(x) & ESC_MII_MNG_CS_RD_ERR_MASK) >> ESC_MII_MNG_CS_RD_ERR_SHIFT)

#define	ESC_MII_MNG_CS_CMD_MASK (0x300U)

#define	ESC_MII_MNG_CS_CMD_SHIFT (8U)

#define	ESC_MII_MNG_CS_CMD_SET(x) (((uint16_t)(x) << ESC_MII_MNG_CS_CMD_SHIFT) & ESC_MII_MNG_CS_CMD_MASK)

#define	ESC_MII_MNG_CS_CMD_GET(x) (((uint16_t)(x) & ESC_MII_MNG_CS_CMD_MASK) >> ESC_MII_MNG_CS_CMD_SHIFT)

#define	ESC_MII_MNG_CS_PHY_ADDR_MASK (0xF8U)

#define	ESC_MII_MNG_CS_PHY_ADDR_SHIFT (3U)

#define	ESC_MII_MNG_CS_PHY_ADDR_GET(x) (((uint16_t)(x) & ESC_MII_MNG_CS_PHY_ADDR_MASK) >> ESC_MII_MNG_CS_PHY_ADDR_SHIFT)

#define	ESC_MII_MNG_CS_LINK_DC_MASK (0x4U)

#define	ESC_MII_MNG_CS_LINK_DC_SHIFT (2U)

#define	ESC_MII_MNG_CS_LINK_DC_GET(x) (((uint16_t)(x) & ESC_MII_MNG_CS_LINK_DC_MASK) >> ESC_MII_MNG_CS_LINK_DC_SHIFT)

#define	ESC_MII_MNG_CS_PDI_MASK (0x2U)

#define	ESC_MII_MNG_CS_PDI_SHIFT (1U)

#define	ESC_MII_MNG_CS_PDI_GET(x) (((uint16_t)(x) & ESC_MII_MNG_CS_PDI_MASK) >> ESC_MII_MNG_CS_PDI_SHIFT)

#define	ESC_MII_MNG_CS_WEN_MASK (0x1U)

#define	ESC_MII_MNG_CS_WEN_SHIFT (0U)

#define	ESC_MII_MNG_CS_WEN_GET(x) (((uint16_t)(x) & ESC_MII_MNG_CS_WEN_MASK) >> ESC_MII_MNG_CS_WEN_SHIFT)

#define	ESC_PHY_ADDR_SHOW_MASK (0x80U)

#define	ESC_PHY_ADDR_SHOW_SHIFT (7U)

#define	ESC_PHY_ADDR_SHOW_SET(x) (((uint8_t)(x) << ESC_PHY_ADDR_SHOW_SHIFT) & ESC_PHY_ADDR_SHOW_MASK)

#define	ESC_PHY_ADDR_SHOW_GET(x) (((uint8_t)(x) & ESC_PHY_ADDR_SHOW_MASK) >> ESC_PHY_ADDR_SHOW_SHIFT)

#define	ESC_PHY_ADDR_ADDR_MASK (0x1FU)

#define	ESC_PHY_ADDR_ADDR_SHIFT (0U)

#define	ESC_PHY_ADDR_ADDR_SET(x) (((uint8_t)(x) << ESC_PHY_ADDR_ADDR_SHIFT) & ESC_PHY_ADDR_ADDR_MASK)

#define	ESC_PHY_ADDR_ADDR_GET(x) (((uint8_t)(x) & ESC_PHY_ADDR_ADDR_MASK) >> ESC_PHY_ADDR_ADDR_SHIFT)

#define	ESC_PHY_REG_ADDR_ADDR_MASK (0x1FU)

#define	ESC_PHY_REG_ADDR_ADDR_SHIFT (0U)

#define	ESC_PHY_REG_ADDR_ADDR_SET(x) (((uint8_t)(x) << ESC_PHY_REG_ADDR_ADDR_SHIFT) & ESC_PHY_REG_ADDR_ADDR_MASK)

#define	ESC_PHY_REG_ADDR_ADDR_GET(x) (((uint8_t)(x) & ESC_PHY_REG_ADDR_ADDR_MASK) >> ESC_PHY_REG_ADDR_ADDR_SHIFT)

#define	ESC_PHY_DATA_DATA_MASK (0xFFFFU)

#define	ESC_PHY_DATA_DATA_SHIFT (0U)

#define	ESC_PHY_DATA_DATA_SET(x) (((uint16_t)(x) << ESC_PHY_DATA_DATA_SHIFT) & ESC_PHY_DATA_DATA_MASK)

#define	ESC_PHY_DATA_DATA_GET(x) (((uint16_t)(x) & ESC_PHY_DATA_DATA_MASK) >> ESC_PHY_DATA_DATA_SHIFT)

#define	ESC_MIIM_ECAT_ACC_STAT_ACC_MASK (0x1U)

#define	ESC_MIIM_ECAT_ACC_STAT_ACC_SHIFT (0U)

#define	ESC_MIIM_ECAT_ACC_STAT_ACC_GET(x) (((uint8_t)(x) & ESC_MIIM_ECAT_ACC_STAT_ACC_MASK) >> ESC_MIIM_ECAT_ACC_STAT_ACC_SHIFT)

#define	ESC_MIIM_PDI_ACC_STAT_FORCE_MASK (0x2U)

#define	ESC_MIIM_PDI_ACC_STAT_FORCE_SHIFT (1U)

#define	ESC_MIIM_PDI_ACC_STAT_FORCE_GET(x) (((uint8_t)(x) & ESC_MIIM_PDI_ACC_STAT_FORCE_MASK) >> ESC_MIIM_PDI_ACC_STAT_FORCE_SHIFT)

#define	ESC_MIIM_PDI_ACC_STAT_ACC_MASK (0x1U)

#define	ESC_MIIM_PDI_ACC_STAT_ACC_SHIFT (0U)

#define	ESC_MIIM_PDI_ACC_STAT_ACC_SET(x) (((uint8_t)(x) << ESC_MIIM_PDI_ACC_STAT_ACC_SHIFT) & ESC_MIIM_PDI_ACC_STAT_ACC_MASK)

#define	ESC_MIIM_PDI_ACC_STAT_ACC_GET(x) (((uint8_t)(x) & ESC_MIIM_PDI_ACC_STAT_ACC_MASK) >> ESC_MIIM_PDI_ACC_STAT_ACC_SHIFT)

#define	ESC_PHY_STAT_PCU_MASK (0x20U)

#define	ESC_PHY_STAT_PCU_SHIFT (5U)

#define	ESC_PHY_STAT_PCU_SET(x) (((uint8_t)(x) << ESC_PHY_STAT_PCU_SHIFT) & ESC_PHY_STAT_PCU_MASK)

#define	ESC_PHY_STAT_PCU_GET(x) (((uint8_t)(x) & ESC_PHY_STAT_PCU_MASK) >> ESC_PHY_STAT_PCU_SHIFT)

#define	ESC_PHY_STAT_LPE_MASK (0x10U)

#define	ESC_PHY_STAT_LPE_SHIFT (4U)

#define	ESC_PHY_STAT_LPE_GET(x) (((uint8_t)(x) & ESC_PHY_STAT_LPE_MASK) >> ESC_PHY_STAT_LPE_SHIFT)

#define	ESC_PHY_STAT_RE_MASK (0x8U)

#define	ESC_PHY_STAT_RE_SHIFT (3U)

#define	ESC_PHY_STAT_RE_SET(x) (((uint8_t)(x) << ESC_PHY_STAT_RE_SHIFT) & ESC_PHY_STAT_RE_MASK)

#define	ESC_PHY_STAT_RE_GET(x) (((uint8_t)(x) & ESC_PHY_STAT_RE_MASK) >> ESC_PHY_STAT_RE_SHIFT)

#define	ESC_PHY_STAT_LSE_MASK (0x4U)

#define	ESC_PHY_STAT_LSE_SHIFT (2U)

#define	ESC_PHY_STAT_LSE_GET(x) (((uint8_t)(x) & ESC_PHY_STAT_LSE_MASK) >> ESC_PHY_STAT_LSE_SHIFT)

#define	ESC_PHY_STAT_LS_MASK (0x2U)

#define	ESC_PHY_STAT_LS_SHIFT (1U)

#define	ESC_PHY_STAT_LS_GET(x) (((uint8_t)(x) & ESC_PHY_STAT_LS_MASK) >> ESC_PHY_STAT_LS_SHIFT)

#define	ESC_PHY_STAT_PLS_MASK (0x1U)

#define	ESC_PHY_STAT_PLS_SHIFT (0U)

#define	ESC_PHY_STAT_PLS_GET(x) (((uint8_t)(x) & ESC_PHY_STAT_PLS_MASK) >> ESC_PHY_STAT_PLS_SHIFT)

#define	ESC_FMMU_LOGIC_START_ADDR_ADDR_MASK (0xFFFFFFFFUL)

#define	ESC_FMMU_LOGIC_START_ADDR_ADDR_SHIFT (0U)

#define	ESC_FMMU_LOGIC_START_ADDR_ADDR_GET(x) (((uint32_t)(x) & ESC_FMMU_LOGIC_START_ADDR_ADDR_MASK) >> ESC_FMMU_LOGIC_START_ADDR_ADDR_SHIFT)

#define	ESC_FMMU_LENGTH_OFFSET_MASK (0xFFFFU)

#define	ESC_FMMU_LENGTH_OFFSET_SHIFT (0U)

#define	ESC_FMMU_LENGTH_OFFSET_GET(x) (((uint16_t)(x) & ESC_FMMU_LENGTH_OFFSET_MASK) >> ESC_FMMU_LENGTH_OFFSET_SHIFT)

#define	ESC_FMMU_LOGIC_START_BIT_START_MASK (0x7U)

#define	ESC_FMMU_LOGIC_START_BIT_START_SHIFT (0U)

#define	ESC_FMMU_LOGIC_START_BIT_START_GET(x) (((uint8_t)(x) & ESC_FMMU_LOGIC_START_BIT_START_MASK) >> ESC_FMMU_LOGIC_START_BIT_START_SHIFT)

#define	ESC_FMMU_LOGIC_STOP_BIT_STOP_MASK (0x7U)

#define	ESC_FMMU_LOGIC_STOP_BIT_STOP_SHIFT (0U)

#define	ESC_FMMU_LOGIC_STOP_BIT_STOP_GET(x) (((uint8_t)(x) & ESC_FMMU_LOGIC_STOP_BIT_STOP_MASK) >> ESC_FMMU_LOGIC_STOP_BIT_STOP_SHIFT)

#define	ESC_FMMU_PHYSICAL_START_ADDR_ADDR_MASK (0xFFFFU)

#define	ESC_FMMU_PHYSICAL_START_ADDR_ADDR_SHIFT (0U)

#define	ESC_FMMU_PHYSICAL_START_ADDR_ADDR_GET(x) (((uint16_t)(x) & ESC_FMMU_PHYSICAL_START_ADDR_ADDR_MASK) >> ESC_FMMU_PHYSICAL_START_ADDR_ADDR_SHIFT)

#define	ESC_FMMU_PHYSICAL_START_BIT_START_MASK (0x7U)

#define	ESC_FMMU_PHYSICAL_START_BIT_START_SHIFT (0U)

#define	ESC_FMMU_PHYSICAL_START_BIT_START_GET(x) (((uint8_t)(x) & ESC_FMMU_PHYSICAL_START_BIT_START_MASK) >> ESC_FMMU_PHYSICAL_START_BIT_START_SHIFT)

#define	ESC_FMMU_TYPE_MAP_WR_MASK (0x2U)

#define	ESC_FMMU_TYPE_MAP_WR_SHIFT (1U)

#define	ESC_FMMU_TYPE_MAP_WR_GET(x) (((uint8_t)(x) & ESC_FMMU_TYPE_MAP_WR_MASK) >> ESC_FMMU_TYPE_MAP_WR_SHIFT)

#define	ESC_FMMU_TYPE_MAP_RD_MASK (0x1U)

#define	ESC_FMMU_TYPE_MAP_RD_SHIFT (0U)

#define	ESC_FMMU_TYPE_MAP_RD_GET(x) (((uint8_t)(x) & ESC_FMMU_TYPE_MAP_RD_MASK) >> ESC_FMMU_TYPE_MAP_RD_SHIFT)

#define	ESC_FMMU_ACTIVATE_ACT_MASK (0x1U)

#define	ESC_FMMU_ACTIVATE_ACT_SHIFT (0U)

#define	ESC_FMMU_ACTIVATE_ACT_GET(x) (((uint8_t)(x) & ESC_FMMU_ACTIVATE_ACT_MASK) >> ESC_FMMU_ACTIVATE_ACT_SHIFT)

#define	ESC_SYNCM_PHYSICAL_START_ADDR_ADDR_MASK (0xFFFFU)

#define	ESC_SYNCM_PHYSICAL_START_ADDR_ADDR_SHIFT (0U)

#define	ESC_SYNCM_PHYSICAL_START_ADDR_ADDR_GET(x) (((uint16_t)(x) & ESC_SYNCM_PHYSICAL_START_ADDR_ADDR_MASK) >> ESC_SYNCM_PHYSICAL_START_ADDR_ADDR_SHIFT)

#define	ESC_SYNCM_LENGTH_LEN_MASK (0xFFFFU)

#define	ESC_SYNCM_LENGTH_LEN_SHIFT (0U)

#define	ESC_SYNCM_LENGTH_LEN_GET(x) (((uint16_t)(x) & ESC_SYNCM_LENGTH_LEN_MASK) >> ESC_SYNCM_LENGTH_LEN_SHIFT)

#define	ESC_SYNCM_CONTROL_WDG_TRG_EN_MASK (0x40U)

#define	ESC_SYNCM_CONTROL_WDG_TRG_EN_SHIFT (6U)

#define	ESC_SYNCM_CONTROL_WDG_TRG_EN_GET(x) (((uint8_t)(x) & ESC_SYNCM_CONTROL_WDG_TRG_EN_MASK) >> ESC_SYNCM_CONTROL_WDG_TRG_EN_SHIFT)

#define	ESC_SYNCM_CONTROL_INT_AL_MASK (0x20U)

#define	ESC_SYNCM_CONTROL_INT_AL_SHIFT (5U)

#define	ESC_SYNCM_CONTROL_INT_AL_GET(x) (((uint8_t)(x) & ESC_SYNCM_CONTROL_INT_AL_MASK) >> ESC_SYNCM_CONTROL_INT_AL_SHIFT)

#define	ESC_SYNCM_CONTROL_INT_ECAT_MASK (0x10U)

#define	ESC_SYNCM_CONTROL_INT_ECAT_SHIFT (4U)

#define	ESC_SYNCM_CONTROL_INT_ECAT_GET(x) (((uint8_t)(x) & ESC_SYNCM_CONTROL_INT_ECAT_MASK) >> ESC_SYNCM_CONTROL_INT_ECAT_SHIFT)

#define	ESC_SYNCM_CONTROL_DIR_MASK (0xCU)

#define	ESC_SYNCM_CONTROL_DIR_SHIFT (2U)

#define	ESC_SYNCM_CONTROL_DIR_GET(x) (((uint8_t)(x) & ESC_SYNCM_CONTROL_DIR_MASK) >> ESC_SYNCM_CONTROL_DIR_SHIFT)

#define	ESC_SYNCM_CONTROL_OP_MODE_MASK (0x3U)

#define	ESC_SYNCM_CONTROL_OP_MODE_SHIFT (0U)

#define	ESC_SYNCM_CONTROL_OP_MODE_GET(x) (((uint8_t)(x) & ESC_SYNCM_CONTROL_OP_MODE_MASK) >> ESC_SYNCM_CONTROL_OP_MODE_SHIFT)

#define	ESC_SYNCM_STATUS_WB_INUSE_MASK (0x80U)

#define	ESC_SYNCM_STATUS_WB_INUSE_SHIFT (7U)

#define	ESC_SYNCM_STATUS_WB_INUSE_GET(x) (((uint8_t)(x) & ESC_SYNCM_STATUS_WB_INUSE_MASK) >> ESC_SYNCM_STATUS_WB_INUSE_SHIFT)

#define	ESC_SYNCM_STATUS_RB_INUSE_MASK (0x40U)

#define	ESC_SYNCM_STATUS_RB_INUSE_SHIFT (6U)

#define	ESC_SYNCM_STATUS_RB_INUSE_GET(x) (((uint8_t)(x) & ESC_SYNCM_STATUS_RB_INUSE_MASK) >> ESC_SYNCM_STATUS_RB_INUSE_SHIFT)

#define	ESC_SYNCM_STATUS_BUF_MODE_MASK (0x30U)

#define	ESC_SYNCM_STATUS_BUF_MODE_SHIFT (4U)

#define	ESC_SYNCM_STATUS_BUF_MODE_GET(x) (((uint8_t)(x) & ESC_SYNCM_STATUS_BUF_MODE_MASK) >> ESC_SYNCM_STATUS_BUF_MODE_SHIFT)

#define	ESC_SYNCM_STATUS_MBX_MODE_MASK (0x8U)

#define	ESC_SYNCM_STATUS_MBX_MODE_SHIFT (3U)

#define	ESC_SYNCM_STATUS_MBX_MODE_GET(x) (((uint8_t)(x) & ESC_SYNCM_STATUS_MBX_MODE_MASK) >> ESC_SYNCM_STATUS_MBX_MODE_SHIFT)

#define	ESC_SYNCM_STATUS_INT_RD_MASK (0x2U)

#define	ESC_SYNCM_STATUS_INT_RD_SHIFT (1U)

#define	ESC_SYNCM_STATUS_INT_RD_GET(x) (((uint8_t)(x) & ESC_SYNCM_STATUS_INT_RD_MASK) >> ESC_SYNCM_STATUS_INT_RD_SHIFT)

#define	ESC_SYNCM_STATUS_INT_WR_MASK (0x1U)

#define	ESC_SYNCM_STATUS_INT_WR_SHIFT (0U)

#define	ESC_SYNCM_STATUS_INT_WR_GET(x) (((uint8_t)(x) & ESC_SYNCM_STATUS_INT_WR_MASK) >> ESC_SYNCM_STATUS_INT_WR_SHIFT)

#define	ESC_SYNCM_ACTIVATE_LATCH_PDI_MASK (0x80U)

#define	ESC_SYNCM_ACTIVATE_LATCH_PDI_SHIFT (7U)

#define	ESC_SYNCM_ACTIVATE_LATCH_PDI_GET(x) (((uint8_t)(x) & ESC_SYNCM_ACTIVATE_LATCH_PDI_MASK) >> ESC_SYNCM_ACTIVATE_LATCH_PDI_SHIFT)

#define	ESC_SYNCM_ACTIVATE_LATCH_ECAT_MASK (0x40U)

#define	ESC_SYNCM_ACTIVATE_LATCH_ECAT_SHIFT (6U)

#define	ESC_SYNCM_ACTIVATE_LATCH_ECAT_GET(x) (((uint8_t)(x) & ESC_SYNCM_ACTIVATE_LATCH_ECAT_MASK) >> ESC_SYNCM_ACTIVATE_LATCH_ECAT_SHIFT)

#define	ESC_SYNCM_ACTIVATE_REPEAT_MASK (0x2U)

#define	ESC_SYNCM_ACTIVATE_REPEAT_SHIFT (1U)

#define	ESC_SYNCM_ACTIVATE_REPEAT_GET(x) (((uint8_t)(x) & ESC_SYNCM_ACTIVATE_REPEAT_MASK) >> ESC_SYNCM_ACTIVATE_REPEAT_SHIFT)

#define	ESC_SYNCM_ACTIVATE_EN_MASK (0x1U)

#define	ESC_SYNCM_ACTIVATE_EN_SHIFT (0U)

#define	ESC_SYNCM_ACTIVATE_EN_SET(x) (((uint8_t)(x) << ESC_SYNCM_ACTIVATE_EN_SHIFT) & ESC_SYNCM_ACTIVATE_EN_MASK)

#define	ESC_SYNCM_ACTIVATE_EN_GET(x) (((uint8_t)(x) & ESC_SYNCM_ACTIVATE_EN_MASK) >> ESC_SYNCM_ACTIVATE_EN_SHIFT)

#define	ESC_SYNCM_PDI_CTRL_REPEAT_ACK_MASK (0x2U)

#define	ESC_SYNCM_PDI_CTRL_REPEAT_ACK_SHIFT (1U)

#define	ESC_SYNCM_PDI_CTRL_REPEAT_ACK_SET(x) (((uint8_t)(x) << ESC_SYNCM_PDI_CTRL_REPEAT_ACK_SHIFT) & ESC_SYNCM_PDI_CTRL_REPEAT_ACK_MASK)

#define	ESC_SYNCM_PDI_CTRL_REPEAT_ACK_GET(x) (((uint8_t)(x) & ESC_SYNCM_PDI_CTRL_REPEAT_ACK_MASK) >> ESC_SYNCM_PDI_CTRL_REPEAT_ACK_SHIFT)

#define	ESC_SYNCM_PDI_CTRL_DEACT_MASK (0x1U)

#define	ESC_SYNCM_PDI_CTRL_DEACT_SHIFT (0U)

#define	ESC_SYNCM_PDI_CTRL_DEACT_SET(x) (((uint8_t)(x) << ESC_SYNCM_PDI_CTRL_DEACT_SHIFT) & ESC_SYNCM_PDI_CTRL_DEACT_MASK)

#define	ESC_SYNCM_PDI_CTRL_DEACT_GET(x) (((uint8_t)(x) & ESC_SYNCM_PDI_CTRL_DEACT_MASK) >> ESC_SYNCM_PDI_CTRL_DEACT_SHIFT)

#define	ESC_RCV_TIME_LT_MASK (0xFFFFFF00UL)

#define	ESC_RCV_TIME_LT_SHIFT (8U)

#define	ESC_RCV_TIME_LT_GET(x) (((uint32_t)(x) & ESC_RCV_TIME_LT_MASK) >> ESC_RCV_TIME_LT_SHIFT)

#define	ESC_RCV_TIME_REQ_MASK (0xFFU)

#define	ESC_RCV_TIME_REQ_SHIFT (0U)

#define	ESC_RCV_TIME_REQ_GET(x) (((uint32_t)(x) & ESC_RCV_TIME_REQ_MASK) >> ESC_RCV_TIME_REQ_SHIFT)

#define	ESC_SYS_TIME_ST_MASK (0xFFFFFFFFFFFFFFFFULL)

#define	ESC_SYS_TIME_ST_SHIFT (0U)

#define	ESC_SYS_TIME_ST_SET(x) (((uint64_t)(x) << ESC_SYS_TIME_ST_SHIFT) & ESC_SYS_TIME_ST_MASK)

#define	ESC_SYS_TIME_ST_GET(x) (((uint64_t)(x) & ESC_SYS_TIME_ST_MASK) >> ESC_SYS_TIME_ST_SHIFT)

#define	ESC_RCVT_ECAT_PU_LT_MASK (0xFFFFFFFFFFFFFFFFULL)

#define	ESC_RCVT_ECAT_PU_LT_SHIFT (0U)

#define	ESC_RCVT_ECAT_PU_LT_GET(x) (((uint64_t)(x) & ESC_RCVT_ECAT_PU_LT_MASK) >> ESC_RCVT_ECAT_PU_LT_SHIFT)

#define	ESC_SYS_TIME_OFFSET_OFFSET_MASK (0xFFFFFFFFFFFFFFFFULL)

#define	ESC_SYS_TIME_OFFSET_OFFSET_SHIFT (0U)

#define	ESC_SYS_TIME_OFFSET_OFFSET_SET(x) (((uint64_t)(x) << ESC_SYS_TIME_OFFSET_OFFSET_SHIFT) & ESC_SYS_TIME_OFFSET_OFFSET_MASK)

#define	ESC_SYS_TIME_OFFSET_OFFSET_GET(x) (((uint64_t)(x) & ESC_SYS_TIME_OFFSET_OFFSET_MASK) >> ESC_SYS_TIME_OFFSET_OFFSET_SHIFT)

#define	ESC_SYS_TIME_DELAY_DLY_MASK (0xFFFFFFFFUL)

#define	ESC_SYS_TIME_DELAY_DLY_SHIFT (0U)

#define	ESC_SYS_TIME_DELAY_DLY_SET(x) (((uint32_t)(x) << ESC_SYS_TIME_DELAY_DLY_SHIFT) & ESC_SYS_TIME_DELAY_DLY_MASK)

#define	ESC_SYS_TIME_DELAY_DLY_GET(x) (((uint32_t)(x) & ESC_SYS_TIME_DELAY_DLY_MASK) >> ESC_SYS_TIME_DELAY_DLY_SHIFT)

#define	ESC_SYS_TIME_DIFF_DIFF_MASK (0x80000000UL)

#define	ESC_SYS_TIME_DIFF_DIFF_SHIFT (31U)

#define	ESC_SYS_TIME_DIFF_DIFF_GET(x) (((uint32_t)(x) & ESC_SYS_TIME_DIFF_DIFF_MASK) >> ESC_SYS_TIME_DIFF_DIFF_SHIFT)

#define	ESC_SYS_TIME_DIFF_NUM_MASK (0x7FFFFFFFUL)

#define	ESC_SYS_TIME_DIFF_NUM_SHIFT (0U)

#define	ESC_SYS_TIME_DIFF_NUM_GET(x) (((uint32_t)(x) & ESC_SYS_TIME_DIFF_NUM_MASK) >> ESC_SYS_TIME_DIFF_NUM_SHIFT)

#define	ESC_SPD_CNT_START_BW_MASK (0x7FFFU)

#define	ESC_SPD_CNT_START_BW_SHIFT (0U)

#define	ESC_SPD_CNT_START_BW_SET(x) (((uint16_t)(x) << ESC_SPD_CNT_START_BW_SHIFT) & ESC_SPD_CNT_START_BW_MASK)

#define	ESC_SPD_CNT_START_BW_GET(x) (((uint16_t)(x) & ESC_SPD_CNT_START_BW_MASK) >> ESC_SPD_CNT_START_BW_SHIFT)

#define	ESC_SPD_CNT_DIFF_DIFF_MASK (0xFFFFU)

#define	ESC_SPD_CNT_DIFF_DIFF_SHIFT (0U)

#define	ESC_SPD_CNT_DIFF_DIFF_GET(x) (((uint16_t)(x) & ESC_SPD_CNT_DIFF_DIFF_MASK) >> ESC_SPD_CNT_DIFF_DIFF_SHIFT)

#define	ESC_SYS_TIME_DIFF_FD_DEPTH_MASK (0xFU)

#define	ESC_SYS_TIME_DIFF_FD_DEPTH_SHIFT (0U)

#define	ESC_SYS_TIME_DIFF_FD_DEPTH_SET(x) (((uint8_t)(x) << ESC_SYS_TIME_DIFF_FD_DEPTH_SHIFT) & ESC_SYS_TIME_DIFF_FD_DEPTH_MASK)

#define	ESC_SYS_TIME_DIFF_FD_DEPTH_GET(x) (((uint8_t)(x) & ESC_SYS_TIME_DIFF_FD_DEPTH_MASK) >> ESC_SYS_TIME_DIFF_FD_DEPTH_SHIFT)

#define	ESC_SPD_CNT_FD_DEPTH_MASK (0xFU)

#define	ESC_SPD_CNT_FD_DEPTH_SHIFT (0U)

#define	ESC_SPD_CNT_FD_DEPTH_SET(x) (((uint8_t)(x) << ESC_SPD_CNT_FD_DEPTH_SHIFT) & ESC_SPD_CNT_FD_DEPTH_MASK)

#define	ESC_SPD_CNT_FD_DEPTH_GET(x) (((uint8_t)(x) & ESC_SPD_CNT_FD_DEPTH_MASK) >> ESC_SPD_CNT_FD_DEPTH_SHIFT)

#define	ESC_RCV_TIME_LM_LATCH_MODE_MASK (0x1U)

#define	ESC_RCV_TIME_LM_LATCH_MODE_SHIFT (0U)

#define	ESC_RCV_TIME_LM_LATCH_MODE_GET(x) (((uint8_t)(x) & ESC_RCV_TIME_LM_LATCH_MODE_MASK) >> ESC_RCV_TIME_LM_LATCH_MODE_SHIFT)

#define	ESC_CYC_UNIT_CTRL_LATCHI1_MASK (0x20U)

#define	ESC_CYC_UNIT_CTRL_LATCHI1_SHIFT (5U)

#define	ESC_CYC_UNIT_CTRL_LATCHI1_GET(x) (((uint8_t)(x) & ESC_CYC_UNIT_CTRL_LATCHI1_MASK) >> ESC_CYC_UNIT_CTRL_LATCHI1_SHIFT)

#define	ESC_CYC_UNIT_CTRL_LATCHI0_MASK (0x10U)

#define	ESC_CYC_UNIT_CTRL_LATCHI0_SHIFT (4U)

#define	ESC_CYC_UNIT_CTRL_LATCHI0_GET(x) (((uint8_t)(x) & ESC_CYC_UNIT_CTRL_LATCHI0_MASK) >> ESC_CYC_UNIT_CTRL_LATCHI0_SHIFT)

#define	ESC_CYC_UNIT_CTRL_SYNCO_MASK (0x1U)

#define	ESC_CYC_UNIT_CTRL_SYNCO_SHIFT (0U)

#define	ESC_CYC_UNIT_CTRL_SYNCO_GET(x) (((uint8_t)(x) & ESC_CYC_UNIT_CTRL_SYNCO_MASK) >> ESC_CYC_UNIT_CTRL_SYNCO_SHIFT)

#define	ESC_SYNCO_ACT_SSDP_MASK (0x80U)

#define	ESC_SYNCO_ACT_SSDP_SHIFT (7U)

#define	ESC_SYNCO_ACT_SSDP_SET(x) (((uint8_t)(x) << ESC_SYNCO_ACT_SSDP_SHIFT) & ESC_SYNCO_ACT_SSDP_MASK)

#define	ESC_SYNCO_ACT_SSDP_GET(x) (((uint8_t)(x) & ESC_SYNCO_ACT_SSDP_MASK) >> ESC_SYNCO_ACT_SSDP_SHIFT)

#define	ESC_SYNCO_ACT_NFC_MASK (0x40U)

#define	ESC_SYNCO_ACT_NFC_SHIFT (6U)

#define	ESC_SYNCO_ACT_NFC_SET(x) (((uint8_t)(x) << ESC_SYNCO_ACT_NFC_SHIFT) & ESC_SYNCO_ACT_NFC_MASK)

#define	ESC_SYNCO_ACT_NFC_GET(x) (((uint8_t)(x) & ESC_SYNCO_ACT_NFC_MASK) >> ESC_SYNCO_ACT_NFC_SHIFT)

#define	ESC_SYNCO_ACT_STPC_MASK (0x20U)

#define	ESC_SYNCO_ACT_STPC_SHIFT (5U)

#define	ESC_SYNCO_ACT_STPC_SET(x) (((uint8_t)(x) << ESC_SYNCO_ACT_STPC_SHIFT) & ESC_SYNCO_ACT_STPC_MASK)

#define	ESC_SYNCO_ACT_STPC_GET(x) (((uint8_t)(x) & ESC_SYNCO_ACT_STPC_MASK) >> ESC_SYNCO_ACT_STPC_SHIFT)

#define	ESC_SYNCO_ACT_EXT_MASK (0x10U)

#define	ESC_SYNCO_ACT_EXT_SHIFT (4U)

#define	ESC_SYNCO_ACT_EXT_SET(x) (((uint8_t)(x) << ESC_SYNCO_ACT_EXT_SHIFT) & ESC_SYNCO_ACT_EXT_MASK)

#define	ESC_SYNCO_ACT_EXT_GET(x) (((uint8_t)(x) & ESC_SYNCO_ACT_EXT_MASK) >> ESC_SYNCO_ACT_EXT_SHIFT)

#define	ESC_SYNCO_ACT_AC_MASK (0x8U)

#define	ESC_SYNCO_ACT_AC_SHIFT (3U)

#define	ESC_SYNCO_ACT_AC_SET(x) (((uint8_t)(x) << ESC_SYNCO_ACT_AC_SHIFT) & ESC_SYNCO_ACT_AC_MASK)

#define	ESC_SYNCO_ACT_AC_GET(x) (((uint8_t)(x) & ESC_SYNCO_ACT_AC_MASK) >> ESC_SYNCO_ACT_AC_SHIFT)

#define	ESC_SYNCO_ACT_SYNC1_GEN_MASK (0x4U)

#define	ESC_SYNCO_ACT_SYNC1_GEN_SHIFT (2U)

#define	ESC_SYNCO_ACT_SYNC1_GEN_SET(x) (((uint8_t)(x) << ESC_SYNCO_ACT_SYNC1_GEN_SHIFT) & ESC_SYNCO_ACT_SYNC1_GEN_MASK)

#define	ESC_SYNCO_ACT_SYNC1_GEN_GET(x) (((uint8_t)(x) & ESC_SYNCO_ACT_SYNC1_GEN_MASK) >> ESC_SYNCO_ACT_SYNC1_GEN_SHIFT)

#define	ESC_SYNCO_ACT_SYNC0_GEN_MASK (0x2U)

#define	ESC_SYNCO_ACT_SYNC0_GEN_SHIFT (1U)

#define	ESC_SYNCO_ACT_SYNC0_GEN_SET(x) (((uint8_t)(x) << ESC_SYNCO_ACT_SYNC0_GEN_SHIFT) & ESC_SYNCO_ACT_SYNC0_GEN_MASK)

#define	ESC_SYNCO_ACT_SYNC0_GEN_GET(x) (((uint8_t)(x) & ESC_SYNCO_ACT_SYNC0_GEN_MASK) >> ESC_SYNCO_ACT_SYNC0_GEN_SHIFT)

#define	ESC_SYNCO_ACT_SOUA_MASK (0x1U)

#define	ESC_SYNCO_ACT_SOUA_SHIFT (0U)

#define	ESC_SYNCO_ACT_SOUA_SET(x) (((uint8_t)(x) << ESC_SYNCO_ACT_SOUA_SHIFT) & ESC_SYNCO_ACT_SOUA_MASK)

#define	ESC_SYNCO_ACT_SOUA_GET(x) (((uint8_t)(x) & ESC_SYNCO_ACT_SOUA_MASK) >> ESC_SYNCO_ACT_SOUA_SHIFT)

#define	ESC_PULSE_LEN_LEN_MASK (0xFFFFU)

#define	ESC_PULSE_LEN_LEN_SHIFT (0U)

#define	ESC_PULSE_LEN_LEN_GET(x) (((uint16_t)(x) & ESC_PULSE_LEN_LEN_MASK) >> ESC_PULSE_LEN_LEN_SHIFT)

#define	ESC_ACT_STAT_CHK_RSLT_MASK (0x4U)

#define	ESC_ACT_STAT_CHK_RSLT_SHIFT (2U)

#define	ESC_ACT_STAT_CHK_RSLT_GET(x) (((uint8_t)(x) & ESC_ACT_STAT_CHK_RSLT_MASK) >> ESC_ACT_STAT_CHK_RSLT_SHIFT)

#define	ESC_ACT_STAT_SYNC1_MASK (0x2U)

#define	ESC_ACT_STAT_SYNC1_SHIFT (1U)

#define	ESC_ACT_STAT_SYNC1_GET(x) (((uint8_t)(x) & ESC_ACT_STAT_SYNC1_MASK) >> ESC_ACT_STAT_SYNC1_SHIFT)

#define	ESC_ACT_STAT_SYNC0_MASK (0x1U)

#define	ESC_ACT_STAT_SYNC0_SHIFT (0U)

#define	ESC_ACT_STAT_SYNC0_GET(x) (((uint8_t)(x) & ESC_ACT_STAT_SYNC0_MASK) >> ESC_ACT_STAT_SYNC0_SHIFT)

#define	ESC_SYNC0_STAT_ACK_MASK (0x1U)

#define	ESC_SYNC0_STAT_ACK_SHIFT (0U)

#define	ESC_SYNC0_STAT_ACK_SET(x) (((uint8_t)(x) << ESC_SYNC0_STAT_ACK_SHIFT) & ESC_SYNC0_STAT_ACK_MASK)

#define	ESC_SYNC0_STAT_ACK_GET(x) (((uint8_t)(x) & ESC_SYNC0_STAT_ACK_MASK) >> ESC_SYNC0_STAT_ACK_SHIFT)

#define	ESC_SYNC1_STAT_ACK_MASK (0x1U)

#define	ESC_SYNC1_STAT_ACK_SHIFT (0U)

#define	ESC_SYNC1_STAT_ACK_SET(x) (((uint8_t)(x) << ESC_SYNC1_STAT_ACK_SHIFT) & ESC_SYNC1_STAT_ACK_MASK)

#define	ESC_SYNC1_STAT_ACK_GET(x) (((uint8_t)(x) & ESC_SYNC1_STAT_ACK_MASK) >> ESC_SYNC1_STAT_ACK_SHIFT)

#define	ESC_START_TIME_CO_ST_MASK (0xFFFFFFFFFFFFFFFFULL)

#define	ESC_START_TIME_CO_ST_SHIFT (0U)

#define	ESC_START_TIME_CO_ST_SET(x) (((uint64_t)(x) << ESC_START_TIME_CO_ST_SHIFT) & ESC_START_TIME_CO_ST_MASK)

#define	ESC_START_TIME_CO_ST_GET(x) (((uint64_t)(x) & ESC_START_TIME_CO_ST_MASK) >> ESC_START_TIME_CO_ST_SHIFT)

#define	ESC_NXT_SYNC1_PULSE_TIME_MASK (0xFFFFFFFFFFFFFFFFULL)

#define	ESC_NXT_SYNC1_PULSE_TIME_SHIFT (0U)

#define	ESC_NXT_SYNC1_PULSE_TIME_GET(x) (((uint64_t)(x) & ESC_NXT_SYNC1_PULSE_TIME_MASK) >> ESC_NXT_SYNC1_PULSE_TIME_SHIFT)

#define	ESC_SYNC0_CYC_TIME_CYC_MASK (0xFFFFFFFFUL)

#define	ESC_SYNC0_CYC_TIME_CYC_SHIFT (0U)

#define	ESC_SYNC0_CYC_TIME_CYC_SET(x) (((uint32_t)(x) << ESC_SYNC0_CYC_TIME_CYC_SHIFT) & ESC_SYNC0_CYC_TIME_CYC_MASK)

#define	ESC_SYNC0_CYC_TIME_CYC_GET(x) (((uint32_t)(x) & ESC_SYNC0_CYC_TIME_CYC_MASK) >> ESC_SYNC0_CYC_TIME_CYC_SHIFT)

#define	ESC_SYNC1_CYC_TIME_CYC_MASK (0xFFFFFFFFUL)

#define	ESC_SYNC1_CYC_TIME_CYC_SHIFT (0U)

#define	ESC_SYNC1_CYC_TIME_CYC_SET(x) (((uint32_t)(x) << ESC_SYNC1_CYC_TIME_CYC_SHIFT) & ESC_SYNC1_CYC_TIME_CYC_MASK)

#define	ESC_SYNC1_CYC_TIME_CYC_GET(x) (((uint32_t)(x) & ESC_SYNC1_CYC_TIME_CYC_MASK) >> ESC_SYNC1_CYC_TIME_CYC_SHIFT)

#define	ESC_LATCH0_CTRL_NEG_EDGE_MASK (0x2U)

#define	ESC_LATCH0_CTRL_NEG_EDGE_SHIFT (1U)

#define	ESC_LATCH0_CTRL_NEG_EDGE_SET(x) (((uint8_t)(x) << ESC_LATCH0_CTRL_NEG_EDGE_SHIFT) & ESC_LATCH0_CTRL_NEG_EDGE_MASK)

#define	ESC_LATCH0_CTRL_NEG_EDGE_GET(x) (((uint8_t)(x) & ESC_LATCH0_CTRL_NEG_EDGE_MASK) >> ESC_LATCH0_CTRL_NEG_EDGE_SHIFT)

#define	ESC_LATCH0_CTRL_POS_EDGE_MASK (0x1U)

#define	ESC_LATCH0_CTRL_POS_EDGE_SHIFT (0U)

#define	ESC_LATCH0_CTRL_POS_EDGE_SET(x) (((uint8_t)(x) << ESC_LATCH0_CTRL_POS_EDGE_SHIFT) & ESC_LATCH0_CTRL_POS_EDGE_MASK)

#define	ESC_LATCH0_CTRL_POS_EDGE_GET(x) (((uint8_t)(x) & ESC_LATCH0_CTRL_POS_EDGE_MASK) >> ESC_LATCH0_CTRL_POS_EDGE_SHIFT)

#define	ESC_LATCH1_CTRL_NEG_EDGE_MASK (0x2U)

#define	ESC_LATCH1_CTRL_NEG_EDGE_SHIFT (1U)

#define	ESC_LATCH1_CTRL_NEG_EDGE_SET(x) (((uint8_t)(x) << ESC_LATCH1_CTRL_NEG_EDGE_SHIFT) & ESC_LATCH1_CTRL_NEG_EDGE_MASK)

#define	ESC_LATCH1_CTRL_NEG_EDGE_GET(x) (((uint8_t)(x) & ESC_LATCH1_CTRL_NEG_EDGE_MASK) >> ESC_LATCH1_CTRL_NEG_EDGE_SHIFT)

#define	ESC_LATCH1_CTRL_POS_EDGE_MASK (0x1U)

#define	ESC_LATCH1_CTRL_POS_EDGE_SHIFT (0U)

#define	ESC_LATCH1_CTRL_POS_EDGE_SET(x) (((uint8_t)(x) << ESC_LATCH1_CTRL_POS_EDGE_SHIFT) & ESC_LATCH1_CTRL_POS_EDGE_MASK)

#define	ESC_LATCH1_CTRL_POS_EDGE_GET(x) (((uint8_t)(x) & ESC_LATCH1_CTRL_POS_EDGE_MASK) >> ESC_LATCH1_CTRL_POS_EDGE_SHIFT)

#define	ESC_LATCH0_STAT_PIN_STAT_MASK (0x4U)

#define	ESC_LATCH0_STAT_PIN_STAT_SHIFT (2U)

#define	ESC_LATCH0_STAT_PIN_STAT_GET(x) (((uint8_t)(x) & ESC_LATCH0_STAT_PIN_STAT_MASK) >> ESC_LATCH0_STAT_PIN_STAT_SHIFT)

#define	ESC_LATCH0_STAT_NEG_EDGE_MASK (0x2U)

#define	ESC_LATCH0_STAT_NEG_EDGE_SHIFT (1U)

#define	ESC_LATCH0_STAT_NEG_EDGE_GET(x) (((uint8_t)(x) & ESC_LATCH0_STAT_NEG_EDGE_MASK) >> ESC_LATCH0_STAT_NEG_EDGE_SHIFT)

#define	ESC_LATCH0_STAT_POS_EDGE_MASK (0x1U)

#define	ESC_LATCH0_STAT_POS_EDGE_SHIFT (0U)

#define	ESC_LATCH0_STAT_POS_EDGE_GET(x) (((uint8_t)(x) & ESC_LATCH0_STAT_POS_EDGE_MASK) >> ESC_LATCH0_STAT_POS_EDGE_SHIFT)

#define	ESC_LATCH1_STAT_PIN_STAT_MASK (0x4U)

#define	ESC_LATCH1_STAT_PIN_STAT_SHIFT (2U)

#define	ESC_LATCH1_STAT_PIN_STAT_GET(x) (((uint8_t)(x) & ESC_LATCH1_STAT_PIN_STAT_MASK) >> ESC_LATCH1_STAT_PIN_STAT_SHIFT)

#define	ESC_LATCH1_STAT_NEG_EDGE_MASK (0x2U)

#define	ESC_LATCH1_STAT_NEG_EDGE_SHIFT (1U)

#define	ESC_LATCH1_STAT_NEG_EDGE_GET(x) (((uint8_t)(x) & ESC_LATCH1_STAT_NEG_EDGE_MASK) >> ESC_LATCH1_STAT_NEG_EDGE_SHIFT)

#define	ESC_LATCH1_STAT_POS_EDGE_MASK (0x1U)

#define	ESC_LATCH1_STAT_POS_EDGE_SHIFT (0U)

#define	ESC_LATCH1_STAT_POS_EDGE_GET(x) (((uint8_t)(x) & ESC_LATCH1_STAT_POS_EDGE_MASK) >> ESC_LATCH1_STAT_POS_EDGE_SHIFT)

#define	ESC_LATCH0_TIME_PE_TIME_MASK (0xFFFFFFFFFFFFFFFFULL)

#define	ESC_LATCH0_TIME_PE_TIME_SHIFT (0U)

#define	ESC_LATCH0_TIME_PE_TIME_SET(x) (((uint64_t)(x) << ESC_LATCH0_TIME_PE_TIME_SHIFT) & ESC_LATCH0_TIME_PE_TIME_MASK)

#define	ESC_LATCH0_TIME_PE_TIME_GET(x) (((uint64_t)(x) & ESC_LATCH0_TIME_PE_TIME_MASK) >> ESC_LATCH0_TIME_PE_TIME_SHIFT)

#define	ESC_LATCH0_TIME_NE_TIME_MASK (0xFFFFFFFFFFFFFFFFULL)

#define	ESC_LATCH0_TIME_NE_TIME_SHIFT (0U)

#define	ESC_LATCH0_TIME_NE_TIME_SET(x) (((uint64_t)(x) << ESC_LATCH0_TIME_NE_TIME_SHIFT) & ESC_LATCH0_TIME_NE_TIME_MASK)

#define	ESC_LATCH0_TIME_NE_TIME_GET(x) (((uint64_t)(x) & ESC_LATCH0_TIME_NE_TIME_MASK) >> ESC_LATCH0_TIME_NE_TIME_SHIFT)

#define	ESC_LATCH1_TIME_PE_TIME_MASK (0xFFFFFFFFFFFFFFFFULL)

#define	ESC_LATCH1_TIME_PE_TIME_SHIFT (0U)

#define	ESC_LATCH1_TIME_PE_TIME_SET(x) (((uint64_t)(x) << ESC_LATCH1_TIME_PE_TIME_SHIFT) & ESC_LATCH1_TIME_PE_TIME_MASK)

#define	ESC_LATCH1_TIME_PE_TIME_GET(x) (((uint64_t)(x) & ESC_LATCH1_TIME_PE_TIME_MASK) >> ESC_LATCH1_TIME_PE_TIME_SHIFT)

#define	ESC_LATCH1_TIME_NE_TIME_MASK (0xFFFFFFFFFFFFFFFFULL)

#define	ESC_LATCH1_TIME_NE_TIME_SHIFT (0U)

#define	ESC_LATCH1_TIME_NE_TIME_SET(x) (((uint64_t)(x) << ESC_LATCH1_TIME_NE_TIME_SHIFT) & ESC_LATCH1_TIME_NE_TIME_MASK)

#define	ESC_LATCH1_TIME_NE_TIME_GET(x) (((uint64_t)(x) & ESC_LATCH1_TIME_NE_TIME_MASK) >> ESC_LATCH1_TIME_NE_TIME_SHIFT)

#define	ESC_ECAT_BUF_CET_TIME_MASK (0xFFFFFFFFUL)

#define	ESC_ECAT_BUF_CET_TIME_SHIFT (0U)

#define	ESC_ECAT_BUF_CET_TIME_GET(x) (((uint32_t)(x) & ESC_ECAT_BUF_CET_TIME_MASK) >> ESC_ECAT_BUF_CET_TIME_SHIFT)

#define	ESC_PDI_BUF_SET_TIME_MASK (0xFFFFFFFFUL)

#define	ESC_PDI_BUF_SET_TIME_SHIFT (0U)

#define	ESC_PDI_BUF_SET_TIME_GET(x) (((uint32_t)(x) & ESC_PDI_BUF_SET_TIME_MASK) >> ESC_PDI_BUF_SET_TIME_SHIFT)

#define	ESC_PDI_BUF_CET_TIME_MASK (0xFFFFFFFFUL)

#define	ESC_PDI_BUF_CET_TIME_SHIFT (0U)

#define	ESC_PDI_BUF_CET_TIME_GET(x) (((uint32_t)(x) & ESC_PDI_BUF_CET_TIME_MASK) >> ESC_PDI_BUF_CET_TIME_SHIFT)

#define	ESC_PID_PID_MASK (0xFFFFFFFFFFFFFFFFULL)

#define	ESC_PID_PID_SHIFT (0U)

#define	ESC_PID_PID_GET(x) (((uint64_t)(x) & ESC_PID_PID_MASK) >> ESC_PID_PID_SHIFT)

#define	ESC_VID_VID_MASK (0xFFFFFFFFFFFFFFFFULL)

#define	ESC_VID_VID_SHIFT (0U)

#define	ESC_VID_VID_GET(x) (((uint64_t)(x) & ESC_VID_VID_MASK) >> ESC_VID_VID_SHIFT)

#define	ESC_DIO_OUT_DATA_OD_MASK (0xFFFFFFFFUL)

#define	ESC_DIO_OUT_DATA_OD_SHIFT (0U)

#define	ESC_DIO_OUT_DATA_OD_GET(x) (((uint32_t)(x) & ESC_DIO_OUT_DATA_OD_MASK) >> ESC_DIO_OUT_DATA_OD_SHIFT)

#define	ESC_GPO_GPOD_MASK (0xFFFFFFFFFFFFFFFFULL)

#define	ESC_GPO_GPOD_SHIFT (0U)

#define	ESC_GPO_GPOD_SET(x) (((uint64_t)(x) << ESC_GPO_GPOD_SHIFT) & ESC_GPO_GPOD_MASK)

#define	ESC_GPO_GPOD_GET(x) (((uint64_t)(x) & ESC_GPO_GPOD_MASK) >> ESC_GPO_GPOD_SHIFT)

#define	ESC_GPI_GPID_MASK (0xFFFFFFFFFFFFFFFFULL)

#define	ESC_GPI_GPID_SHIFT (0U)

#define	ESC_GPI_GPID_GET(x) (((uint64_t)(x) & ESC_GPI_GPID_MASK) >> ESC_GPI_GPID_SHIFT)

#define	ESC_USER_RAM_BYTE0_EXTF_MASK (0xFFU)

#define	ESC_USER_RAM_BYTE0_EXTF_SHIFT (0U)

#define	ESC_USER_RAM_BYTE0_EXTF_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE0_EXTF_SHIFT) & ESC_USER_RAM_BYTE0_EXTF_MASK)

#define	ESC_USER_RAM_BYTE0_EXTF_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE0_EXTF_MASK) >> ESC_USER_RAM_BYTE0_EXTF_SHIFT)

#define	ESC_USER_RAM_BYTE1_PRWO_MASK (0x80U)

#define	ESC_USER_RAM_BYTE1_PRWO_SHIFT (7U)

#define	ESC_USER_RAM_BYTE1_PRWO_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE1_PRWO_SHIFT) & ESC_USER_RAM_BYTE1_PRWO_MASK)

#define	ESC_USER_RAM_BYTE1_PRWO_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE1_PRWO_MASK) >> ESC_USER_RAM_BYTE1_PRWO_SHIFT)

#define	ESC_USER_RAM_BYTE1_AEMW_MASK (0x40U)

#define	ESC_USER_RAM_BYTE1_AEMW_SHIFT (6U)

#define	ESC_USER_RAM_BYTE1_AEMW_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE1_AEMW_SHIFT) & ESC_USER_RAM_BYTE1_AEMW_MASK)

#define	ESC_USER_RAM_BYTE1_AEMW_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE1_AEMW_MASK) >> ESC_USER_RAM_BYTE1_AEMW_SHIFT)

#define	ESC_USER_RAM_BYTE1_GPO_MASK (0x20U)

#define	ESC_USER_RAM_BYTE1_GPO_SHIFT (5U)

#define	ESC_USER_RAM_BYTE1_GPO_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE1_GPO_SHIFT) & ESC_USER_RAM_BYTE1_GPO_MASK)

#define	ESC_USER_RAM_BYTE1_GPO_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE1_GPO_MASK) >> ESC_USER_RAM_BYTE1_GPO_SHIFT)

#define	ESC_USER_RAM_BYTE1_GPI_MASK (0x10U)

#define	ESC_USER_RAM_BYTE1_GPI_SHIFT (4U)

#define	ESC_USER_RAM_BYTE1_GPI_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE1_GPI_SHIFT) & ESC_USER_RAM_BYTE1_GPI_MASK)

#define	ESC_USER_RAM_BYTE1_GPI_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE1_GPI_MASK) >> ESC_USER_RAM_BYTE1_GPI_SHIFT)

#define	ESC_USER_RAM_BYTE1_CSA_MASK (0x8U)

#define	ESC_USER_RAM_BYTE1_CSA_SHIFT (3U)

#define	ESC_USER_RAM_BYTE1_CSA_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE1_CSA_SHIFT) & ESC_USER_RAM_BYTE1_CSA_MASK)

#define	ESC_USER_RAM_BYTE1_CSA_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE1_CSA_MASK) >> ESC_USER_RAM_BYTE1_CSA_SHIFT)

#define	ESC_USER_RAM_BYTE1_EIM_MASK (0x4U)

#define	ESC_USER_RAM_BYTE1_EIM_SHIFT (2U)

#define	ESC_USER_RAM_BYTE1_EIM_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE1_EIM_SHIFT) & ESC_USER_RAM_BYTE1_EIM_MASK)

#define	ESC_USER_RAM_BYTE1_EIM_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE1_EIM_MASK) >> ESC_USER_RAM_BYTE1_EIM_SHIFT)

#define	ESC_USER_RAM_BYTE1_ALSCR_MASK (0x2U)

#define	ESC_USER_RAM_BYTE1_ALSCR_SHIFT (1U)

#define	ESC_USER_RAM_BYTE1_ALSCR_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE1_ALSCR_SHIFT) & ESC_USER_RAM_BYTE1_ALSCR_MASK)

#define	ESC_USER_RAM_BYTE1_ALSCR_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE1_ALSCR_MASK) >> ESC_USER_RAM_BYTE1_ALSCR_SHIFT)

#define	ESC_USER_RAM_BYTE1_EDLCR_MASK (0x1U)

#define	ESC_USER_RAM_BYTE1_EDLCR_SHIFT (0U)

#define	ESC_USER_RAM_BYTE1_EDLCR_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE1_EDLCR_SHIFT) & ESC_USER_RAM_BYTE1_EDLCR_MASK)

#define	ESC_USER_RAM_BYTE1_EDLCR_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE1_EDLCR_MASK) >> ESC_USER_RAM_BYTE1_EDLCR_SHIFT)

#define	ESC_USER_RAM_BYTE2_ESCFG_MASK (0x80U)

#define	ESC_USER_RAM_BYTE2_ESCFG_SHIFT (7U)

#define	ESC_USER_RAM_BYTE2_ESCFG_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE2_ESCFG_SHIFT) & ESC_USER_RAM_BYTE2_ESCFG_MASK)

#define	ESC_USER_RAM_BYTE2_ESCFG_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE2_ESCFG_MASK) >> ESC_USER_RAM_BYTE2_ESCFG_SHIFT)

#define	ESC_USER_RAM_BYTE2_EPUPEC_MASK (0x40U)

#define	ESC_USER_RAM_BYTE2_EPUPEC_SHIFT (6U)

#define	ESC_USER_RAM_BYTE2_EPUPEC_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE2_EPUPEC_SHIFT) & ESC_USER_RAM_BYTE2_EPUPEC_MASK)

#define	ESC_USER_RAM_BYTE2_EPUPEC_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE2_EPUPEC_MASK) >> ESC_USER_RAM_BYTE2_EPUPEC_SHIFT)

#define	ESC_USER_RAM_BYTE2_DCSMET_MASK (0x20U)

#define	ESC_USER_RAM_BYTE2_DCSMET_SHIFT (5U)

#define	ESC_USER_RAM_BYTE2_DCSMET_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE2_DCSMET_SHIFT) & ESC_USER_RAM_BYTE2_DCSMET_MASK)

#define	ESC_USER_RAM_BYTE2_DCSMET_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE2_DCSMET_MASK) >> ESC_USER_RAM_BYTE2_DCSMET_SHIFT)

#define	ESC_USER_RAM_BYTE2_RESET_MASK (0x8U)

#define	ESC_USER_RAM_BYTE2_RESET_SHIFT (3U)

#define	ESC_USER_RAM_BYTE2_RESET_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE2_RESET_SHIFT) & ESC_USER_RAM_BYTE2_RESET_MASK)

#define	ESC_USER_RAM_BYTE2_RESET_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE2_RESET_MASK) >> ESC_USER_RAM_BYTE2_RESET_SHIFT)

#define	ESC_USER_RAM_BYTE2_WP_MASK (0x4U)

#define	ESC_USER_RAM_BYTE2_WP_SHIFT (2U)

#define	ESC_USER_RAM_BYTE2_WP_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE2_WP_SHIFT) & ESC_USER_RAM_BYTE2_WP_MASK)

#define	ESC_USER_RAM_BYTE2_WP_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE2_WP_MASK) >> ESC_USER_RAM_BYTE2_WP_SHIFT)

#define	ESC_USER_RAM_BYTE2_WDGCNT_MASK (0x2U)

#define	ESC_USER_RAM_BYTE2_WDGCNT_SHIFT (1U)

#define	ESC_USER_RAM_BYTE2_WDGCNT_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE2_WDGCNT_SHIFT) & ESC_USER_RAM_BYTE2_WDGCNT_MASK)

#define	ESC_USER_RAM_BYTE2_WDGCNT_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE2_WDGCNT_MASK) >> ESC_USER_RAM_BYTE2_WDGCNT_SHIFT)

#define	ESC_USER_RAM_BYTE2_WDW_MASK (0x1U)

#define	ESC_USER_RAM_BYTE2_WDW_SHIFT (0U)

#define	ESC_USER_RAM_BYTE2_WDW_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE2_WDW_SHIFT) & ESC_USER_RAM_BYTE2_WDW_MASK)

#define	ESC_USER_RAM_BYTE2_WDW_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE2_WDW_MASK) >> ESC_USER_RAM_BYTE2_WDW_SHIFT)

#define	ESC_USER_RAM_BYTE3_RLED_MASK (0x80U)

#define	ESC_USER_RAM_BYTE3_RLED_SHIFT (7U)

#define	ESC_USER_RAM_BYTE3_RLED_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE3_RLED_SHIFT) & ESC_USER_RAM_BYTE3_RLED_MASK)

#define	ESC_USER_RAM_BYTE3_RLED_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE3_RLED_MASK) >> ESC_USER_RAM_BYTE3_RLED_SHIFT)

#define	ESC_USER_RAM_BYTE3_ELDE_MASK (0x40U)

#define	ESC_USER_RAM_BYTE3_ELDE_SHIFT (6U)

#define	ESC_USER_RAM_BYTE3_ELDE_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE3_ELDE_SHIFT) & ESC_USER_RAM_BYTE3_ELDE_MASK)

#define	ESC_USER_RAM_BYTE3_ELDE_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE3_ELDE_MASK) >> ESC_USER_RAM_BYTE3_ELDE_SHIFT)

#define	ESC_USER_RAM_BYTE3_ELDM_MASK (0x20U)

#define	ESC_USER_RAM_BYTE3_ELDM_SHIFT (5U)

#define	ESC_USER_RAM_BYTE3_ELDM_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE3_ELDM_SHIFT) & ESC_USER_RAM_BYTE3_ELDM_MASK)

#define	ESC_USER_RAM_BYTE3_ELDM_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE3_ELDM_MASK) >> ESC_USER_RAM_BYTE3_ELDM_SHIFT)

#define	ESC_USER_RAM_BYTE3_MMI_MASK (0x10U)

#define	ESC_USER_RAM_BYTE3_MMI_SHIFT (4U)

#define	ESC_USER_RAM_BYTE3_MMI_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE3_MMI_SHIFT) & ESC_USER_RAM_BYTE3_MMI_MASK)

#define	ESC_USER_RAM_BYTE3_MMI_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE3_MMI_MASK) >> ESC_USER_RAM_BYTE3_MMI_SHIFT)

#define	ESC_USER_RAM_BYTE3_LLC_MASK (0x8U)

#define	ESC_USER_RAM_BYTE3_LLC_SHIFT (3U)

#define	ESC_USER_RAM_BYTE3_LLC_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE3_LLC_SHIFT) & ESC_USER_RAM_BYTE3_LLC_MASK)

#define	ESC_USER_RAM_BYTE3_LLC_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE3_LLC_MASK) >> ESC_USER_RAM_BYTE3_LLC_SHIFT)

#define	ESC_USER_RAM_BYTE4_LDCM_MASK (0x80U)

#define	ESC_USER_RAM_BYTE4_LDCM_SHIFT (7U)

#define	ESC_USER_RAM_BYTE4_LDCM_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE4_LDCM_SHIFT) & ESC_USER_RAM_BYTE4_LDCM_MASK)

#define	ESC_USER_RAM_BYTE4_LDCM_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE4_LDCM_MASK) >> ESC_USER_RAM_BYTE4_LDCM_SHIFT)

#define	ESC_USER_RAM_BYTE4_DTLC_MASK (0x40U)

#define	ESC_USER_RAM_BYTE4_DTLC_SHIFT (6U)

#define	ESC_USER_RAM_BYTE4_DTLC_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE4_DTLC_SHIFT) & ESC_USER_RAM_BYTE4_DTLC_MASK)

#define	ESC_USER_RAM_BYTE4_DTLC_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE4_DTLC_MASK) >> ESC_USER_RAM_BYTE4_DTLC_SHIFT)

#define	ESC_USER_RAM_BYTE4_DSOU_MASK (0x20U)

#define	ESC_USER_RAM_BYTE4_DSOU_SHIFT (5U)

#define	ESC_USER_RAM_BYTE4_DSOU_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE4_DSOU_SHIFT) & ESC_USER_RAM_BYTE4_DSOU_MASK)

#define	ESC_USER_RAM_BYTE4_DSOU_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE4_DSOU_MASK) >> ESC_USER_RAM_BYTE4_DSOU_SHIFT)

#define	ESC_USER_RAM_BYTE4_DLIU_MASK (0x8U)

#define	ESC_USER_RAM_BYTE4_DLIU_SHIFT (3U)

#define	ESC_USER_RAM_BYTE4_DLIU_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE4_DLIU_SHIFT) & ESC_USER_RAM_BYTE4_DLIU_MASK)

#define	ESC_USER_RAM_BYTE4_DLIU_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE4_DLIU_MASK) >> ESC_USER_RAM_BYTE4_DLIU_SHIFT)

#define	ESC_USER_RAM_BYTE4_LALED_MASK (0x1U)

#define	ESC_USER_RAM_BYTE4_LALED_SHIFT (0U)

#define	ESC_USER_RAM_BYTE4_LALED_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE4_LALED_SHIFT) & ESC_USER_RAM_BYTE4_LALED_MASK)

#define	ESC_USER_RAM_BYTE4_LALED_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE4_LALED_MASK) >> ESC_USER_RAM_BYTE4_LALED_SHIFT)

#define	ESC_USER_RAM_BYTE5_DDIOR_MASK (0x20U)

#define	ESC_USER_RAM_BYTE5_DDIOR_SHIFT (5U)

#define	ESC_USER_RAM_BYTE5_DDIOR_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE5_DDIOR_SHIFT) & ESC_USER_RAM_BYTE5_DDIOR_MASK)

#define	ESC_USER_RAM_BYTE5_DDIOR_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE5_DDIOR_MASK) >> ESC_USER_RAM_BYTE5_DDIOR_SHIFT)

#define	ESC_USER_RAM_BYTE5_EEU_MASK (0x4U)

#define	ESC_USER_RAM_BYTE5_EEU_SHIFT (2U)

#define	ESC_USER_RAM_BYTE5_EEU_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE5_EEU_SHIFT) & ESC_USER_RAM_BYTE5_EEU_MASK)

#define	ESC_USER_RAM_BYTE5_EEU_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE5_EEU_MASK) >> ESC_USER_RAM_BYTE5_EEU_SHIFT)

#define	ESC_USER_RAM_BYTE5_ATS_MASK (0x2U)

#define	ESC_USER_RAM_BYTE5_ATS_SHIFT (1U)

#define	ESC_USER_RAM_BYTE5_ATS_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE5_ATS_SHIFT) & ESC_USER_RAM_BYTE5_ATS_MASK)

#define	ESC_USER_RAM_BYTE5_ATS_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE5_ATS_MASK) >> ESC_USER_RAM_BYTE5_ATS_SHIFT)

#define	ESC_USER_RAM_BYTE5_MCPP_MASK (0x1U)

#define	ESC_USER_RAM_BYTE5_MCPP_SHIFT (0U)

#define	ESC_USER_RAM_BYTE5_MCPP_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE5_MCPP_SHIFT) & ESC_USER_RAM_BYTE5_MCPP_MASK)

#define	ESC_USER_RAM_BYTE5_MCPP_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE5_MCPP_MASK) >> ESC_USER_RAM_BYTE5_MCPP_SHIFT)

#define	ESC_USER_RAM_BYTE6_RELEDOR_MASK (0x4U)

#define	ESC_USER_RAM_BYTE6_RELEDOR_SHIFT (2U)

#define	ESC_USER_RAM_BYTE6_RELEDOR_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE6_RELEDOR_SHIFT) & ESC_USER_RAM_BYTE6_RELEDOR_MASK)

#define	ESC_USER_RAM_BYTE6_RELEDOR_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE6_RELEDOR_MASK) >> ESC_USER_RAM_BYTE6_RELEDOR_SHIFT)

#define	ESC_USER_RAM_BYTE7_DCST_MASK (0x80U)

#define	ESC_USER_RAM_BYTE7_DCST_SHIFT (7U)

#define	ESC_USER_RAM_BYTE7_DCST_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE7_DCST_SHIFT) & ESC_USER_RAM_BYTE7_DCST_MASK)

#define	ESC_USER_RAM_BYTE7_DCST_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE7_DCST_MASK) >> ESC_USER_RAM_BYTE7_DCST_SHIFT)

#define	ESC_USER_RAM_BYTE7_DCRT_MASK (0x40U)

#define	ESC_USER_RAM_BYTE7_DCRT_SHIFT (6U)

#define	ESC_USER_RAM_BYTE7_DCRT_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE7_DCRT_SHIFT) & ESC_USER_RAM_BYTE7_DCRT_MASK)

#define	ESC_USER_RAM_BYTE7_DCRT_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE7_DCRT_MASK) >> ESC_USER_RAM_BYTE7_DCRT_SHIFT)

#define	ESC_USER_RAM_BYTE7_DCS1D_MASK (0x8U)

#define	ESC_USER_RAM_BYTE7_DCS1D_SHIFT (3U)

#define	ESC_USER_RAM_BYTE7_DCS1D_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE7_DCS1D_SHIFT) & ESC_USER_RAM_BYTE7_DCS1D_MASK)

#define	ESC_USER_RAM_BYTE7_DCS1D_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE7_DCS1D_MASK) >> ESC_USER_RAM_BYTE7_DCS1D_SHIFT)

#define	ESC_USER_RAM_BYTE8_PPDI_MASK (0x20U)

#define	ESC_USER_RAM_BYTE8_PPDI_SHIFT (5U)

#define	ESC_USER_RAM_BYTE8_PPDI_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE8_PPDI_SHIFT) & ESC_USER_RAM_BYTE8_PPDI_MASK)

#define	ESC_USER_RAM_BYTE8_PPDI_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE8_PPDI_MASK) >> ESC_USER_RAM_BYTE8_PPDI_SHIFT)

#define	ESC_USER_RAM_BYTE8_OPDI_MASK (0x10U)

#define	ESC_USER_RAM_BYTE8_OPDI_SHIFT (4U)

#define	ESC_USER_RAM_BYTE8_OPDI_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE8_OPDI_SHIFT) & ESC_USER_RAM_BYTE8_OPDI_MASK)

#define	ESC_USER_RAM_BYTE8_OPDI_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE8_OPDI_MASK) >> ESC_USER_RAM_BYTE8_OPDI_SHIFT)

#define	ESC_USER_RAM_BYTE8_APDI_MASK (0x8U)

#define	ESC_USER_RAM_BYTE8_APDI_SHIFT (3U)

#define	ESC_USER_RAM_BYTE8_APDI_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE8_APDI_SHIFT) & ESC_USER_RAM_BYTE8_APDI_MASK)

#define	ESC_USER_RAM_BYTE8_APDI_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE8_APDI_MASK) >> ESC_USER_RAM_BYTE8_APDI_SHIFT)

#define	ESC_USER_RAM_BYTE8_PDICEC_MASK (0x4U)

#define	ESC_USER_RAM_BYTE8_PDICEC_SHIFT (2U)

#define	ESC_USER_RAM_BYTE8_PDICEC_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE8_PDICEC_SHIFT) & ESC_USER_RAM_BYTE8_PDICEC_MASK)

#define	ESC_USER_RAM_BYTE8_PDICEC_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE8_PDICEC_MASK) >> ESC_USER_RAM_BYTE8_PDICEC_SHIFT)

#define	ESC_USER_RAM_BYTE8_DC64_MASK (0x1U)

#define	ESC_USER_RAM_BYTE8_DC64_SHIFT (0U)

#define	ESC_USER_RAM_BYTE8_DC64_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE8_DC64_SHIFT) & ESC_USER_RAM_BYTE8_DC64_MASK)

#define	ESC_USER_RAM_BYTE8_DC64_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE8_DC64_MASK) >> ESC_USER_RAM_BYTE8_DC64_SHIFT)

#define	ESC_USER_RAM_BYTE9_DR_MASK (0x80U)

#define	ESC_USER_RAM_BYTE9_DR_SHIFT (7U)

#define	ESC_USER_RAM_BYTE9_DR_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE9_DR_SHIFT) & ESC_USER_RAM_BYTE9_DR_MASK)

#define	ESC_USER_RAM_BYTE9_DR_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE9_DR_MASK) >> ESC_USER_RAM_BYTE9_DR_SHIFT)

#define	ESC_USER_RAM_BYTE10_PDIIR_MASK (0x80U)

#define	ESC_USER_RAM_BYTE10_PDIIR_SHIFT (7U)

#define	ESC_USER_RAM_BYTE10_PDIIR_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE10_PDIIR_SHIFT) & ESC_USER_RAM_BYTE10_PDIIR_MASK)

#define	ESC_USER_RAM_BYTE10_PDIIR_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE10_PDIIR_MASK) >> ESC_USER_RAM_BYTE10_PDIIR_SHIFT)

#define	ESC_USER_RAM_BYTE10_PDIFA_MASK (0x40U)

#define	ESC_USER_RAM_BYTE10_PDIFA_SHIFT (6U)

#define	ESC_USER_RAM_BYTE10_PDIFA_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE10_PDIFA_SHIFT) & ESC_USER_RAM_BYTE10_PDIFA_MASK)

#define	ESC_USER_RAM_BYTE10_PDIFA_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE10_PDIFA_MASK) >> ESC_USER_RAM_BYTE10_PDIFA_SHIFT)

#define	ESC_USER_RAM_BYTE10_APDI_MASK (0x8U)

#define	ESC_USER_RAM_BYTE10_APDI_SHIFT (3U)

#define	ESC_USER_RAM_BYTE10_APDI_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE10_APDI_SHIFT) & ESC_USER_RAM_BYTE10_APDI_MASK)

#define	ESC_USER_RAM_BYTE10_APDI_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE10_APDI_MASK) >> ESC_USER_RAM_BYTE10_APDI_SHIFT)

#define	ESC_USER_RAM_BYTE10_DCL1D_MASK (0x4U)

#define	ESC_USER_RAM_BYTE10_DCL1D_SHIFT (2U)

#define	ESC_USER_RAM_BYTE10_DCL1D_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE10_DCL1D_SHIFT) & ESC_USER_RAM_BYTE10_DCL1D_MASK)

#define	ESC_USER_RAM_BYTE10_DCL1D_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE10_DCL1D_MASK) >> ESC_USER_RAM_BYTE10_DCL1D_SHIFT)

#define	ESC_USER_RAM_BYTE11_LEDTST_MASK (0x8U)

#define	ESC_USER_RAM_BYTE11_LEDTST_SHIFT (3U)

#define	ESC_USER_RAM_BYTE11_LEDTST_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE11_LEDTST_SHIFT) & ESC_USER_RAM_BYTE11_LEDTST_MASK)

#define	ESC_USER_RAM_BYTE11_LEDTST_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE11_LEDTST_MASK) >> ESC_USER_RAM_BYTE11_LEDTST_SHIFT)

#define	ESC_USER_RAM_BYTE14_DIOBS_MASK (0xC0U)

#define	ESC_USER_RAM_BYTE14_DIOBS_SHIFT (6U)

#define	ESC_USER_RAM_BYTE14_DIOBS_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE14_DIOBS_SHIFT) & ESC_USER_RAM_BYTE14_DIOBS_MASK)

#define	ESC_USER_RAM_BYTE14_DIOBS_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE14_DIOBS_MASK) >> ESC_USER_RAM_BYTE14_DIOBS_SHIFT)

#define	ESC_USER_RAM_BYTE15_AUCPDI_MASK (0x10U)

#define	ESC_USER_RAM_BYTE15_AUCPDI_SHIFT (4U)

#define	ESC_USER_RAM_BYTE15_AUCPDI_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE15_AUCPDI_SHIFT) & ESC_USER_RAM_BYTE15_AUCPDI_MASK)

#define	ESC_USER_RAM_BYTE15_AUCPDI_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE15_AUCPDI_MASK) >> ESC_USER_RAM_BYTE15_AUCPDI_SHIFT)

#define	ESC_USER_RAM_BYTE15_SSPDI_MASK (0x8U)

#define	ESC_USER_RAM_BYTE15_SSPDI_SHIFT (3U)

#define	ESC_USER_RAM_BYTE15_SSPDI_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE15_SSPDI_SHIFT) & ESC_USER_RAM_BYTE15_SSPDI_MASK)

#define	ESC_USER_RAM_BYTE15_SSPDI_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE15_SSPDI_MASK) >> ESC_USER_RAM_BYTE15_SSPDI_SHIFT)

#define	ESC_USER_RAM_BYTE15_DIOPDI_MASK (0x4U)

#define	ESC_USER_RAM_BYTE15_DIOPDI_SHIFT (2U)

#define	ESC_USER_RAM_BYTE15_DIOPDI_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE15_DIOPDI_SHIFT) & ESC_USER_RAM_BYTE15_DIOPDI_MASK)

#define	ESC_USER_RAM_BYTE15_DIOPDI_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE15_DIOPDI_MASK) >> ESC_USER_RAM_BYTE15_DIOPDI_SHIFT)

#define	ESC_USER_RAM_BYTE19_SCP_MASK (0x40U)

#define	ESC_USER_RAM_BYTE19_SCP_SHIFT (6U)

#define	ESC_USER_RAM_BYTE19_SCP_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE19_SCP_SHIFT) & ESC_USER_RAM_BYTE19_SCP_MASK)

#define	ESC_USER_RAM_BYTE19_SCP_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE19_SCP_MASK) >> ESC_USER_RAM_BYTE19_SCP_SHIFT)

#define	ESC_USER_RAM_BYTE19_RMII_MASK (0x20U)

#define	ESC_USER_RAM_BYTE19_RMII_SHIFT (5U)

#define	ESC_USER_RAM_BYTE19_RMII_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE19_RMII_SHIFT) & ESC_USER_RAM_BYTE19_RMII_MASK)

#define	ESC_USER_RAM_BYTE19_RMII_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE19_RMII_MASK) >> ESC_USER_RAM_BYTE19_RMII_SHIFT)

#define	ESC_USER_RAM_BYTE19_URGP_MASK (0x10U)

#define	ESC_USER_RAM_BYTE19_URGP_SHIFT (4U)

#define	ESC_USER_RAM_BYTE19_URGP_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE19_URGP_SHIFT) & ESC_USER_RAM_BYTE19_URGP_MASK)

#define	ESC_USER_RAM_BYTE19_URGP_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE19_URGP_MASK) >> ESC_USER_RAM_BYTE19_URGP_SHIFT)

#define	ESC_USER_RAM_BYTE19_CIA_MASK (0x4U)

#define	ESC_USER_RAM_BYTE19_CIA_SHIFT (2U)

#define	ESC_USER_RAM_BYTE19_CIA_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE19_CIA_SHIFT) & ESC_USER_RAM_BYTE19_CIA_MASK)

#define	ESC_USER_RAM_BYTE19_CIA_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE19_CIA_MASK) >> ESC_USER_RAM_BYTE19_CIA_SHIFT)

#define	ESC_USER_RAM_BYTE19_IPARO_MASK (0x2U)

#define	ESC_USER_RAM_BYTE19_IPARO_SHIFT (1U)

#define	ESC_USER_RAM_BYTE19_IPARO_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE19_IPARO_SHIFT) & ESC_USER_RAM_BYTE19_IPARO_MASK)

#define	ESC_USER_RAM_BYTE19_IPARO_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE19_IPARO_MASK) >> ESC_USER_RAM_BYTE19_IPARO_SHIFT)

#define	ESC_USER_RAM_BYTE19_RGMII_MASK (0x1U)

#define	ESC_USER_RAM_BYTE19_RGMII_SHIFT (0U)

#define	ESC_USER_RAM_BYTE19_RGMII_SET(x) (((uint8_t)(x) << ESC_USER_RAM_BYTE19_RGMII_SHIFT) & ESC_USER_RAM_BYTE19_RGMII_MASK)

#define	ESC_USER_RAM_BYTE19_RGMII_GET(x) (((uint8_t)(x) & ESC_USER_RAM_BYTE19_RGMII_MASK) >> ESC_USER_RAM_BYTE19_RGMII_SHIFT)

#define	ESC_PDRAM_DATA_MASK (0xFFFFFFFFUL)

#define	ESC_PDRAM_DATA_SHIFT (0U)

#define	ESC_PDRAM_DATA_SET(x) (((uint32_t)(x) << ESC_PDRAM_DATA_SHIFT) & ESC_PDRAM_DATA_MASK)

#define	ESC_PDRAM_DATA_GET(x) (((uint32_t)(x) & ESC_PDRAM_DATA_MASK) >> ESC_PDRAM_DATA_SHIFT)

#define	ESC_PDRAM_ALS_DATA_MASK (0xFFFFFFFFUL)

#define	ESC_PDRAM_ALS_DATA_SHIFT (0U)

#define	ESC_PDRAM_ALS_DATA_SET(x) (((uint32_t)(x) << ESC_PDRAM_ALS_DATA_SHIFT) & ESC_PDRAM_ALS_DATA_MASK)

#define	ESC_PDRAM_ALS_DATA_GET(x) (((uint32_t)(x) & ESC_PDRAM_ALS_DATA_MASK) >> ESC_PDRAM_ALS_DATA_SHIFT)

#define	ESC_GPR_CFG0_CLK100_EN_MASK (0x2000U)

#define	ESC_GPR_CFG0_CLK100_EN_SHIFT (13U)

#define	ESC_GPR_CFG0_CLK100_EN_SET(x) (((uint32_t)(x) << ESC_GPR_CFG0_CLK100_EN_SHIFT) & ESC_GPR_CFG0_CLK100_EN_MASK)

#define	ESC_GPR_CFG0_CLK100_EN_GET(x) (((uint32_t)(x) & ESC_GPR_CFG0_CLK100_EN_MASK) >> ESC_GPR_CFG0_CLK100_EN_SHIFT)

#define	ESC_GPR_CFG0_EEPROM_EMU_MASK (0x1000U)

#define	ESC_GPR_CFG0_EEPROM_EMU_SHIFT (12U)

#define	ESC_GPR_CFG0_EEPROM_EMU_SET(x) (((uint32_t)(x) << ESC_GPR_CFG0_EEPROM_EMU_SHIFT) & ESC_GPR_CFG0_EEPROM_EMU_MASK)

#define	ESC_GPR_CFG0_EEPROM_EMU_GET(x) (((uint32_t)(x) & ESC_GPR_CFG0_EEPROM_EMU_MASK) >> ESC_GPR_CFG0_EEPROM_EMU_SHIFT)

#define	ESC_GPR_CFG0_I2C_SCLK_EN_MASK (0x8U)

#define	ESC_GPR_CFG0_I2C_SCLK_EN_SHIFT (3U)

#define	ESC_GPR_CFG0_I2C_SCLK_EN_SET(x) (((uint32_t)(x) << ESC_GPR_CFG0_I2C_SCLK_EN_SHIFT) & ESC_GPR_CFG0_I2C_SCLK_EN_MASK)

#define	ESC_GPR_CFG0_I2C_SCLK_EN_GET(x) (((uint32_t)(x) & ESC_GPR_CFG0_I2C_SCLK_EN_MASK) >> ESC_GPR_CFG0_I2C_SCLK_EN_SHIFT)

#define	ESC_GPR_CFG0_PROM_SIZE_MASK (0x1U)

#define	ESC_GPR_CFG0_PROM_SIZE_SHIFT (0U)

#define	ESC_GPR_CFG0_PROM_SIZE_SET(x) (((uint32_t)(x) << ESC_GPR_CFG0_PROM_SIZE_SHIFT) & ESC_GPR_CFG0_PROM_SIZE_MASK)

#define	ESC_GPR_CFG0_PROM_SIZE_GET(x) (((uint32_t)(x) & ESC_GPR_CFG0_PROM_SIZE_MASK) >> ESC_GPR_CFG0_PROM_SIZE_SHIFT)

#define	ESC_GPR_CFG1_SYNC1_IRQ_EN_MASK (0x80000000UL)

#define	ESC_GPR_CFG1_SYNC1_IRQ_EN_SHIFT (31U)

#define	ESC_GPR_CFG1_SYNC1_IRQ_EN_SET(x) (((uint32_t)(x) << ESC_GPR_CFG1_SYNC1_IRQ_EN_SHIFT) & ESC_GPR_CFG1_SYNC1_IRQ_EN_MASK)

#define	ESC_GPR_CFG1_SYNC1_IRQ_EN_GET(x) (((uint32_t)(x) & ESC_GPR_CFG1_SYNC1_IRQ_EN_MASK) >> ESC_GPR_CFG1_SYNC1_IRQ_EN_SHIFT)

#define	ESC_GPR_CFG1_SYNC0_IRQ_EN_MASK (0x40000000UL)

#define	ESC_GPR_CFG1_SYNC0_IRQ_EN_SHIFT (30U)

#define	ESC_GPR_CFG1_SYNC0_IRQ_EN_SET(x) (((uint32_t)(x) << ESC_GPR_CFG1_SYNC0_IRQ_EN_SHIFT) & ESC_GPR_CFG1_SYNC0_IRQ_EN_MASK)

#define	ESC_GPR_CFG1_SYNC0_IRQ_EN_GET(x) (((uint32_t)(x) & ESC_GPR_CFG1_SYNC0_IRQ_EN_MASK) >> ESC_GPR_CFG1_SYNC0_IRQ_EN_SHIFT)

#define	ESC_GPR_CFG1_RSTO_IRQ_EN_MASK (0x20000000UL)

#define	ESC_GPR_CFG1_RSTO_IRQ_EN_SHIFT (29U)

#define	ESC_GPR_CFG1_RSTO_IRQ_EN_SET(x) (((uint32_t)(x) << ESC_GPR_CFG1_RSTO_IRQ_EN_SHIFT) & ESC_GPR_CFG1_RSTO_IRQ_EN_MASK)

#define	ESC_GPR_CFG1_RSTO_IRQ_EN_GET(x) (((uint32_t)(x) & ESC_GPR_CFG1_RSTO_IRQ_EN_MASK) >> ESC_GPR_CFG1_RSTO_IRQ_EN_SHIFT)

#define	ESC_GPR_CFG1_SYNC1_DMA_EN_MASK (0x2000U)

#define	ESC_GPR_CFG1_SYNC1_DMA_EN_SHIFT (13U)

#define	ESC_GPR_CFG1_SYNC1_DMA_EN_SET(x) (((uint32_t)(x) << ESC_GPR_CFG1_SYNC1_DMA_EN_SHIFT) & ESC_GPR_CFG1_SYNC1_DMA_EN_MASK)

#define	ESC_GPR_CFG1_SYNC1_DMA_EN_GET(x) (((uint32_t)(x) & ESC_GPR_CFG1_SYNC1_DMA_EN_MASK) >> ESC_GPR_CFG1_SYNC1_DMA_EN_SHIFT)

#define	ESC_GPR_CFG1_SYNC0_DMA_EN_MASK (0x1000U)

#define	ESC_GPR_CFG1_SYNC0_DMA_EN_SHIFT (12U)

#define	ESC_GPR_CFG1_SYNC0_DMA_EN_SET(x) (((uint32_t)(x) << ESC_GPR_CFG1_SYNC0_DMA_EN_SHIFT) & ESC_GPR_CFG1_SYNC0_DMA_EN_MASK)

#define	ESC_GPR_CFG1_SYNC0_DMA_EN_GET(x) (((uint32_t)(x) & ESC_GPR_CFG1_SYNC0_DMA_EN_MASK) >> ESC_GPR_CFG1_SYNC0_DMA_EN_SHIFT)

#define	ESC_GPR_CFG1_LATCH1_FROM_IO_MASK (0x200U)

#define	ESC_GPR_CFG1_LATCH1_FROM_IO_SHIFT (9U)

#define	ESC_GPR_CFG1_LATCH1_FROM_IO_SET(x) (((uint32_t)(x) << ESC_GPR_CFG1_LATCH1_FROM_IO_SHIFT) & ESC_GPR_CFG1_LATCH1_FROM_IO_MASK)

#define	ESC_GPR_CFG1_LATCH1_FROM_IO_GET(x) (((uint32_t)(x) & ESC_GPR_CFG1_LATCH1_FROM_IO_MASK) >> ESC_GPR_CFG1_LATCH1_FROM_IO_SHIFT)

#define	ESC_GPR_CFG1_LATCH0_FROM_IO_MASK (0x100U)

#define	ESC_GPR_CFG1_LATCH0_FROM_IO_SHIFT (8U)

#define	ESC_GPR_CFG1_LATCH0_FROM_IO_SET(x) (((uint32_t)(x) << ESC_GPR_CFG1_LATCH0_FROM_IO_SHIFT) & ESC_GPR_CFG1_LATCH0_FROM_IO_MASK)

#define	ESC_GPR_CFG1_LATCH0_FROM_IO_GET(x) (((uint32_t)(x) & ESC_GPR_CFG1_LATCH0_FROM_IO_MASK) >> ESC_GPR_CFG1_LATCH0_FROM_IO_SHIFT)

#define	ESC_GPR_CFG1_RSTO_OVRD_MASK (0x80U)

#define	ESC_GPR_CFG1_RSTO_OVRD_SHIFT (7U)

#define	ESC_GPR_CFG1_RSTO_OVRD_SET(x) (((uint32_t)(x) << ESC_GPR_CFG1_RSTO_OVRD_SHIFT) & ESC_GPR_CFG1_RSTO_OVRD_MASK)

#define	ESC_GPR_CFG1_RSTO_OVRD_GET(x) (((uint32_t)(x) & ESC_GPR_CFG1_RSTO_OVRD_MASK) >> ESC_GPR_CFG1_RSTO_OVRD_SHIFT)

#define	ESC_GPR_CFG1_RSTO_OVRD_ENJ_MASK (0x40U)

#define	ESC_GPR_CFG1_RSTO_OVRD_ENJ_SHIFT (6U)

#define	ESC_GPR_CFG1_RSTO_OVRD_ENJ_SET(x) (((uint32_t)(x) << ESC_GPR_CFG1_RSTO_OVRD_ENJ_SHIFT) & ESC_GPR_CFG1_RSTO_OVRD_ENJ_MASK)

#define	ESC_GPR_CFG1_RSTO_OVRD_ENJ_GET(x) (((uint32_t)(x) & ESC_GPR_CFG1_RSTO_OVRD_ENJ_MASK) >> ESC_GPR_CFG1_RSTO_OVRD_ENJ_SHIFT)

#define	ESC_GPR_CFG2_NMII_LINK2_FROM_IO_MASK (0x20000000UL)

#define	ESC_GPR_CFG2_NMII_LINK2_FROM_IO_SHIFT (29U)

#define	ESC_GPR_CFG2_NMII_LINK2_FROM_IO_SET(x) (((uint32_t)(x) << ESC_GPR_CFG2_NMII_LINK2_FROM_IO_SHIFT) & ESC_GPR_CFG2_NMII_LINK2_FROM_IO_MASK)

#define	ESC_GPR_CFG2_NMII_LINK2_FROM_IO_GET(x) (((uint32_t)(x) & ESC_GPR_CFG2_NMII_LINK2_FROM_IO_MASK) >> ESC_GPR_CFG2_NMII_LINK2_FROM_IO_SHIFT)

#define	ESC_GPR_CFG2_NMII_LINK2_GPR_MASK (0x10000000UL)

#define	ESC_GPR_CFG2_NMII_LINK2_GPR_SHIFT (28U)

#define	ESC_GPR_CFG2_NMII_LINK2_GPR_SET(x) (((uint32_t)(x) << ESC_GPR_CFG2_NMII_LINK2_GPR_SHIFT) & ESC_GPR_CFG2_NMII_LINK2_GPR_MASK)

#define	ESC_GPR_CFG2_NMII_LINK2_GPR_GET(x) (((uint32_t)(x) & ESC_GPR_CFG2_NMII_LINK2_GPR_MASK) >> ESC_GPR_CFG2_NMII_LINK2_GPR_SHIFT)

#define	ESC_GPR_CFG2_NMII_LINK1_FROM_IO_MASK (0x2000000UL)

#define	ESC_GPR_CFG2_NMII_LINK1_FROM_IO_SHIFT (25U)

#define	ESC_GPR_CFG2_NMII_LINK1_FROM_IO_SET(x) (((uint32_t)(x) << ESC_GPR_CFG2_NMII_LINK1_FROM_IO_SHIFT) & ESC_GPR_CFG2_NMII_LINK1_FROM_IO_MASK)

#define	ESC_GPR_CFG2_NMII_LINK1_FROM_IO_GET(x) (((uint32_t)(x) & ESC_GPR_CFG2_NMII_LINK1_FROM_IO_MASK) >> ESC_GPR_CFG2_NMII_LINK1_FROM_IO_SHIFT)

#define	ESC_GPR_CFG2_NMII_LINK1_GPR_MASK (0x1000000UL)

#define	ESC_GPR_CFG2_NMII_LINK1_GPR_SHIFT (24U)

#define	ESC_GPR_CFG2_NMII_LINK1_GPR_SET(x) (((uint32_t)(x) << ESC_GPR_CFG2_NMII_LINK1_GPR_SHIFT) & ESC_GPR_CFG2_NMII_LINK1_GPR_MASK)

#define	ESC_GPR_CFG2_NMII_LINK1_GPR_GET(x) (((uint32_t)(x) & ESC_GPR_CFG2_NMII_LINK1_GPR_MASK) >> ESC_GPR_CFG2_NMII_LINK1_GPR_SHIFT)

#define	ESC_GPR_CFG2_NMII_LINK0_FROM_IO_MASK (0x200000UL)

#define	ESC_GPR_CFG2_NMII_LINK0_FROM_IO_SHIFT (21U)

#define	ESC_GPR_CFG2_NMII_LINK0_FROM_IO_SET(x) (((uint32_t)(x) << ESC_GPR_CFG2_NMII_LINK0_FROM_IO_SHIFT) & ESC_GPR_CFG2_NMII_LINK0_FROM_IO_MASK)

#define	ESC_GPR_CFG2_NMII_LINK0_FROM_IO_GET(x) (((uint32_t)(x) & ESC_GPR_CFG2_NMII_LINK0_FROM_IO_MASK) >> ESC_GPR_CFG2_NMII_LINK0_FROM_IO_SHIFT)

#define	ESC_GPR_CFG2_NMII_LINK0_GPR_MASK (0x100000UL)

#define	ESC_GPR_CFG2_NMII_LINK0_GPR_SHIFT (20U)

#define	ESC_GPR_CFG2_NMII_LINK0_GPR_SET(x) (((uint32_t)(x) << ESC_GPR_CFG2_NMII_LINK0_GPR_SHIFT) & ESC_GPR_CFG2_NMII_LINK0_GPR_MASK)

#define	ESC_GPR_CFG2_NMII_LINK0_GPR_GET(x) (((uint32_t)(x) & ESC_GPR_CFG2_NMII_LINK0_GPR_MASK) >> ESC_GPR_CFG2_NMII_LINK0_GPR_SHIFT)

#define	ESC_PHY_CFG0_MAC_SPEED_MASK (0x40000000UL)

#define	ESC_PHY_CFG0_MAC_SPEED_SHIFT (30U)

#define	ESC_PHY_CFG0_MAC_SPEED_SET(x) (((uint32_t)(x) << ESC_PHY_CFG0_MAC_SPEED_SHIFT) & ESC_PHY_CFG0_MAC_SPEED_MASK)

#define	ESC_PHY_CFG0_MAC_SPEED_GET(x) (((uint32_t)(x) & ESC_PHY_CFG0_MAC_SPEED_MASK) >> ESC_PHY_CFG0_MAC_SPEED_SHIFT)

#define	ESC_PHY_CFG0_PHY_OFFSET_VAL_MASK (0x1F000000UL)

#define	ESC_PHY_CFG0_PHY_OFFSET_VAL_SHIFT (24U)

#define	ESC_PHY_CFG0_PHY_OFFSET_VAL_SET(x) (((uint32_t)(x) << ESC_PHY_CFG0_PHY_OFFSET_VAL_SHIFT) & ESC_PHY_CFG0_PHY_OFFSET_VAL_MASK)

#define	ESC_PHY_CFG0_PHY_OFFSET_VAL_GET(x) (((uint32_t)(x) & ESC_PHY_CFG0_PHY_OFFSET_VAL_MASK) >> ESC_PHY_CFG0_PHY_OFFSET_VAL_SHIFT)

#define	ESC_PHY_CFG0_PORT2_RMII_EN_MASK (0x800000UL)

#define	ESC_PHY_CFG0_PORT2_RMII_EN_SHIFT (23U)

#define	ESC_PHY_CFG0_PORT2_RMII_EN_SET(x) (((uint32_t)(x) << ESC_PHY_CFG0_PORT2_RMII_EN_SHIFT) & ESC_PHY_CFG0_PORT2_RMII_EN_MASK)

#define	ESC_PHY_CFG0_PORT2_RMII_EN_GET(x) (((uint32_t)(x) & ESC_PHY_CFG0_PORT2_RMII_EN_MASK) >> ESC_PHY_CFG0_PORT2_RMII_EN_SHIFT)

#define	ESC_PHY_CFG0_PORT1_RMII_EN_MASK (0x8000U)

#define	ESC_PHY_CFG0_PORT1_RMII_EN_SHIFT (15U)

#define	ESC_PHY_CFG0_PORT1_RMII_EN_SET(x) (((uint32_t)(x) << ESC_PHY_CFG0_PORT1_RMII_EN_SHIFT) & ESC_PHY_CFG0_PORT1_RMII_EN_MASK)

#define	ESC_PHY_CFG0_PORT1_RMII_EN_GET(x) (((uint32_t)(x) & ESC_PHY_CFG0_PORT1_RMII_EN_MASK) >> ESC_PHY_CFG0_PORT1_RMII_EN_SHIFT)

#define	ESC_PHY_CFG0_PORT0_RMII_EN_MASK (0x80U)

#define	ESC_PHY_CFG0_PORT0_RMII_EN_SHIFT (7U)

#define	ESC_PHY_CFG0_PORT0_RMII_EN_SET(x) (((uint32_t)(x) << ESC_PHY_CFG0_PORT0_RMII_EN_SHIFT) & ESC_PHY_CFG0_PORT0_RMII_EN_MASK)

#define	ESC_PHY_CFG0_PORT0_RMII_EN_GET(x) (((uint32_t)(x) & ESC_PHY_CFG0_PORT0_RMII_EN_MASK) >> ESC_PHY_CFG0_PORT0_RMII_EN_SHIFT)

#define	ESC_PHY_CFG1_RMII_REFCLK_SEL_MASK (0x700U)

#define	ESC_PHY_CFG1_RMII_REFCLK_SEL_SHIFT (8U)

#define	ESC_PHY_CFG1_RMII_REFCLK_SEL_SET(x) (((uint32_t)(x) << ESC_PHY_CFG1_RMII_REFCLK_SEL_SHIFT) & ESC_PHY_CFG1_RMII_REFCLK_SEL_MASK)

#define	ESC_PHY_CFG1_RMII_REFCLK_SEL_GET(x) (((uint32_t)(x) & ESC_PHY_CFG1_RMII_REFCLK_SEL_MASK) >> ESC_PHY_CFG1_RMII_REFCLK_SEL_SHIFT)

#define	ESC_PHY_CFG1_REFCK_25M_INV_MASK (0x80U)

#define	ESC_PHY_CFG1_REFCK_25M_INV_SHIFT (7U)

#define	ESC_PHY_CFG1_REFCK_25M_INV_SET(x) (((uint32_t)(x) << ESC_PHY_CFG1_REFCK_25M_INV_SHIFT) & ESC_PHY_CFG1_REFCK_25M_INV_MASK)

#define	ESC_PHY_CFG1_REFCK_25M_INV_GET(x) (((uint32_t)(x) & ESC_PHY_CFG1_REFCK_25M_INV_MASK) >> ESC_PHY_CFG1_REFCK_25M_INV_SHIFT)

#define	ESC_PHY_CFG1_RMII_P2_RXCK_REFCLK_OE_MASK (0x40U)

#define	ESC_PHY_CFG1_RMII_P2_RXCK_REFCLK_OE_SHIFT (6U)

#define	ESC_PHY_CFG1_RMII_P2_RXCK_REFCLK_OE_SET(x) (((uint32_t)(x) << ESC_PHY_CFG1_RMII_P2_RXCK_REFCLK_OE_SHIFT) & ESC_PHY_CFG1_RMII_P2_RXCK_REFCLK_OE_MASK)

#define	ESC_PHY_CFG1_RMII_P2_RXCK_REFCLK_OE_GET(x) (((uint32_t)(x) & ESC_PHY_CFG1_RMII_P2_RXCK_REFCLK_OE_MASK) >> ESC_PHY_CFG1_RMII_P2_RXCK_REFCLK_OE_SHIFT)

#define	ESC_PHY_CFG1_RMII_P1_RXCK_REFCLK_OE_MASK (0x20U)

#define	ESC_PHY_CFG1_RMII_P1_RXCK_REFCLK_OE_SHIFT (5U)

#define	ESC_PHY_CFG1_RMII_P1_RXCK_REFCLK_OE_SET(x) (((uint32_t)(x) << ESC_PHY_CFG1_RMII_P1_RXCK_REFCLK_OE_SHIFT) & ESC_PHY_CFG1_RMII_P1_RXCK_REFCLK_OE_MASK)

#define	ESC_PHY_CFG1_RMII_P1_RXCK_REFCLK_OE_GET(x) (((uint32_t)(x) & ESC_PHY_CFG1_RMII_P1_RXCK_REFCLK_OE_MASK) >> ESC_PHY_CFG1_RMII_P1_RXCK_REFCLK_OE_SHIFT)

#define	ESC_PHY_CFG1_RMII_P0_RXCK_REFCLK_OE_MASK (0x10U)

#define	ESC_PHY_CFG1_RMII_P0_RXCK_REFCLK_OE_SHIFT (4U)

#define	ESC_PHY_CFG1_RMII_P0_RXCK_REFCLK_OE_SET(x) (((uint32_t)(x) << ESC_PHY_CFG1_RMII_P0_RXCK_REFCLK_OE_SHIFT) & ESC_PHY_CFG1_RMII_P0_RXCK_REFCLK_OE_MASK)

#define	ESC_PHY_CFG1_RMII_P0_RXCK_REFCLK_OE_GET(x) (((uint32_t)(x) & ESC_PHY_CFG1_RMII_P0_RXCK_REFCLK_OE_MASK) >> ESC_PHY_CFG1_RMII_P0_RXCK_REFCLK_OE_SHIFT)

#define	ESC_PHY_CFG1_REFCK_25M_OE_MASK (0x8U)

#define	ESC_PHY_CFG1_REFCK_25M_OE_SHIFT (3U)

#define	ESC_PHY_CFG1_REFCK_25M_OE_SET(x) (((uint32_t)(x) << ESC_PHY_CFG1_REFCK_25M_OE_SHIFT) & ESC_PHY_CFG1_REFCK_25M_OE_MASK)

#define	ESC_PHY_CFG1_REFCK_25M_OE_GET(x) (((uint32_t)(x) & ESC_PHY_CFG1_REFCK_25M_OE_MASK) >> ESC_PHY_CFG1_REFCK_25M_OE_SHIFT)

#define	ESC_PHY_CFG1_RMII_P2_TXCK_REFCLK_OE_MASK (0x4U)

#define	ESC_PHY_CFG1_RMII_P2_TXCK_REFCLK_OE_SHIFT (2U)

#define	ESC_PHY_CFG1_RMII_P2_TXCK_REFCLK_OE_SET(x) (((uint32_t)(x) << ESC_PHY_CFG1_RMII_P2_TXCK_REFCLK_OE_SHIFT) & ESC_PHY_CFG1_RMII_P2_TXCK_REFCLK_OE_MASK)

#define	ESC_PHY_CFG1_RMII_P2_TXCK_REFCLK_OE_GET(x) (((uint32_t)(x) & ESC_PHY_CFG1_RMII_P2_TXCK_REFCLK_OE_MASK) >> ESC_PHY_CFG1_RMII_P2_TXCK_REFCLK_OE_SHIFT)

#define	ESC_PHY_CFG1_RMII_P1_TXCK_REFCLK_OE_MASK (0x2U)

#define	ESC_PHY_CFG1_RMII_P1_TXCK_REFCLK_OE_SHIFT (1U)

#define	ESC_PHY_CFG1_RMII_P1_TXCK_REFCLK_OE_SET(x) (((uint32_t)(x) << ESC_PHY_CFG1_RMII_P1_TXCK_REFCLK_OE_SHIFT) & ESC_PHY_CFG1_RMII_P1_TXCK_REFCLK_OE_MASK)

#define	ESC_PHY_CFG1_RMII_P1_TXCK_REFCLK_OE_GET(x) (((uint32_t)(x) & ESC_PHY_CFG1_RMII_P1_TXCK_REFCLK_OE_MASK) >> ESC_PHY_CFG1_RMII_P1_TXCK_REFCLK_OE_SHIFT)

#define	ESC_PHY_CFG1_RMII_P0_TXCK_REFCLK_OE_MASK (0x1U)

#define	ESC_PHY_CFG1_RMII_P0_TXCK_REFCLK_OE_SHIFT (0U)

#define	ESC_PHY_CFG1_RMII_P0_TXCK_REFCLK_OE_SET(x) (((uint32_t)(x) << ESC_PHY_CFG1_RMII_P0_TXCK_REFCLK_OE_SHIFT) & ESC_PHY_CFG1_RMII_P0_TXCK_REFCLK_OE_MASK)

#define	ESC_PHY_CFG1_RMII_P0_TXCK_REFCLK_OE_GET(x) (((uint32_t)(x) & ESC_PHY_CFG1_RMII_P0_TXCK_REFCLK_OE_MASK) >> ESC_PHY_CFG1_RMII_P0_TXCK_REFCLK_OE_SHIFT)

#define	ESC_GPIO_CTRL_SW_LATCH_GPI_MASK (0x80000000UL)

#define	ESC_GPIO_CTRL_SW_LATCH_GPI_SHIFT (31U)

#define	ESC_GPIO_CTRL_SW_LATCH_GPI_SET(x) (((uint32_t)(x) << ESC_GPIO_CTRL_SW_LATCH_GPI_SHIFT) & ESC_GPIO_CTRL_SW_LATCH_GPI_MASK)

#define	ESC_GPIO_CTRL_SW_LATCH_GPI_GET(x) (((uint32_t)(x) & ESC_GPIO_CTRL_SW_LATCH_GPI_MASK) >> ESC_GPIO_CTRL_SW_LATCH_GPI_SHIFT)

#define	ESC_GPIO_CTRL_SW_LATCH_GPO_MASK (0x40000000UL)

#define	ESC_GPIO_CTRL_SW_LATCH_GPO_SHIFT (30U)

#define	ESC_GPIO_CTRL_SW_LATCH_GPO_SET(x) (((uint32_t)(x) << ESC_GPIO_CTRL_SW_LATCH_GPO_SHIFT) & ESC_GPIO_CTRL_SW_LATCH_GPO_MASK)

#define	ESC_GPIO_CTRL_SW_LATCH_GPO_GET(x) (((uint32_t)(x) & ESC_GPIO_CTRL_SW_LATCH_GPO_MASK) >> ESC_GPIO_CTRL_SW_LATCH_GPO_SHIFT)

#define	ESC_GPIO_CTRL_GPI_OVERRIDE_EN_MASK (0x2000U)

#define	ESC_GPIO_CTRL_GPI_OVERRIDE_EN_SHIFT (13U)

#define	ESC_GPIO_CTRL_GPI_OVERRIDE_EN_SET(x) (((uint32_t)(x) << ESC_GPIO_CTRL_GPI_OVERRIDE_EN_SHIFT) & ESC_GPIO_CTRL_GPI_OVERRIDE_EN_MASK)

#define	ESC_GPIO_CTRL_GPI_OVERRIDE_EN_GET(x) (((uint32_t)(x) & ESC_GPIO_CTRL_GPI_OVERRIDE_EN_MASK) >> ESC_GPIO_CTRL_GPI_OVERRIDE_EN_SHIFT)

#define	ESC_GPIO_CTRL_GPI_TRIG_EN_MASK (0x1000U)

#define	ESC_GPIO_CTRL_GPI_TRIG_EN_SHIFT (12U)

#define	ESC_GPIO_CTRL_GPI_TRIG_EN_SET(x) (((uint32_t)(x) << ESC_GPIO_CTRL_GPI_TRIG_EN_SHIFT) & ESC_GPIO_CTRL_GPI_TRIG_EN_MASK)

#define	ESC_GPIO_CTRL_GPI_TRIG_EN_GET(x) (((uint32_t)(x) & ESC_GPIO_CTRL_GPI_TRIG_EN_MASK) >> ESC_GPIO_CTRL_GPI_TRIG_EN_SHIFT)

#define	ESC_GPIO_CTRL_GPI_TRIG_SEL_MASK (0xF00U)

#define	ESC_GPIO_CTRL_GPI_TRIG_SEL_SHIFT (8U)

#define	ESC_GPIO_CTRL_GPI_TRIG_SEL_SET(x) (((uint32_t)(x) << ESC_GPIO_CTRL_GPI_TRIG_SEL_SHIFT) & ESC_GPIO_CTRL_GPI_TRIG_SEL_MASK)

#define	ESC_GPIO_CTRL_GPI_TRIG_SEL_GET(x) (((uint32_t)(x) & ESC_GPIO_CTRL_GPI_TRIG_SEL_MASK) >> ESC_GPIO_CTRL_GPI_TRIG_SEL_SHIFT)

#define	ESC_GPIO_CTRL_GPO_TRIG_EN_MASK (0x10U)

#define	ESC_GPIO_CTRL_GPO_TRIG_EN_SHIFT (4U)

#define	ESC_GPIO_CTRL_GPO_TRIG_EN_SET(x) (((uint32_t)(x) << ESC_GPIO_CTRL_GPO_TRIG_EN_SHIFT) & ESC_GPIO_CTRL_GPO_TRIG_EN_MASK)

#define	ESC_GPIO_CTRL_GPO_TRIG_EN_GET(x) (((uint32_t)(x) & ESC_GPIO_CTRL_GPO_TRIG_EN_MASK) >> ESC_GPIO_CTRL_GPO_TRIG_EN_SHIFT)

#define	ESC_GPIO_CTRL_GPO_TRIG_SEL_MASK (0xFU)

#define	ESC_GPIO_CTRL_GPO_TRIG_SEL_SHIFT (0U)

#define	ESC_GPIO_CTRL_GPO_TRIG_SEL_SET(x) (((uint32_t)(x) << ESC_GPIO_CTRL_GPO_TRIG_SEL_SHIFT) & ESC_GPIO_CTRL_GPO_TRIG_SEL_MASK)

#define	ESC_GPIO_CTRL_GPO_TRIG_SEL_GET(x) (((uint32_t)(x) & ESC_GPIO_CTRL_GPO_TRIG_SEL_MASK) >> ESC_GPIO_CTRL_GPO_TRIG_SEL_SHIFT)

#define	ESC_GPI_OVERRIDE0_GPR_OVERRIDE_LOW_MASK (0xFFFFFFFFUL)

#define	ESC_GPI_OVERRIDE0_GPR_OVERRIDE_LOW_SHIFT (0U)

#define	ESC_GPI_OVERRIDE0_GPR_OVERRIDE_LOW_SET(x) (((uint32_t)(x) << ESC_GPI_OVERRIDE0_GPR_OVERRIDE_LOW_SHIFT) & ESC_GPI_OVERRIDE0_GPR_OVERRIDE_LOW_MASK)

#define	ESC_GPI_OVERRIDE0_GPR_OVERRIDE_LOW_GET(x) (((uint32_t)(x) & ESC_GPI_OVERRIDE0_GPR_OVERRIDE_LOW_MASK) >> ESC_GPI_OVERRIDE0_GPR_OVERRIDE_LOW_SHIFT)

#define	ESC_GPI_OVERRIDE1_GPR_OVERRIDE_HIGH_MASK (0xFFFFFFFFUL)

#define	ESC_GPI_OVERRIDE1_GPR_OVERRIDE_HIGH_SHIFT (0U)

#define	ESC_GPI_OVERRIDE1_GPR_OVERRIDE_HIGH_SET(x) (((uint32_t)(x) << ESC_GPI_OVERRIDE1_GPR_OVERRIDE_HIGH_SHIFT) & ESC_GPI_OVERRIDE1_GPR_OVERRIDE_HIGH_MASK)

#define	ESC_GPI_OVERRIDE1_GPR_OVERRIDE_HIGH_GET(x) (((uint32_t)(x) & ESC_GPI_OVERRIDE1_GPR_OVERRIDE_HIGH_MASK) >> ESC_GPI_OVERRIDE1_GPR_OVERRIDE_HIGH_SHIFT)

#define	ESC_GPO_REG0_VALUE_MASK (0xFFFFFFFFUL)

#define	ESC_GPO_REG0_VALUE_SHIFT (0U)

#define	ESC_GPO_REG0_VALUE_GET(x) (((uint32_t)(x) & ESC_GPO_REG0_VALUE_MASK) >> ESC_GPO_REG0_VALUE_SHIFT)

#define	ESC_GPO_REG1_VALUE_MASK (0xFFFFFFFFUL)

#define	ESC_GPO_REG1_VALUE_SHIFT (0U)

#define	ESC_GPO_REG1_VALUE_GET(x) (((uint32_t)(x) & ESC_GPO_REG1_VALUE_MASK) >> ESC_GPO_REG1_VALUE_SHIFT)

#define	ESC_GPI_REG0_VALUE_MASK (0xFFFFFFFFUL)

#define	ESC_GPI_REG0_VALUE_SHIFT (0U)

#define	ESC_GPI_REG0_VALUE_GET(x) (((uint32_t)(x) & ESC_GPI_REG0_VALUE_MASK) >> ESC_GPI_REG0_VALUE_SHIFT)

#define	ESC_GPI_REG1_VALUE_MASK (0xFFFFFFFFUL)

#define	ESC_GPI_REG1_VALUE_SHIFT (0U)

#define	ESC_GPI_REG1_VALUE_GET(x) (((uint32_t)(x) & ESC_GPI_REG1_VALUE_MASK) >> ESC_GPI_REG1_VALUE_SHIFT)

#define	ESC_GPR_STATUS_NLINK2_PADSEL_MASK (0xF0000000UL)

#define	ESC_GPR_STATUS_NLINK2_PADSEL_SHIFT (28U)

#define	ESC_GPR_STATUS_NLINK2_PADSEL_GET(x) (((uint32_t)(x) & ESC_GPR_STATUS_NLINK2_PADSEL_MASK) >> ESC_GPR_STATUS_NLINK2_PADSEL_SHIFT)

#define	ESC_GPR_STATUS_NLINK1_PADSEL_MASK (0xF000000UL)

#define	ESC_GPR_STATUS_NLINK1_PADSEL_SHIFT (24U)

#define	ESC_GPR_STATUS_NLINK1_PADSEL_GET(x) (((uint32_t)(x) & ESC_GPR_STATUS_NLINK1_PADSEL_MASK) >> ESC_GPR_STATUS_NLINK1_PADSEL_SHIFT)

#define	ESC_GPR_STATUS_NLINK0_PADSEL_MASK (0xF00000UL)

#define	ESC_GPR_STATUS_NLINK0_PADSEL_SHIFT (20U)

#define	ESC_GPR_STATUS_NLINK0_PADSEL_GET(x) (((uint32_t)(x) & ESC_GPR_STATUS_NLINK0_PADSEL_MASK) >> ESC_GPR_STATUS_NLINK0_PADSEL_SHIFT)

#define	ESC_GPR_STATUS_PDI_SOF_MASK (0x80000UL)

#define	ESC_GPR_STATUS_PDI_SOF_SHIFT (19U)

#define	ESC_GPR_STATUS_PDI_SOF_GET(x) (((uint32_t)(x) & ESC_GPR_STATUS_PDI_SOF_MASK) >> ESC_GPR_STATUS_PDI_SOF_SHIFT)

#define	ESC_GPR_STATUS_PDI_EOF_MASK (0x40000UL)

#define	ESC_GPR_STATUS_PDI_EOF_SHIFT (18U)

#define	ESC_GPR_STATUS_PDI_EOF_GET(x) (((uint32_t)(x) & ESC_GPR_STATUS_PDI_EOF_MASK) >> ESC_GPR_STATUS_PDI_EOF_SHIFT)

#define	ESC_GPR_STATUS_PDI_WD_TRIGGER_MASK (0x20000UL)

#define	ESC_GPR_STATUS_PDI_WD_TRIGGER_SHIFT (17U)

#define	ESC_GPR_STATUS_PDI_WD_TRIGGER_GET(x) (((uint32_t)(x) & ESC_GPR_STATUS_PDI_WD_TRIGGER_MASK) >> ESC_GPR_STATUS_PDI_WD_TRIGGER_SHIFT)

#define	ESC_GPR_STATUS_PDI_WD_STATE_MASK (0x10000UL)

#define	ESC_GPR_STATUS_PDI_WD_STATE_SHIFT (16U)

#define	ESC_GPR_STATUS_PDI_WD_STATE_GET(x) (((uint32_t)(x) & ESC_GPR_STATUS_PDI_WD_STATE_MASK) >> ESC_GPR_STATUS_PDI_WD_STATE_SHIFT)

#define	ESC_GPR_STATUS_SYNC_OUT1_MASK (0x200U)

#define	ESC_GPR_STATUS_SYNC_OUT1_SHIFT (9U)

#define	ESC_GPR_STATUS_SYNC_OUT1_GET(x) (((uint32_t)(x) & ESC_GPR_STATUS_SYNC_OUT1_MASK) >> ESC_GPR_STATUS_SYNC_OUT1_SHIFT)

#define	ESC_GPR_STATUS_SYNC_OUT0_MASK (0x100U)

#define	ESC_GPR_STATUS_SYNC_OUT0_SHIFT (8U)

#define	ESC_GPR_STATUS_SYNC_OUT0_GET(x) (((uint32_t)(x) & ESC_GPR_STATUS_SYNC_OUT0_MASK) >> ESC_GPR_STATUS_SYNC_OUT0_SHIFT)

#define	ESC_GPR_STATUS_LED_STATE_RUN_MASK (0x40U)

#define	ESC_GPR_STATUS_LED_STATE_RUN_SHIFT (6U)

#define	ESC_GPR_STATUS_LED_STATE_RUN_GET(x) (((uint32_t)(x) & ESC_GPR_STATUS_LED_STATE_RUN_MASK) >> ESC_GPR_STATUS_LED_STATE_RUN_SHIFT)

#define	ESC_GPR_STATUS_LED_ERR_MASK (0x20U)

#define	ESC_GPR_STATUS_LED_ERR_SHIFT (5U)

#define	ESC_GPR_STATUS_LED_ERR_GET(x) (((uint32_t)(x) & ESC_GPR_STATUS_LED_ERR_MASK) >> ESC_GPR_STATUS_LED_ERR_SHIFT)

#define	ESC_GPR_STATUS_LED_RUN_MASK (0x10U)

#define	ESC_GPR_STATUS_LED_RUN_SHIFT (4U)

#define	ESC_GPR_STATUS_LED_RUN_GET(x) (((uint32_t)(x) & ESC_GPR_STATUS_LED_RUN_MASK) >> ESC_GPR_STATUS_LED_RUN_SHIFT)

#define	ESC_GPR_STATUS_DEV_STATE_MASK (0x8U)

#define	ESC_GPR_STATUS_DEV_STATE_SHIFT (3U)

#define	ESC_GPR_STATUS_DEV_STATE_GET(x) (((uint32_t)(x) & ESC_GPR_STATUS_DEV_STATE_MASK) >> ESC_GPR_STATUS_DEV_STATE_SHIFT)

#define	ESC_GPR_STATUS_LINK_ACT_MASK (0x7U)

#define	ESC_GPR_STATUS_LINK_ACT_SHIFT (0U)

#define	ESC_GPR_STATUS_LINK_ACT_GET(x) (((uint32_t)(x) & ESC_GPR_STATUS_LINK_ACT_MASK) >> ESC_GPR_STATUS_LINK_ACT_SHIFT)

#define	ESC_IO_CFG_INVERT_MASK (0x10U)

#define	ESC_IO_CFG_INVERT_SHIFT (4U)

#define	ESC_IO_CFG_INVERT_SET(x) (((uint32_t)(x) << ESC_IO_CFG_INVERT_SHIFT) & ESC_IO_CFG_INVERT_MASK)

#define	ESC_IO_CFG_INVERT_GET(x) (((uint32_t)(x) & ESC_IO_CFG_INVERT_MASK) >> ESC_IO_CFG_INVERT_SHIFT)

#define	ESC_IO_CFG_FUNC_ALT_MASK (0xFU)

#define	ESC_IO_CFG_FUNC_ALT_SHIFT (0U)

#define	ESC_IO_CFG_FUNC_ALT_SET(x) (((uint32_t)(x) << ESC_IO_CFG_FUNC_ALT_SHIFT) & ESC_IO_CFG_FUNC_ALT_MASK)

#define	ESC_IO_CFG_FUNC_ALT_GET(x) (((uint32_t)(x) & ESC_IO_CFG_FUNC_ALT_MASK) >> ESC_IO_CFG_FUNC_ALT_SHIFT)

#define	ESC_RX_ERR_CNT_PORT0 (0UL)

#define	ESC_RX_ERR_CNT_PORT1 (1UL)

#define	ESC_RX_ERR_CNT_PORT2 (2UL)

#define	ESC_RX_ERR_CNT_PORT3 (3UL)

#define	ESC_FWD_RX_ERR_CNT_PORT0 (0UL)

#define	ESC_FWD_RX_ERR_CNT_PORT1 (1UL)

#define	ESC_FWD_RX_ERR_CNT_PORT2 (2UL)

#define	ESC_FWD_RX_ERR_CNT_PORT3 (3UL)

#define	ESC_LOST_LINK_CNT_PORT0 (0UL)

#define	ESC_LOST_LINK_CNT_PORT1 (1UL)

#define	ESC_LOST_LINK_CNT_PORT2 (2UL)

#define	ESC_LOST_LINK_CNT_PORT3 (3UL)

#define	ESC_PHY_STAT_PORT0 (0UL)

#define	ESC_PHY_STAT_PORT1 (1UL)

#define	ESC_PHY_STAT_PORT2 (2UL)

#define	ESC_PHY_STAT_PORT3 (3UL)

#define	ESC_FMMU_0 (0UL)

#define	ESC_FMMU_1 (1UL)

#define	ESC_FMMU_2 (2UL)

#define	ESC_FMMU_3 (3UL)

#define	ESC_FMMU_4 (4UL)

#define	ESC_FMMU_5 (5UL)

#define	ESC_FMMU_6 (6UL)

#define	ESC_FMMU_7 (7UL)

#define	ESC_SYNCM_0 (0UL)

#define	ESC_SYNCM_1 (1UL)

#define	ESC_SYNCM_2 (2UL)

#define	ESC_SYNCM_3 (3UL)

#define	ESC_SYNCM_4 (4UL)

#define	ESC_SYNCM_5 (5UL)

#define	ESC_SYNCM_6 (6UL)

#define	ESC_SYNCM_7 (7UL)

#define	ESC_RCV_TIME_PORT0 (0UL)

#define	ESC_RCV_TIME_PORT1 (1UL)

#define	ESC_RCV_TIME_PORT2 (2UL)

#define	ESC_RCV_TIME_PORT3 (3UL)

#define	ESC_IO_CFG_CTR0 (0UL)

#define	ESC_IO_CFG_CTR1 (1UL)

#define	ESC_IO_CFG_CTR2 (2UL)

#define	ESC_IO_CFG_CTR3 (3UL)

#define	ESC_IO_CFG_CTR4 (4UL)

#define	ESC_IO_CFG_CTR5 (5UL)

#define	ESC_IO_CFG_CTR6 (6UL)

#define	ESC_IO_CFG_CTR7 (7UL)

#define	ESC_IO_CFG_CTR8 (8UL)

Macro Definition Documentation

◆ ESC_ACT_STAT_CHK_RSLT_GET

#define ESC_ACT_STAT_CHK_RSLT_GET ( x ) (((uint8_t)(x) & ESC_ACT_STAT_CHK_RSLT_MASK) >> ESC_ACT_STAT_CHK_RSLT_SHIFT)

◆ ESC_ACT_STAT_CHK_RSLT_MASK

#define ESC_ACT_STAT_CHK_RSLT_MASK (0x4U)

◆ ESC_ACT_STAT_CHK_RSLT_SHIFT

#define ESC_ACT_STAT_CHK_RSLT_SHIFT (2U)

◆ ESC_ACT_STAT_SYNC0_GET

#define ESC_ACT_STAT_SYNC0_GET ( x ) (((uint8_t)(x) & ESC_ACT_STAT_SYNC0_MASK) >> ESC_ACT_STAT_SYNC0_SHIFT)

◆ ESC_ACT_STAT_SYNC0_MASK

#define ESC_ACT_STAT_SYNC0_MASK (0x1U)

◆ ESC_ACT_STAT_SYNC0_SHIFT

#define ESC_ACT_STAT_SYNC0_SHIFT (0U)

◆ ESC_ACT_STAT_SYNC1_GET

#define ESC_ACT_STAT_SYNC1_GET ( x ) (((uint8_t)(x) & ESC_ACT_STAT_SYNC1_MASK) >> ESC_ACT_STAT_SYNC1_SHIFT)

◆ ESC_ACT_STAT_SYNC1_MASK

#define ESC_ACT_STAT_SYNC1_MASK (0x2U)

◆ ESC_ACT_STAT_SYNC1_SHIFT

#define ESC_ACT_STAT_SYNC1_SHIFT (1U)

◆ ESC_AL_CTRL_DI_GET

#define ESC_AL_CTRL_DI_GET ( x ) (((uint16_t)(x) & ESC_AL_CTRL_DI_MASK) >> ESC_AL_CTRL_DI_SHIFT)

◆ ESC_AL_CTRL_DI_MASK

#define ESC_AL_CTRL_DI_MASK (0x20U)

◆ ESC_AL_CTRL_DI_SET

#define ESC_AL_CTRL_DI_SET ( x ) (((uint16_t)(x) << ESC_AL_CTRL_DI_SHIFT) & ESC_AL_CTRL_DI_MASK)

◆ ESC_AL_CTRL_DI_SHIFT

#define ESC_AL_CTRL_DI_SHIFT (5U)

◆ ESC_AL_CTRL_EIA_GET

#define ESC_AL_CTRL_EIA_GET ( x ) (((uint16_t)(x) & ESC_AL_CTRL_EIA_MASK) >> ESC_AL_CTRL_EIA_SHIFT)

◆ ESC_AL_CTRL_EIA_MASK

#define ESC_AL_CTRL_EIA_MASK (0x10U)

◆ ESC_AL_CTRL_EIA_SET

#define ESC_AL_CTRL_EIA_SET ( x ) (((uint16_t)(x) << ESC_AL_CTRL_EIA_SHIFT) & ESC_AL_CTRL_EIA_MASK)

◆ ESC_AL_CTRL_EIA_SHIFT

#define ESC_AL_CTRL_EIA_SHIFT (4U)

◆ ESC_AL_CTRL_IST_GET

#define ESC_AL_CTRL_IST_GET ( x ) (((uint16_t)(x) & ESC_AL_CTRL_IST_MASK) >> ESC_AL_CTRL_IST_SHIFT)

◆ ESC_AL_CTRL_IST_MASK

#define ESC_AL_CTRL_IST_MASK (0xFU)

◆ ESC_AL_CTRL_IST_SET

#define ESC_AL_CTRL_IST_SET ( x ) (((uint16_t)(x) << ESC_AL_CTRL_IST_SHIFT) & ESC_AL_CTRL_IST_MASK)

◆ ESC_AL_CTRL_IST_SHIFT

#define ESC_AL_CTRL_IST_SHIFT (0U)

◆ ESC_AL_EVT_REQ_ALC_EVT_GET

#define ESC_AL_EVT_REQ_ALC_EVT_GET ( x ) (((uint32_t)(x) & ESC_AL_EVT_REQ_ALC_EVT_MASK) >> ESC_AL_EVT_REQ_ALC_EVT_SHIFT)

◆ ESC_AL_EVT_REQ_ALC_EVT_MASK

#define ESC_AL_EVT_REQ_ALC_EVT_MASK (0x1U)

◆ ESC_AL_EVT_REQ_ALC_EVT_SHIFT

#define ESC_AL_EVT_REQ_ALC_EVT_SHIFT (0U)

◆ ESC_AL_EVT_REQ_DCL_EVT_GET

#define ESC_AL_EVT_REQ_DCL_EVT_GET ( x ) (((uint32_t)(x) & ESC_AL_EVT_REQ_DCL_EVT_MASK) >> ESC_AL_EVT_REQ_DCL_EVT_SHIFT)

◆ ESC_AL_EVT_REQ_DCL_EVT_MASK

#define ESC_AL_EVT_REQ_DCL_EVT_MASK (0x2U)

◆ ESC_AL_EVT_REQ_DCL_EVT_SHIFT

#define ESC_AL_EVT_REQ_DCL_EVT_SHIFT (1U)

◆ ESC_AL_EVT_REQ_EE_EMU_GET

#define ESC_AL_EVT_REQ_EE_EMU_GET ( x ) (((uint32_t)(x) & ESC_AL_EVT_REQ_EE_EMU_MASK) >> ESC_AL_EVT_REQ_EE_EMU_SHIFT)

◆ ESC_AL_EVT_REQ_EE_EMU_MASK

#define ESC_AL_EVT_REQ_EE_EMU_MASK (0x20U)

◆ ESC_AL_EVT_REQ_EE_EMU_SHIFT

#define ESC_AL_EVT_REQ_EE_EMU_SHIFT (5U)

◆ ESC_AL_EVT_REQ_SM_ACT_GET

#define ESC_AL_EVT_REQ_SM_ACT_GET ( x ) (((uint32_t)(x) & ESC_AL_EVT_REQ_SM_ACT_MASK) >> ESC_AL_EVT_REQ_SM_ACT_SHIFT)

◆ ESC_AL_EVT_REQ_SM_ACT_MASK

#define ESC_AL_EVT_REQ_SM_ACT_MASK (0x10U)

◆ ESC_AL_EVT_REQ_SM_ACT_SHIFT

#define ESC_AL_EVT_REQ_SM_ACT_SHIFT (4U)

◆ ESC_AL_EVT_REQ_SM_INT_GET

#define ESC_AL_EVT_REQ_SM_INT_GET ( x ) (((uint32_t)(x) & ESC_AL_EVT_REQ_SM_INT_MASK) >> ESC_AL_EVT_REQ_SM_INT_SHIFT)

◆ ESC_AL_EVT_REQ_SM_INT_MASK

#define ESC_AL_EVT_REQ_SM_INT_MASK (0xFFFF00UL)

◆ ESC_AL_EVT_REQ_SM_INT_SHIFT

#define ESC_AL_EVT_REQ_SM_INT_SHIFT (8U)

◆ ESC_AL_EVT_REQ_ST_DC_SYNC0_GET

#define ESC_AL_EVT_REQ_ST_DC_SYNC0_GET ( x ) (((uint32_t)(x) & ESC_AL_EVT_REQ_ST_DC_SYNC0_MASK) >> ESC_AL_EVT_REQ_ST_DC_SYNC0_SHIFT)

◆ ESC_AL_EVT_REQ_ST_DC_SYNC0_MASK

#define ESC_AL_EVT_REQ_ST_DC_SYNC0_MASK (0x4U)

◆ ESC_AL_EVT_REQ_ST_DC_SYNC0_SHIFT

#define ESC_AL_EVT_REQ_ST_DC_SYNC0_SHIFT (2U)

◆ ESC_AL_EVT_REQ_ST_DC_SYNC1_GET

#define ESC_AL_EVT_REQ_ST_DC_SYNC1_GET ( x ) (((uint32_t)(x) & ESC_AL_EVT_REQ_ST_DC_SYNC1_MASK) >> ESC_AL_EVT_REQ_ST_DC_SYNC1_SHIFT)

◆ ESC_AL_EVT_REQ_ST_DC_SYNC1_MASK

#define ESC_AL_EVT_REQ_ST_DC_SYNC1_MASK (0x8U)

◆ ESC_AL_EVT_REQ_ST_DC_SYNC1_SHIFT

#define ESC_AL_EVT_REQ_ST_DC_SYNC1_SHIFT (3U)

◆ ESC_AL_EVT_REQ_WDG_PD_GET

#define ESC_AL_EVT_REQ_WDG_PD_GET ( x ) (((uint32_t)(x) & ESC_AL_EVT_REQ_WDG_PD_MASK) >> ESC_AL_EVT_REQ_WDG_PD_SHIFT)

◆ ESC_AL_EVT_REQ_WDG_PD_MASK

#define ESC_AL_EVT_REQ_WDG_PD_MASK (0x40U)

◆ ESC_AL_EVT_REQ_WDG_PD_SHIFT

#define ESC_AL_EVT_REQ_WDG_PD_SHIFT (6U)

◆ ESC_AL_STAT_AS_GET

#define ESC_AL_STAT_AS_GET ( x ) (((uint16_t)(x) & ESC_AL_STAT_AS_MASK) >> ESC_AL_STAT_AS_SHIFT)

◆ ESC_AL_STAT_AS_MASK

#define ESC_AL_STAT_AS_MASK (0xFU)

◆ ESC_AL_STAT_AS_SET

#define ESC_AL_STAT_AS_SET ( x ) (((uint16_t)(x) << ESC_AL_STAT_AS_SHIFT) & ESC_AL_STAT_AS_MASK)

◆ ESC_AL_STAT_AS_SHIFT

#define ESC_AL_STAT_AS_SHIFT (0U)

◆ ESC_AL_STAT_CODE_CODE_GET

#define ESC_AL_STAT_CODE_CODE_GET ( x ) (((uint16_t)(x) & ESC_AL_STAT_CODE_CODE_MASK) >> ESC_AL_STAT_CODE_CODE_SHIFT)

◆ ESC_AL_STAT_CODE_CODE_MASK

#define ESC_AL_STAT_CODE_CODE_MASK (0xFFFFU)

◆ ESC_AL_STAT_CODE_CODE_SET

#define ESC_AL_STAT_CODE_CODE_SET ( x ) (((uint16_t)(x) << ESC_AL_STAT_CODE_CODE_SHIFT) & ESC_AL_STAT_CODE_CODE_MASK)

◆ ESC_AL_STAT_CODE_CODE_SHIFT

#define ESC_AL_STAT_CODE_CODE_SHIFT (0U)

◆ ESC_AL_STAT_DI_GET

#define ESC_AL_STAT_DI_GET ( x ) (((uint16_t)(x) & ESC_AL_STAT_DI_MASK) >> ESC_AL_STAT_DI_SHIFT)

◆ ESC_AL_STAT_DI_MASK

#define ESC_AL_STAT_DI_MASK (0x20U)

◆ ESC_AL_STAT_DI_SET

#define ESC_AL_STAT_DI_SET ( x ) (((uint16_t)(x) << ESC_AL_STAT_DI_SHIFT) & ESC_AL_STAT_DI_MASK)

◆ ESC_AL_STAT_DI_SHIFT

#define ESC_AL_STAT_DI_SHIFT (5U)

◆ ESC_AL_STAT_EI_GET

#define ESC_AL_STAT_EI_GET ( x ) (((uint16_t)(x) & ESC_AL_STAT_EI_MASK) >> ESC_AL_STAT_EI_SHIFT)

◆ ESC_AL_STAT_EI_MASK

#define ESC_AL_STAT_EI_MASK (0x10U)

◆ ESC_AL_STAT_EI_SET

#define ESC_AL_STAT_EI_SET ( x ) (((uint16_t)(x) << ESC_AL_STAT_EI_SHIFT) & ESC_AL_STAT_EI_MASK)

◆ ESC_AL_STAT_EI_SHIFT

#define ESC_AL_STAT_EI_SHIFT (4U)

◆ ESC_BUILD_BUILD_GET

#define ESC_BUILD_BUILD_GET ( x ) (((uint16_t)(x) & ESC_BUILD_BUILD_MASK) >> ESC_BUILD_BUILD_SHIFT)

◆ ESC_BUILD_BUILD_MASK

#define ESC_BUILD_BUILD_MASK (0xFF00U)

◆ ESC_BUILD_BUILD_SHIFT

#define ESC_BUILD_BUILD_SHIFT (8U)

◆ ESC_BUILD_Y_GET

#define ESC_BUILD_Y_GET ( x ) (((uint16_t)(x) & ESC_BUILD_Y_MASK) >> ESC_BUILD_Y_SHIFT)

◆ ESC_BUILD_Y_MASK

#define ESC_BUILD_Y_MASK (0xF0U)

◆ ESC_BUILD_Y_SHIFT

#define ESC_BUILD_Y_SHIFT (4U)

◆ ESC_BUILD_Z_GET

#define ESC_BUILD_Z_GET ( x ) (((uint16_t)(x) & ESC_BUILD_Z_MASK) >> ESC_BUILD_Z_SHIFT)

◆ ESC_BUILD_Z_MASK

#define ESC_BUILD_Z_MASK (0xFU)

◆ ESC_BUILD_Z_SHIFT

#define ESC_BUILD_Z_SHIFT (0U)

◆ ESC_CYC_UNIT_CTRL_LATCHI0_GET

#define ESC_CYC_UNIT_CTRL_LATCHI0_GET ( x ) (((uint8_t)(x) & ESC_CYC_UNIT_CTRL_LATCHI0_MASK) >> ESC_CYC_UNIT_CTRL_LATCHI0_SHIFT)

◆ ESC_CYC_UNIT_CTRL_LATCHI0_MASK

#define ESC_CYC_UNIT_CTRL_LATCHI0_MASK (0x10U)

◆ ESC_CYC_UNIT_CTRL_LATCHI0_SHIFT

#define ESC_CYC_UNIT_CTRL_LATCHI0_SHIFT (4U)

◆ ESC_CYC_UNIT_CTRL_LATCHI1_GET

#define ESC_CYC_UNIT_CTRL_LATCHI1_GET ( x ) (((uint8_t)(x) & ESC_CYC_UNIT_CTRL_LATCHI1_MASK) >> ESC_CYC_UNIT_CTRL_LATCHI1_SHIFT)

◆ ESC_CYC_UNIT_CTRL_LATCHI1_MASK

#define ESC_CYC_UNIT_CTRL_LATCHI1_MASK (0x20U)

◆ ESC_CYC_UNIT_CTRL_LATCHI1_SHIFT

#define ESC_CYC_UNIT_CTRL_LATCHI1_SHIFT (5U)

◆ ESC_CYC_UNIT_CTRL_SYNCO_GET

#define ESC_CYC_UNIT_CTRL_SYNCO_GET ( x ) (((uint8_t)(x) & ESC_CYC_UNIT_CTRL_SYNCO_MASK) >> ESC_CYC_UNIT_CTRL_SYNCO_SHIFT)

◆ ESC_CYC_UNIT_CTRL_SYNCO_MASK

#define ESC_CYC_UNIT_CTRL_SYNCO_MASK (0x1U)

◆ ESC_CYC_UNIT_CTRL_SYNCO_SHIFT

#define ESC_CYC_UNIT_CTRL_SYNCO_SHIFT (0U)

◆ ESC_DIO_OUT_DATA_OD_GET

#define ESC_DIO_OUT_DATA_OD_GET ( x ) (((uint32_t)(x) & ESC_DIO_OUT_DATA_OD_MASK) >> ESC_DIO_OUT_DATA_OD_SHIFT)

◆ ESC_DIO_OUT_DATA_OD_MASK

#define ESC_DIO_OUT_DATA_OD_MASK (0xFFFFFFFFUL)

◆ ESC_DIO_OUT_DATA_OD_SHIFT

#define ESC_DIO_OUT_DATA_OD_SHIFT (0U)

◆ ESC_ECAT_BUF_CET_TIME_GET

#define ESC_ECAT_BUF_CET_TIME_GET ( x ) (((uint32_t)(x) & ESC_ECAT_BUF_CET_TIME_MASK) >> ESC_ECAT_BUF_CET_TIME_SHIFT)

◆ ESC_ECAT_BUF_CET_TIME_MASK

#define ESC_ECAT_BUF_CET_TIME_MASK (0xFFFFFFFFUL)

◆ ESC_ECAT_BUF_CET_TIME_SHIFT

#define ESC_ECAT_BUF_CET_TIME_SHIFT (0U)

◆ ESC_ECAT_EVT_MSK_MASK_GET

#define ESC_ECAT_EVT_MSK_MASK_GET ( x ) (((uint16_t)(x) & ESC_ECAT_EVT_MSK_MASK_MASK) >> ESC_ECAT_EVT_MSK_MASK_SHIFT)

◆ ESC_ECAT_EVT_MSK_MASK_MASK

#define ESC_ECAT_EVT_MSK_MASK_MASK (0xFFFFU)

◆ ESC_ECAT_EVT_MSK_MASK_SHIFT

#define ESC_ECAT_EVT_MSK_MASK_SHIFT (0U)

◆ ESC_ECAT_EVT_REQ_ALS_EVT_GET

#define ESC_ECAT_EVT_REQ_ALS_EVT_GET ( x ) (((uint16_t)(x) & ESC_ECAT_EVT_REQ_ALS_EVT_MASK) >> ESC_ECAT_EVT_REQ_ALS_EVT_SHIFT)

◆ ESC_ECAT_EVT_REQ_ALS_EVT_MASK

#define ESC_ECAT_EVT_REQ_ALS_EVT_MASK (0x8U)

◆ ESC_ECAT_EVT_REQ_ALS_EVT_SHIFT

#define ESC_ECAT_EVT_REQ_ALS_EVT_SHIFT (3U)

◆ ESC_ECAT_EVT_REQ_DCL_EVT_GET

#define ESC_ECAT_EVT_REQ_DCL_EVT_GET ( x ) (((uint16_t)(x) & ESC_ECAT_EVT_REQ_DCL_EVT_MASK) >> ESC_ECAT_EVT_REQ_DCL_EVT_SHIFT)

◆ ESC_ECAT_EVT_REQ_DCL_EVT_MASK

#define ESC_ECAT_EVT_REQ_DCL_EVT_MASK (0x1U)

◆ ESC_ECAT_EVT_REQ_DCL_EVT_SHIFT

#define ESC_ECAT_EVT_REQ_DCL_EVT_SHIFT (0U)

◆ ESC_ECAT_EVT_REQ_DLS_EVT_GET

#define ESC_ECAT_EVT_REQ_DLS_EVT_GET ( x ) (((uint16_t)(x) & ESC_ECAT_EVT_REQ_DLS_EVT_MASK) >> ESC_ECAT_EVT_REQ_DLS_EVT_SHIFT)

◆ ESC_ECAT_EVT_REQ_DLS_EVT_MASK

#define ESC_ECAT_EVT_REQ_DLS_EVT_MASK (0x4U)

◆ ESC_ECAT_EVT_REQ_DLS_EVT_SHIFT

#define ESC_ECAT_EVT_REQ_DLS_EVT_SHIFT (2U)

◆ ESC_ECAT_EVT_REQ_MV_GET

#define ESC_ECAT_EVT_REQ_MV_GET ( x ) (((uint16_t)(x) & ESC_ECAT_EVT_REQ_MV_MASK) >> ESC_ECAT_EVT_REQ_MV_SHIFT)

◆ ESC_ECAT_EVT_REQ_MV_MASK

#define ESC_ECAT_EVT_REQ_MV_MASK (0xFF0U)

◆ ESC_ECAT_EVT_REQ_MV_SHIFT

#define ESC_ECAT_EVT_REQ_MV_SHIFT (4U)

◆ ESC_ECAT_PU_ERR_CNT_CNT_GET

#define ESC_ECAT_PU_ERR_CNT_CNT_GET ( x ) (((uint8_t)(x) & ESC_ECAT_PU_ERR_CNT_CNT_MASK) >> ESC_ECAT_PU_ERR_CNT_CNT_SHIFT)

◆ ESC_ECAT_PU_ERR_CNT_CNT_MASK

#define ESC_ECAT_PU_ERR_CNT_CNT_MASK (0xFFU)

◆ ESC_ECAT_PU_ERR_CNT_CNT_SHIFT

#define ESC_ECAT_PU_ERR_CNT_CNT_SHIFT (0U)

◆ ESC_EEPROM_ADDR_ADDR_GET

#define ESC_EEPROM_ADDR_ADDR_GET ( x ) (((uint32_t)(x) & ESC_EEPROM_ADDR_ADDR_MASK) >> ESC_EEPROM_ADDR_ADDR_SHIFT)

◆ ESC_EEPROM_ADDR_ADDR_MASK

#define ESC_EEPROM_ADDR_ADDR_MASK (0xFFFFFFFFUL)

◆ ESC_EEPROM_ADDR_ADDR_SET

#define ESC_EEPROM_ADDR_ADDR_SET ( x ) (((uint32_t)(x) << ESC_EEPROM_ADDR_ADDR_SHIFT) & ESC_EEPROM_ADDR_ADDR_MASK)

◆ ESC_EEPROM_ADDR_ADDR_SHIFT

#define ESC_EEPROM_ADDR_ADDR_SHIFT (0U)

◆ ESC_EEPROM_CFG_FORCE_ECAT_GET

#define ESC_EEPROM_CFG_FORCE_ECAT_GET ( x ) (((uint8_t)(x) & ESC_EEPROM_CFG_FORCE_ECAT_MASK) >> ESC_EEPROM_CFG_FORCE_ECAT_SHIFT)

◆ ESC_EEPROM_CFG_FORCE_ECAT_MASK

#define ESC_EEPROM_CFG_FORCE_ECAT_MASK (0x2U)

◆ ESC_EEPROM_CFG_FORCE_ECAT_SHIFT

#define ESC_EEPROM_CFG_FORCE_ECAT_SHIFT (1U)

◆ ESC_EEPROM_CFG_PDI_GET

#define ESC_EEPROM_CFG_PDI_GET ( x ) (((uint8_t)(x) & ESC_EEPROM_CFG_PDI_MASK) >> ESC_EEPROM_CFG_PDI_SHIFT)

◆ ESC_EEPROM_CFG_PDI_MASK

#define ESC_EEPROM_CFG_PDI_MASK (0x1U)

◆ ESC_EEPROM_CFG_PDI_SHIFT

#define ESC_EEPROM_CFG_PDI_SHIFT (0U)

◆ ESC_EEPROM_CTRL_STAT_BUSY_GET

#define ESC_EEPROM_CTRL_STAT_BUSY_GET ( x ) (((uint16_t)(x) & ESC_EEPROM_CTRL_STAT_BUSY_MASK) >> ESC_EEPROM_CTRL_STAT_BUSY_SHIFT)

◆ ESC_EEPROM_CTRL_STAT_BUSY_MASK

#define ESC_EEPROM_CTRL_STAT_BUSY_MASK (0x8000U)

◆ ESC_EEPROM_CTRL_STAT_BUSY_SHIFT

#define ESC_EEPROM_CTRL_STAT_BUSY_SHIFT (15U)

◆ ESC_EEPROM_CTRL_STAT_CKSM_ERR_GET

#define ESC_EEPROM_CTRL_STAT_CKSM_ERR_GET ( x ) (((uint16_t)(x) & ESC_EEPROM_CTRL_STAT_CKSM_ERR_MASK) >> ESC_EEPROM_CTRL_STAT_CKSM_ERR_SHIFT)

◆ ESC_EEPROM_CTRL_STAT_CKSM_ERR_MASK

#define ESC_EEPROM_CTRL_STAT_CKSM_ERR_MASK (0x800U)

◆ ESC_EEPROM_CTRL_STAT_CKSM_ERR_SET

#define ESC_EEPROM_CTRL_STAT_CKSM_ERR_SET ( x ) (((uint16_t)(x) << ESC_EEPROM_CTRL_STAT_CKSM_ERR_SHIFT) & ESC_EEPROM_CTRL_STAT_CKSM_ERR_MASK)

◆ ESC_EEPROM_CTRL_STAT_CKSM_ERR_SHIFT

#define ESC_EEPROM_CTRL_STAT_CKSM_ERR_SHIFT (11U)

◆ ESC_EEPROM_CTRL_STAT_CMD_GET

#define ESC_EEPROM_CTRL_STAT_CMD_GET ( x ) (((uint16_t)(x) & ESC_EEPROM_CTRL_STAT_CMD_MASK) >> ESC_EEPROM_CTRL_STAT_CMD_SHIFT)

◆ ESC_EEPROM_CTRL_STAT_CMD_MASK

#define ESC_EEPROM_CTRL_STAT_CMD_MASK (0x700U)

◆ ESC_EEPROM_CTRL_STAT_CMD_SET

#define ESC_EEPROM_CTRL_STAT_CMD_SET ( x ) (((uint16_t)(x) << ESC_EEPROM_CTRL_STAT_CMD_SHIFT) & ESC_EEPROM_CTRL_STAT_CMD_MASK)

◆ ESC_EEPROM_CTRL_STAT_CMD_SHIFT

#define ESC_EEPROM_CTRL_STAT_CMD_SHIFT (8U)

◆ ESC_EEPROM_CTRL_STAT_ECAT_WEN_GET

#define ESC_EEPROM_CTRL_STAT_ECAT_WEN_GET ( x ) (((uint16_t)(x) & ESC_EEPROM_CTRL_STAT_ECAT_WEN_MASK) >> ESC_EEPROM_CTRL_STAT_ECAT_WEN_SHIFT)

◆ ESC_EEPROM_CTRL_STAT_ECAT_WEN_MASK

#define ESC_EEPROM_CTRL_STAT_ECAT_WEN_MASK (0x1U)

◆ ESC_EEPROM_CTRL_STAT_ECAT_WEN_SHIFT

#define ESC_EEPROM_CTRL_STAT_ECAT_WEN_SHIFT (0U)

◆ ESC_EEPROM_CTRL_STAT_EE_ALGM_GET

#define ESC_EEPROM_CTRL_STAT_EE_ALGM_GET ( x ) (((uint16_t)(x) & ESC_EEPROM_CTRL_STAT_EE_ALGM_MASK) >> ESC_EEPROM_CTRL_STAT_EE_ALGM_SHIFT)

◆ ESC_EEPROM_CTRL_STAT_EE_ALGM_MASK

#define ESC_EEPROM_CTRL_STAT_EE_ALGM_MASK (0x80U)

◆ ESC_EEPROM_CTRL_STAT_EE_ALGM_SHIFT

#define ESC_EEPROM_CTRL_STAT_EE_ALGM_SHIFT (7U)

◆ ESC_EEPROM_CTRL_STAT_EE_EMU_GET

#define ESC_EEPROM_CTRL_STAT_EE_EMU_GET ( x ) (((uint16_t)(x) & ESC_EEPROM_CTRL_STAT_EE_EMU_MASK) >> ESC_EEPROM_CTRL_STAT_EE_EMU_SHIFT)

◆ ESC_EEPROM_CTRL_STAT_EE_EMU_MASK

#define ESC_EEPROM_CTRL_STAT_EE_EMU_MASK (0x20U)

◆ ESC_EEPROM_CTRL_STAT_EE_EMU_SHIFT

#define ESC_EEPROM_CTRL_STAT_EE_EMU_SHIFT (5U)

◆ ESC_EEPROM_CTRL_STAT_EE_LDS_GET

#define ESC_EEPROM_CTRL_STAT_EE_LDS_GET ( x ) (((uint16_t)(x) & ESC_EEPROM_CTRL_STAT_EE_LDS_MASK) >> ESC_EEPROM_CTRL_STAT_EE_LDS_SHIFT)

◆ ESC_EEPROM_CTRL_STAT_EE_LDS_MASK

#define ESC_EEPROM_CTRL_STAT_EE_LDS_MASK (0x1000U)

◆ ESC_EEPROM_CTRL_STAT_EE_LDS_SHIFT

#define ESC_EEPROM_CTRL_STAT_EE_LDS_SHIFT (12U)

◆ ESC_EEPROM_CTRL_STAT_ERR_ACK_CMD_GET

#define ESC_EEPROM_CTRL_STAT_ERR_ACK_CMD_GET ( x ) (((uint16_t)(x) & ESC_EEPROM_CTRL_STAT_ERR_ACK_CMD_MASK) >> ESC_EEPROM_CTRL_STAT_ERR_ACK_CMD_SHIFT)

◆ ESC_EEPROM_CTRL_STAT_ERR_ACK_CMD_MASK

#define ESC_EEPROM_CTRL_STAT_ERR_ACK_CMD_MASK (0x2000U)

◆ ESC_EEPROM_CTRL_STAT_ERR_ACK_CMD_SET

#define ESC_EEPROM_CTRL_STAT_ERR_ACK_CMD_SET ( x ) (((uint16_t)(x) << ESC_EEPROM_CTRL_STAT_ERR_ACK_CMD_SHIFT) & ESC_EEPROM_CTRL_STAT_ERR_ACK_CMD_MASK)

◆ ESC_EEPROM_CTRL_STAT_ERR_ACK_CMD_SHIFT

#define ESC_EEPROM_CTRL_STAT_ERR_ACK_CMD_SHIFT (13U)

◆ ESC_EEPROM_CTRL_STAT_ERR_WEN_GET

#define ESC_EEPROM_CTRL_STAT_ERR_WEN_GET ( x ) (((uint16_t)(x) & ESC_EEPROM_CTRL_STAT_ERR_WEN_MASK) >> ESC_EEPROM_CTRL_STAT_ERR_WEN_SHIFT)

◆ ESC_EEPROM_CTRL_STAT_ERR_WEN_MASK

#define ESC_EEPROM_CTRL_STAT_ERR_WEN_MASK (0x4000U)

◆ ESC_EEPROM_CTRL_STAT_ERR_WEN_SHIFT

#define ESC_EEPROM_CTRL_STAT_ERR_WEN_SHIFT (14U)

◆ ESC_EEPROM_CTRL_STAT_NUM_RD_BYTE_GET

#define ESC_EEPROM_CTRL_STAT_NUM_RD_BYTE_GET ( x ) (((uint16_t)(x) & ESC_EEPROM_CTRL_STAT_NUM_RD_BYTE_MASK) >> ESC_EEPROM_CTRL_STAT_NUM_RD_BYTE_SHIFT)

◆ ESC_EEPROM_CTRL_STAT_NUM_RD_BYTE_MASK

#define ESC_EEPROM_CTRL_STAT_NUM_RD_BYTE_MASK (0x40U)

◆ ESC_EEPROM_CTRL_STAT_NUM_RD_BYTE_SHIFT

#define ESC_EEPROM_CTRL_STAT_NUM_RD_BYTE_SHIFT (6U)

◆ ESC_EEPROM_DATA_HI_GET

#define ESC_EEPROM_DATA_HI_GET ( x ) (((uint64_t)(x) & ESC_EEPROM_DATA_HI_MASK) >> ESC_EEPROM_DATA_HI_SHIFT)

◆ ESC_EEPROM_DATA_HI_MASK

#define ESC_EEPROM_DATA_HI_MASK (0xFFFFFFFFFFFF0000ULL)

◆ ESC_EEPROM_DATA_HI_SET

#define ESC_EEPROM_DATA_HI_SET ( x ) (((uint64_t)(x) << ESC_EEPROM_DATA_HI_SHIFT) & ESC_EEPROM_DATA_HI_MASK)

◆ ESC_EEPROM_DATA_HI_SHIFT

#define ESC_EEPROM_DATA_HI_SHIFT (16U)

◆ ESC_EEPROM_DATA_LO_GET

#define ESC_EEPROM_DATA_LO_GET ( x ) (((uint64_t)(x) & ESC_EEPROM_DATA_LO_MASK) >> ESC_EEPROM_DATA_LO_SHIFT)

◆ ESC_EEPROM_DATA_LO_MASK

#define ESC_EEPROM_DATA_LO_MASK (0xFFFFU)

◆ ESC_EEPROM_DATA_LO_SET

#define ESC_EEPROM_DATA_LO_SET ( x ) (((uint64_t)(x) << ESC_EEPROM_DATA_LO_SHIFT) & ESC_EEPROM_DATA_LO_MASK)

◆ ESC_EEPROM_DATA_LO_SHIFT

#define ESC_EEPROM_DATA_LO_SHIFT (0U)

◆ ESC_EEPROM_PDI_ACC_STAT_ACCESS_GET

#define ESC_EEPROM_PDI_ACC_STAT_ACCESS_GET ( x ) (((uint8_t)(x) & ESC_EEPROM_PDI_ACC_STAT_ACCESS_MASK) >> ESC_EEPROM_PDI_ACC_STAT_ACCESS_SHIFT)

◆ ESC_EEPROM_PDI_ACC_STAT_ACCESS_MASK

#define ESC_EEPROM_PDI_ACC_STAT_ACCESS_MASK (0x1U)

◆ ESC_EEPROM_PDI_ACC_STAT_ACCESS_SET

#define ESC_EEPROM_PDI_ACC_STAT_ACCESS_SET ( x ) (((uint8_t)(x) << ESC_EEPROM_PDI_ACC_STAT_ACCESS_SHIFT) & ESC_EEPROM_PDI_ACC_STAT_ACCESS_MASK)

◆ ESC_EEPROM_PDI_ACC_STAT_ACCESS_SHIFT

#define ESC_EEPROM_PDI_ACC_STAT_ACCESS_SHIFT (0U)

◆ ESC_ERR_LED_OVRD_EN_OVRD_GET

#define ESC_ERR_LED_OVRD_EN_OVRD_GET ( x ) (((uint8_t)(x) & ESC_ERR_LED_OVRD_EN_OVRD_MASK) >> ESC_ERR_LED_OVRD_EN_OVRD_SHIFT)

◆ ESC_ERR_LED_OVRD_EN_OVRD_MASK

#define ESC_ERR_LED_OVRD_EN_OVRD_MASK (0x10U)

◆ ESC_ERR_LED_OVRD_EN_OVRD_SET

#define ESC_ERR_LED_OVRD_EN_OVRD_SET ( x ) (((uint8_t)(x) << ESC_ERR_LED_OVRD_EN_OVRD_SHIFT) & ESC_ERR_LED_OVRD_EN_OVRD_MASK)

◆ ESC_ERR_LED_OVRD_EN_OVRD_SHIFT

#define ESC_ERR_LED_OVRD_EN_OVRD_SHIFT (4U)

◆ ESC_ERR_LED_OVRD_LED_CODE_GET

#define ESC_ERR_LED_OVRD_LED_CODE_GET ( x ) (((uint8_t)(x) & ESC_ERR_LED_OVRD_LED_CODE_MASK) >> ESC_ERR_LED_OVRD_LED_CODE_SHIFT)

◆ ESC_ERR_LED_OVRD_LED_CODE_MASK

#define ESC_ERR_LED_OVRD_LED_CODE_MASK (0xFU)

◆ ESC_ERR_LED_OVRD_LED_CODE_SET

#define ESC_ERR_LED_OVRD_LED_CODE_SET ( x ) (((uint8_t)(x) << ESC_ERR_LED_OVRD_LED_CODE_SHIFT) & ESC_ERR_LED_OVRD_LED_CODE_MASK)

◆ ESC_ERR_LED_OVRD_LED_CODE_SHIFT

#define ESC_ERR_LED_OVRD_LED_CODE_SHIFT (0U)

◆ ESC_ESC_CFG_CDLIU_GET

#define ESC_ESC_CFG_CDLIU_GET ( x ) (((uint8_t)(x) & ESC_ESC_CFG_CDLIU_MASK) >> ESC_ESC_CFG_CDLIU_SHIFT)

◆ ESC_ESC_CFG_CDLIU_MASK

#define ESC_ESC_CFG_CDLIU_MASK (0x8U)

◆ ESC_ESC_CFG_CDLIU_SHIFT

#define ESC_ESC_CFG_CDLIU_SHIFT (3U)

◆ ESC_ESC_CFG_DCSOU_GET

#define ESC_ESC_CFG_DCSOU_GET ( x ) (((uint8_t)(x) & ESC_ESC_CFG_DCSOU_MASK) >> ESC_ESC_CFG_DCSOU_SHIFT)

◆ ESC_ESC_CFG_DCSOU_MASK

#define ESC_ESC_CFG_DCSOU_MASK (0x4U)

◆ ESC_ESC_CFG_DCSOU_SHIFT

#define ESC_ESC_CFG_DCSOU_SHIFT (2U)

◆ ESC_ESC_CFG_DEV_EMU_GET

#define ESC_ESC_CFG_DEV_EMU_GET ( x ) (((uint8_t)(x) & ESC_ESC_CFG_DEV_EMU_MASK) >> ESC_ESC_CFG_DEV_EMU_SHIFT)

◆ ESC_ESC_CFG_DEV_EMU_MASK

#define ESC_ESC_CFG_DEV_EMU_MASK (0x1U)

◆ ESC_ESC_CFG_DEV_EMU_SHIFT

#define ESC_ESC_CFG_DEV_EMU_SHIFT (0U)

◆ ESC_ESC_CFG_ELDAP_GET

#define ESC_ESC_CFG_ELDAP_GET ( x ) (((uint8_t)(x) & ESC_ESC_CFG_ELDAP_MASK) >> ESC_ESC_CFG_ELDAP_SHIFT)

◆ ESC_ESC_CFG_ELDAP_MASK

#define ESC_ESC_CFG_ELDAP_MASK (0x2U)

◆ ESC_ESC_CFG_ELDAP_SHIFT

#define ESC_ESC_CFG_ELDAP_SHIFT (1U)

◆ ESC_ESC_CFG_ELP0_GET

#define ESC_ESC_CFG_ELP0_GET ( x ) (((uint8_t)(x) & ESC_ESC_CFG_ELP0_MASK) >> ESC_ESC_CFG_ELP0_SHIFT)

◆ ESC_ESC_CFG_ELP0_MASK

#define ESC_ESC_CFG_ELP0_MASK (0x10U)

◆ ESC_ESC_CFG_ELP0_SHIFT

#define ESC_ESC_CFG_ELP0_SHIFT (4U)

◆ ESC_ESC_CFG_ELP1_GET

#define ESC_ESC_CFG_ELP1_GET ( x ) (((uint8_t)(x) & ESC_ESC_CFG_ELP1_MASK) >> ESC_ESC_CFG_ELP1_SHIFT)

◆ ESC_ESC_CFG_ELP1_MASK

#define ESC_ESC_CFG_ELP1_MASK (0x20U)

◆ ESC_ESC_CFG_ELP1_SHIFT

#define ESC_ESC_CFG_ELP1_SHIFT (5U)

◆ ESC_ESC_CFG_ELP2_GET

#define ESC_ESC_CFG_ELP2_GET ( x ) (((uint8_t)(x) & ESC_ESC_CFG_ELP2_MASK) >> ESC_ESC_CFG_ELP2_SHIFT)

◆ ESC_ESC_CFG_ELP2_MASK

#define ESC_ESC_CFG_ELP2_MASK (0x40U)

◆ ESC_ESC_CFG_ELP2_SHIFT

#define ESC_ESC_CFG_ELP2_SHIFT (6U)

◆ ESC_ESC_CFG_ELP3_GET

#define ESC_ESC_CFG_ELP3_GET ( x ) (((uint8_t)(x) & ESC_ESC_CFG_ELP3_MASK) >> ESC_ESC_CFG_ELP3_SHIFT)

◆ ESC_ESC_CFG_ELP3_MASK

#define ESC_ESC_CFG_ELP3_MASK (0x80U)

◆ ESC_ESC_CFG_ELP3_SHIFT

#define ESC_ESC_CFG_ELP3_SHIFT (7U)

◆ ESC_ESC_DL_CTRL_FR_GET

#define ESC_ESC_DL_CTRL_FR_GET ( x ) (((uint32_t)(x) & ESC_ESC_DL_CTRL_FR_MASK) >> ESC_ESC_DL_CTRL_FR_SHIFT)

◆ ESC_ESC_DL_CTRL_FR_MASK

#define ESC_ESC_DL_CTRL_FR_MASK (0x1U)

◆ ESC_ESC_DL_CTRL_FR_SHIFT

#define ESC_ESC_DL_CTRL_FR_SHIFT (0U)

◆ ESC_ESC_DL_CTRL_LP0_GET

#define ESC_ESC_DL_CTRL_LP0_GET ( x ) (((uint32_t)(x) & ESC_ESC_DL_CTRL_LP0_MASK) >> ESC_ESC_DL_CTRL_LP0_SHIFT)

◆ ESC_ESC_DL_CTRL_LP0_MASK

#define ESC_ESC_DL_CTRL_LP0_MASK (0x300U)

◆ ESC_ESC_DL_CTRL_LP0_SHIFT

#define ESC_ESC_DL_CTRL_LP0_SHIFT (8U)

◆ ESC_ESC_DL_CTRL_LP1_GET

#define ESC_ESC_DL_CTRL_LP1_GET ( x ) (((uint32_t)(x) & ESC_ESC_DL_CTRL_LP1_MASK) >> ESC_ESC_DL_CTRL_LP1_SHIFT)

◆ ESC_ESC_DL_CTRL_LP1_MASK

#define ESC_ESC_DL_CTRL_LP1_MASK (0xC00U)

◆ ESC_ESC_DL_CTRL_LP1_SHIFT

#define ESC_ESC_DL_CTRL_LP1_SHIFT (10U)

◆ ESC_ESC_DL_CTRL_LP2_GET

#define ESC_ESC_DL_CTRL_LP2_GET ( x ) (((uint32_t)(x) & ESC_ESC_DL_CTRL_LP2_MASK) >> ESC_ESC_DL_CTRL_LP2_SHIFT)

◆ ESC_ESC_DL_CTRL_LP2_MASK

#define ESC_ESC_DL_CTRL_LP2_MASK (0x3000U)

◆ ESC_ESC_DL_CTRL_LP2_SHIFT

#define ESC_ESC_DL_CTRL_LP2_SHIFT (12U)

◆ ESC_ESC_DL_CTRL_LP3_GET

#define ESC_ESC_DL_CTRL_LP3_GET ( x ) (((uint32_t)(x) & ESC_ESC_DL_CTRL_LP3_MASK) >> ESC_ESC_DL_CTRL_LP3_SHIFT)

◆ ESC_ESC_DL_CTRL_LP3_MASK

#define ESC_ESC_DL_CTRL_LP3_MASK (0xC000U)

◆ ESC_ESC_DL_CTRL_LP3_SHIFT

#define ESC_ESC_DL_CTRL_LP3_SHIFT (14U)

◆ ESC_ESC_DL_CTRL_RFS_GET

#define ESC_ESC_DL_CTRL_RFS_GET ( x ) (((uint32_t)(x) & ESC_ESC_DL_CTRL_RFS_MASK) >> ESC_ESC_DL_CTRL_RFS_SHIFT)

◆ ESC_ESC_DL_CTRL_RFS_MASK

#define ESC_ESC_DL_CTRL_RFS_MASK (0x70000UL)

◆ ESC_ESC_DL_CTRL_RFS_SHIFT

#define ESC_ESC_DL_CTRL_RFS_SHIFT (16U)

◆ ESC_ESC_DL_CTRL_SA_GET

#define ESC_ESC_DL_CTRL_SA_GET ( x ) (((uint32_t)(x) & ESC_ESC_DL_CTRL_SA_MASK) >> ESC_ESC_DL_CTRL_SA_SHIFT)

◆ ESC_ESC_DL_CTRL_SA_MASK

#define ESC_ESC_DL_CTRL_SA_MASK (0x1000000UL)

◆ ESC_ESC_DL_CTRL_SA_SHIFT

#define ESC_ESC_DL_CTRL_SA_SHIFT (24U)

◆ ESC_ESC_DL_CTRL_TU_GET

#define ESC_ESC_DL_CTRL_TU_GET ( x ) (((uint32_t)(x) & ESC_ESC_DL_CTRL_TU_MASK) >> ESC_ESC_DL_CTRL_TU_SHIFT)

◆ ESC_ESC_DL_CTRL_TU_MASK

#define ESC_ESC_DL_CTRL_TU_MASK (0x2U)

◆ ESC_ESC_DL_CTRL_TU_SHIFT

#define ESC_ESC_DL_CTRL_TU_SHIFT (1U)

◆ ESC_ESC_DL_STAT_CP0_GET

#define ESC_ESC_DL_STAT_CP0_GET ( x ) (((uint16_t)(x) & ESC_ESC_DL_STAT_CP0_MASK) >> ESC_ESC_DL_STAT_CP0_SHIFT)

◆ ESC_ESC_DL_STAT_CP0_MASK

#define ESC_ESC_DL_STAT_CP0_MASK (0x200U)

◆ ESC_ESC_DL_STAT_CP0_SHIFT

#define ESC_ESC_DL_STAT_CP0_SHIFT (9U)

◆ ESC_ESC_DL_STAT_CP1_GET

#define ESC_ESC_DL_STAT_CP1_GET ( x ) (((uint16_t)(x) & ESC_ESC_DL_STAT_CP1_MASK) >> ESC_ESC_DL_STAT_CP1_SHIFT)

◆ ESC_ESC_DL_STAT_CP1_MASK

#define ESC_ESC_DL_STAT_CP1_MASK (0x800U)

◆ ESC_ESC_DL_STAT_CP1_SHIFT

#define ESC_ESC_DL_STAT_CP1_SHIFT (11U)

◆ ESC_ESC_DL_STAT_CP2_GET

#define ESC_ESC_DL_STAT_CP2_GET ( x ) (((uint16_t)(x) & ESC_ESC_DL_STAT_CP2_MASK) >> ESC_ESC_DL_STAT_CP2_SHIFT)

◆ ESC_ESC_DL_STAT_CP2_MASK

#define ESC_ESC_DL_STAT_CP2_MASK (0x2000U)

◆ ESC_ESC_DL_STAT_CP2_SHIFT

#define ESC_ESC_DL_STAT_CP2_SHIFT (13U)

◆ ESC_ESC_DL_STAT_CP3_GET

#define ESC_ESC_DL_STAT_CP3_GET ( x ) (((uint16_t)(x) & ESC_ESC_DL_STAT_CP3_MASK) >> ESC_ESC_DL_STAT_CP3_SHIFT)

◆ ESC_ESC_DL_STAT_CP3_MASK

#define ESC_ESC_DL_STAT_CP3_MASK (0x8000U)

◆ ESC_ESC_DL_STAT_CP3_SHIFT

#define ESC_ESC_DL_STAT_CP3_SHIFT (15U)

◆ ESC_ESC_DL_STAT_ELD_GET

#define ESC_ESC_DL_STAT_ELD_GET ( x ) (((uint16_t)(x) & ESC_ESC_DL_STAT_ELD_MASK) >> ESC_ESC_DL_STAT_ELD_SHIFT)

◆ ESC_ESC_DL_STAT_ELD_MASK

#define ESC_ESC_DL_STAT_ELD_MASK (0x4U)

◆ ESC_ESC_DL_STAT_ELD_SHIFT

#define ESC_ESC_DL_STAT_ELD_SHIFT (2U)

◆ ESC_ESC_DL_STAT_EPLC_GET

#define ESC_ESC_DL_STAT_EPLC_GET ( x ) (((uint16_t)(x) & ESC_ESC_DL_STAT_EPLC_MASK) >> ESC_ESC_DL_STAT_EPLC_SHIFT)

◆ ESC_ESC_DL_STAT_EPLC_MASK

#define ESC_ESC_DL_STAT_EPLC_MASK (0x1U)

◆ ESC_ESC_DL_STAT_EPLC_SHIFT

#define ESC_ESC_DL_STAT_EPLC_SHIFT (0U)

◆ ESC_ESC_DL_STAT_LP0_GET

#define ESC_ESC_DL_STAT_LP0_GET ( x ) (((uint16_t)(x) & ESC_ESC_DL_STAT_LP0_MASK) >> ESC_ESC_DL_STAT_LP0_SHIFT)

◆ ESC_ESC_DL_STAT_LP0_MASK

#define ESC_ESC_DL_STAT_LP0_MASK (0x100U)

◆ ESC_ESC_DL_STAT_LP0_SHIFT

#define ESC_ESC_DL_STAT_LP0_SHIFT (8U)

◆ ESC_ESC_DL_STAT_LP1_GET

#define ESC_ESC_DL_STAT_LP1_GET ( x ) (((uint16_t)(x) & ESC_ESC_DL_STAT_LP1_MASK) >> ESC_ESC_DL_STAT_LP1_SHIFT)

◆ ESC_ESC_DL_STAT_LP1_MASK

#define ESC_ESC_DL_STAT_LP1_MASK (0x400U)

◆ ESC_ESC_DL_STAT_LP1_SHIFT

#define ESC_ESC_DL_STAT_LP1_SHIFT (10U)

◆ ESC_ESC_DL_STAT_LP2_GET

#define ESC_ESC_DL_STAT_LP2_GET ( x ) (((uint16_t)(x) & ESC_ESC_DL_STAT_LP2_MASK) >> ESC_ESC_DL_STAT_LP2_SHIFT)

◆ ESC_ESC_DL_STAT_LP2_MASK

#define ESC_ESC_DL_STAT_LP2_MASK (0x1000U)

◆ ESC_ESC_DL_STAT_LP2_SHIFT

#define ESC_ESC_DL_STAT_LP2_SHIFT (12U)

◆ ESC_ESC_DL_STAT_LP3_GET

#define ESC_ESC_DL_STAT_LP3_GET ( x ) (((uint16_t)(x) & ESC_ESC_DL_STAT_LP3_MASK) >> ESC_ESC_DL_STAT_LP3_SHIFT)

◆ ESC_ESC_DL_STAT_LP3_MASK

#define ESC_ESC_DL_STAT_LP3_MASK (0x4000U)

◆ ESC_ESC_DL_STAT_LP3_SHIFT

#define ESC_ESC_DL_STAT_LP3_SHIFT (14U)

◆ ESC_ESC_DL_STAT_PLP0_GET

#define ESC_ESC_DL_STAT_PLP0_GET ( x ) (((uint16_t)(x) & ESC_ESC_DL_STAT_PLP0_MASK) >> ESC_ESC_DL_STAT_PLP0_SHIFT)

◆ ESC_ESC_DL_STAT_PLP0_MASK

#define ESC_ESC_DL_STAT_PLP0_MASK (0x10U)

◆ ESC_ESC_DL_STAT_PLP0_SHIFT

#define ESC_ESC_DL_STAT_PLP0_SHIFT (4U)

◆ ESC_ESC_DL_STAT_PLP1_GET

#define ESC_ESC_DL_STAT_PLP1_GET ( x ) (((uint16_t)(x) & ESC_ESC_DL_STAT_PLP1_MASK) >> ESC_ESC_DL_STAT_PLP1_SHIFT)

◆ ESC_ESC_DL_STAT_PLP1_MASK

#define ESC_ESC_DL_STAT_PLP1_MASK (0x20U)

◆ ESC_ESC_DL_STAT_PLP1_SHIFT

#define ESC_ESC_DL_STAT_PLP1_SHIFT (5U)

◆ ESC_ESC_DL_STAT_PLP2_GET

#define ESC_ESC_DL_STAT_PLP2_GET ( x ) (((uint16_t)(x) & ESC_ESC_DL_STAT_PLP2_MASK) >> ESC_ESC_DL_STAT_PLP2_SHIFT)

◆ ESC_ESC_DL_STAT_PLP2_MASK

#define ESC_ESC_DL_STAT_PLP2_MASK (0x40U)

◆ ESC_ESC_DL_STAT_PLP2_SHIFT

#define ESC_ESC_DL_STAT_PLP2_SHIFT (6U)

◆ ESC_ESC_DL_STAT_PLP3_GET

#define ESC_ESC_DL_STAT_PLP3_GET ( x ) (((uint16_t)(x) & ESC_ESC_DL_STAT_PLP3_MASK) >> ESC_ESC_DL_STAT_PLP3_SHIFT)

◆ ESC_ESC_DL_STAT_PLP3_MASK

#define ESC_ESC_DL_STAT_PLP3_MASK (0x80U)

◆ ESC_ESC_DL_STAT_PLP3_SHIFT

#define ESC_ESC_DL_STAT_PLP3_SHIFT (7U)

◆ ESC_ESC_DL_STAT_WDS_GET

#define ESC_ESC_DL_STAT_WDS_GET ( x ) (((uint16_t)(x) & ESC_ESC_DL_STAT_WDS_MASK) >> ESC_ESC_DL_STAT_WDS_SHIFT)

◆ ESC_ESC_DL_STAT_WDS_MASK

#define ESC_ESC_DL_STAT_WDS_MASK (0x2U)

◆ ESC_ESC_DL_STAT_WDS_SHIFT

#define ESC_ESC_DL_STAT_WDS_SHIFT (1U)

◆ ESC_ESC_RST_ECAT_PR_GET

#define ESC_ESC_RST_ECAT_PR_GET ( x ) (((uint8_t)(x) & ESC_ESC_RST_ECAT_PR_MASK) >> ESC_ESC_RST_ECAT_PR_SHIFT)

◆ ESC_ESC_RST_ECAT_PR_MASK

#define ESC_ESC_RST_ECAT_PR_MASK (0x3U)

◆ ESC_ESC_RST_ECAT_PR_SHIFT

#define ESC_ESC_RST_ECAT_PR_SHIFT (0U)

◆ ESC_ESC_RST_PDI_RST_GET

#define ESC_ESC_RST_PDI_RST_GET ( x ) (((uint8_t)(x) & ESC_ESC_RST_PDI_RST_MASK) >> ESC_ESC_RST_PDI_RST_SHIFT)

◆ ESC_ESC_RST_PDI_RST_MASK

#define ESC_ESC_RST_PDI_RST_MASK (0xFFU)

◆ ESC_ESC_RST_PDI_RST_SET

#define ESC_ESC_RST_PDI_RST_SET ( x ) (((uint8_t)(x) << ESC_ESC_RST_PDI_RST_SHIFT) & ESC_ESC_RST_PDI_RST_MASK)

◆ ESC_ESC_RST_PDI_RST_SHIFT

#define ESC_ESC_RST_PDI_RST_SHIFT (0U)

◆ ESC_ESC_WEN_EN_GET

#define ESC_ESC_WEN_EN_GET ( x ) (((uint8_t)(x) & ESC_ESC_WEN_EN_MASK) >> ESC_ESC_WEN_EN_SHIFT)

◆ ESC_ESC_WEN_EN_MASK

#define ESC_ESC_WEN_EN_MASK (0x1U)

◆ ESC_ESC_WEN_EN_SHIFT

#define ESC_ESC_WEN_EN_SHIFT (0U)

◆ ESC_ESC_WP_WP_GET

#define ESC_ESC_WP_WP_GET ( x ) (((uint8_t)(x) & ESC_ESC_WP_WP_MASK) >> ESC_ESC_WP_WP_SHIFT)

◆ ESC_ESC_WP_WP_MASK

#define ESC_ESC_WP_WP_MASK (0x1U)

◆ ESC_ESC_WP_WP_SHIFT

#define ESC_ESC_WP_WP_SHIFT (0U)

◆ ESC_FEATURE_DC_GET

#define ESC_FEATURE_DC_GET ( x ) (((uint16_t)(x) & ESC_FEATURE_DC_MASK) >> ESC_FEATURE_DC_SHIFT)

◆ ESC_FEATURE_DC_MASK

#define ESC_FEATURE_DC_MASK (0x4U)

◆ ESC_FEATURE_DC_SHIFT

#define ESC_FEATURE_DC_SHIFT (2U)

◆ ESC_FEATURE_DCW_GET

#define ESC_FEATURE_DCW_GET ( x ) (((uint16_t)(x) & ESC_FEATURE_DCW_MASK) >> ESC_FEATURE_DCW_SHIFT)

◆ ESC_FEATURE_DCW_MASK

#define ESC_FEATURE_DCW_MASK (0x8U)

◆ ESC_FEATURE_DCW_SHIFT

#define ESC_FEATURE_DCW_SHIFT (3U)

◆ ESC_FEATURE_EDSA_GET

#define ESC_FEATURE_EDSA_GET ( x ) (((uint16_t)(x) & ESC_FEATURE_EDSA_MASK) >> ESC_FEATURE_EDSA_SHIFT)

◆ ESC_FEATURE_EDSA_MASK

#define ESC_FEATURE_EDSA_MASK (0x100U)

◆ ESC_FEATURE_EDSA_SHIFT

#define ESC_FEATURE_EDSA_SHIFT (8U)

◆ ESC_FEATURE_ELDM_GET

#define ESC_FEATURE_ELDM_GET ( x ) (((uint16_t)(x) & ESC_FEATURE_ELDM_MASK) >> ESC_FEATURE_ELDM_SHIFT)

◆ ESC_FEATURE_ELDM_MASK

#define ESC_FEATURE_ELDM_MASK (0x40U)

◆ ESC_FEATURE_ELDM_SHIFT

#define ESC_FEATURE_ELDM_SHIFT (6U)

◆ ESC_FEATURE_FFSC_GET

#define ESC_FEATURE_FFSC_GET ( x ) (((uint16_t)(x) & ESC_FEATURE_FFSC_MASK) >> ESC_FEATURE_FFSC_SHIFT)

◆ ESC_FEATURE_FFSC_MASK

#define ESC_FEATURE_FFSC_MASK (0x800U)

◆ ESC_FEATURE_FFSC_SHIFT

#define ESC_FEATURE_FFSC_SHIFT (11U)

◆ ESC_FEATURE_FMMU_GET

#define ESC_FEATURE_FMMU_GET ( x ) (((uint16_t)(x) & ESC_FEATURE_FMMU_MASK) >> ESC_FEATURE_FMMU_SHIFT)

◆ ESC_FEATURE_FMMU_MASK

#define ESC_FEATURE_FMMU_MASK (0x1U)

◆ ESC_FEATURE_FMMU_SHIFT

#define ESC_FEATURE_FMMU_SHIFT (0U)

◆ ESC_FEATURE_LRW_GET

#define ESC_FEATURE_LRW_GET ( x ) (((uint16_t)(x) & ESC_FEATURE_LRW_MASK) >> ESC_FEATURE_LRW_SHIFT)

◆ ESC_FEATURE_LRW_MASK

#define ESC_FEATURE_LRW_MASK (0x200U)

◆ ESC_FEATURE_LRW_SHIFT

#define ESC_FEATURE_LRW_SHIFT (9U)

◆ ESC_FEATURE_RWC_GET

#define ESC_FEATURE_RWC_GET ( x ) (((uint16_t)(x) & ESC_FEATURE_RWC_MASK) >> ESC_FEATURE_RWC_SHIFT)

◆ ESC_FEATURE_RWC_MASK

#define ESC_FEATURE_RWC_MASK (0x400U)

◆ ESC_FEATURE_RWC_SHIFT

#define ESC_FEATURE_RWC_SHIFT (10U)

◆ ESC_FEATURE_SHFE_GET

#define ESC_FEATURE_SHFE_GET ( x ) (((uint16_t)(x) & ESC_FEATURE_SHFE_MASK) >> ESC_FEATURE_SHFE_SHIFT)

◆ ESC_FEATURE_SHFE_MASK

#define ESC_FEATURE_SHFE_MASK (0x80U)

◆ ESC_FEATURE_SHFE_SHIFT

#define ESC_FEATURE_SHFE_SHIFT (7U)

◆ ESC_FMMU_0

#define ESC_FMMU_0 (0UL)

◆ ESC_FMMU_1

#define ESC_FMMU_1 (1UL)

◆ ESC_FMMU_2

#define ESC_FMMU_2 (2UL)

◆ ESC_FMMU_3

#define ESC_FMMU_3 (3UL)

◆ ESC_FMMU_4

#define ESC_FMMU_4 (4UL)

◆ ESC_FMMU_5

#define ESC_FMMU_5 (5UL)

◆ ESC_FMMU_6

#define ESC_FMMU_6 (6UL)

◆ ESC_FMMU_7

#define ESC_FMMU_7 (7UL)

◆ ESC_FMMU_ACTIVATE_ACT_GET

#define ESC_FMMU_ACTIVATE_ACT_GET ( x ) (((uint8_t)(x) & ESC_FMMU_ACTIVATE_ACT_MASK) >> ESC_FMMU_ACTIVATE_ACT_SHIFT)

◆ ESC_FMMU_ACTIVATE_ACT_MASK

#define ESC_FMMU_ACTIVATE_ACT_MASK (0x1U)

◆ ESC_FMMU_ACTIVATE_ACT_SHIFT

#define ESC_FMMU_ACTIVATE_ACT_SHIFT (0U)

◆ ESC_FMMU_LENGTH_OFFSET_GET

#define ESC_FMMU_LENGTH_OFFSET_GET ( x ) (((uint16_t)(x) & ESC_FMMU_LENGTH_OFFSET_MASK) >> ESC_FMMU_LENGTH_OFFSET_SHIFT)

◆ ESC_FMMU_LENGTH_OFFSET_MASK

#define ESC_FMMU_LENGTH_OFFSET_MASK (0xFFFFU)

◆ ESC_FMMU_LENGTH_OFFSET_SHIFT

#define ESC_FMMU_LENGTH_OFFSET_SHIFT (0U)

◆ ESC_FMMU_LOGIC_START_ADDR_ADDR_GET

#define ESC_FMMU_LOGIC_START_ADDR_ADDR_GET ( x ) (((uint32_t)(x) & ESC_FMMU_LOGIC_START_ADDR_ADDR_MASK) >> ESC_FMMU_LOGIC_START_ADDR_ADDR_SHIFT)

◆ ESC_FMMU_LOGIC_START_ADDR_ADDR_MASK

#define ESC_FMMU_LOGIC_START_ADDR_ADDR_MASK (0xFFFFFFFFUL)

◆ ESC_FMMU_LOGIC_START_ADDR_ADDR_SHIFT

#define ESC_FMMU_LOGIC_START_ADDR_ADDR_SHIFT (0U)

◆ ESC_FMMU_LOGIC_START_BIT_START_GET

#define ESC_FMMU_LOGIC_START_BIT_START_GET ( x ) (((uint8_t)(x) & ESC_FMMU_LOGIC_START_BIT_START_MASK) >> ESC_FMMU_LOGIC_START_BIT_START_SHIFT)

◆ ESC_FMMU_LOGIC_START_BIT_START_MASK

#define ESC_FMMU_LOGIC_START_BIT_START_MASK (0x7U)

◆ ESC_FMMU_LOGIC_START_BIT_START_SHIFT

#define ESC_FMMU_LOGIC_START_BIT_START_SHIFT (0U)

◆ ESC_FMMU_LOGIC_STOP_BIT_STOP_GET

#define ESC_FMMU_LOGIC_STOP_BIT_STOP_GET ( x ) (((uint8_t)(x) & ESC_FMMU_LOGIC_STOP_BIT_STOP_MASK) >> ESC_FMMU_LOGIC_STOP_BIT_STOP_SHIFT)

◆ ESC_FMMU_LOGIC_STOP_BIT_STOP_MASK

#define ESC_FMMU_LOGIC_STOP_BIT_STOP_MASK (0x7U)

◆ ESC_FMMU_LOGIC_STOP_BIT_STOP_SHIFT

#define ESC_FMMU_LOGIC_STOP_BIT_STOP_SHIFT (0U)

◆ ESC_FMMU_NUM_NUM_GET

#define ESC_FMMU_NUM_NUM_GET ( x ) (((uint8_t)(x) & ESC_FMMU_NUM_NUM_MASK) >> ESC_FMMU_NUM_NUM_SHIFT)

◆ ESC_FMMU_NUM_NUM_MASK

#define ESC_FMMU_NUM_NUM_MASK (0xFFU)

◆ ESC_FMMU_NUM_NUM_SHIFT

#define ESC_FMMU_NUM_NUM_SHIFT (0U)

◆ ESC_FMMU_PHYSICAL_START_ADDR_ADDR_GET

#define ESC_FMMU_PHYSICAL_START_ADDR_ADDR_GET ( x ) (((uint16_t)(x) & ESC_FMMU_PHYSICAL_START_ADDR_ADDR_MASK) >> ESC_FMMU_PHYSICAL_START_ADDR_ADDR_SHIFT)

◆ ESC_FMMU_PHYSICAL_START_ADDR_ADDR_MASK

#define ESC_FMMU_PHYSICAL_START_ADDR_ADDR_MASK (0xFFFFU)

◆ ESC_FMMU_PHYSICAL_START_ADDR_ADDR_SHIFT

#define ESC_FMMU_PHYSICAL_START_ADDR_ADDR_SHIFT (0U)

◆ ESC_FMMU_PHYSICAL_START_BIT_START_GET

#define ESC_FMMU_PHYSICAL_START_BIT_START_GET ( x ) (((uint8_t)(x) & ESC_FMMU_PHYSICAL_START_BIT_START_MASK) >> ESC_FMMU_PHYSICAL_START_BIT_START_SHIFT)

◆ ESC_FMMU_PHYSICAL_START_BIT_START_MASK

#define ESC_FMMU_PHYSICAL_START_BIT_START_MASK (0x7U)

◆ ESC_FMMU_PHYSICAL_START_BIT_START_SHIFT

#define ESC_FMMU_PHYSICAL_START_BIT_START_SHIFT (0U)

◆ ESC_FMMU_TYPE_MAP_RD_GET

#define ESC_FMMU_TYPE_MAP_RD_GET ( x ) (((uint8_t)(x) & ESC_FMMU_TYPE_MAP_RD_MASK) >> ESC_FMMU_TYPE_MAP_RD_SHIFT)

◆ ESC_FMMU_TYPE_MAP_RD_MASK

#define ESC_FMMU_TYPE_MAP_RD_MASK (0x1U)

◆ ESC_FMMU_TYPE_MAP_RD_SHIFT

#define ESC_FMMU_TYPE_MAP_RD_SHIFT (0U)

◆ ESC_FMMU_TYPE_MAP_WR_GET

#define ESC_FMMU_TYPE_MAP_WR_GET ( x ) (((uint8_t)(x) & ESC_FMMU_TYPE_MAP_WR_MASK) >> ESC_FMMU_TYPE_MAP_WR_SHIFT)

◆ ESC_FMMU_TYPE_MAP_WR_MASK

#define ESC_FMMU_TYPE_MAP_WR_MASK (0x2U)

◆ ESC_FMMU_TYPE_MAP_WR_SHIFT

#define ESC_FMMU_TYPE_MAP_WR_SHIFT (1U)

◆ ESC_FWD_RX_ERR_CNT_ERR_CNT_GET

#define ESC_FWD_RX_ERR_CNT_ERR_CNT_GET ( x ) (((uint8_t)(x) & ESC_FWD_RX_ERR_CNT_ERR_CNT_MASK) >> ESC_FWD_RX_ERR_CNT_ERR_CNT_SHIFT)

◆ ESC_FWD_RX_ERR_CNT_ERR_CNT_MASK

#define ESC_FWD_RX_ERR_CNT_ERR_CNT_MASK (0xFFU)

◆ ESC_FWD_RX_ERR_CNT_ERR_CNT_SHIFT

#define ESC_FWD_RX_ERR_CNT_ERR_CNT_SHIFT (0U)

◆ ESC_FWD_RX_ERR_CNT_PORT0

#define ESC_FWD_RX_ERR_CNT_PORT0 (0UL)

◆ ESC_FWD_RX_ERR_CNT_PORT1

#define ESC_FWD_RX_ERR_CNT_PORT1 (1UL)

◆ ESC_FWD_RX_ERR_CNT_PORT2

#define ESC_FWD_RX_ERR_CNT_PORT2 (2UL)

◆ ESC_FWD_RX_ERR_CNT_PORT3

#define ESC_FWD_RX_ERR_CNT_PORT3 (3UL)

◆ ESC_GPI_GPID_GET

#define ESC_GPI_GPID_GET ( x ) (((uint64_t)(x) & ESC_GPI_GPID_MASK) >> ESC_GPI_GPID_SHIFT)

◆ ESC_GPI_GPID_MASK

#define ESC_GPI_GPID_MASK (0xFFFFFFFFFFFFFFFFULL)

◆ ESC_GPI_GPID_SHIFT

#define ESC_GPI_GPID_SHIFT (0U)

◆ ESC_GPI_OVERRIDE0_GPR_OVERRIDE_LOW_GET

#define ESC_GPI_OVERRIDE0_GPR_OVERRIDE_LOW_GET ( x ) (((uint32_t)(x) & ESC_GPI_OVERRIDE0_GPR_OVERRIDE_LOW_MASK) >> ESC_GPI_OVERRIDE0_GPR_OVERRIDE_LOW_SHIFT)

◆ ESC_GPI_OVERRIDE0_GPR_OVERRIDE_LOW_MASK

#define ESC_GPI_OVERRIDE0_GPR_OVERRIDE_LOW_MASK (0xFFFFFFFFUL)

◆ ESC_GPI_OVERRIDE0_GPR_OVERRIDE_LOW_SET

#define ESC_GPI_OVERRIDE0_GPR_OVERRIDE_LOW_SET ( x ) (((uint32_t)(x) << ESC_GPI_OVERRIDE0_GPR_OVERRIDE_LOW_SHIFT) & ESC_GPI_OVERRIDE0_GPR_OVERRIDE_LOW_MASK)

◆ ESC_GPI_OVERRIDE0_GPR_OVERRIDE_LOW_SHIFT

#define ESC_GPI_OVERRIDE0_GPR_OVERRIDE_LOW_SHIFT (0U)

◆ ESC_GPI_OVERRIDE1_GPR_OVERRIDE_HIGH_GET

#define ESC_GPI_OVERRIDE1_GPR_OVERRIDE_HIGH_GET ( x ) (((uint32_t)(x) & ESC_GPI_OVERRIDE1_GPR_OVERRIDE_HIGH_MASK) >> ESC_GPI_OVERRIDE1_GPR_OVERRIDE_HIGH_SHIFT)

◆ ESC_GPI_OVERRIDE1_GPR_OVERRIDE_HIGH_MASK

#define ESC_GPI_OVERRIDE1_GPR_OVERRIDE_HIGH_MASK (0xFFFFFFFFUL)

◆ ESC_GPI_OVERRIDE1_GPR_OVERRIDE_HIGH_SET

#define ESC_GPI_OVERRIDE1_GPR_OVERRIDE_HIGH_SET ( x ) (((uint32_t)(x) << ESC_GPI_OVERRIDE1_GPR_OVERRIDE_HIGH_SHIFT) & ESC_GPI_OVERRIDE1_GPR_OVERRIDE_HIGH_MASK)

◆ ESC_GPI_OVERRIDE1_GPR_OVERRIDE_HIGH_SHIFT

#define ESC_GPI_OVERRIDE1_GPR_OVERRIDE_HIGH_SHIFT (0U)

◆ ESC_GPI_REG0_VALUE_GET

#define ESC_GPI_REG0_VALUE_GET ( x ) (((uint32_t)(x) & ESC_GPI_REG0_VALUE_MASK) >> ESC_GPI_REG0_VALUE_SHIFT)

◆ ESC_GPI_REG0_VALUE_MASK

#define ESC_GPI_REG0_VALUE_MASK (0xFFFFFFFFUL)

◆ ESC_GPI_REG0_VALUE_SHIFT

#define ESC_GPI_REG0_VALUE_SHIFT (0U)

◆ ESC_GPI_REG1_VALUE_GET

#define ESC_GPI_REG1_VALUE_GET ( x ) (((uint32_t)(x) & ESC_GPI_REG1_VALUE_MASK) >> ESC_GPI_REG1_VALUE_SHIFT)

◆ ESC_GPI_REG1_VALUE_MASK

#define ESC_GPI_REG1_VALUE_MASK (0xFFFFFFFFUL)

◆ ESC_GPI_REG1_VALUE_SHIFT

#define ESC_GPI_REG1_VALUE_SHIFT (0U)

◆ ESC_GPIO_CTRL_GPI_OVERRIDE_EN_GET

#define ESC_GPIO_CTRL_GPI_OVERRIDE_EN_GET ( x ) (((uint32_t)(x) & ESC_GPIO_CTRL_GPI_OVERRIDE_EN_MASK) >> ESC_GPIO_CTRL_GPI_OVERRIDE_EN_SHIFT)

◆ ESC_GPIO_CTRL_GPI_OVERRIDE_EN_MASK

#define ESC_GPIO_CTRL_GPI_OVERRIDE_EN_MASK (0x2000U)

◆ ESC_GPIO_CTRL_GPI_OVERRIDE_EN_SET

#define ESC_GPIO_CTRL_GPI_OVERRIDE_EN_SET ( x ) (((uint32_t)(x) << ESC_GPIO_CTRL_GPI_OVERRIDE_EN_SHIFT) & ESC_GPIO_CTRL_GPI_OVERRIDE_EN_MASK)

◆ ESC_GPIO_CTRL_GPI_OVERRIDE_EN_SHIFT

#define ESC_GPIO_CTRL_GPI_OVERRIDE_EN_SHIFT (13U)

◆ ESC_GPIO_CTRL_GPI_TRIG_EN_GET

#define ESC_GPIO_CTRL_GPI_TRIG_EN_GET ( x ) (((uint32_t)(x) & ESC_GPIO_CTRL_GPI_TRIG_EN_MASK) >> ESC_GPIO_CTRL_GPI_TRIG_EN_SHIFT)

◆ ESC_GPIO_CTRL_GPI_TRIG_EN_MASK

#define ESC_GPIO_CTRL_GPI_TRIG_EN_MASK (0x1000U)

◆ ESC_GPIO_CTRL_GPI_TRIG_EN_SET

#define ESC_GPIO_CTRL_GPI_TRIG_EN_SET ( x ) (((uint32_t)(x) << ESC_GPIO_CTRL_GPI_TRIG_EN_SHIFT) & ESC_GPIO_CTRL_GPI_TRIG_EN_MASK)

◆ ESC_GPIO_CTRL_GPI_TRIG_EN_SHIFT

#define ESC_GPIO_CTRL_GPI_TRIG_EN_SHIFT (12U)

◆ ESC_GPIO_CTRL_GPI_TRIG_SEL_GET

#define ESC_GPIO_CTRL_GPI_TRIG_SEL_GET ( x ) (((uint32_t)(x) & ESC_GPIO_CTRL_GPI_TRIG_SEL_MASK) >> ESC_GPIO_CTRL_GPI_TRIG_SEL_SHIFT)

◆ ESC_GPIO_CTRL_GPI_TRIG_SEL_MASK

#define ESC_GPIO_CTRL_GPI_TRIG_SEL_MASK (0xF00U)

◆ ESC_GPIO_CTRL_GPI_TRIG_SEL_SET

#define ESC_GPIO_CTRL_GPI_TRIG_SEL_SET ( x ) (((uint32_t)(x) << ESC_GPIO_CTRL_GPI_TRIG_SEL_SHIFT) & ESC_GPIO_CTRL_GPI_TRIG_SEL_MASK)

◆ ESC_GPIO_CTRL_GPI_TRIG_SEL_SHIFT

#define ESC_GPIO_CTRL_GPI_TRIG_SEL_SHIFT (8U)

◆ ESC_GPIO_CTRL_GPO_TRIG_EN_GET

#define ESC_GPIO_CTRL_GPO_TRIG_EN_GET ( x ) (((uint32_t)(x) & ESC_GPIO_CTRL_GPO_TRIG_EN_MASK) >> ESC_GPIO_CTRL_GPO_TRIG_EN_SHIFT)

◆ ESC_GPIO_CTRL_GPO_TRIG_EN_MASK

#define ESC_GPIO_CTRL_GPO_TRIG_EN_MASK (0x10U)

◆ ESC_GPIO_CTRL_GPO_TRIG_EN_SET

#define ESC_GPIO_CTRL_GPO_TRIG_EN_SET ( x ) (((uint32_t)(x) << ESC_GPIO_CTRL_GPO_TRIG_EN_SHIFT) & ESC_GPIO_CTRL_GPO_TRIG_EN_MASK)

◆ ESC_GPIO_CTRL_GPO_TRIG_EN_SHIFT

#define ESC_GPIO_CTRL_GPO_TRIG_EN_SHIFT (4U)

◆ ESC_GPIO_CTRL_GPO_TRIG_SEL_GET

#define ESC_GPIO_CTRL_GPO_TRIG_SEL_GET ( x ) (((uint32_t)(x) & ESC_GPIO_CTRL_GPO_TRIG_SEL_MASK) >> ESC_GPIO_CTRL_GPO_TRIG_SEL_SHIFT)

◆ ESC_GPIO_CTRL_GPO_TRIG_SEL_MASK

#define ESC_GPIO_CTRL_GPO_TRIG_SEL_MASK (0xFU)

◆ ESC_GPIO_CTRL_GPO_TRIG_SEL_SET

#define ESC_GPIO_CTRL_GPO_TRIG_SEL_SET ( x ) (((uint32_t)(x) << ESC_GPIO_CTRL_GPO_TRIG_SEL_SHIFT) & ESC_GPIO_CTRL_GPO_TRIG_SEL_MASK)

◆ ESC_GPIO_CTRL_GPO_TRIG_SEL_SHIFT

#define ESC_GPIO_CTRL_GPO_TRIG_SEL_SHIFT (0U)

◆ ESC_GPIO_CTRL_SW_LATCH_GPI_GET

#define ESC_GPIO_CTRL_SW_LATCH_GPI_GET ( x ) (((uint32_t)(x) & ESC_GPIO_CTRL_SW_LATCH_GPI_MASK) >> ESC_GPIO_CTRL_SW_LATCH_GPI_SHIFT)

◆ ESC_GPIO_CTRL_SW_LATCH_GPI_MASK

#define ESC_GPIO_CTRL_SW_LATCH_GPI_MASK (0x80000000UL)

◆ ESC_GPIO_CTRL_SW_LATCH_GPI_SET

#define ESC_GPIO_CTRL_SW_LATCH_GPI_SET ( x ) (((uint32_t)(x) << ESC_GPIO_CTRL_SW_LATCH_GPI_SHIFT) & ESC_GPIO_CTRL_SW_LATCH_GPI_MASK)

◆ ESC_GPIO_CTRL_SW_LATCH_GPI_SHIFT

#define ESC_GPIO_CTRL_SW_LATCH_GPI_SHIFT (31U)

◆ ESC_GPIO_CTRL_SW_LATCH_GPO_GET

#define ESC_GPIO_CTRL_SW_LATCH_GPO_GET ( x ) (((uint32_t)(x) & ESC_GPIO_CTRL_SW_LATCH_GPO_MASK) >> ESC_GPIO_CTRL_SW_LATCH_GPO_SHIFT)

◆ ESC_GPIO_CTRL_SW_LATCH_GPO_MASK

#define ESC_GPIO_CTRL_SW_LATCH_GPO_MASK (0x40000000UL)

◆ ESC_GPIO_CTRL_SW_LATCH_GPO_SET

#define ESC_GPIO_CTRL_SW_LATCH_GPO_SET ( x ) (((uint32_t)(x) << ESC_GPIO_CTRL_SW_LATCH_GPO_SHIFT) & ESC_GPIO_CTRL_SW_LATCH_GPO_MASK)

◆ ESC_GPIO_CTRL_SW_LATCH_GPO_SHIFT

#define ESC_GPIO_CTRL_SW_LATCH_GPO_SHIFT (30U)

◆ ESC_GPO_GPOD_GET

#define ESC_GPO_GPOD_GET ( x ) (((uint64_t)(x) & ESC_GPO_GPOD_MASK) >> ESC_GPO_GPOD_SHIFT)

◆ ESC_GPO_GPOD_MASK

#define ESC_GPO_GPOD_MASK (0xFFFFFFFFFFFFFFFFULL)

◆ ESC_GPO_GPOD_SET

#define ESC_GPO_GPOD_SET ( x ) (((uint64_t)(x) << ESC_GPO_GPOD_SHIFT) & ESC_GPO_GPOD_MASK)

◆ ESC_GPO_GPOD_SHIFT

#define ESC_GPO_GPOD_SHIFT (0U)

◆ ESC_GPO_REG0_VALUE_GET

#define ESC_GPO_REG0_VALUE_GET ( x ) (((uint32_t)(x) & ESC_GPO_REG0_VALUE_MASK) >> ESC_GPO_REG0_VALUE_SHIFT)

◆ ESC_GPO_REG0_VALUE_MASK

#define ESC_GPO_REG0_VALUE_MASK (0xFFFFFFFFUL)

◆ ESC_GPO_REG0_VALUE_SHIFT

#define ESC_GPO_REG0_VALUE_SHIFT (0U)

◆ ESC_GPO_REG1_VALUE_GET

#define ESC_GPO_REG1_VALUE_GET ( x ) (((uint32_t)(x) & ESC_GPO_REG1_VALUE_MASK) >> ESC_GPO_REG1_VALUE_SHIFT)

◆ ESC_GPO_REG1_VALUE_MASK

#define ESC_GPO_REG1_VALUE_MASK (0xFFFFFFFFUL)

◆ ESC_GPO_REG1_VALUE_SHIFT

#define ESC_GPO_REG1_VALUE_SHIFT (0U)

◆ ESC_GPR_CFG0_CLK100_EN_GET

#define ESC_GPR_CFG0_CLK100_EN_GET ( x ) (((uint32_t)(x) & ESC_GPR_CFG0_CLK100_EN_MASK) >> ESC_GPR_CFG0_CLK100_EN_SHIFT)

◆ ESC_GPR_CFG0_CLK100_EN_MASK

#define ESC_GPR_CFG0_CLK100_EN_MASK (0x2000U)

◆ ESC_GPR_CFG0_CLK100_EN_SET

#define ESC_GPR_CFG0_CLK100_EN_SET ( x ) (((uint32_t)(x) << ESC_GPR_CFG0_CLK100_EN_SHIFT) & ESC_GPR_CFG0_CLK100_EN_MASK)

◆ ESC_GPR_CFG0_CLK100_EN_SHIFT

#define ESC_GPR_CFG0_CLK100_EN_SHIFT (13U)

◆ ESC_GPR_CFG0_EEPROM_EMU_GET

#define ESC_GPR_CFG0_EEPROM_EMU_GET ( x ) (((uint32_t)(x) & ESC_GPR_CFG0_EEPROM_EMU_MASK) >> ESC_GPR_CFG0_EEPROM_EMU_SHIFT)

◆ ESC_GPR_CFG0_EEPROM_EMU_MASK

#define ESC_GPR_CFG0_EEPROM_EMU_MASK (0x1000U)

◆ ESC_GPR_CFG0_EEPROM_EMU_SET

#define ESC_GPR_CFG0_EEPROM_EMU_SET ( x ) (((uint32_t)(x) << ESC_GPR_CFG0_EEPROM_EMU_SHIFT) & ESC_GPR_CFG0_EEPROM_EMU_MASK)

◆ ESC_GPR_CFG0_EEPROM_EMU_SHIFT

#define ESC_GPR_CFG0_EEPROM_EMU_SHIFT (12U)

◆ ESC_GPR_CFG0_I2C_SCLK_EN_GET

#define ESC_GPR_CFG0_I2C_SCLK_EN_GET ( x ) (((uint32_t)(x) & ESC_GPR_CFG0_I2C_SCLK_EN_MASK) >> ESC_GPR_CFG0_I2C_SCLK_EN_SHIFT)

◆ ESC_GPR_CFG0_I2C_SCLK_EN_MASK

#define ESC_GPR_CFG0_I2C_SCLK_EN_MASK (0x8U)

◆ ESC_GPR_CFG0_I2C_SCLK_EN_SET

#define ESC_GPR_CFG0_I2C_SCLK_EN_SET ( x ) (((uint32_t)(x) << ESC_GPR_CFG0_I2C_SCLK_EN_SHIFT) & ESC_GPR_CFG0_I2C_SCLK_EN_MASK)

◆ ESC_GPR_CFG0_I2C_SCLK_EN_SHIFT

#define ESC_GPR_CFG0_I2C_SCLK_EN_SHIFT (3U)

◆ ESC_GPR_CFG0_PROM_SIZE_GET

#define ESC_GPR_CFG0_PROM_SIZE_GET ( x ) (((uint32_t)(x) & ESC_GPR_CFG0_PROM_SIZE_MASK) >> ESC_GPR_CFG0_PROM_SIZE_SHIFT)

◆ ESC_GPR_CFG0_PROM_SIZE_MASK

#define ESC_GPR_CFG0_PROM_SIZE_MASK (0x1U)

◆ ESC_GPR_CFG0_PROM_SIZE_SET

#define ESC_GPR_CFG0_PROM_SIZE_SET ( x ) (((uint32_t)(x) << ESC_GPR_CFG0_PROM_SIZE_SHIFT) & ESC_GPR_CFG0_PROM_SIZE_MASK)

◆ ESC_GPR_CFG0_PROM_SIZE_SHIFT

#define ESC_GPR_CFG0_PROM_SIZE_SHIFT (0U)

◆ ESC_GPR_CFG1_LATCH0_FROM_IO_GET

#define ESC_GPR_CFG1_LATCH0_FROM_IO_GET ( x ) (((uint32_t)(x) & ESC_GPR_CFG1_LATCH0_FROM_IO_MASK) >> ESC_GPR_CFG1_LATCH0_FROM_IO_SHIFT)

◆ ESC_GPR_CFG1_LATCH0_FROM_IO_MASK

#define ESC_GPR_CFG1_LATCH0_FROM_IO_MASK (0x100U)

◆ ESC_GPR_CFG1_LATCH0_FROM_IO_SET

#define ESC_GPR_CFG1_LATCH0_FROM_IO_SET ( x ) (((uint32_t)(x) << ESC_GPR_CFG1_LATCH0_FROM_IO_SHIFT) & ESC_GPR_CFG1_LATCH0_FROM_IO_MASK)

◆ ESC_GPR_CFG1_LATCH0_FROM_IO_SHIFT

#define ESC_GPR_CFG1_LATCH0_FROM_IO_SHIFT (8U)

◆ ESC_GPR_CFG1_LATCH1_FROM_IO_GET

#define ESC_GPR_CFG1_LATCH1_FROM_IO_GET ( x ) (((uint32_t)(x) & ESC_GPR_CFG1_LATCH1_FROM_IO_MASK) >> ESC_GPR_CFG1_LATCH1_FROM_IO_SHIFT)

◆ ESC_GPR_CFG1_LATCH1_FROM_IO_MASK

#define ESC_GPR_CFG1_LATCH1_FROM_IO_MASK (0x200U)

◆ ESC_GPR_CFG1_LATCH1_FROM_IO_SET

#define ESC_GPR_CFG1_LATCH1_FROM_IO_SET ( x ) (((uint32_t)(x) << ESC_GPR_CFG1_LATCH1_FROM_IO_SHIFT) & ESC_GPR_CFG1_LATCH1_FROM_IO_MASK)

◆ ESC_GPR_CFG1_LATCH1_FROM_IO_SHIFT

#define ESC_GPR_CFG1_LATCH1_FROM_IO_SHIFT (9U)

◆ ESC_GPR_CFG1_RSTO_IRQ_EN_GET

#define ESC_GPR_CFG1_RSTO_IRQ_EN_GET ( x ) (((uint32_t)(x) & ESC_GPR_CFG1_RSTO_IRQ_EN_MASK) >> ESC_GPR_CFG1_RSTO_IRQ_EN_SHIFT)

◆ ESC_GPR_CFG1_RSTO_IRQ_EN_MASK

#define ESC_GPR_CFG1_RSTO_IRQ_EN_MASK (0x20000000UL)

◆ ESC_GPR_CFG1_RSTO_IRQ_EN_SET

#define ESC_GPR_CFG1_RSTO_IRQ_EN_SET ( x ) (((uint32_t)(x) << ESC_GPR_CFG1_RSTO_IRQ_EN_SHIFT) & ESC_GPR_CFG1_RSTO_IRQ_EN_MASK)

◆ ESC_GPR_CFG1_RSTO_IRQ_EN_SHIFT

#define ESC_GPR_CFG1_RSTO_IRQ_EN_SHIFT (29U)

◆ ESC_GPR_CFG1_RSTO_OVRD_ENJ_GET

#define ESC_GPR_CFG1_RSTO_OVRD_ENJ_GET ( x ) (((uint32_t)(x) & ESC_GPR_CFG1_RSTO_OVRD_ENJ_MASK) >> ESC_GPR_CFG1_RSTO_OVRD_ENJ_SHIFT)

◆ ESC_GPR_CFG1_RSTO_OVRD_ENJ_MASK

#define ESC_GPR_CFG1_RSTO_OVRD_ENJ_MASK (0x40U)

◆ ESC_GPR_CFG1_RSTO_OVRD_ENJ_SET

#define ESC_GPR_CFG1_RSTO_OVRD_ENJ_SET ( x ) (((uint32_t)(x) << ESC_GPR_CFG1_RSTO_OVRD_ENJ_SHIFT) & ESC_GPR_CFG1_RSTO_OVRD_ENJ_MASK)

◆ ESC_GPR_CFG1_RSTO_OVRD_ENJ_SHIFT

#define ESC_GPR_CFG1_RSTO_OVRD_ENJ_SHIFT (6U)

◆ ESC_GPR_CFG1_RSTO_OVRD_GET

#define ESC_GPR_CFG1_RSTO_OVRD_GET ( x ) (((uint32_t)(x) & ESC_GPR_CFG1_RSTO_OVRD_MASK) >> ESC_GPR_CFG1_RSTO_OVRD_SHIFT)

◆ ESC_GPR_CFG1_RSTO_OVRD_MASK

#define ESC_GPR_CFG1_RSTO_OVRD_MASK (0x80U)

◆ ESC_GPR_CFG1_RSTO_OVRD_SET

#define ESC_GPR_CFG1_RSTO_OVRD_SET ( x ) (((uint32_t)(x) << ESC_GPR_CFG1_RSTO_OVRD_SHIFT) & ESC_GPR_CFG1_RSTO_OVRD_MASK)

◆ ESC_GPR_CFG1_RSTO_OVRD_SHIFT

#define ESC_GPR_CFG1_RSTO_OVRD_SHIFT (7U)

◆ ESC_GPR_CFG1_SYNC0_DMA_EN_GET

#define ESC_GPR_CFG1_SYNC0_DMA_EN_GET ( x ) (((uint32_t)(x) & ESC_GPR_CFG1_SYNC0_DMA_EN_MASK) >> ESC_GPR_CFG1_SYNC0_DMA_EN_SHIFT)

◆ ESC_GPR_CFG1_SYNC0_DMA_EN_MASK

#define ESC_GPR_CFG1_SYNC0_DMA_EN_MASK (0x1000U)

◆ ESC_GPR_CFG1_SYNC0_DMA_EN_SET

#define ESC_GPR_CFG1_SYNC0_DMA_EN_SET ( x ) (((uint32_t)(x) << ESC_GPR_CFG1_SYNC0_DMA_EN_SHIFT) & ESC_GPR_CFG1_SYNC0_DMA_EN_MASK)

◆ ESC_GPR_CFG1_SYNC0_DMA_EN_SHIFT

#define ESC_GPR_CFG1_SYNC0_DMA_EN_SHIFT (12U)

◆ ESC_GPR_CFG1_SYNC0_IRQ_EN_GET

#define ESC_GPR_CFG1_SYNC0_IRQ_EN_GET ( x ) (((uint32_t)(x) & ESC_GPR_CFG1_SYNC0_IRQ_EN_MASK) >> ESC_GPR_CFG1_SYNC0_IRQ_EN_SHIFT)

◆ ESC_GPR_CFG1_SYNC0_IRQ_EN_MASK

#define ESC_GPR_CFG1_SYNC0_IRQ_EN_MASK (0x40000000UL)

◆ ESC_GPR_CFG1_SYNC0_IRQ_EN_SET

#define ESC_GPR_CFG1_SYNC0_IRQ_EN_SET ( x ) (((uint32_t)(x) << ESC_GPR_CFG1_SYNC0_IRQ_EN_SHIFT) & ESC_GPR_CFG1_SYNC0_IRQ_EN_MASK)

◆ ESC_GPR_CFG1_SYNC0_IRQ_EN_SHIFT

#define ESC_GPR_CFG1_SYNC0_IRQ_EN_SHIFT (30U)

◆ ESC_GPR_CFG1_SYNC1_DMA_EN_GET

#define ESC_GPR_CFG1_SYNC1_DMA_EN_GET ( x ) (((uint32_t)(x) & ESC_GPR_CFG1_SYNC1_DMA_EN_MASK) >> ESC_GPR_CFG1_SYNC1_DMA_EN_SHIFT)

◆ ESC_GPR_CFG1_SYNC1_DMA_EN_MASK

#define ESC_GPR_CFG1_SYNC1_DMA_EN_MASK (0x2000U)

◆ ESC_GPR_CFG1_SYNC1_DMA_EN_SET

#define ESC_GPR_CFG1_SYNC1_DMA_EN_SET ( x ) (((uint32_t)(x) << ESC_GPR_CFG1_SYNC1_DMA_EN_SHIFT) & ESC_GPR_CFG1_SYNC1_DMA_EN_MASK)

◆ ESC_GPR_CFG1_SYNC1_DMA_EN_SHIFT

#define ESC_GPR_CFG1_SYNC1_DMA_EN_SHIFT (13U)

◆ ESC_GPR_CFG1_SYNC1_IRQ_EN_GET

#define ESC_GPR_CFG1_SYNC1_IRQ_EN_GET ( x ) (((uint32_t)(x) & ESC_GPR_CFG1_SYNC1_IRQ_EN_MASK) >> ESC_GPR_CFG1_SYNC1_IRQ_EN_SHIFT)

◆ ESC_GPR_CFG1_SYNC1_IRQ_EN_MASK

#define ESC_GPR_CFG1_SYNC1_IRQ_EN_MASK (0x80000000UL)

◆ ESC_GPR_CFG1_SYNC1_IRQ_EN_SET

#define ESC_GPR_CFG1_SYNC1_IRQ_EN_SET ( x ) (((uint32_t)(x) << ESC_GPR_CFG1_SYNC1_IRQ_EN_SHIFT) & ESC_GPR_CFG1_SYNC1_IRQ_EN_MASK)

◆ ESC_GPR_CFG1_SYNC1_IRQ_EN_SHIFT

#define ESC_GPR_CFG1_SYNC1_IRQ_EN_SHIFT (31U)

◆ ESC_GPR_CFG2_NMII_LINK0_FROM_IO_GET

#define ESC_GPR_CFG2_NMII_LINK0_FROM_IO_GET ( x ) (((uint32_t)(x) & ESC_GPR_CFG2_NMII_LINK0_FROM_IO_MASK) >> ESC_GPR_CFG2_NMII_LINK0_FROM_IO_SHIFT)

◆ ESC_GPR_CFG2_NMII_LINK0_FROM_IO_MASK

#define ESC_GPR_CFG2_NMII_LINK0_FROM_IO_MASK (0x200000UL)

◆ ESC_GPR_CFG2_NMII_LINK0_FROM_IO_SET

#define ESC_GPR_CFG2_NMII_LINK0_FROM_IO_SET ( x ) (((uint32_t)(x) << ESC_GPR_CFG2_NMII_LINK0_FROM_IO_SHIFT) & ESC_GPR_CFG2_NMII_LINK0_FROM_IO_MASK)

◆ ESC_GPR_CFG2_NMII_LINK0_FROM_IO_SHIFT

#define ESC_GPR_CFG2_NMII_LINK0_FROM_IO_SHIFT (21U)

◆ ESC_GPR_CFG2_NMII_LINK0_GPR_GET

#define ESC_GPR_CFG2_NMII_LINK0_GPR_GET ( x ) (((uint32_t)(x) & ESC_GPR_CFG2_NMII_LINK0_GPR_MASK) >> ESC_GPR_CFG2_NMII_LINK0_GPR_SHIFT)

◆ ESC_GPR_CFG2_NMII_LINK0_GPR_MASK

#define ESC_GPR_CFG2_NMII_LINK0_GPR_MASK (0x100000UL)

◆ ESC_GPR_CFG2_NMII_LINK0_GPR_SET

#define ESC_GPR_CFG2_NMII_LINK0_GPR_SET ( x ) (((uint32_t)(x) << ESC_GPR_CFG2_NMII_LINK0_GPR_SHIFT) & ESC_GPR_CFG2_NMII_LINK0_GPR_MASK)

◆ ESC_GPR_CFG2_NMII_LINK0_GPR_SHIFT

#define ESC_GPR_CFG2_NMII_LINK0_GPR_SHIFT (20U)

◆ ESC_GPR_CFG2_NMII_LINK1_FROM_IO_GET

#define ESC_GPR_CFG2_NMII_LINK1_FROM_IO_GET ( x ) (((uint32_t)(x) & ESC_GPR_CFG2_NMII_LINK1_FROM_IO_MASK) >> ESC_GPR_CFG2_NMII_LINK1_FROM_IO_SHIFT)

◆ ESC_GPR_CFG2_NMII_LINK1_FROM_IO_MASK

#define ESC_GPR_CFG2_NMII_LINK1_FROM_IO_MASK (0x2000000UL)

◆ ESC_GPR_CFG2_NMII_LINK1_FROM_IO_SET

#define ESC_GPR_CFG2_NMII_LINK1_FROM_IO_SET ( x ) (((uint32_t)(x) << ESC_GPR_CFG2_NMII_LINK1_FROM_IO_SHIFT) & ESC_GPR_CFG2_NMII_LINK1_FROM_IO_MASK)

◆ ESC_GPR_CFG2_NMII_LINK1_FROM_IO_SHIFT

#define ESC_GPR_CFG2_NMII_LINK1_FROM_IO_SHIFT (25U)

◆ ESC_GPR_CFG2_NMII_LINK1_GPR_GET

#define ESC_GPR_CFG2_NMII_LINK1_GPR_GET ( x ) (((uint32_t)(x) & ESC_GPR_CFG2_NMII_LINK1_GPR_MASK) >> ESC_GPR_CFG2_NMII_LINK1_GPR_SHIFT)

◆ ESC_GPR_CFG2_NMII_LINK1_GPR_MASK

#define ESC_GPR_CFG2_NMII_LINK1_GPR_MASK (0x1000000UL)

◆ ESC_GPR_CFG2_NMII_LINK1_GPR_SET

#define ESC_GPR_CFG2_NMII_LINK1_GPR_SET ( x ) (((uint32_t)(x) << ESC_GPR_CFG2_NMII_LINK1_GPR_SHIFT) & ESC_GPR_CFG2_NMII_LINK1_GPR_MASK)

◆ ESC_GPR_CFG2_NMII_LINK1_GPR_SHIFT

#define ESC_GPR_CFG2_NMII_LINK1_GPR_SHIFT (24U)

◆ ESC_GPR_CFG2_NMII_LINK2_FROM_IO_GET

#define ESC_GPR_CFG2_NMII_LINK2_FROM_IO_GET ( x ) (((uint32_t)(x) & ESC_GPR_CFG2_NMII_LINK2_FROM_IO_MASK) >> ESC_GPR_CFG2_NMII_LINK2_FROM_IO_SHIFT)

◆ ESC_GPR_CFG2_NMII_LINK2_FROM_IO_MASK

#define ESC_GPR_CFG2_NMII_LINK2_FROM_IO_MASK (0x20000000UL)

◆ ESC_GPR_CFG2_NMII_LINK2_FROM_IO_SET

#define ESC_GPR_CFG2_NMII_LINK2_FROM_IO_SET ( x ) (((uint32_t)(x) << ESC_GPR_CFG2_NMII_LINK2_FROM_IO_SHIFT) & ESC_GPR_CFG2_NMII_LINK2_FROM_IO_MASK)

◆ ESC_GPR_CFG2_NMII_LINK2_FROM_IO_SHIFT

#define ESC_GPR_CFG2_NMII_LINK2_FROM_IO_SHIFT (29U)

◆ ESC_GPR_CFG2_NMII_LINK2_GPR_GET

#define ESC_GPR_CFG2_NMII_LINK2_GPR_GET ( x ) (((uint32_t)(x) & ESC_GPR_CFG2_NMII_LINK2_GPR_MASK) >> ESC_GPR_CFG2_NMII_LINK2_GPR_SHIFT)

◆ ESC_GPR_CFG2_NMII_LINK2_GPR_MASK

#define ESC_GPR_CFG2_NMII_LINK2_GPR_MASK (0x10000000UL)

◆ ESC_GPR_CFG2_NMII_LINK2_GPR_SET

#define ESC_GPR_CFG2_NMII_LINK2_GPR_SET ( x ) (((uint32_t)(x) << ESC_GPR_CFG2_NMII_LINK2_GPR_SHIFT) & ESC_GPR_CFG2_NMII_LINK2_GPR_MASK)

◆ ESC_GPR_CFG2_NMII_LINK2_GPR_SHIFT

#define ESC_GPR_CFG2_NMII_LINK2_GPR_SHIFT (28U)

◆ ESC_GPR_STATUS_DEV_STATE_GET

#define ESC_GPR_STATUS_DEV_STATE_GET ( x ) (((uint32_t)(x) & ESC_GPR_STATUS_DEV_STATE_MASK) >> ESC_GPR_STATUS_DEV_STATE_SHIFT)

◆ ESC_GPR_STATUS_DEV_STATE_MASK

#define ESC_GPR_STATUS_DEV_STATE_MASK (0x8U)

◆ ESC_GPR_STATUS_DEV_STATE_SHIFT

#define ESC_GPR_STATUS_DEV_STATE_SHIFT (3U)

◆ ESC_GPR_STATUS_LED_ERR_GET

#define ESC_GPR_STATUS_LED_ERR_GET ( x ) (((uint32_t)(x) & ESC_GPR_STATUS_LED_ERR_MASK) >> ESC_GPR_STATUS_LED_ERR_SHIFT)

◆ ESC_GPR_STATUS_LED_ERR_MASK

#define ESC_GPR_STATUS_LED_ERR_MASK (0x20U)

◆ ESC_GPR_STATUS_LED_ERR_SHIFT

#define ESC_GPR_STATUS_LED_ERR_SHIFT (5U)

◆ ESC_GPR_STATUS_LED_RUN_GET

#define ESC_GPR_STATUS_LED_RUN_GET ( x ) (((uint32_t)(x) & ESC_GPR_STATUS_LED_RUN_MASK) >> ESC_GPR_STATUS_LED_RUN_SHIFT)

◆ ESC_GPR_STATUS_LED_RUN_MASK

#define ESC_GPR_STATUS_LED_RUN_MASK (0x10U)

◆ ESC_GPR_STATUS_LED_RUN_SHIFT

#define ESC_GPR_STATUS_LED_RUN_SHIFT (4U)

◆ ESC_GPR_STATUS_LED_STATE_RUN_GET

#define ESC_GPR_STATUS_LED_STATE_RUN_GET ( x ) (((uint32_t)(x) & ESC_GPR_STATUS_LED_STATE_RUN_MASK) >> ESC_GPR_STATUS_LED_STATE_RUN_SHIFT)

◆ ESC_GPR_STATUS_LED_STATE_RUN_MASK

#define ESC_GPR_STATUS_LED_STATE_RUN_MASK (0x40U)

◆ ESC_GPR_STATUS_LED_STATE_RUN_SHIFT

#define ESC_GPR_STATUS_LED_STATE_RUN_SHIFT (6U)

◆ ESC_GPR_STATUS_LINK_ACT_GET

#define ESC_GPR_STATUS_LINK_ACT_GET ( x ) (((uint32_t)(x) & ESC_GPR_STATUS_LINK_ACT_MASK) >> ESC_GPR_STATUS_LINK_ACT_SHIFT)

◆ ESC_GPR_STATUS_LINK_ACT_MASK

#define ESC_GPR_STATUS_LINK_ACT_MASK (0x7U)

◆ ESC_GPR_STATUS_LINK_ACT_SHIFT

#define ESC_GPR_STATUS_LINK_ACT_SHIFT (0U)

◆ ESC_GPR_STATUS_NLINK0_PADSEL_GET

#define ESC_GPR_STATUS_NLINK0_PADSEL_GET ( x ) (((uint32_t)(x) & ESC_GPR_STATUS_NLINK0_PADSEL_MASK) >> ESC_GPR_STATUS_NLINK0_PADSEL_SHIFT)

◆ ESC_GPR_STATUS_NLINK0_PADSEL_MASK

#define ESC_GPR_STATUS_NLINK0_PADSEL_MASK (0xF00000UL)

◆ ESC_GPR_STATUS_NLINK0_PADSEL_SHIFT

#define ESC_GPR_STATUS_NLINK0_PADSEL_SHIFT (20U)

◆ ESC_GPR_STATUS_NLINK1_PADSEL_GET

#define ESC_GPR_STATUS_NLINK1_PADSEL_GET ( x ) (((uint32_t)(x) & ESC_GPR_STATUS_NLINK1_PADSEL_MASK) >> ESC_GPR_STATUS_NLINK1_PADSEL_SHIFT)

◆ ESC_GPR_STATUS_NLINK1_PADSEL_MASK

#define ESC_GPR_STATUS_NLINK1_PADSEL_MASK (0xF000000UL)

◆ ESC_GPR_STATUS_NLINK1_PADSEL_SHIFT

#define ESC_GPR_STATUS_NLINK1_PADSEL_SHIFT (24U)

◆ ESC_GPR_STATUS_NLINK2_PADSEL_GET

#define ESC_GPR_STATUS_NLINK2_PADSEL_GET ( x ) (((uint32_t)(x) & ESC_GPR_STATUS_NLINK2_PADSEL_MASK) >> ESC_GPR_STATUS_NLINK2_PADSEL_SHIFT)

◆ ESC_GPR_STATUS_NLINK2_PADSEL_MASK

#define ESC_GPR_STATUS_NLINK2_PADSEL_MASK (0xF0000000UL)

◆ ESC_GPR_STATUS_NLINK2_PADSEL_SHIFT

#define ESC_GPR_STATUS_NLINK2_PADSEL_SHIFT (28U)

◆ ESC_GPR_STATUS_PDI_EOF_GET

#define ESC_GPR_STATUS_PDI_EOF_GET ( x ) (((uint32_t)(x) & ESC_GPR_STATUS_PDI_EOF_MASK) >> ESC_GPR_STATUS_PDI_EOF_SHIFT)

◆ ESC_GPR_STATUS_PDI_EOF_MASK

#define ESC_GPR_STATUS_PDI_EOF_MASK (0x40000UL)

◆ ESC_GPR_STATUS_PDI_EOF_SHIFT

#define ESC_GPR_STATUS_PDI_EOF_SHIFT (18U)

◆ ESC_GPR_STATUS_PDI_SOF_GET

#define ESC_GPR_STATUS_PDI_SOF_GET ( x ) (((uint32_t)(x) & ESC_GPR_STATUS_PDI_SOF_MASK) >> ESC_GPR_STATUS_PDI_SOF_SHIFT)

◆ ESC_GPR_STATUS_PDI_SOF_MASK

#define ESC_GPR_STATUS_PDI_SOF_MASK (0x80000UL)

◆ ESC_GPR_STATUS_PDI_SOF_SHIFT

#define ESC_GPR_STATUS_PDI_SOF_SHIFT (19U)

◆ ESC_GPR_STATUS_PDI_WD_STATE_GET

#define ESC_GPR_STATUS_PDI_WD_STATE_GET ( x ) (((uint32_t)(x) & ESC_GPR_STATUS_PDI_WD_STATE_MASK) >> ESC_GPR_STATUS_PDI_WD_STATE_SHIFT)

◆ ESC_GPR_STATUS_PDI_WD_STATE_MASK

#define ESC_GPR_STATUS_PDI_WD_STATE_MASK (0x10000UL)

◆ ESC_GPR_STATUS_PDI_WD_STATE_SHIFT

#define ESC_GPR_STATUS_PDI_WD_STATE_SHIFT (16U)

◆ ESC_GPR_STATUS_PDI_WD_TRIGGER_GET

#define ESC_GPR_STATUS_PDI_WD_TRIGGER_GET ( x ) (((uint32_t)(x) & ESC_GPR_STATUS_PDI_WD_TRIGGER_MASK) >> ESC_GPR_STATUS_PDI_WD_TRIGGER_SHIFT)

◆ ESC_GPR_STATUS_PDI_WD_TRIGGER_MASK

#define ESC_GPR_STATUS_PDI_WD_TRIGGER_MASK (0x20000UL)

◆ ESC_GPR_STATUS_PDI_WD_TRIGGER_SHIFT

#define ESC_GPR_STATUS_PDI_WD_TRIGGER_SHIFT (17U)

◆ ESC_GPR_STATUS_SYNC_OUT0_GET

#define ESC_GPR_STATUS_SYNC_OUT0_GET ( x ) (((uint32_t)(x) & ESC_GPR_STATUS_SYNC_OUT0_MASK) >> ESC_GPR_STATUS_SYNC_OUT0_SHIFT)

◆ ESC_GPR_STATUS_SYNC_OUT0_MASK

#define ESC_GPR_STATUS_SYNC_OUT0_MASK (0x100U)

◆ ESC_GPR_STATUS_SYNC_OUT0_SHIFT

#define ESC_GPR_STATUS_SYNC_OUT0_SHIFT (8U)

◆ ESC_GPR_STATUS_SYNC_OUT1_GET

#define ESC_GPR_STATUS_SYNC_OUT1_GET ( x ) (((uint32_t)(x) & ESC_GPR_STATUS_SYNC_OUT1_MASK) >> ESC_GPR_STATUS_SYNC_OUT1_SHIFT)

◆ ESC_GPR_STATUS_SYNC_OUT1_MASK

#define ESC_GPR_STATUS_SYNC_OUT1_MASK (0x200U)

◆ ESC_GPR_STATUS_SYNC_OUT1_SHIFT

#define ESC_GPR_STATUS_SYNC_OUT1_SHIFT (9U)

◆ ESC_IO_CFG_CTR0

#define ESC_IO_CFG_CTR0 (0UL)

◆ ESC_IO_CFG_CTR1

#define ESC_IO_CFG_CTR1 (1UL)

◆ ESC_IO_CFG_CTR2

#define ESC_IO_CFG_CTR2 (2UL)

◆ ESC_IO_CFG_CTR3

#define ESC_IO_CFG_CTR3 (3UL)

◆ ESC_IO_CFG_CTR4

#define ESC_IO_CFG_CTR4 (4UL)

◆ ESC_IO_CFG_CTR5

#define ESC_IO_CFG_CTR5 (5UL)

◆ ESC_IO_CFG_CTR6

#define ESC_IO_CFG_CTR6 (6UL)

◆ ESC_IO_CFG_CTR7

#define ESC_IO_CFG_CTR7 (7UL)

◆ ESC_IO_CFG_CTR8

#define ESC_IO_CFG_CTR8 (8UL)

◆ ESC_IO_CFG_FUNC_ALT_GET

#define ESC_IO_CFG_FUNC_ALT_GET ( x ) (((uint32_t)(x) & ESC_IO_CFG_FUNC_ALT_MASK) >> ESC_IO_CFG_FUNC_ALT_SHIFT)

◆ ESC_IO_CFG_FUNC_ALT_MASK

#define ESC_IO_CFG_FUNC_ALT_MASK (0xFU)

◆ ESC_IO_CFG_FUNC_ALT_SET

#define ESC_IO_CFG_FUNC_ALT_SET ( x ) (((uint32_t)(x) << ESC_IO_CFG_FUNC_ALT_SHIFT) & ESC_IO_CFG_FUNC_ALT_MASK)

◆ ESC_IO_CFG_FUNC_ALT_SHIFT

#define ESC_IO_CFG_FUNC_ALT_SHIFT (0U)

◆ ESC_IO_CFG_INVERT_GET

#define ESC_IO_CFG_INVERT_GET ( x ) (((uint32_t)(x) & ESC_IO_CFG_INVERT_MASK) >> ESC_IO_CFG_INVERT_SHIFT)

◆ ESC_IO_CFG_INVERT_MASK

#define ESC_IO_CFG_INVERT_MASK (0x10U)

◆ ESC_IO_CFG_INVERT_SET

#define ESC_IO_CFG_INVERT_SET ( x ) (((uint32_t)(x) << ESC_IO_CFG_INVERT_SHIFT) & ESC_IO_CFG_INVERT_MASK)

◆ ESC_IO_CFG_INVERT_SHIFT

#define ESC_IO_CFG_INVERT_SHIFT (4U)

◆ ESC_LATCH0_CTRL_NEG_EDGE_GET

#define ESC_LATCH0_CTRL_NEG_EDGE_GET ( x ) (((uint8_t)(x) & ESC_LATCH0_CTRL_NEG_EDGE_MASK) >> ESC_LATCH0_CTRL_NEG_EDGE_SHIFT)

◆ ESC_LATCH0_CTRL_NEG_EDGE_MASK

#define ESC_LATCH0_CTRL_NEG_EDGE_MASK (0x2U)

◆ ESC_LATCH0_CTRL_NEG_EDGE_SET

#define ESC_LATCH0_CTRL_NEG_EDGE_SET ( x ) (((uint8_t)(x) << ESC_LATCH0_CTRL_NEG_EDGE_SHIFT) & ESC_LATCH0_CTRL_NEG_EDGE_MASK)

◆ ESC_LATCH0_CTRL_NEG_EDGE_SHIFT

#define ESC_LATCH0_CTRL_NEG_EDGE_SHIFT (1U)

◆ ESC_LATCH0_CTRL_POS_EDGE_GET

#define ESC_LATCH0_CTRL_POS_EDGE_GET ( x ) (((uint8_t)(x) & ESC_LATCH0_CTRL_POS_EDGE_MASK) >> ESC_LATCH0_CTRL_POS_EDGE_SHIFT)

◆ ESC_LATCH0_CTRL_POS_EDGE_MASK

#define ESC_LATCH0_CTRL_POS_EDGE_MASK (0x1U)

◆ ESC_LATCH0_CTRL_POS_EDGE_SET

#define ESC_LATCH0_CTRL_POS_EDGE_SET ( x ) (((uint8_t)(x) << ESC_LATCH0_CTRL_POS_EDGE_SHIFT) & ESC_LATCH0_CTRL_POS_EDGE_MASK)

◆ ESC_LATCH0_CTRL_POS_EDGE_SHIFT

#define ESC_LATCH0_CTRL_POS_EDGE_SHIFT (0U)

◆ ESC_LATCH0_STAT_NEG_EDGE_GET

#define ESC_LATCH0_STAT_NEG_EDGE_GET ( x ) (((uint8_t)(x) & ESC_LATCH0_STAT_NEG_EDGE_MASK) >> ESC_LATCH0_STAT_NEG_EDGE_SHIFT)

◆ ESC_LATCH0_STAT_NEG_EDGE_MASK

#define ESC_LATCH0_STAT_NEG_EDGE_MASK (0x2U)

◆ ESC_LATCH0_STAT_NEG_EDGE_SHIFT

#define ESC_LATCH0_STAT_NEG_EDGE_SHIFT (1U)

◆ ESC_LATCH0_STAT_PIN_STAT_GET

#define ESC_LATCH0_STAT_PIN_STAT_GET ( x ) (((uint8_t)(x) & ESC_LATCH0_STAT_PIN_STAT_MASK) >> ESC_LATCH0_STAT_PIN_STAT_SHIFT)

◆ ESC_LATCH0_STAT_PIN_STAT_MASK

#define ESC_LATCH0_STAT_PIN_STAT_MASK (0x4U)

◆ ESC_LATCH0_STAT_PIN_STAT_SHIFT

#define ESC_LATCH0_STAT_PIN_STAT_SHIFT (2U)

◆ ESC_LATCH0_STAT_POS_EDGE_GET

#define ESC_LATCH0_STAT_POS_EDGE_GET ( x ) (((uint8_t)(x) & ESC_LATCH0_STAT_POS_EDGE_MASK) >> ESC_LATCH0_STAT_POS_EDGE_SHIFT)

◆ ESC_LATCH0_STAT_POS_EDGE_MASK

#define ESC_LATCH0_STAT_POS_EDGE_MASK (0x1U)

◆ ESC_LATCH0_STAT_POS_EDGE_SHIFT

#define ESC_LATCH0_STAT_POS_EDGE_SHIFT (0U)

◆ ESC_LATCH0_TIME_NE_TIME_GET

#define ESC_LATCH0_TIME_NE_TIME_GET ( x ) (((uint64_t)(x) & ESC_LATCH0_TIME_NE_TIME_MASK) >> ESC_LATCH0_TIME_NE_TIME_SHIFT)

◆ ESC_LATCH0_TIME_NE_TIME_MASK

#define ESC_LATCH0_TIME_NE_TIME_MASK (0xFFFFFFFFFFFFFFFFULL)

◆ ESC_LATCH0_TIME_NE_TIME_SET

#define ESC_LATCH0_TIME_NE_TIME_SET ( x ) (((uint64_t)(x) << ESC_LATCH0_TIME_NE_TIME_SHIFT) & ESC_LATCH0_TIME_NE_TIME_MASK)

◆ ESC_LATCH0_TIME_NE_TIME_SHIFT

#define ESC_LATCH0_TIME_NE_TIME_SHIFT (0U)

◆ ESC_LATCH0_TIME_PE_TIME_GET

#define ESC_LATCH0_TIME_PE_TIME_GET ( x ) (((uint64_t)(x) & ESC_LATCH0_TIME_PE_TIME_MASK) >> ESC_LATCH0_TIME_PE_TIME_SHIFT)

◆ ESC_LATCH0_TIME_PE_TIME_MASK

#define ESC_LATCH0_TIME_PE_TIME_MASK (0xFFFFFFFFFFFFFFFFULL)

◆ ESC_LATCH0_TIME_PE_TIME_SET

#define ESC_LATCH0_TIME_PE_TIME_SET ( x ) (((uint64_t)(x) << ESC_LATCH0_TIME_PE_TIME_SHIFT) & ESC_LATCH0_TIME_PE_TIME_MASK)

◆ ESC_LATCH0_TIME_PE_TIME_SHIFT

#define ESC_LATCH0_TIME_PE_TIME_SHIFT (0U)

◆ ESC_LATCH1_CTRL_NEG_EDGE_GET

#define ESC_LATCH1_CTRL_NEG_EDGE_GET ( x ) (((uint8_t)(x) & ESC_LATCH1_CTRL_NEG_EDGE_MASK) >> ESC_LATCH1_CTRL_NEG_EDGE_SHIFT)

◆ ESC_LATCH1_CTRL_NEG_EDGE_MASK

#define ESC_LATCH1_CTRL_NEG_EDGE_MASK (0x2U)

◆ ESC_LATCH1_CTRL_NEG_EDGE_SET

#define ESC_LATCH1_CTRL_NEG_EDGE_SET ( x ) (((uint8_t)(x) << ESC_LATCH1_CTRL_NEG_EDGE_SHIFT) & ESC_LATCH1_CTRL_NEG_EDGE_MASK)

◆ ESC_LATCH1_CTRL_NEG_EDGE_SHIFT

#define ESC_LATCH1_CTRL_NEG_EDGE_SHIFT (1U)

◆ ESC_LATCH1_CTRL_POS_EDGE_GET

#define ESC_LATCH1_CTRL_POS_EDGE_GET ( x ) (((uint8_t)(x) & ESC_LATCH1_CTRL_POS_EDGE_MASK) >> ESC_LATCH1_CTRL_POS_EDGE_SHIFT)

◆ ESC_LATCH1_CTRL_POS_EDGE_MASK

#define ESC_LATCH1_CTRL_POS_EDGE_MASK (0x1U)

◆ ESC_LATCH1_CTRL_POS_EDGE_SET

#define ESC_LATCH1_CTRL_POS_EDGE_SET ( x ) (((uint8_t)(x) << ESC_LATCH1_CTRL_POS_EDGE_SHIFT) & ESC_LATCH1_CTRL_POS_EDGE_MASK)

◆ ESC_LATCH1_CTRL_POS_EDGE_SHIFT

#define ESC_LATCH1_CTRL_POS_EDGE_SHIFT (0U)

◆ ESC_LATCH1_STAT_NEG_EDGE_GET

#define ESC_LATCH1_STAT_NEG_EDGE_GET ( x ) (((uint8_t)(x) & ESC_LATCH1_STAT_NEG_EDGE_MASK) >> ESC_LATCH1_STAT_NEG_EDGE_SHIFT)

◆ ESC_LATCH1_STAT_NEG_EDGE_MASK

#define ESC_LATCH1_STAT_NEG_EDGE_MASK (0x2U)

◆ ESC_LATCH1_STAT_NEG_EDGE_SHIFT

#define ESC_LATCH1_STAT_NEG_EDGE_SHIFT (1U)

◆ ESC_LATCH1_STAT_PIN_STAT_GET

#define ESC_LATCH1_STAT_PIN_STAT_GET ( x ) (((uint8_t)(x) & ESC_LATCH1_STAT_PIN_STAT_MASK) >> ESC_LATCH1_STAT_PIN_STAT_SHIFT)

◆ ESC_LATCH1_STAT_PIN_STAT_MASK

#define ESC_LATCH1_STAT_PIN_STAT_MASK (0x4U)

◆ ESC_LATCH1_STAT_PIN_STAT_SHIFT

#define ESC_LATCH1_STAT_PIN_STAT_SHIFT (2U)

◆ ESC_LATCH1_STAT_POS_EDGE_GET

#define ESC_LATCH1_STAT_POS_EDGE_GET ( x ) (((uint8_t)(x) & ESC_LATCH1_STAT_POS_EDGE_MASK) >> ESC_LATCH1_STAT_POS_EDGE_SHIFT)

◆ ESC_LATCH1_STAT_POS_EDGE_MASK

#define ESC_LATCH1_STAT_POS_EDGE_MASK (0x1U)

◆ ESC_LATCH1_STAT_POS_EDGE_SHIFT

#define ESC_LATCH1_STAT_POS_EDGE_SHIFT (0U)

◆ ESC_LATCH1_TIME_NE_TIME_GET

#define ESC_LATCH1_TIME_NE_TIME_GET ( x ) (((uint64_t)(x) & ESC_LATCH1_TIME_NE_TIME_MASK) >> ESC_LATCH1_TIME_NE_TIME_SHIFT)

◆ ESC_LATCH1_TIME_NE_TIME_MASK

#define ESC_LATCH1_TIME_NE_TIME_MASK (0xFFFFFFFFFFFFFFFFULL)

◆ ESC_LATCH1_TIME_NE_TIME_SET

#define ESC_LATCH1_TIME_NE_TIME_SET ( x ) (((uint64_t)(x) << ESC_LATCH1_TIME_NE_TIME_SHIFT) & ESC_LATCH1_TIME_NE_TIME_MASK)

◆ ESC_LATCH1_TIME_NE_TIME_SHIFT

#define ESC_LATCH1_TIME_NE_TIME_SHIFT (0U)

◆ ESC_LATCH1_TIME_PE_TIME_GET

#define ESC_LATCH1_TIME_PE_TIME_GET ( x ) (((uint64_t)(x) & ESC_LATCH1_TIME_PE_TIME_MASK) >> ESC_LATCH1_TIME_PE_TIME_SHIFT)

◆ ESC_LATCH1_TIME_PE_TIME_MASK

#define ESC_LATCH1_TIME_PE_TIME_MASK (0xFFFFFFFFFFFFFFFFULL)

◆ ESC_LATCH1_TIME_PE_TIME_SET

#define ESC_LATCH1_TIME_PE_TIME_SET ( x ) (((uint64_t)(x) << ESC_LATCH1_TIME_PE_TIME_SHIFT) & ESC_LATCH1_TIME_PE_TIME_MASK)

◆ ESC_LATCH1_TIME_PE_TIME_SHIFT

#define ESC_LATCH1_TIME_PE_TIME_SHIFT (0U)

◆ ESC_LOST_LINK_CNT_CNT_GET

#define ESC_LOST_LINK_CNT_CNT_GET ( x ) (((uint8_t)(x) & ESC_LOST_LINK_CNT_CNT_MASK) >> ESC_LOST_LINK_CNT_CNT_SHIFT)

◆ ESC_LOST_LINK_CNT_CNT_MASK

#define ESC_LOST_LINK_CNT_CNT_MASK (0xFFU)

◆ ESC_LOST_LINK_CNT_CNT_SHIFT

#define ESC_LOST_LINK_CNT_CNT_SHIFT (0U)

◆ ESC_LOST_LINK_CNT_PORT0

#define ESC_LOST_LINK_CNT_PORT0 (0UL)

◆ ESC_LOST_LINK_CNT_PORT1

#define ESC_LOST_LINK_CNT_PORT1 (1UL)

◆ ESC_LOST_LINK_CNT_PORT2

#define ESC_LOST_LINK_CNT_PORT2 (2UL)

◆ ESC_LOST_LINK_CNT_PORT3

#define ESC_LOST_LINK_CNT_PORT3 (3UL)

◆ ESC_MII_MNG_CS_BUSY_GET

#define ESC_MII_MNG_CS_BUSY_GET ( x ) (((uint16_t)(x) & ESC_MII_MNG_CS_BUSY_MASK) >> ESC_MII_MNG_CS_BUSY_SHIFT)

◆ ESC_MII_MNG_CS_BUSY_MASK

#define ESC_MII_MNG_CS_BUSY_MASK (0x8000U)

◆ ESC_MII_MNG_CS_BUSY_SHIFT

#define ESC_MII_MNG_CS_BUSY_SHIFT (15U)

◆ ESC_MII_MNG_CS_CMD_ERR_GET

#define ESC_MII_MNG_CS_CMD_ERR_GET ( x ) (((uint16_t)(x) & ESC_MII_MNG_CS_CMD_ERR_MASK) >> ESC_MII_MNG_CS_CMD_ERR_SHIFT)

◆ ESC_MII_MNG_CS_CMD_ERR_MASK

#define ESC_MII_MNG_CS_CMD_ERR_MASK (0x4000U)

◆ ESC_MII_MNG_CS_CMD_ERR_SHIFT

#define ESC_MII_MNG_CS_CMD_ERR_SHIFT (14U)

◆ ESC_MII_MNG_CS_CMD_GET

#define ESC_MII_MNG_CS_CMD_GET ( x ) (((uint16_t)(x) & ESC_MII_MNG_CS_CMD_MASK) >> ESC_MII_MNG_CS_CMD_SHIFT)

◆ ESC_MII_MNG_CS_CMD_MASK

#define ESC_MII_MNG_CS_CMD_MASK (0x300U)

◆ ESC_MII_MNG_CS_CMD_SET

#define ESC_MII_MNG_CS_CMD_SET ( x ) (((uint16_t)(x) << ESC_MII_MNG_CS_CMD_SHIFT) & ESC_MII_MNG_CS_CMD_MASK)

◆ ESC_MII_MNG_CS_CMD_SHIFT

#define ESC_MII_MNG_CS_CMD_SHIFT (8U)

◆ ESC_MII_MNG_CS_LINK_DC_GET

#define ESC_MII_MNG_CS_LINK_DC_GET ( x ) (((uint16_t)(x) & ESC_MII_MNG_CS_LINK_DC_MASK) >> ESC_MII_MNG_CS_LINK_DC_SHIFT)

◆ ESC_MII_MNG_CS_LINK_DC_MASK

#define ESC_MII_MNG_CS_LINK_DC_MASK (0x4U)

◆ ESC_MII_MNG_CS_LINK_DC_SHIFT

#define ESC_MII_MNG_CS_LINK_DC_SHIFT (2U)

◆ ESC_MII_MNG_CS_PDI_GET

#define ESC_MII_MNG_CS_PDI_GET ( x ) (((uint16_t)(x) & ESC_MII_MNG_CS_PDI_MASK) >> ESC_MII_MNG_CS_PDI_SHIFT)

◆ ESC_MII_MNG_CS_PDI_MASK

#define ESC_MII_MNG_CS_PDI_MASK (0x2U)

◆ ESC_MII_MNG_CS_PDI_SHIFT

#define ESC_MII_MNG_CS_PDI_SHIFT (1U)

◆ ESC_MII_MNG_CS_PHY_ADDR_GET

#define ESC_MII_MNG_CS_PHY_ADDR_GET ( x ) (((uint16_t)(x) & ESC_MII_MNG_CS_PHY_ADDR_MASK) >> ESC_MII_MNG_CS_PHY_ADDR_SHIFT)

◆ ESC_MII_MNG_CS_PHY_ADDR_MASK

#define ESC_MII_MNG_CS_PHY_ADDR_MASK (0xF8U)

◆ ESC_MII_MNG_CS_PHY_ADDR_SHIFT

#define ESC_MII_MNG_CS_PHY_ADDR_SHIFT (3U)

◆ ESC_MII_MNG_CS_RD_ERR_GET

#define ESC_MII_MNG_CS_RD_ERR_GET ( x ) (((uint16_t)(x) & ESC_MII_MNG_CS_RD_ERR_MASK) >> ESC_MII_MNG_CS_RD_ERR_SHIFT)

◆ ESC_MII_MNG_CS_RD_ERR_MASK

#define ESC_MII_MNG_CS_RD_ERR_MASK (0x2000U)

◆ ESC_MII_MNG_CS_RD_ERR_SHIFT

#define ESC_MII_MNG_CS_RD_ERR_SHIFT (13U)

◆ ESC_MII_MNG_CS_WEN_GET

#define ESC_MII_MNG_CS_WEN_GET ( x ) (((uint16_t)(x) & ESC_MII_MNG_CS_WEN_MASK) >> ESC_MII_MNG_CS_WEN_SHIFT)

◆ ESC_MII_MNG_CS_WEN_MASK

#define ESC_MII_MNG_CS_WEN_MASK (0x1U)

◆ ESC_MII_MNG_CS_WEN_SHIFT

#define ESC_MII_MNG_CS_WEN_SHIFT (0U)

◆ ESC_MIIM_ECAT_ACC_STAT_ACC_GET

#define ESC_MIIM_ECAT_ACC_STAT_ACC_GET ( x ) (((uint8_t)(x) & ESC_MIIM_ECAT_ACC_STAT_ACC_MASK) >> ESC_MIIM_ECAT_ACC_STAT_ACC_SHIFT)

◆ ESC_MIIM_ECAT_ACC_STAT_ACC_MASK

#define ESC_MIIM_ECAT_ACC_STAT_ACC_MASK (0x1U)

◆ ESC_MIIM_ECAT_ACC_STAT_ACC_SHIFT

#define ESC_MIIM_ECAT_ACC_STAT_ACC_SHIFT (0U)

◆ ESC_MIIM_PDI_ACC_STAT_ACC_GET

#define ESC_MIIM_PDI_ACC_STAT_ACC_GET ( x ) (((uint8_t)(x) & ESC_MIIM_PDI_ACC_STAT_ACC_MASK) >> ESC_MIIM_PDI_ACC_STAT_ACC_SHIFT)

◆ ESC_MIIM_PDI_ACC_STAT_ACC_MASK

#define ESC_MIIM_PDI_ACC_STAT_ACC_MASK (0x1U)

◆ ESC_MIIM_PDI_ACC_STAT_ACC_SET

#define ESC_MIIM_PDI_ACC_STAT_ACC_SET ( x ) (((uint8_t)(x) << ESC_MIIM_PDI_ACC_STAT_ACC_SHIFT) & ESC_MIIM_PDI_ACC_STAT_ACC_MASK)

◆ ESC_MIIM_PDI_ACC_STAT_ACC_SHIFT

#define ESC_MIIM_PDI_ACC_STAT_ACC_SHIFT (0U)

◆ ESC_MIIM_PDI_ACC_STAT_FORCE_GET

#define ESC_MIIM_PDI_ACC_STAT_FORCE_GET ( x ) (((uint8_t)(x) & ESC_MIIM_PDI_ACC_STAT_FORCE_MASK) >> ESC_MIIM_PDI_ACC_STAT_FORCE_SHIFT)

◆ ESC_MIIM_PDI_ACC_STAT_FORCE_MASK

#define ESC_MIIM_PDI_ACC_STAT_FORCE_MASK (0x2U)

◆ ESC_MIIM_PDI_ACC_STAT_FORCE_SHIFT

#define ESC_MIIM_PDI_ACC_STAT_FORCE_SHIFT (1U)

◆ ESC_NXT_SYNC1_PULSE_TIME_GET

#define ESC_NXT_SYNC1_PULSE_TIME_GET ( x ) (((uint64_t)(x) & ESC_NXT_SYNC1_PULSE_TIME_MASK) >> ESC_NXT_SYNC1_PULSE_TIME_SHIFT)

◆ ESC_NXT_SYNC1_PULSE_TIME_MASK

#define ESC_NXT_SYNC1_PULSE_TIME_MASK (0xFFFFFFFFFFFFFFFFULL)

◆ ESC_NXT_SYNC1_PULSE_TIME_SHIFT

#define ESC_NXT_SYNC1_PULSE_TIME_SHIFT (0U)

◆ ESC_PDI_AL_EVT_MSK_MASK_GET

#define ESC_PDI_AL_EVT_MSK_MASK_GET ( x ) (((uint32_t)(x) & ESC_PDI_AL_EVT_MSK_MASK_MASK) >> ESC_PDI_AL_EVT_MSK_MASK_SHIFT)

◆ ESC_PDI_AL_EVT_MSK_MASK_MASK

#define ESC_PDI_AL_EVT_MSK_MASK_MASK (0xFFFFFFFFUL)

◆ ESC_PDI_AL_EVT_MSK_MASK_SET

#define ESC_PDI_AL_EVT_MSK_MASK_SET ( x ) (((uint32_t)(x) << ESC_PDI_AL_EVT_MSK_MASK_SHIFT) & ESC_PDI_AL_EVT_MSK_MASK_MASK)

◆ ESC_PDI_AL_EVT_MSK_MASK_SHIFT

#define ESC_PDI_AL_EVT_MSK_MASK_SHIFT (0U)

◆ ESC_PDI_BUF_CET_TIME_GET

#define ESC_PDI_BUF_CET_TIME_GET ( x ) (((uint32_t)(x) & ESC_PDI_BUF_CET_TIME_MASK) >> ESC_PDI_BUF_CET_TIME_SHIFT)

◆ ESC_PDI_BUF_CET_TIME_MASK

#define ESC_PDI_BUF_CET_TIME_MASK (0xFFFFFFFFUL)

◆ ESC_PDI_BUF_CET_TIME_SHIFT

#define ESC_PDI_BUF_CET_TIME_SHIFT (0U)

◆ ESC_PDI_BUF_SET_TIME_GET

#define ESC_PDI_BUF_SET_TIME_GET ( x ) (((uint32_t)(x) & ESC_PDI_BUF_SET_TIME_MASK) >> ESC_PDI_BUF_SET_TIME_SHIFT)

◆ ESC_PDI_BUF_SET_TIME_MASK

#define ESC_PDI_BUF_SET_TIME_MASK (0xFFFFFFFFUL)

◆ ESC_PDI_BUF_SET_TIME_SHIFT

#define ESC_PDI_BUF_SET_TIME_SHIFT (0U)

◆ ESC_PDI_CFG_BUS_GET

#define ESC_PDI_CFG_BUS_GET ( x ) (((uint8_t)(x) & ESC_PDI_CFG_BUS_MASK) >> ESC_PDI_CFG_BUS_SHIFT)

◆ ESC_PDI_CFG_BUS_MASK

#define ESC_PDI_CFG_BUS_MASK (0xE0U)

◆ ESC_PDI_CFG_BUS_SHIFT

#define ESC_PDI_CFG_BUS_SHIFT (5U)

◆ ESC_PDI_CFG_CLK_GET

#define ESC_PDI_CFG_CLK_GET ( x ) (((uint8_t)(x) & ESC_PDI_CFG_CLK_MASK) >> ESC_PDI_CFG_CLK_SHIFT)

◆ ESC_PDI_CFG_CLK_MASK

#define ESC_PDI_CFG_CLK_MASK (0x1FU)

◆ ESC_PDI_CFG_CLK_SHIFT

#define ESC_PDI_CFG_CLK_SHIFT (0U)

◆ ESC_PDI_CTRL_PDI_GET

#define ESC_PDI_CTRL_PDI_GET ( x ) (((uint8_t)(x) & ESC_PDI_CTRL_PDI_MASK) >> ESC_PDI_CTRL_PDI_SHIFT)

◆ ESC_PDI_CTRL_PDI_MASK

#define ESC_PDI_CTRL_PDI_MASK (0xFFU)

◆ ESC_PDI_CTRL_PDI_SHIFT

#define ESC_PDI_CTRL_PDI_SHIFT (0U)

◆ ESC_PDI_ERR_CNT_CNT_GET

#define ESC_PDI_ERR_CNT_CNT_GET ( x ) (((uint8_t)(x) & ESC_PDI_ERR_CNT_CNT_MASK) >> ESC_PDI_ERR_CNT_CNT_SHIFT)

◆ ESC_PDI_ERR_CNT_CNT_MASK

#define ESC_PDI_ERR_CNT_CNT_MASK (0xFFU)

◆ ESC_PDI_ERR_CNT_CNT_SHIFT

#define ESC_PDI_ERR_CNT_CNT_SHIFT (0U)

◆ ESC_PDI_EXT_CFG_OCBST_GET

#define ESC_PDI_EXT_CFG_OCBST_GET ( x ) (((uint16_t)(x) & ESC_PDI_EXT_CFG_OCBST_MASK) >> ESC_PDI_EXT_CFG_OCBST_SHIFT)

◆ ESC_PDI_EXT_CFG_OCBST_MASK

#define ESC_PDI_EXT_CFG_OCBST_MASK (0x700U)

◆ ESC_PDI_EXT_CFG_OCBST_SET

#define ESC_PDI_EXT_CFG_OCBST_SET ( x ) (((uint16_t)(x) << ESC_PDI_EXT_CFG_OCBST_SHIFT) & ESC_PDI_EXT_CFG_OCBST_MASK)

◆ ESC_PDI_EXT_CFG_OCBST_SHIFT

#define ESC_PDI_EXT_CFG_OCBST_SHIFT (8U)

◆ ESC_PDI_EXT_CFG_RPS_GET

#define ESC_PDI_EXT_CFG_RPS_GET ( x ) (((uint16_t)(x) & ESC_PDI_EXT_CFG_RPS_MASK) >> ESC_PDI_EXT_CFG_RPS_SHIFT)

◆ ESC_PDI_EXT_CFG_RPS_MASK

#define ESC_PDI_EXT_CFG_RPS_MASK (0x3U)

◆ ESC_PDI_EXT_CFG_RPS_SHIFT

#define ESC_PDI_EXT_CFG_RPS_SHIFT (0U)

◆ ESC_PDI_INFO_ECLFE_GET

#define ESC_PDI_INFO_ECLFE_GET ( x ) (((uint16_t)(x) & ESC_PDI_INFO_ECLFE_MASK) >> ESC_PDI_INFO_ECLFE_SHIFT)

◆ ESC_PDI_INFO_ECLFE_MASK

#define ESC_PDI_INFO_ECLFE_MASK (0x2U)

◆ ESC_PDI_INFO_ECLFE_SHIFT

#define ESC_PDI_INFO_ECLFE_SHIFT (1U)

◆ ESC_PDI_INFO_PDIA_GET

#define ESC_PDI_INFO_PDIA_GET ( x ) (((uint16_t)(x) & ESC_PDI_INFO_PDIA_MASK) >> ESC_PDI_INFO_PDIA_SHIFT)

◆ ESC_PDI_INFO_PDIA_MASK

#define ESC_PDI_INFO_PDIA_MASK (0x4U)

◆ ESC_PDI_INFO_PDIA_SHIFT

#define ESC_PDI_INFO_PDIA_SHIFT (2U)

◆ ESC_PDI_INFO_PDICN_GET

#define ESC_PDI_INFO_PDICN_GET ( x ) (((uint16_t)(x) & ESC_PDI_INFO_PDICN_MASK) >> ESC_PDI_INFO_PDICN_SHIFT)

◆ ESC_PDI_INFO_PDICN_MASK

#define ESC_PDI_INFO_PDICN_MASK (0x8U)

◆ ESC_PDI_INFO_PDICN_SHIFT

#define ESC_PDI_INFO_PDICN_SHIFT (3U)

◆ ESC_PDI_INFO_PFABW_GET

#define ESC_PDI_INFO_PFABW_GET ( x ) (((uint16_t)(x) & ESC_PDI_INFO_PFABW_MASK) >> ESC_PDI_INFO_PFABW_SHIFT)

◆ ESC_PDI_INFO_PFABW_MASK

#define ESC_PDI_INFO_PFABW_MASK (0x1U)

◆ ESC_PDI_INFO_PFABW_SHIFT

#define ESC_PDI_INFO_PFABW_SHIFT (0U)

◆ ESC_PDI_SL_CFG_SYNC0_CFG_GET

#define ESC_PDI_SL_CFG_SYNC0_CFG_GET ( x ) (((uint8_t)(x) & ESC_PDI_SL_CFG_SYNC0_CFG_MASK) >> ESC_PDI_SL_CFG_SYNC0_CFG_SHIFT)

◆ ESC_PDI_SL_CFG_SYNC0_CFG_MASK

#define ESC_PDI_SL_CFG_SYNC0_CFG_MASK (0x4U)

◆ ESC_PDI_SL_CFG_SYNC0_CFG_SHIFT

#define ESC_PDI_SL_CFG_SYNC0_CFG_SHIFT (2U)

◆ ESC_PDI_SL_CFG_SYNC0_MAER_GET

#define ESC_PDI_SL_CFG_SYNC0_MAER_GET ( x ) (((uint8_t)(x) & ESC_PDI_SL_CFG_SYNC0_MAER_MASK) >> ESC_PDI_SL_CFG_SYNC0_MAER_SHIFT)

◆ ESC_PDI_SL_CFG_SYNC0_MAER_MASK

#define ESC_PDI_SL_CFG_SYNC0_MAER_MASK (0x8U)

◆ ESC_PDI_SL_CFG_SYNC0_MAER_SHIFT

#define ESC_PDI_SL_CFG_SYNC0_MAER_SHIFT (3U)

◆ ESC_PDI_SL_CFG_SYNC0_ODP_GET

#define ESC_PDI_SL_CFG_SYNC0_ODP_GET ( x ) (((uint8_t)(x) & ESC_PDI_SL_CFG_SYNC0_ODP_MASK) >> ESC_PDI_SL_CFG_SYNC0_ODP_SHIFT)

◆ ESC_PDI_SL_CFG_SYNC0_ODP_MASK

#define ESC_PDI_SL_CFG_SYNC0_ODP_MASK (0x3U)

◆ ESC_PDI_SL_CFG_SYNC0_ODP_SHIFT

#define ESC_PDI_SL_CFG_SYNC0_ODP_SHIFT (0U)

◆ ESC_PDI_SL_CFG_SYNC1_CFG_GET

#define ESC_PDI_SL_CFG_SYNC1_CFG_GET ( x ) (((uint8_t)(x) & ESC_PDI_SL_CFG_SYNC1_CFG_MASK) >> ESC_PDI_SL_CFG_SYNC1_CFG_SHIFT)

◆ ESC_PDI_SL_CFG_SYNC1_CFG_MASK

#define ESC_PDI_SL_CFG_SYNC1_CFG_MASK (0x40U)

◆ ESC_PDI_SL_CFG_SYNC1_CFG_SHIFT

#define ESC_PDI_SL_CFG_SYNC1_CFG_SHIFT (6U)

◆ ESC_PDI_SL_CFG_SYNC1_MAER_GET

#define ESC_PDI_SL_CFG_SYNC1_MAER_GET ( x ) (((uint8_t)(x) & ESC_PDI_SL_CFG_SYNC1_MAER_MASK) >> ESC_PDI_SL_CFG_SYNC1_MAER_SHIFT)

◆ ESC_PDI_SL_CFG_SYNC1_MAER_MASK

#define ESC_PDI_SL_CFG_SYNC1_MAER_MASK (0x80U)

◆ ESC_PDI_SL_CFG_SYNC1_MAER_SHIFT

#define ESC_PDI_SL_CFG_SYNC1_MAER_SHIFT (7U)

◆ ESC_PDI_SL_CFG_SYNC1_ODP_GET

#define ESC_PDI_SL_CFG_SYNC1_ODP_GET ( x ) (((uint8_t)(x) & ESC_PDI_SL_CFG_SYNC1_ODP_MASK) >> ESC_PDI_SL_CFG_SYNC1_ODP_SHIFT)

◆ ESC_PDI_SL_CFG_SYNC1_ODP_MASK

#define ESC_PDI_SL_CFG_SYNC1_ODP_MASK (0x30U)

◆ ESC_PDI_SL_CFG_SYNC1_ODP_SHIFT

#define ESC_PDI_SL_CFG_SYNC1_ODP_SHIFT (4U)

◆ ESC_PDRAM_ALS_DATA_GET

#define ESC_PDRAM_ALS_DATA_GET ( x ) (((uint32_t)(x) & ESC_PDRAM_ALS_DATA_MASK) >> ESC_PDRAM_ALS_DATA_SHIFT)

◆ ESC_PDRAM_ALS_DATA_MASK

#define ESC_PDRAM_ALS_DATA_MASK (0xFFFFFFFFUL)

◆ ESC_PDRAM_ALS_DATA_SET

#define ESC_PDRAM_ALS_DATA_SET ( x ) (((uint32_t)(x) << ESC_PDRAM_ALS_DATA_SHIFT) & ESC_PDRAM_ALS_DATA_MASK)

◆ ESC_PDRAM_ALS_DATA_SHIFT

#define ESC_PDRAM_ALS_DATA_SHIFT (0U)

◆ ESC_PDRAM_DATA_GET

#define ESC_PDRAM_DATA_GET ( x ) (((uint32_t)(x) & ESC_PDRAM_DATA_MASK) >> ESC_PDRAM_DATA_SHIFT)

◆ ESC_PDRAM_DATA_MASK

#define ESC_PDRAM_DATA_MASK (0xFFFFFFFFUL)

◆ ESC_PDRAM_DATA_SET

#define ESC_PDRAM_DATA_SET ( x ) (((uint32_t)(x) << ESC_PDRAM_DATA_SHIFT) & ESC_PDRAM_DATA_MASK)

◆ ESC_PDRAM_DATA_SHIFT

#define ESC_PDRAM_DATA_SHIFT (0U)

◆ ESC_PHY_ADDR_ADDR_GET

#define ESC_PHY_ADDR_ADDR_GET ( x ) (((uint8_t)(x) & ESC_PHY_ADDR_ADDR_MASK) >> ESC_PHY_ADDR_ADDR_SHIFT)

◆ ESC_PHY_ADDR_ADDR_MASK

#define ESC_PHY_ADDR_ADDR_MASK (0x1FU)

◆ ESC_PHY_ADDR_ADDR_SET

#define ESC_PHY_ADDR_ADDR_SET ( x ) (((uint8_t)(x) << ESC_PHY_ADDR_ADDR_SHIFT) & ESC_PHY_ADDR_ADDR_MASK)

◆ ESC_PHY_ADDR_ADDR_SHIFT

#define ESC_PHY_ADDR_ADDR_SHIFT (0U)

◆ ESC_PHY_ADDR_SHOW_GET

#define ESC_PHY_ADDR_SHOW_GET ( x ) (((uint8_t)(x) & ESC_PHY_ADDR_SHOW_MASK) >> ESC_PHY_ADDR_SHOW_SHIFT)

◆ ESC_PHY_ADDR_SHOW_MASK

#define ESC_PHY_ADDR_SHOW_MASK (0x80U)

◆ ESC_PHY_ADDR_SHOW_SET

#define ESC_PHY_ADDR_SHOW_SET ( x ) (((uint8_t)(x) << ESC_PHY_ADDR_SHOW_SHIFT) & ESC_PHY_ADDR_SHOW_MASK)

◆ ESC_PHY_ADDR_SHOW_SHIFT

#define ESC_PHY_ADDR_SHOW_SHIFT (7U)

◆ ESC_PHY_CFG0_MAC_SPEED_GET

#define ESC_PHY_CFG0_MAC_SPEED_GET ( x ) (((uint32_t)(x) & ESC_PHY_CFG0_MAC_SPEED_MASK) >> ESC_PHY_CFG0_MAC_SPEED_SHIFT)

◆ ESC_PHY_CFG0_MAC_SPEED_MASK

#define ESC_PHY_CFG0_MAC_SPEED_MASK (0x40000000UL)

◆ ESC_PHY_CFG0_MAC_SPEED_SET

#define ESC_PHY_CFG0_MAC_SPEED_SET ( x ) (((uint32_t)(x) << ESC_PHY_CFG0_MAC_SPEED_SHIFT) & ESC_PHY_CFG0_MAC_SPEED_MASK)

◆ ESC_PHY_CFG0_MAC_SPEED_SHIFT

#define ESC_PHY_CFG0_MAC_SPEED_SHIFT (30U)

◆ ESC_PHY_CFG0_PHY_OFFSET_VAL_GET

#define ESC_PHY_CFG0_PHY_OFFSET_VAL_GET ( x ) (((uint32_t)(x) & ESC_PHY_CFG0_PHY_OFFSET_VAL_MASK) >> ESC_PHY_CFG0_PHY_OFFSET_VAL_SHIFT)

◆ ESC_PHY_CFG0_PHY_OFFSET_VAL_MASK

#define ESC_PHY_CFG0_PHY_OFFSET_VAL_MASK (0x1F000000UL)

◆ ESC_PHY_CFG0_PHY_OFFSET_VAL_SET

#define ESC_PHY_CFG0_PHY_OFFSET_VAL_SET ( x ) (((uint32_t)(x) << ESC_PHY_CFG0_PHY_OFFSET_VAL_SHIFT) & ESC_PHY_CFG0_PHY_OFFSET_VAL_MASK)

◆ ESC_PHY_CFG0_PHY_OFFSET_VAL_SHIFT

#define ESC_PHY_CFG0_PHY_OFFSET_VAL_SHIFT (24U)

◆ ESC_PHY_CFG0_PORT0_RMII_EN_GET

#define ESC_PHY_CFG0_PORT0_RMII_EN_GET ( x ) (((uint32_t)(x) & ESC_PHY_CFG0_PORT0_RMII_EN_MASK) >> ESC_PHY_CFG0_PORT0_RMII_EN_SHIFT)

◆ ESC_PHY_CFG0_PORT0_RMII_EN_MASK

#define ESC_PHY_CFG0_PORT0_RMII_EN_MASK (0x80U)

◆ ESC_PHY_CFG0_PORT0_RMII_EN_SET

#define ESC_PHY_CFG0_PORT0_RMII_EN_SET ( x ) (((uint32_t)(x) << ESC_PHY_CFG0_PORT0_RMII_EN_SHIFT) & ESC_PHY_CFG0_PORT0_RMII_EN_MASK)

◆ ESC_PHY_CFG0_PORT0_RMII_EN_SHIFT

#define ESC_PHY_CFG0_PORT0_RMII_EN_SHIFT (7U)

◆ ESC_PHY_CFG0_PORT1_RMII_EN_GET

#define ESC_PHY_CFG0_PORT1_RMII_EN_GET ( x ) (((uint32_t)(x) & ESC_PHY_CFG0_PORT1_RMII_EN_MASK) >> ESC_PHY_CFG0_PORT1_RMII_EN_SHIFT)

◆ ESC_PHY_CFG0_PORT1_RMII_EN_MASK

#define ESC_PHY_CFG0_PORT1_RMII_EN_MASK (0x8000U)

◆ ESC_PHY_CFG0_PORT1_RMII_EN_SET

#define ESC_PHY_CFG0_PORT1_RMII_EN_SET ( x ) (((uint32_t)(x) << ESC_PHY_CFG0_PORT1_RMII_EN_SHIFT) & ESC_PHY_CFG0_PORT1_RMII_EN_MASK)

◆ ESC_PHY_CFG0_PORT1_RMII_EN_SHIFT

#define ESC_PHY_CFG0_PORT1_RMII_EN_SHIFT (15U)

◆ ESC_PHY_CFG0_PORT2_RMII_EN_GET

#define ESC_PHY_CFG0_PORT2_RMII_EN_GET ( x ) (((uint32_t)(x) & ESC_PHY_CFG0_PORT2_RMII_EN_MASK) >> ESC_PHY_CFG0_PORT2_RMII_EN_SHIFT)

◆ ESC_PHY_CFG0_PORT2_RMII_EN_MASK

#define ESC_PHY_CFG0_PORT2_RMII_EN_MASK (0x800000UL)

◆ ESC_PHY_CFG0_PORT2_RMII_EN_SET

#define ESC_PHY_CFG0_PORT2_RMII_EN_SET ( x ) (((uint32_t)(x) << ESC_PHY_CFG0_PORT2_RMII_EN_SHIFT) & ESC_PHY_CFG0_PORT2_RMII_EN_MASK)

◆ ESC_PHY_CFG0_PORT2_RMII_EN_SHIFT

#define ESC_PHY_CFG0_PORT2_RMII_EN_SHIFT (23U)

◆ ESC_PHY_CFG1_REFCK_25M_INV_GET

#define ESC_PHY_CFG1_REFCK_25M_INV_GET ( x ) (((uint32_t)(x) & ESC_PHY_CFG1_REFCK_25M_INV_MASK) >> ESC_PHY_CFG1_REFCK_25M_INV_SHIFT)

◆ ESC_PHY_CFG1_REFCK_25M_INV_MASK

#define ESC_PHY_CFG1_REFCK_25M_INV_MASK (0x80U)

◆ ESC_PHY_CFG1_REFCK_25M_INV_SET

#define ESC_PHY_CFG1_REFCK_25M_INV_SET ( x ) (((uint32_t)(x) << ESC_PHY_CFG1_REFCK_25M_INV_SHIFT) & ESC_PHY_CFG1_REFCK_25M_INV_MASK)

◆ ESC_PHY_CFG1_REFCK_25M_INV_SHIFT

#define ESC_PHY_CFG1_REFCK_25M_INV_SHIFT (7U)

◆ ESC_PHY_CFG1_REFCK_25M_OE_GET

#define ESC_PHY_CFG1_REFCK_25M_OE_GET ( x ) (((uint32_t)(x) & ESC_PHY_CFG1_REFCK_25M_OE_MASK) >> ESC_PHY_CFG1_REFCK_25M_OE_SHIFT)

◆ ESC_PHY_CFG1_REFCK_25M_OE_MASK

#define ESC_PHY_CFG1_REFCK_25M_OE_MASK (0x8U)

◆ ESC_PHY_CFG1_REFCK_25M_OE_SET

#define ESC_PHY_CFG1_REFCK_25M_OE_SET ( x ) (((uint32_t)(x) << ESC_PHY_CFG1_REFCK_25M_OE_SHIFT) & ESC_PHY_CFG1_REFCK_25M_OE_MASK)

◆ ESC_PHY_CFG1_REFCK_25M_OE_SHIFT

#define ESC_PHY_CFG1_REFCK_25M_OE_SHIFT (3U)

◆ ESC_PHY_CFG1_RMII_P0_RXCK_REFCLK_OE_GET

#define ESC_PHY_CFG1_RMII_P0_RXCK_REFCLK_OE_GET ( x ) (((uint32_t)(x) & ESC_PHY_CFG1_RMII_P0_RXCK_REFCLK_OE_MASK) >> ESC_PHY_CFG1_RMII_P0_RXCK_REFCLK_OE_SHIFT)

◆ ESC_PHY_CFG1_RMII_P0_RXCK_REFCLK_OE_MASK

#define ESC_PHY_CFG1_RMII_P0_RXCK_REFCLK_OE_MASK (0x10U)

◆ ESC_PHY_CFG1_RMII_P0_RXCK_REFCLK_OE_SET

#define ESC_PHY_CFG1_RMII_P0_RXCK_REFCLK_OE_SET ( x ) (((uint32_t)(x) << ESC_PHY_CFG1_RMII_P0_RXCK_REFCLK_OE_SHIFT) & ESC_PHY_CFG1_RMII_P0_RXCK_REFCLK_OE_MASK)

◆ ESC_PHY_CFG1_RMII_P0_RXCK_REFCLK_OE_SHIFT

#define ESC_PHY_CFG1_RMII_P0_RXCK_REFCLK_OE_SHIFT (4U)

◆ ESC_PHY_CFG1_RMII_P0_TXCK_REFCLK_OE_GET

#define ESC_PHY_CFG1_RMII_P0_TXCK_REFCLK_OE_GET ( x ) (((uint32_t)(x) & ESC_PHY_CFG1_RMII_P0_TXCK_REFCLK_OE_MASK) >> ESC_PHY_CFG1_RMII_P0_TXCK_REFCLK_OE_SHIFT)

◆ ESC_PHY_CFG1_RMII_P0_TXCK_REFCLK_OE_MASK

#define ESC_PHY_CFG1_RMII_P0_TXCK_REFCLK_OE_MASK (0x1U)

◆ ESC_PHY_CFG1_RMII_P0_TXCK_REFCLK_OE_SET

#define ESC_PHY_CFG1_RMII_P0_TXCK_REFCLK_OE_SET ( x ) (((uint32_t)(x) << ESC_PHY_CFG1_RMII_P0_TXCK_REFCLK_OE_SHIFT) & ESC_PHY_CFG1_RMII_P0_TXCK_REFCLK_OE_MASK)

◆ ESC_PHY_CFG1_RMII_P0_TXCK_REFCLK_OE_SHIFT

#define ESC_PHY_CFG1_RMII_P0_TXCK_REFCLK_OE_SHIFT (0U)

◆ ESC_PHY_CFG1_RMII_P1_RXCK_REFCLK_OE_GET

#define ESC_PHY_CFG1_RMII_P1_RXCK_REFCLK_OE_GET ( x ) (((uint32_t)(x) & ESC_PHY_CFG1_RMII_P1_RXCK_REFCLK_OE_MASK) >> ESC_PHY_CFG1_RMII_P1_RXCK_REFCLK_OE_SHIFT)

◆ ESC_PHY_CFG1_RMII_P1_RXCK_REFCLK_OE_MASK

#define ESC_PHY_CFG1_RMII_P1_RXCK_REFCLK_OE_MASK (0x20U)

◆ ESC_PHY_CFG1_RMII_P1_RXCK_REFCLK_OE_SET

#define ESC_PHY_CFG1_RMII_P1_RXCK_REFCLK_OE_SET ( x ) (((uint32_t)(x) << ESC_PHY_CFG1_RMII_P1_RXCK_REFCLK_OE_SHIFT) & ESC_PHY_CFG1_RMII_P1_RXCK_REFCLK_OE_MASK)

◆ ESC_PHY_CFG1_RMII_P1_RXCK_REFCLK_OE_SHIFT

#define ESC_PHY_CFG1_RMII_P1_RXCK_REFCLK_OE_SHIFT (5U)

◆ ESC_PHY_CFG1_RMII_P1_TXCK_REFCLK_OE_GET

#define ESC_PHY_CFG1_RMII_P1_TXCK_REFCLK_OE_GET ( x ) (((uint32_t)(x) & ESC_PHY_CFG1_RMII_P1_TXCK_REFCLK_OE_MASK) >> ESC_PHY_CFG1_RMII_P1_TXCK_REFCLK_OE_SHIFT)

◆ ESC_PHY_CFG1_RMII_P1_TXCK_REFCLK_OE_MASK

#define ESC_PHY_CFG1_RMII_P1_TXCK_REFCLK_OE_MASK (0x2U)

◆ ESC_PHY_CFG1_RMII_P1_TXCK_REFCLK_OE_SET

#define ESC_PHY_CFG1_RMII_P1_TXCK_REFCLK_OE_SET ( x ) (((uint32_t)(x) << ESC_PHY_CFG1_RMII_P1_TXCK_REFCLK_OE_SHIFT) & ESC_PHY_CFG1_RMII_P1_TXCK_REFCLK_OE_MASK)

◆ ESC_PHY_CFG1_RMII_P1_TXCK_REFCLK_OE_SHIFT

#define ESC_PHY_CFG1_RMII_P1_TXCK_REFCLK_OE_SHIFT (1U)

◆ ESC_PHY_CFG1_RMII_P2_RXCK_REFCLK_OE_GET

#define ESC_PHY_CFG1_RMII_P2_RXCK_REFCLK_OE_GET ( x ) (((uint32_t)(x) & ESC_PHY_CFG1_RMII_P2_RXCK_REFCLK_OE_MASK) >> ESC_PHY_CFG1_RMII_P2_RXCK_REFCLK_OE_SHIFT)

◆ ESC_PHY_CFG1_RMII_P2_RXCK_REFCLK_OE_MASK

#define ESC_PHY_CFG1_RMII_P2_RXCK_REFCLK_OE_MASK (0x40U)

◆ ESC_PHY_CFG1_RMII_P2_RXCK_REFCLK_OE_SET

#define ESC_PHY_CFG1_RMII_P2_RXCK_REFCLK_OE_SET ( x ) (((uint32_t)(x) << ESC_PHY_CFG1_RMII_P2_RXCK_REFCLK_OE_SHIFT) & ESC_PHY_CFG1_RMII_P2_RXCK_REFCLK_OE_MASK)

◆ ESC_PHY_CFG1_RMII_P2_RXCK_REFCLK_OE_SHIFT

#define ESC_PHY_CFG1_RMII_P2_RXCK_REFCLK_OE_SHIFT (6U)

◆ ESC_PHY_CFG1_RMII_P2_TXCK_REFCLK_OE_GET

#define ESC_PHY_CFG1_RMII_P2_TXCK_REFCLK_OE_GET ( x ) (((uint32_t)(x) & ESC_PHY_CFG1_RMII_P2_TXCK_REFCLK_OE_MASK) >> ESC_PHY_CFG1_RMII_P2_TXCK_REFCLK_OE_SHIFT)

◆ ESC_PHY_CFG1_RMII_P2_TXCK_REFCLK_OE_MASK

#define ESC_PHY_CFG1_RMII_P2_TXCK_REFCLK_OE_MASK (0x4U)

◆ ESC_PHY_CFG1_RMII_P2_TXCK_REFCLK_OE_SET

#define ESC_PHY_CFG1_RMII_P2_TXCK_REFCLK_OE_SET ( x ) (((uint32_t)(x) << ESC_PHY_CFG1_RMII_P2_TXCK_REFCLK_OE_SHIFT) & ESC_PHY_CFG1_RMII_P2_TXCK_REFCLK_OE_MASK)

◆ ESC_PHY_CFG1_RMII_P2_TXCK_REFCLK_OE_SHIFT

#define ESC_PHY_CFG1_RMII_P2_TXCK_REFCLK_OE_SHIFT (2U)

◆ ESC_PHY_CFG1_RMII_REFCLK_SEL_GET

#define ESC_PHY_CFG1_RMII_REFCLK_SEL_GET ( x ) (((uint32_t)(x) & ESC_PHY_CFG1_RMII_REFCLK_SEL_MASK) >> ESC_PHY_CFG1_RMII_REFCLK_SEL_SHIFT)

◆ ESC_PHY_CFG1_RMII_REFCLK_SEL_MASK

#define ESC_PHY_CFG1_RMII_REFCLK_SEL_MASK (0x700U)

◆ ESC_PHY_CFG1_RMII_REFCLK_SEL_SET

#define ESC_PHY_CFG1_RMII_REFCLK_SEL_SET ( x ) (((uint32_t)(x) << ESC_PHY_CFG1_RMII_REFCLK_SEL_SHIFT) & ESC_PHY_CFG1_RMII_REFCLK_SEL_MASK)

◆ ESC_PHY_CFG1_RMII_REFCLK_SEL_SHIFT

#define ESC_PHY_CFG1_RMII_REFCLK_SEL_SHIFT (8U)

◆ ESC_PHY_DATA_DATA_GET

#define ESC_PHY_DATA_DATA_GET ( x ) (((uint16_t)(x) & ESC_PHY_DATA_DATA_MASK) >> ESC_PHY_DATA_DATA_SHIFT)

◆ ESC_PHY_DATA_DATA_MASK

#define ESC_PHY_DATA_DATA_MASK (0xFFFFU)

◆ ESC_PHY_DATA_DATA_SET

#define ESC_PHY_DATA_DATA_SET ( x ) (((uint16_t)(x) << ESC_PHY_DATA_DATA_SHIFT) & ESC_PHY_DATA_DATA_MASK)

◆ ESC_PHY_DATA_DATA_SHIFT

#define ESC_PHY_DATA_DATA_SHIFT (0U)

◆ ESC_PHY_REG_ADDR_ADDR_GET

#define ESC_PHY_REG_ADDR_ADDR_GET ( x ) (((uint8_t)(x) & ESC_PHY_REG_ADDR_ADDR_MASK) >> ESC_PHY_REG_ADDR_ADDR_SHIFT)

◆ ESC_PHY_REG_ADDR_ADDR_MASK

#define ESC_PHY_REG_ADDR_ADDR_MASK (0x1FU)

◆ ESC_PHY_REG_ADDR_ADDR_SET

#define ESC_PHY_REG_ADDR_ADDR_SET ( x ) (((uint8_t)(x) << ESC_PHY_REG_ADDR_ADDR_SHIFT) & ESC_PHY_REG_ADDR_ADDR_MASK)

◆ ESC_PHY_REG_ADDR_ADDR_SHIFT

#define ESC_PHY_REG_ADDR_ADDR_SHIFT (0U)

◆ ESC_PHY_STAT_LPE_GET

#define ESC_PHY_STAT_LPE_GET ( x ) (((uint8_t)(x) & ESC_PHY_STAT_LPE_MASK) >> ESC_PHY_STAT_LPE_SHIFT)

◆ ESC_PHY_STAT_LPE_MASK

#define ESC_PHY_STAT_LPE_MASK (0x10U)

◆ ESC_PHY_STAT_LPE_SHIFT

#define ESC_PHY_STAT_LPE_SHIFT (4U)

◆ ESC_PHY_STAT_LS_GET

#define ESC_PHY_STAT_LS_GET ( x ) (((uint8_t)(x) & ESC_PHY_STAT_LS_MASK) >> ESC_PHY_STAT_LS_SHIFT)

◆ ESC_PHY_STAT_LS_MASK

#define ESC_PHY_STAT_LS_MASK (0x2U)

◆ ESC_PHY_STAT_LS_SHIFT

#define ESC_PHY_STAT_LS_SHIFT (1U)

◆ ESC_PHY_STAT_LSE_GET

#define ESC_PHY_STAT_LSE_GET ( x ) (((uint8_t)(x) & ESC_PHY_STAT_LSE_MASK) >> ESC_PHY_STAT_LSE_SHIFT)

◆ ESC_PHY_STAT_LSE_MASK

#define ESC_PHY_STAT_LSE_MASK (0x4U)

◆ ESC_PHY_STAT_LSE_SHIFT

#define ESC_PHY_STAT_LSE_SHIFT (2U)

◆ ESC_PHY_STAT_PCU_GET

#define ESC_PHY_STAT_PCU_GET ( x ) (((uint8_t)(x) & ESC_PHY_STAT_PCU_MASK) >> ESC_PHY_STAT_PCU_SHIFT)

◆ ESC_PHY_STAT_PCU_MASK

#define ESC_PHY_STAT_PCU_MASK (0x20U)

◆ ESC_PHY_STAT_PCU_SET

#define ESC_PHY_STAT_PCU_SET ( x ) (((uint8_t)(x) << ESC_PHY_STAT_PCU_SHIFT) & ESC_PHY_STAT_PCU_MASK)

◆ ESC_PHY_STAT_PCU_SHIFT

#define ESC_PHY_STAT_PCU_SHIFT (5U)

◆ ESC_PHY_STAT_PLS_GET

#define ESC_PHY_STAT_PLS_GET ( x ) (((uint8_t)(x) & ESC_PHY_STAT_PLS_MASK) >> ESC_PHY_STAT_PLS_SHIFT)

◆ ESC_PHY_STAT_PLS_MASK

#define ESC_PHY_STAT_PLS_MASK (0x1U)

◆ ESC_PHY_STAT_PLS_SHIFT

#define ESC_PHY_STAT_PLS_SHIFT (0U)

◆ ESC_PHY_STAT_PORT0

#define ESC_PHY_STAT_PORT0 (0UL)

◆ ESC_PHY_STAT_PORT1

#define ESC_PHY_STAT_PORT1 (1UL)

◆ ESC_PHY_STAT_PORT2

#define ESC_PHY_STAT_PORT2 (2UL)

◆ ESC_PHY_STAT_PORT3

#define ESC_PHY_STAT_PORT3 (3UL)

◆ ESC_PHY_STAT_RE_GET

#define ESC_PHY_STAT_RE_GET ( x ) (((uint8_t)(x) & ESC_PHY_STAT_RE_MASK) >> ESC_PHY_STAT_RE_SHIFT)

◆ ESC_PHY_STAT_RE_MASK

#define ESC_PHY_STAT_RE_MASK (0x8U)

◆ ESC_PHY_STAT_RE_SET

#define ESC_PHY_STAT_RE_SET ( x ) (((uint8_t)(x) << ESC_PHY_STAT_RE_SHIFT) & ESC_PHY_STAT_RE_MASK)

◆ ESC_PHY_STAT_RE_SHIFT

#define ESC_PHY_STAT_RE_SHIFT (3U)

◆ ESC_PHYSICAL_RW_OFFSET_OFFSET_GET

#define ESC_PHYSICAL_RW_OFFSET_OFFSET_GET ( x ) (((uint16_t)(x) & ESC_PHYSICAL_RW_OFFSET_OFFSET_MASK) >> ESC_PHYSICAL_RW_OFFSET_OFFSET_SHIFT)

◆ ESC_PHYSICAL_RW_OFFSET_OFFSET_MASK

#define ESC_PHYSICAL_RW_OFFSET_OFFSET_MASK (0xFFFFU)

◆ ESC_PHYSICAL_RW_OFFSET_OFFSET_SHIFT

#define ESC_PHYSICAL_RW_OFFSET_OFFSET_SHIFT (0U)

◆ ESC_PID_PID_GET

#define ESC_PID_PID_GET ( x ) (((uint64_t)(x) & ESC_PID_PID_MASK) >> ESC_PID_PID_SHIFT)

◆ ESC_PID_PID_MASK

#define ESC_PID_PID_MASK (0xFFFFFFFFFFFFFFFFULL)

◆ ESC_PID_PID_SHIFT

#define ESC_PID_PID_SHIFT (0U)

◆ ESC_PORT_DESC_PORT0_GET

#define ESC_PORT_DESC_PORT0_GET ( x ) (((uint8_t)(x) & ESC_PORT_DESC_PORT0_MASK) >> ESC_PORT_DESC_PORT0_SHIFT)

◆ ESC_PORT_DESC_PORT0_MASK

#define ESC_PORT_DESC_PORT0_MASK (0x3U)

◆ ESC_PORT_DESC_PORT0_SHIFT

#define ESC_PORT_DESC_PORT0_SHIFT (0U)

◆ ESC_PORT_DESC_PORT1_GET

#define ESC_PORT_DESC_PORT1_GET ( x ) (((uint8_t)(x) & ESC_PORT_DESC_PORT1_MASK) >> ESC_PORT_DESC_PORT1_SHIFT)

◆ ESC_PORT_DESC_PORT1_MASK

#define ESC_PORT_DESC_PORT1_MASK (0xCU)

◆ ESC_PORT_DESC_PORT1_SHIFT

#define ESC_PORT_DESC_PORT1_SHIFT (2U)

◆ ESC_PORT_DESC_PORT2_GET

#define ESC_PORT_DESC_PORT2_GET ( x ) (((uint8_t)(x) & ESC_PORT_DESC_PORT2_MASK) >> ESC_PORT_DESC_PORT2_SHIFT)

◆ ESC_PORT_DESC_PORT2_MASK

#define ESC_PORT_DESC_PORT2_MASK (0x30U)

◆ ESC_PORT_DESC_PORT2_SHIFT

#define ESC_PORT_DESC_PORT2_SHIFT (4U)

◆ ESC_PORT_DESC_PORT3_GET

#define ESC_PORT_DESC_PORT3_GET ( x ) (((uint8_t)(x) & ESC_PORT_DESC_PORT3_MASK) >> ESC_PORT_DESC_PORT3_SHIFT)

◆ ESC_PORT_DESC_PORT3_MASK

#define ESC_PORT_DESC_PORT3_MASK (0xC0U)

◆ ESC_PORT_DESC_PORT3_SHIFT

#define ESC_PORT_DESC_PORT3_SHIFT (6U)

◆ ESC_PULSE_LEN_LEN_GET

#define ESC_PULSE_LEN_LEN_GET ( x ) (((uint16_t)(x) & ESC_PULSE_LEN_LEN_MASK) >> ESC_PULSE_LEN_LEN_SHIFT)

◆ ESC_PULSE_LEN_LEN_MASK

#define ESC_PULSE_LEN_LEN_MASK (0xFFFFU)

◆ ESC_PULSE_LEN_LEN_SHIFT

#define ESC_PULSE_LEN_LEN_SHIFT (0U)

◆ ESC_RAM_SIZE_SIZE_GET

#define ESC_RAM_SIZE_SIZE_GET ( x ) (((uint8_t)(x) & ESC_RAM_SIZE_SIZE_MASK) >> ESC_RAM_SIZE_SIZE_SHIFT)

◆ ESC_RAM_SIZE_SIZE_MASK

#define ESC_RAM_SIZE_SIZE_MASK (0xFFU)

◆ ESC_RAM_SIZE_SIZE_SHIFT

#define ESC_RAM_SIZE_SIZE_SHIFT (0U)

◆ ESC_RCV_TIME_LM_LATCH_MODE_GET

#define ESC_RCV_TIME_LM_LATCH_MODE_GET ( x ) (((uint8_t)(x) & ESC_RCV_TIME_LM_LATCH_MODE_MASK) >> ESC_RCV_TIME_LM_LATCH_MODE_SHIFT)

◆ ESC_RCV_TIME_LM_LATCH_MODE_MASK

#define ESC_RCV_TIME_LM_LATCH_MODE_MASK (0x1U)

◆ ESC_RCV_TIME_LM_LATCH_MODE_SHIFT

#define ESC_RCV_TIME_LM_LATCH_MODE_SHIFT (0U)

◆ ESC_RCV_TIME_LT_GET

#define ESC_RCV_TIME_LT_GET ( x ) (((uint32_t)(x) & ESC_RCV_TIME_LT_MASK) >> ESC_RCV_TIME_LT_SHIFT)

◆ ESC_RCV_TIME_LT_MASK

#define ESC_RCV_TIME_LT_MASK (0xFFFFFF00UL)

◆ ESC_RCV_TIME_LT_SHIFT

#define ESC_RCV_TIME_LT_SHIFT (8U)

◆ ESC_RCV_TIME_PORT0

#define ESC_RCV_TIME_PORT0 (0UL)

◆ ESC_RCV_TIME_PORT1

#define ESC_RCV_TIME_PORT1 (1UL)

◆ ESC_RCV_TIME_PORT2

#define ESC_RCV_TIME_PORT2 (2UL)

◆ ESC_RCV_TIME_PORT3

#define ESC_RCV_TIME_PORT3 (3UL)

◆ ESC_RCV_TIME_REQ_GET

#define ESC_RCV_TIME_REQ_GET ( x ) (((uint32_t)(x) & ESC_RCV_TIME_REQ_MASK) >> ESC_RCV_TIME_REQ_SHIFT)

◆ ESC_RCV_TIME_REQ_MASK

#define ESC_RCV_TIME_REQ_MASK (0xFFU)

◆ ESC_RCV_TIME_REQ_SHIFT

#define ESC_RCV_TIME_REQ_SHIFT (0U)

◆ ESC_RCVT_ECAT_PU_LT_GET

#define ESC_RCVT_ECAT_PU_LT_GET ( x ) (((uint64_t)(x) & ESC_RCVT_ECAT_PU_LT_MASK) >> ESC_RCVT_ECAT_PU_LT_SHIFT)

◆ ESC_RCVT_ECAT_PU_LT_MASK

#define ESC_RCVT_ECAT_PU_LT_MASK (0xFFFFFFFFFFFFFFFFULL)

◆ ESC_RCVT_ECAT_PU_LT_SHIFT

#define ESC_RCVT_ECAT_PU_LT_SHIFT (0U)

◆ ESC_REG_WEN_EN_GET

#define ESC_REG_WEN_EN_GET ( x ) (((uint8_t)(x) & ESC_REG_WEN_EN_MASK) >> ESC_REG_WEN_EN_SHIFT)

◆ ESC_REG_WEN_EN_MASK

#define ESC_REG_WEN_EN_MASK (0x1U)

◆ ESC_REG_WEN_EN_SHIFT

#define ESC_REG_WEN_EN_SHIFT (0U)

◆ ESC_REG_WP_WP_GET

#define ESC_REG_WP_WP_GET ( x ) (((uint8_t)(x) & ESC_REG_WP_WP_MASK) >> ESC_REG_WP_WP_SHIFT)

◆ ESC_REG_WP_WP_MASK

#define ESC_REG_WP_WP_MASK (0x1U)

◆ ESC_REG_WP_WP_SHIFT

#define ESC_REG_WP_WP_SHIFT (0U)

◆ ESC_REVISION_X_GET

#define ESC_REVISION_X_GET ( x ) (((uint8_t)(x) & ESC_REVISION_X_MASK) >> ESC_REVISION_X_SHIFT)

◆ ESC_REVISION_X_MASK

#define ESC_REVISION_X_MASK (0xFFU)

◆ ESC_REVISION_X_SHIFT

#define ESC_REVISION_X_SHIFT (0U)

◆ ESC_RUN_LED_OVRD_EN_OVRD_GET

#define ESC_RUN_LED_OVRD_EN_OVRD_GET ( x ) (((uint8_t)(x) & ESC_RUN_LED_OVRD_EN_OVRD_MASK) >> ESC_RUN_LED_OVRD_EN_OVRD_SHIFT)

◆ ESC_RUN_LED_OVRD_EN_OVRD_MASK

#define ESC_RUN_LED_OVRD_EN_OVRD_MASK (0x10U)

◆ ESC_RUN_LED_OVRD_EN_OVRD_SET

#define ESC_RUN_LED_OVRD_EN_OVRD_SET ( x ) (((uint8_t)(x) << ESC_RUN_LED_OVRD_EN_OVRD_SHIFT) & ESC_RUN_LED_OVRD_EN_OVRD_MASK)

◆ ESC_RUN_LED_OVRD_EN_OVRD_SHIFT

#define ESC_RUN_LED_OVRD_EN_OVRD_SHIFT (4U)

◆ ESC_RUN_LED_OVRD_LED_CODE_GET

#define ESC_RUN_LED_OVRD_LED_CODE_GET ( x ) (((uint8_t)(x) & ESC_RUN_LED_OVRD_LED_CODE_MASK) >> ESC_RUN_LED_OVRD_LED_CODE_SHIFT)

◆ ESC_RUN_LED_OVRD_LED_CODE_MASK

#define ESC_RUN_LED_OVRD_LED_CODE_MASK (0xFU)

◆ ESC_RUN_LED_OVRD_LED_CODE_SET

#define ESC_RUN_LED_OVRD_LED_CODE_SET ( x ) (((uint8_t)(x) << ESC_RUN_LED_OVRD_LED_CODE_SHIFT) & ESC_RUN_LED_OVRD_LED_CODE_MASK)

◆ ESC_RUN_LED_OVRD_LED_CODE_SHIFT

#define ESC_RUN_LED_OVRD_LED_CODE_SHIFT (0U)

◆ ESC_RX_ERR_CNT_IVD_FRM_GET

#define ESC_RX_ERR_CNT_IVD_FRM_GET ( x ) (((uint16_t)(x) & ESC_RX_ERR_CNT_IVD_FRM_MASK) >> ESC_RX_ERR_CNT_IVD_FRM_SHIFT)

◆ ESC_RX_ERR_CNT_IVD_FRM_MASK

#define ESC_RX_ERR_CNT_IVD_FRM_MASK (0xFFU)

◆ ESC_RX_ERR_CNT_IVD_FRM_SHIFT

#define ESC_RX_ERR_CNT_IVD_FRM_SHIFT (0U)

◆ ESC_RX_ERR_CNT_PORT0

#define ESC_RX_ERR_CNT_PORT0 (0UL)

◆ ESC_RX_ERR_CNT_PORT1

#define ESC_RX_ERR_CNT_PORT1 (1UL)

◆ ESC_RX_ERR_CNT_PORT2

#define ESC_RX_ERR_CNT_PORT2 (2UL)

◆ ESC_RX_ERR_CNT_PORT3

#define ESC_RX_ERR_CNT_PORT3 (3UL)

◆ ESC_RX_ERR_CNT_RX_ERR_GET

#define ESC_RX_ERR_CNT_RX_ERR_GET ( x ) (((uint16_t)(x) & ESC_RX_ERR_CNT_RX_ERR_MASK) >> ESC_RX_ERR_CNT_RX_ERR_SHIFT)

◆ ESC_RX_ERR_CNT_RX_ERR_MASK

#define ESC_RX_ERR_CNT_RX_ERR_MASK (0xFF00U)

◆ ESC_RX_ERR_CNT_RX_ERR_SHIFT

#define ESC_RX_ERR_CNT_RX_ERR_SHIFT (8U)

◆ ESC_SPD_CNT_DIFF_DIFF_GET

#define ESC_SPD_CNT_DIFF_DIFF_GET ( x ) (((uint16_t)(x) & ESC_SPD_CNT_DIFF_DIFF_MASK) >> ESC_SPD_CNT_DIFF_DIFF_SHIFT)

◆ ESC_SPD_CNT_DIFF_DIFF_MASK

#define ESC_SPD_CNT_DIFF_DIFF_MASK (0xFFFFU)

◆ ESC_SPD_CNT_DIFF_DIFF_SHIFT

#define ESC_SPD_CNT_DIFF_DIFF_SHIFT (0U)

◆ ESC_SPD_CNT_FD_DEPTH_GET

#define ESC_SPD_CNT_FD_DEPTH_GET ( x ) (((uint8_t)(x) & ESC_SPD_CNT_FD_DEPTH_MASK) >> ESC_SPD_CNT_FD_DEPTH_SHIFT)

◆ ESC_SPD_CNT_FD_DEPTH_MASK

#define ESC_SPD_CNT_FD_DEPTH_MASK (0xFU)

◆ ESC_SPD_CNT_FD_DEPTH_SET

#define ESC_SPD_CNT_FD_DEPTH_SET ( x ) (((uint8_t)(x) << ESC_SPD_CNT_FD_DEPTH_SHIFT) & ESC_SPD_CNT_FD_DEPTH_MASK)

◆ ESC_SPD_CNT_FD_DEPTH_SHIFT

#define ESC_SPD_CNT_FD_DEPTH_SHIFT (0U)

◆ ESC_SPD_CNT_START_BW_GET

#define ESC_SPD_CNT_START_BW_GET ( x ) (((uint16_t)(x) & ESC_SPD_CNT_START_BW_MASK) >> ESC_SPD_CNT_START_BW_SHIFT)

◆ ESC_SPD_CNT_START_BW_MASK

#define ESC_SPD_CNT_START_BW_MASK (0x7FFFU)

◆ ESC_SPD_CNT_START_BW_SET

#define ESC_SPD_CNT_START_BW_SET ( x ) (((uint16_t)(x) << ESC_SPD_CNT_START_BW_SHIFT) & ESC_SPD_CNT_START_BW_MASK)

◆ ESC_SPD_CNT_START_BW_SHIFT

#define ESC_SPD_CNT_START_BW_SHIFT (0U)

◆ ESC_START_TIME_CO_ST_GET

#define ESC_START_TIME_CO_ST_GET ( x ) (((uint64_t)(x) & ESC_START_TIME_CO_ST_MASK) >> ESC_START_TIME_CO_ST_SHIFT)

◆ ESC_START_TIME_CO_ST_MASK

#define ESC_START_TIME_CO_ST_MASK (0xFFFFFFFFFFFFFFFFULL)

◆ ESC_START_TIME_CO_ST_SET

#define ESC_START_TIME_CO_ST_SET ( x ) (((uint64_t)(x) << ESC_START_TIME_CO_ST_SHIFT) & ESC_START_TIME_CO_ST_MASK)

◆ ESC_START_TIME_CO_ST_SHIFT

#define ESC_START_TIME_CO_ST_SHIFT (0U)

◆ ESC_STATION_ADDR_ADDR_GET

#define ESC_STATION_ADDR_ADDR_GET ( x ) (((uint16_t)(x) & ESC_STATION_ADDR_ADDR_MASK) >> ESC_STATION_ADDR_ADDR_SHIFT)

◆ ESC_STATION_ADDR_ADDR_MASK

#define ESC_STATION_ADDR_ADDR_MASK (0xFFFFU)

◆ ESC_STATION_ADDR_ADDR_SHIFT

#define ESC_STATION_ADDR_ADDR_SHIFT (0U)

◆ ESC_STATION_ALS_ADDR_GET

#define ESC_STATION_ALS_ADDR_GET ( x ) (((uint16_t)(x) & ESC_STATION_ALS_ADDR_MASK) >> ESC_STATION_ALS_ADDR_SHIFT)

◆ ESC_STATION_ALS_ADDR_MASK

#define ESC_STATION_ALS_ADDR_MASK (0xFFFFU)

◆ ESC_STATION_ALS_ADDR_SET

#define ESC_STATION_ALS_ADDR_SET ( x ) (((uint16_t)(x) << ESC_STATION_ALS_ADDR_SHIFT) & ESC_STATION_ALS_ADDR_MASK)

◆ ESC_STATION_ALS_ADDR_SHIFT

#define ESC_STATION_ALS_ADDR_SHIFT (0U)

◆ ESC_SYNC0_CYC_TIME_CYC_GET

#define ESC_SYNC0_CYC_TIME_CYC_GET ( x ) (((uint32_t)(x) & ESC_SYNC0_CYC_TIME_CYC_MASK) >> ESC_SYNC0_CYC_TIME_CYC_SHIFT)

◆ ESC_SYNC0_CYC_TIME_CYC_MASK

#define ESC_SYNC0_CYC_TIME_CYC_MASK (0xFFFFFFFFUL)

◆ ESC_SYNC0_CYC_TIME_CYC_SET

#define ESC_SYNC0_CYC_TIME_CYC_SET ( x ) (((uint32_t)(x) << ESC_SYNC0_CYC_TIME_CYC_SHIFT) & ESC_SYNC0_CYC_TIME_CYC_MASK)

◆ ESC_SYNC0_CYC_TIME_CYC_SHIFT

#define ESC_SYNC0_CYC_TIME_CYC_SHIFT (0U)

◆ ESC_SYNC0_STAT_ACK_GET

#define ESC_SYNC0_STAT_ACK_GET ( x ) (((uint8_t)(x) & ESC_SYNC0_STAT_ACK_MASK) >> ESC_SYNC0_STAT_ACK_SHIFT)

◆ ESC_SYNC0_STAT_ACK_MASK

#define ESC_SYNC0_STAT_ACK_MASK (0x1U)

◆ ESC_SYNC0_STAT_ACK_SET

#define ESC_SYNC0_STAT_ACK_SET ( x ) (((uint8_t)(x) << ESC_SYNC0_STAT_ACK_SHIFT) & ESC_SYNC0_STAT_ACK_MASK)

◆ ESC_SYNC0_STAT_ACK_SHIFT

#define ESC_SYNC0_STAT_ACK_SHIFT (0U)

◆ ESC_SYNC1_CYC_TIME_CYC_GET

#define ESC_SYNC1_CYC_TIME_CYC_GET ( x ) (((uint32_t)(x) & ESC_SYNC1_CYC_TIME_CYC_MASK) >> ESC_SYNC1_CYC_TIME_CYC_SHIFT)

◆ ESC_SYNC1_CYC_TIME_CYC_MASK

#define ESC_SYNC1_CYC_TIME_CYC_MASK (0xFFFFFFFFUL)

◆ ESC_SYNC1_CYC_TIME_CYC_SET

#define ESC_SYNC1_CYC_TIME_CYC_SET ( x ) (((uint32_t)(x) << ESC_SYNC1_CYC_TIME_CYC_SHIFT) & ESC_SYNC1_CYC_TIME_CYC_MASK)

◆ ESC_SYNC1_CYC_TIME_CYC_SHIFT

#define ESC_SYNC1_CYC_TIME_CYC_SHIFT (0U)

◆ ESC_SYNC1_STAT_ACK_GET

#define ESC_SYNC1_STAT_ACK_GET ( x ) (((uint8_t)(x) & ESC_SYNC1_STAT_ACK_MASK) >> ESC_SYNC1_STAT_ACK_SHIFT)

◆ ESC_SYNC1_STAT_ACK_MASK

#define ESC_SYNC1_STAT_ACK_MASK (0x1U)

◆ ESC_SYNC1_STAT_ACK_SET

#define ESC_SYNC1_STAT_ACK_SET ( x ) (((uint8_t)(x) << ESC_SYNC1_STAT_ACK_SHIFT) & ESC_SYNC1_STAT_ACK_MASK)

◆ ESC_SYNC1_STAT_ACK_SHIFT

#define ESC_SYNC1_STAT_ACK_SHIFT (0U)

◆ ESC_SYNCM_0

#define ESC_SYNCM_0 (0UL)

◆ ESC_SYNCM_1

#define ESC_SYNCM_1 (1UL)

◆ ESC_SYNCM_2

#define ESC_SYNCM_2 (2UL)

◆ ESC_SYNCM_3

#define ESC_SYNCM_3 (3UL)

◆ ESC_SYNCM_4

#define ESC_SYNCM_4 (4UL)

◆ ESC_SYNCM_5

#define ESC_SYNCM_5 (5UL)

◆ ESC_SYNCM_6

#define ESC_SYNCM_6 (6UL)

◆ ESC_SYNCM_7

#define ESC_SYNCM_7 (7UL)

◆ ESC_SYNCM_ACTIVATE_EN_GET

#define ESC_SYNCM_ACTIVATE_EN_GET ( x ) (((uint8_t)(x) & ESC_SYNCM_ACTIVATE_EN_MASK) >> ESC_SYNCM_ACTIVATE_EN_SHIFT)

◆ ESC_SYNCM_ACTIVATE_EN_MASK

#define ESC_SYNCM_ACTIVATE_EN_MASK (0x1U)

◆ ESC_SYNCM_ACTIVATE_EN_SET

#define ESC_SYNCM_ACTIVATE_EN_SET ( x ) (((uint8_t)(x) << ESC_SYNCM_ACTIVATE_EN_SHIFT) & ESC_SYNCM_ACTIVATE_EN_MASK)

◆ ESC_SYNCM_ACTIVATE_EN_SHIFT

#define ESC_SYNCM_ACTIVATE_EN_SHIFT (0U)

◆ ESC_SYNCM_ACTIVATE_LATCH_ECAT_GET

#define ESC_SYNCM_ACTIVATE_LATCH_ECAT_GET ( x ) (((uint8_t)(x) & ESC_SYNCM_ACTIVATE_LATCH_ECAT_MASK) >> ESC_SYNCM_ACTIVATE_LATCH_ECAT_SHIFT)

◆ ESC_SYNCM_ACTIVATE_LATCH_ECAT_MASK

#define ESC_SYNCM_ACTIVATE_LATCH_ECAT_MASK (0x40U)

◆ ESC_SYNCM_ACTIVATE_LATCH_ECAT_SHIFT

#define ESC_SYNCM_ACTIVATE_LATCH_ECAT_SHIFT (6U)

◆ ESC_SYNCM_ACTIVATE_LATCH_PDI_GET

#define ESC_SYNCM_ACTIVATE_LATCH_PDI_GET ( x ) (((uint8_t)(x) & ESC_SYNCM_ACTIVATE_LATCH_PDI_MASK) >> ESC_SYNCM_ACTIVATE_LATCH_PDI_SHIFT)

◆ ESC_SYNCM_ACTIVATE_LATCH_PDI_MASK

#define ESC_SYNCM_ACTIVATE_LATCH_PDI_MASK (0x80U)

◆ ESC_SYNCM_ACTIVATE_LATCH_PDI_SHIFT

#define ESC_SYNCM_ACTIVATE_LATCH_PDI_SHIFT (7U)

◆ ESC_SYNCM_ACTIVATE_REPEAT_GET

#define ESC_SYNCM_ACTIVATE_REPEAT_GET ( x ) (((uint8_t)(x) & ESC_SYNCM_ACTIVATE_REPEAT_MASK) >> ESC_SYNCM_ACTIVATE_REPEAT_SHIFT)

◆ ESC_SYNCM_ACTIVATE_REPEAT_MASK

#define ESC_SYNCM_ACTIVATE_REPEAT_MASK (0x2U)

◆ ESC_SYNCM_ACTIVATE_REPEAT_SHIFT

#define ESC_SYNCM_ACTIVATE_REPEAT_SHIFT (1U)

◆ ESC_SYNCM_CONTROL_DIR_GET

#define ESC_SYNCM_CONTROL_DIR_GET ( x ) (((uint8_t)(x) & ESC_SYNCM_CONTROL_DIR_MASK) >> ESC_SYNCM_CONTROL_DIR_SHIFT)

◆ ESC_SYNCM_CONTROL_DIR_MASK

#define ESC_SYNCM_CONTROL_DIR_MASK (0xCU)

◆ ESC_SYNCM_CONTROL_DIR_SHIFT

#define ESC_SYNCM_CONTROL_DIR_SHIFT (2U)

◆ ESC_SYNCM_CONTROL_INT_AL_GET

#define ESC_SYNCM_CONTROL_INT_AL_GET ( x ) (((uint8_t)(x) & ESC_SYNCM_CONTROL_INT_AL_MASK) >> ESC_SYNCM_CONTROL_INT_AL_SHIFT)

◆ ESC_SYNCM_CONTROL_INT_AL_MASK

#define ESC_SYNCM_CONTROL_INT_AL_MASK (0x20U)

◆ ESC_SYNCM_CONTROL_INT_AL_SHIFT

#define ESC_SYNCM_CONTROL_INT_AL_SHIFT (5U)

◆ ESC_SYNCM_CONTROL_INT_ECAT_GET

#define ESC_SYNCM_CONTROL_INT_ECAT_GET ( x ) (((uint8_t)(x) & ESC_SYNCM_CONTROL_INT_ECAT_MASK) >> ESC_SYNCM_CONTROL_INT_ECAT_SHIFT)

◆ ESC_SYNCM_CONTROL_INT_ECAT_MASK

#define ESC_SYNCM_CONTROL_INT_ECAT_MASK (0x10U)

◆ ESC_SYNCM_CONTROL_INT_ECAT_SHIFT

#define ESC_SYNCM_CONTROL_INT_ECAT_SHIFT (4U)

◆ ESC_SYNCM_CONTROL_OP_MODE_GET

#define ESC_SYNCM_CONTROL_OP_MODE_GET ( x ) (((uint8_t)(x) & ESC_SYNCM_CONTROL_OP_MODE_MASK) >> ESC_SYNCM_CONTROL_OP_MODE_SHIFT)

◆ ESC_SYNCM_CONTROL_OP_MODE_MASK

#define ESC_SYNCM_CONTROL_OP_MODE_MASK (0x3U)

◆ ESC_SYNCM_CONTROL_OP_MODE_SHIFT

#define ESC_SYNCM_CONTROL_OP_MODE_SHIFT (0U)

◆ ESC_SYNCM_CONTROL_WDG_TRG_EN_GET

#define ESC_SYNCM_CONTROL_WDG_TRG_EN_GET ( x ) (((uint8_t)(x) & ESC_SYNCM_CONTROL_WDG_TRG_EN_MASK) >> ESC_SYNCM_CONTROL_WDG_TRG_EN_SHIFT)

◆ ESC_SYNCM_CONTROL_WDG_TRG_EN_MASK

#define ESC_SYNCM_CONTROL_WDG_TRG_EN_MASK (0x40U)

◆ ESC_SYNCM_CONTROL_WDG_TRG_EN_SHIFT

#define ESC_SYNCM_CONTROL_WDG_TRG_EN_SHIFT (6U)

◆ ESC_SYNCM_LENGTH_LEN_GET

#define ESC_SYNCM_LENGTH_LEN_GET ( x ) (((uint16_t)(x) & ESC_SYNCM_LENGTH_LEN_MASK) >> ESC_SYNCM_LENGTH_LEN_SHIFT)

◆ ESC_SYNCM_LENGTH_LEN_MASK

#define ESC_SYNCM_LENGTH_LEN_MASK (0xFFFFU)

◆ ESC_SYNCM_LENGTH_LEN_SHIFT

#define ESC_SYNCM_LENGTH_LEN_SHIFT (0U)

◆ ESC_SYNCM_NUM_NUM_GET

#define ESC_SYNCM_NUM_NUM_GET ( x ) (((uint8_t)(x) & ESC_SYNCM_NUM_NUM_MASK) >> ESC_SYNCM_NUM_NUM_SHIFT)

◆ ESC_SYNCM_NUM_NUM_MASK

#define ESC_SYNCM_NUM_NUM_MASK (0xFFU)

◆ ESC_SYNCM_NUM_NUM_SHIFT

#define ESC_SYNCM_NUM_NUM_SHIFT (0U)

◆ ESC_SYNCM_PDI_CTRL_DEACT_GET

#define ESC_SYNCM_PDI_CTRL_DEACT_GET ( x ) (((uint8_t)(x) & ESC_SYNCM_PDI_CTRL_DEACT_MASK) >> ESC_SYNCM_PDI_CTRL_DEACT_SHIFT)

◆ ESC_SYNCM_PDI_CTRL_DEACT_MASK

#define ESC_SYNCM_PDI_CTRL_DEACT_MASK (0x1U)

◆ ESC_SYNCM_PDI_CTRL_DEACT_SET

#define ESC_SYNCM_PDI_CTRL_DEACT_SET ( x ) (((uint8_t)(x) << ESC_SYNCM_PDI_CTRL_DEACT_SHIFT) & ESC_SYNCM_PDI_CTRL_DEACT_MASK)

◆ ESC_SYNCM_PDI_CTRL_DEACT_SHIFT

#define ESC_SYNCM_PDI_CTRL_DEACT_SHIFT (0U)

◆ ESC_SYNCM_PDI_CTRL_REPEAT_ACK_GET

#define ESC_SYNCM_PDI_CTRL_REPEAT_ACK_GET ( x ) (((uint8_t)(x) & ESC_SYNCM_PDI_CTRL_REPEAT_ACK_MASK) >> ESC_SYNCM_PDI_CTRL_REPEAT_ACK_SHIFT)

◆ ESC_SYNCM_PDI_CTRL_REPEAT_ACK_MASK

#define ESC_SYNCM_PDI_CTRL_REPEAT_ACK_MASK (0x2U)

◆ ESC_SYNCM_PDI_CTRL_REPEAT_ACK_SET

#define ESC_SYNCM_PDI_CTRL_REPEAT_ACK_SET ( x ) (((uint8_t)(x) << ESC_SYNCM_PDI_CTRL_REPEAT_ACK_SHIFT) & ESC_SYNCM_PDI_CTRL_REPEAT_ACK_MASK)

◆ ESC_SYNCM_PDI_CTRL_REPEAT_ACK_SHIFT

#define ESC_SYNCM_PDI_CTRL_REPEAT_ACK_SHIFT (1U)

◆ ESC_SYNCM_PHYSICAL_START_ADDR_ADDR_GET

#define ESC_SYNCM_PHYSICAL_START_ADDR_ADDR_GET ( x ) (((uint16_t)(x) & ESC_SYNCM_PHYSICAL_START_ADDR_ADDR_MASK) >> ESC_SYNCM_PHYSICAL_START_ADDR_ADDR_SHIFT)

◆ ESC_SYNCM_PHYSICAL_START_ADDR_ADDR_MASK

#define ESC_SYNCM_PHYSICAL_START_ADDR_ADDR_MASK (0xFFFFU)

◆ ESC_SYNCM_PHYSICAL_START_ADDR_ADDR_SHIFT

#define ESC_SYNCM_PHYSICAL_START_ADDR_ADDR_SHIFT (0U)

◆ ESC_SYNCM_STATUS_BUF_MODE_GET

#define ESC_SYNCM_STATUS_BUF_MODE_GET ( x ) (((uint8_t)(x) & ESC_SYNCM_STATUS_BUF_MODE_MASK) >> ESC_SYNCM_STATUS_BUF_MODE_SHIFT)

◆ ESC_SYNCM_STATUS_BUF_MODE_MASK

#define ESC_SYNCM_STATUS_BUF_MODE_MASK (0x30U)

◆ ESC_SYNCM_STATUS_BUF_MODE_SHIFT

#define ESC_SYNCM_STATUS_BUF_MODE_SHIFT (4U)

◆ ESC_SYNCM_STATUS_INT_RD_GET

#define ESC_SYNCM_STATUS_INT_RD_GET ( x ) (((uint8_t)(x) & ESC_SYNCM_STATUS_INT_RD_MASK) >> ESC_SYNCM_STATUS_INT_RD_SHIFT)

◆ ESC_SYNCM_STATUS_INT_RD_MASK

#define ESC_SYNCM_STATUS_INT_RD_MASK (0x2U)

◆ ESC_SYNCM_STATUS_INT_RD_SHIFT

#define ESC_SYNCM_STATUS_INT_RD_SHIFT (1U)

◆ ESC_SYNCM_STATUS_INT_WR_GET

#define ESC_SYNCM_STATUS_INT_WR_GET ( x ) (((uint8_t)(x) & ESC_SYNCM_STATUS_INT_WR_MASK) >> ESC_SYNCM_STATUS_INT_WR_SHIFT)

◆ ESC_SYNCM_STATUS_INT_WR_MASK

#define ESC_SYNCM_STATUS_INT_WR_MASK (0x1U)

◆ ESC_SYNCM_STATUS_INT_WR_SHIFT

#define ESC_SYNCM_STATUS_INT_WR_SHIFT (0U)

◆ ESC_SYNCM_STATUS_MBX_MODE_GET

#define ESC_SYNCM_STATUS_MBX_MODE_GET ( x ) (((uint8_t)(x) & ESC_SYNCM_STATUS_MBX_MODE_MASK) >> ESC_SYNCM_STATUS_MBX_MODE_SHIFT)

◆ ESC_SYNCM_STATUS_MBX_MODE_MASK

#define ESC_SYNCM_STATUS_MBX_MODE_MASK (0x8U)

◆ ESC_SYNCM_STATUS_MBX_MODE_SHIFT

#define ESC_SYNCM_STATUS_MBX_MODE_SHIFT (3U)

◆ ESC_SYNCM_STATUS_RB_INUSE_GET

#define ESC_SYNCM_STATUS_RB_INUSE_GET ( x ) (((uint8_t)(x) & ESC_SYNCM_STATUS_RB_INUSE_MASK) >> ESC_SYNCM_STATUS_RB_INUSE_SHIFT)

◆ ESC_SYNCM_STATUS_RB_INUSE_MASK

#define ESC_SYNCM_STATUS_RB_INUSE_MASK (0x40U)

◆ ESC_SYNCM_STATUS_RB_INUSE_SHIFT

#define ESC_SYNCM_STATUS_RB_INUSE_SHIFT (6U)

◆ ESC_SYNCM_STATUS_WB_INUSE_GET

#define ESC_SYNCM_STATUS_WB_INUSE_GET ( x ) (((uint8_t)(x) & ESC_SYNCM_STATUS_WB_INUSE_MASK) >> ESC_SYNCM_STATUS_WB_INUSE_SHIFT)

◆ ESC_SYNCM_STATUS_WB_INUSE_MASK

#define ESC_SYNCM_STATUS_WB_INUSE_MASK (0x80U)

◆ ESC_SYNCM_STATUS_WB_INUSE_SHIFT

#define ESC_SYNCM_STATUS_WB_INUSE_SHIFT (7U)

◆ ESC_SYNCO_ACT_AC_GET

#define ESC_SYNCO_ACT_AC_GET ( x ) (((uint8_t)(x) & ESC_SYNCO_ACT_AC_MASK) >> ESC_SYNCO_ACT_AC_SHIFT)

◆ ESC_SYNCO_ACT_AC_MASK

#define ESC_SYNCO_ACT_AC_MASK (0x8U)

◆ ESC_SYNCO_ACT_AC_SET

#define ESC_SYNCO_ACT_AC_SET ( x ) (((uint8_t)(x) << ESC_SYNCO_ACT_AC_SHIFT) & ESC_SYNCO_ACT_AC_MASK)

◆ ESC_SYNCO_ACT_AC_SHIFT

#define ESC_SYNCO_ACT_AC_SHIFT (3U)

◆ ESC_SYNCO_ACT_EXT_GET

#define ESC_SYNCO_ACT_EXT_GET ( x ) (((uint8_t)(x) & ESC_SYNCO_ACT_EXT_MASK) >> ESC_SYNCO_ACT_EXT_SHIFT)

◆ ESC_SYNCO_ACT_EXT_MASK

#define ESC_SYNCO_ACT_EXT_MASK (0x10U)

◆ ESC_SYNCO_ACT_EXT_SET

#define ESC_SYNCO_ACT_EXT_SET ( x ) (((uint8_t)(x) << ESC_SYNCO_ACT_EXT_SHIFT) & ESC_SYNCO_ACT_EXT_MASK)

◆ ESC_SYNCO_ACT_EXT_SHIFT

#define ESC_SYNCO_ACT_EXT_SHIFT (4U)

◆ ESC_SYNCO_ACT_NFC_GET

#define ESC_SYNCO_ACT_NFC_GET ( x ) (((uint8_t)(x) & ESC_SYNCO_ACT_NFC_MASK) >> ESC_SYNCO_ACT_NFC_SHIFT)

◆ ESC_SYNCO_ACT_NFC_MASK

#define ESC_SYNCO_ACT_NFC_MASK (0x40U)

◆ ESC_SYNCO_ACT_NFC_SET

#define ESC_SYNCO_ACT_NFC_SET ( x ) (((uint8_t)(x) << ESC_SYNCO_ACT_NFC_SHIFT) & ESC_SYNCO_ACT_NFC_MASK)

◆ ESC_SYNCO_ACT_NFC_SHIFT

#define ESC_SYNCO_ACT_NFC_SHIFT (6U)

◆ ESC_SYNCO_ACT_SOUA_GET

#define ESC_SYNCO_ACT_SOUA_GET ( x ) (((uint8_t)(x) & ESC_SYNCO_ACT_SOUA_MASK) >> ESC_SYNCO_ACT_SOUA_SHIFT)

◆ ESC_SYNCO_ACT_SOUA_MASK

#define ESC_SYNCO_ACT_SOUA_MASK (0x1U)

◆ ESC_SYNCO_ACT_SOUA_SET

#define ESC_SYNCO_ACT_SOUA_SET ( x ) (((uint8_t)(x) << ESC_SYNCO_ACT_SOUA_SHIFT) & ESC_SYNCO_ACT_SOUA_MASK)

◆ ESC_SYNCO_ACT_SOUA_SHIFT

#define ESC_SYNCO_ACT_SOUA_SHIFT (0U)

◆ ESC_SYNCO_ACT_SSDP_GET

#define ESC_SYNCO_ACT_SSDP_GET ( x ) (((uint8_t)(x) & ESC_SYNCO_ACT_SSDP_MASK) >> ESC_SYNCO_ACT_SSDP_SHIFT)

◆ ESC_SYNCO_ACT_SSDP_MASK

#define ESC_SYNCO_ACT_SSDP_MASK (0x80U)

◆ ESC_SYNCO_ACT_SSDP_SET

#define ESC_SYNCO_ACT_SSDP_SET ( x ) (((uint8_t)(x) << ESC_SYNCO_ACT_SSDP_SHIFT) & ESC_SYNCO_ACT_SSDP_MASK)

◆ ESC_SYNCO_ACT_SSDP_SHIFT

#define ESC_SYNCO_ACT_SSDP_SHIFT (7U)

◆ ESC_SYNCO_ACT_STPC_GET

#define ESC_SYNCO_ACT_STPC_GET ( x ) (((uint8_t)(x) & ESC_SYNCO_ACT_STPC_MASK) >> ESC_SYNCO_ACT_STPC_SHIFT)

◆ ESC_SYNCO_ACT_STPC_MASK

#define ESC_SYNCO_ACT_STPC_MASK (0x20U)

◆ ESC_SYNCO_ACT_STPC_SET

#define ESC_SYNCO_ACT_STPC_SET ( x ) (((uint8_t)(x) << ESC_SYNCO_ACT_STPC_SHIFT) & ESC_SYNCO_ACT_STPC_MASK)

◆ ESC_SYNCO_ACT_STPC_SHIFT

#define ESC_SYNCO_ACT_STPC_SHIFT (5U)

◆ ESC_SYNCO_ACT_SYNC0_GEN_GET

#define ESC_SYNCO_ACT_SYNC0_GEN_GET ( x ) (((uint8_t)(x) & ESC_SYNCO_ACT_SYNC0_GEN_MASK) >> ESC_SYNCO_ACT_SYNC0_GEN_SHIFT)

◆ ESC_SYNCO_ACT_SYNC0_GEN_MASK

#define ESC_SYNCO_ACT_SYNC0_GEN_MASK (0x2U)

◆ ESC_SYNCO_ACT_SYNC0_GEN_SET

#define ESC_SYNCO_ACT_SYNC0_GEN_SET ( x ) (((uint8_t)(x) << ESC_SYNCO_ACT_SYNC0_GEN_SHIFT) & ESC_SYNCO_ACT_SYNC0_GEN_MASK)

◆ ESC_SYNCO_ACT_SYNC0_GEN_SHIFT

#define ESC_SYNCO_ACT_SYNC0_GEN_SHIFT (1U)

◆ ESC_SYNCO_ACT_SYNC1_GEN_GET

#define ESC_SYNCO_ACT_SYNC1_GEN_GET ( x ) (((uint8_t)(x) & ESC_SYNCO_ACT_SYNC1_GEN_MASK) >> ESC_SYNCO_ACT_SYNC1_GEN_SHIFT)

◆ ESC_SYNCO_ACT_SYNC1_GEN_MASK

#define ESC_SYNCO_ACT_SYNC1_GEN_MASK (0x4U)

◆ ESC_SYNCO_ACT_SYNC1_GEN_SET

#define ESC_SYNCO_ACT_SYNC1_GEN_SET ( x ) (((uint8_t)(x) << ESC_SYNCO_ACT_SYNC1_GEN_SHIFT) & ESC_SYNCO_ACT_SYNC1_GEN_MASK)

◆ ESC_SYNCO_ACT_SYNC1_GEN_SHIFT

#define ESC_SYNCO_ACT_SYNC1_GEN_SHIFT (2U)

◆ ESC_SYS_TIME_DELAY_DLY_GET

#define ESC_SYS_TIME_DELAY_DLY_GET ( x ) (((uint32_t)(x) & ESC_SYS_TIME_DELAY_DLY_MASK) >> ESC_SYS_TIME_DELAY_DLY_SHIFT)

◆ ESC_SYS_TIME_DELAY_DLY_MASK

#define ESC_SYS_TIME_DELAY_DLY_MASK (0xFFFFFFFFUL)

◆ ESC_SYS_TIME_DELAY_DLY_SET

#define ESC_SYS_TIME_DELAY_DLY_SET ( x ) (((uint32_t)(x) << ESC_SYS_TIME_DELAY_DLY_SHIFT) & ESC_SYS_TIME_DELAY_DLY_MASK)

◆ ESC_SYS_TIME_DELAY_DLY_SHIFT

#define ESC_SYS_TIME_DELAY_DLY_SHIFT (0U)

◆ ESC_SYS_TIME_DIFF_DIFF_GET

#define ESC_SYS_TIME_DIFF_DIFF_GET ( x ) (((uint32_t)(x) & ESC_SYS_TIME_DIFF_DIFF_MASK) >> ESC_SYS_TIME_DIFF_DIFF_SHIFT)

◆ ESC_SYS_TIME_DIFF_DIFF_MASK

#define ESC_SYS_TIME_DIFF_DIFF_MASK (0x80000000UL)

◆ ESC_SYS_TIME_DIFF_DIFF_SHIFT

#define ESC_SYS_TIME_DIFF_DIFF_SHIFT (31U)

◆ ESC_SYS_TIME_DIFF_FD_DEPTH_GET

#define ESC_SYS_TIME_DIFF_FD_DEPTH_GET ( x ) (((uint8_t)(x) & ESC_SYS_TIME_DIFF_FD_DEPTH_MASK) >> ESC_SYS_TIME_DIFF_FD_DEPTH_SHIFT)

◆ ESC_SYS_TIME_DIFF_FD_DEPTH_MASK

#define ESC_SYS_TIME_DIFF_FD_DEPTH_MASK (0xFU)

◆ ESC_SYS_TIME_DIFF_FD_DEPTH_SET

#define ESC_SYS_TIME_DIFF_FD_DEPTH_SET ( x ) (((uint8_t)(x) << ESC_SYS_TIME_DIFF_FD_DEPTH_SHIFT) & ESC_SYS_TIME_DIFF_FD_DEPTH_MASK)

◆ ESC_SYS_TIME_DIFF_FD_DEPTH_SHIFT

#define ESC_SYS_TIME_DIFF_FD_DEPTH_SHIFT (0U)

◆ ESC_SYS_TIME_DIFF_NUM_GET

#define ESC_SYS_TIME_DIFF_NUM_GET ( x ) (((uint32_t)(x) & ESC_SYS_TIME_DIFF_NUM_MASK) >> ESC_SYS_TIME_DIFF_NUM_SHIFT)

◆ ESC_SYS_TIME_DIFF_NUM_MASK

#define ESC_SYS_TIME_DIFF_NUM_MASK (0x7FFFFFFFUL)

◆ ESC_SYS_TIME_DIFF_NUM_SHIFT

#define ESC_SYS_TIME_DIFF_NUM_SHIFT (0U)

◆ ESC_SYS_TIME_OFFSET_OFFSET_GET

#define ESC_SYS_TIME_OFFSET_OFFSET_GET ( x ) (((uint64_t)(x) & ESC_SYS_TIME_OFFSET_OFFSET_MASK) >> ESC_SYS_TIME_OFFSET_OFFSET_SHIFT)

◆ ESC_SYS_TIME_OFFSET_OFFSET_MASK

#define ESC_SYS_TIME_OFFSET_OFFSET_MASK (0xFFFFFFFFFFFFFFFFULL)

◆ ESC_SYS_TIME_OFFSET_OFFSET_SET

#define ESC_SYS_TIME_OFFSET_OFFSET_SET ( x ) (((uint64_t)(x) << ESC_SYS_TIME_OFFSET_OFFSET_SHIFT) & ESC_SYS_TIME_OFFSET_OFFSET_MASK)

◆ ESC_SYS_TIME_OFFSET_OFFSET_SHIFT

#define ESC_SYS_TIME_OFFSET_OFFSET_SHIFT (0U)

◆ ESC_SYS_TIME_ST_GET

#define ESC_SYS_TIME_ST_GET ( x ) (((uint64_t)(x) & ESC_SYS_TIME_ST_MASK) >> ESC_SYS_TIME_ST_SHIFT)

◆ ESC_SYS_TIME_ST_MASK

#define ESC_SYS_TIME_ST_MASK (0xFFFFFFFFFFFFFFFFULL)

◆ ESC_SYS_TIME_ST_SET

#define ESC_SYS_TIME_ST_SET ( x ) (((uint64_t)(x) << ESC_SYS_TIME_ST_SHIFT) & ESC_SYS_TIME_ST_MASK)

◆ ESC_SYS_TIME_ST_SHIFT

#define ESC_SYS_TIME_ST_SHIFT (0U)

◆ ESC_TYPE_TYPE_GET

#define ESC_TYPE_TYPE_GET ( x ) (((uint8_t)(x) & ESC_TYPE_TYPE_MASK) >> ESC_TYPE_TYPE_SHIFT)

◆ ESC_TYPE_TYPE_MASK

#define ESC_TYPE_TYPE_MASK (0xFFU)

◆ ESC_TYPE_TYPE_SHIFT

#define ESC_TYPE_TYPE_SHIFT (0U)

◆ ESC_USER_RAM_BYTE0_EXTF_GET

#define ESC_USER_RAM_BYTE0_EXTF_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE0_EXTF_MASK) >> ESC_USER_RAM_BYTE0_EXTF_SHIFT)

◆ ESC_USER_RAM_BYTE0_EXTF_MASK

#define ESC_USER_RAM_BYTE0_EXTF_MASK (0xFFU)

◆ ESC_USER_RAM_BYTE0_EXTF_SET

#define ESC_USER_RAM_BYTE0_EXTF_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE0_EXTF_SHIFT) & ESC_USER_RAM_BYTE0_EXTF_MASK)

◆ ESC_USER_RAM_BYTE0_EXTF_SHIFT

#define ESC_USER_RAM_BYTE0_EXTF_SHIFT (0U)

◆ ESC_USER_RAM_BYTE10_APDI_GET

#define ESC_USER_RAM_BYTE10_APDI_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE10_APDI_MASK) >> ESC_USER_RAM_BYTE10_APDI_SHIFT)

◆ ESC_USER_RAM_BYTE10_APDI_MASK

#define ESC_USER_RAM_BYTE10_APDI_MASK (0x8U)

◆ ESC_USER_RAM_BYTE10_APDI_SET

#define ESC_USER_RAM_BYTE10_APDI_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE10_APDI_SHIFT) & ESC_USER_RAM_BYTE10_APDI_MASK)

◆ ESC_USER_RAM_BYTE10_APDI_SHIFT

#define ESC_USER_RAM_BYTE10_APDI_SHIFT (3U)

◆ ESC_USER_RAM_BYTE10_DCL1D_GET

#define ESC_USER_RAM_BYTE10_DCL1D_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE10_DCL1D_MASK) >> ESC_USER_RAM_BYTE10_DCL1D_SHIFT)

◆ ESC_USER_RAM_BYTE10_DCL1D_MASK

#define ESC_USER_RAM_BYTE10_DCL1D_MASK (0x4U)

◆ ESC_USER_RAM_BYTE10_DCL1D_SET

#define ESC_USER_RAM_BYTE10_DCL1D_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE10_DCL1D_SHIFT) & ESC_USER_RAM_BYTE10_DCL1D_MASK)

◆ ESC_USER_RAM_BYTE10_DCL1D_SHIFT

#define ESC_USER_RAM_BYTE10_DCL1D_SHIFT (2U)

◆ ESC_USER_RAM_BYTE10_PDIFA_GET

#define ESC_USER_RAM_BYTE10_PDIFA_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE10_PDIFA_MASK) >> ESC_USER_RAM_BYTE10_PDIFA_SHIFT)

◆ ESC_USER_RAM_BYTE10_PDIFA_MASK

#define ESC_USER_RAM_BYTE10_PDIFA_MASK (0x40U)

◆ ESC_USER_RAM_BYTE10_PDIFA_SET

#define ESC_USER_RAM_BYTE10_PDIFA_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE10_PDIFA_SHIFT) & ESC_USER_RAM_BYTE10_PDIFA_MASK)

◆ ESC_USER_RAM_BYTE10_PDIFA_SHIFT

#define ESC_USER_RAM_BYTE10_PDIFA_SHIFT (6U)

◆ ESC_USER_RAM_BYTE10_PDIIR_GET

#define ESC_USER_RAM_BYTE10_PDIIR_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE10_PDIIR_MASK) >> ESC_USER_RAM_BYTE10_PDIIR_SHIFT)

◆ ESC_USER_RAM_BYTE10_PDIIR_MASK

#define ESC_USER_RAM_BYTE10_PDIIR_MASK (0x80U)

◆ ESC_USER_RAM_BYTE10_PDIIR_SET

#define ESC_USER_RAM_BYTE10_PDIIR_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE10_PDIIR_SHIFT) & ESC_USER_RAM_BYTE10_PDIIR_MASK)

◆ ESC_USER_RAM_BYTE10_PDIIR_SHIFT

#define ESC_USER_RAM_BYTE10_PDIIR_SHIFT (7U)

◆ ESC_USER_RAM_BYTE11_LEDTST_GET

#define ESC_USER_RAM_BYTE11_LEDTST_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE11_LEDTST_MASK) >> ESC_USER_RAM_BYTE11_LEDTST_SHIFT)

◆ ESC_USER_RAM_BYTE11_LEDTST_MASK

#define ESC_USER_RAM_BYTE11_LEDTST_MASK (0x8U)

◆ ESC_USER_RAM_BYTE11_LEDTST_SET

#define ESC_USER_RAM_BYTE11_LEDTST_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE11_LEDTST_SHIFT) & ESC_USER_RAM_BYTE11_LEDTST_MASK)

◆ ESC_USER_RAM_BYTE11_LEDTST_SHIFT

#define ESC_USER_RAM_BYTE11_LEDTST_SHIFT (3U)

◆ ESC_USER_RAM_BYTE14_DIOBS_GET

#define ESC_USER_RAM_BYTE14_DIOBS_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE14_DIOBS_MASK) >> ESC_USER_RAM_BYTE14_DIOBS_SHIFT)

◆ ESC_USER_RAM_BYTE14_DIOBS_MASK

#define ESC_USER_RAM_BYTE14_DIOBS_MASK (0xC0U)

◆ ESC_USER_RAM_BYTE14_DIOBS_SET

#define ESC_USER_RAM_BYTE14_DIOBS_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE14_DIOBS_SHIFT) & ESC_USER_RAM_BYTE14_DIOBS_MASK)

◆ ESC_USER_RAM_BYTE14_DIOBS_SHIFT

#define ESC_USER_RAM_BYTE14_DIOBS_SHIFT (6U)

◆ ESC_USER_RAM_BYTE15_AUCPDI_GET

#define ESC_USER_RAM_BYTE15_AUCPDI_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE15_AUCPDI_MASK) >> ESC_USER_RAM_BYTE15_AUCPDI_SHIFT)

◆ ESC_USER_RAM_BYTE15_AUCPDI_MASK

#define ESC_USER_RAM_BYTE15_AUCPDI_MASK (0x10U)

◆ ESC_USER_RAM_BYTE15_AUCPDI_SET

#define ESC_USER_RAM_BYTE15_AUCPDI_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE15_AUCPDI_SHIFT) & ESC_USER_RAM_BYTE15_AUCPDI_MASK)

◆ ESC_USER_RAM_BYTE15_AUCPDI_SHIFT

#define ESC_USER_RAM_BYTE15_AUCPDI_SHIFT (4U)

◆ ESC_USER_RAM_BYTE15_DIOPDI_GET

#define ESC_USER_RAM_BYTE15_DIOPDI_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE15_DIOPDI_MASK) >> ESC_USER_RAM_BYTE15_DIOPDI_SHIFT)

◆ ESC_USER_RAM_BYTE15_DIOPDI_MASK

#define ESC_USER_RAM_BYTE15_DIOPDI_MASK (0x4U)

◆ ESC_USER_RAM_BYTE15_DIOPDI_SET

#define ESC_USER_RAM_BYTE15_DIOPDI_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE15_DIOPDI_SHIFT) & ESC_USER_RAM_BYTE15_DIOPDI_MASK)

◆ ESC_USER_RAM_BYTE15_DIOPDI_SHIFT

#define ESC_USER_RAM_BYTE15_DIOPDI_SHIFT (2U)

◆ ESC_USER_RAM_BYTE15_SSPDI_GET

#define ESC_USER_RAM_BYTE15_SSPDI_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE15_SSPDI_MASK) >> ESC_USER_RAM_BYTE15_SSPDI_SHIFT)

◆ ESC_USER_RAM_BYTE15_SSPDI_MASK

#define ESC_USER_RAM_BYTE15_SSPDI_MASK (0x8U)

◆ ESC_USER_RAM_BYTE15_SSPDI_SET

#define ESC_USER_RAM_BYTE15_SSPDI_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE15_SSPDI_SHIFT) & ESC_USER_RAM_BYTE15_SSPDI_MASK)

◆ ESC_USER_RAM_BYTE15_SSPDI_SHIFT

#define ESC_USER_RAM_BYTE15_SSPDI_SHIFT (3U)

◆ ESC_USER_RAM_BYTE19_CIA_GET

#define ESC_USER_RAM_BYTE19_CIA_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE19_CIA_MASK) >> ESC_USER_RAM_BYTE19_CIA_SHIFT)

◆ ESC_USER_RAM_BYTE19_CIA_MASK

#define ESC_USER_RAM_BYTE19_CIA_MASK (0x4U)

◆ ESC_USER_RAM_BYTE19_CIA_SET

#define ESC_USER_RAM_BYTE19_CIA_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE19_CIA_SHIFT) & ESC_USER_RAM_BYTE19_CIA_MASK)

◆ ESC_USER_RAM_BYTE19_CIA_SHIFT

#define ESC_USER_RAM_BYTE19_CIA_SHIFT (2U)

◆ ESC_USER_RAM_BYTE19_IPARO_GET

#define ESC_USER_RAM_BYTE19_IPARO_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE19_IPARO_MASK) >> ESC_USER_RAM_BYTE19_IPARO_SHIFT)

◆ ESC_USER_RAM_BYTE19_IPARO_MASK

#define ESC_USER_RAM_BYTE19_IPARO_MASK (0x2U)

◆ ESC_USER_RAM_BYTE19_IPARO_SET

#define ESC_USER_RAM_BYTE19_IPARO_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE19_IPARO_SHIFT) & ESC_USER_RAM_BYTE19_IPARO_MASK)

◆ ESC_USER_RAM_BYTE19_IPARO_SHIFT

#define ESC_USER_RAM_BYTE19_IPARO_SHIFT (1U)

◆ ESC_USER_RAM_BYTE19_RGMII_GET

#define ESC_USER_RAM_BYTE19_RGMII_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE19_RGMII_MASK) >> ESC_USER_RAM_BYTE19_RGMII_SHIFT)

◆ ESC_USER_RAM_BYTE19_RGMII_MASK

#define ESC_USER_RAM_BYTE19_RGMII_MASK (0x1U)

◆ ESC_USER_RAM_BYTE19_RGMII_SET

#define ESC_USER_RAM_BYTE19_RGMII_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE19_RGMII_SHIFT) & ESC_USER_RAM_BYTE19_RGMII_MASK)

◆ ESC_USER_RAM_BYTE19_RGMII_SHIFT

#define ESC_USER_RAM_BYTE19_RGMII_SHIFT (0U)

◆ ESC_USER_RAM_BYTE19_RMII_GET

#define ESC_USER_RAM_BYTE19_RMII_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE19_RMII_MASK) >> ESC_USER_RAM_BYTE19_RMII_SHIFT)

◆ ESC_USER_RAM_BYTE19_RMII_MASK

#define ESC_USER_RAM_BYTE19_RMII_MASK (0x20U)

◆ ESC_USER_RAM_BYTE19_RMII_SET

#define ESC_USER_RAM_BYTE19_RMII_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE19_RMII_SHIFT) & ESC_USER_RAM_BYTE19_RMII_MASK)

◆ ESC_USER_RAM_BYTE19_RMII_SHIFT

#define ESC_USER_RAM_BYTE19_RMII_SHIFT (5U)

◆ ESC_USER_RAM_BYTE19_SCP_GET

#define ESC_USER_RAM_BYTE19_SCP_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE19_SCP_MASK) >> ESC_USER_RAM_BYTE19_SCP_SHIFT)

◆ ESC_USER_RAM_BYTE19_SCP_MASK

#define ESC_USER_RAM_BYTE19_SCP_MASK (0x40U)

◆ ESC_USER_RAM_BYTE19_SCP_SET

#define ESC_USER_RAM_BYTE19_SCP_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE19_SCP_SHIFT) & ESC_USER_RAM_BYTE19_SCP_MASK)

◆ ESC_USER_RAM_BYTE19_SCP_SHIFT

#define ESC_USER_RAM_BYTE19_SCP_SHIFT (6U)

◆ ESC_USER_RAM_BYTE19_URGP_GET

#define ESC_USER_RAM_BYTE19_URGP_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE19_URGP_MASK) >> ESC_USER_RAM_BYTE19_URGP_SHIFT)

◆ ESC_USER_RAM_BYTE19_URGP_MASK

#define ESC_USER_RAM_BYTE19_URGP_MASK (0x10U)

◆ ESC_USER_RAM_BYTE19_URGP_SET

#define ESC_USER_RAM_BYTE19_URGP_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE19_URGP_SHIFT) & ESC_USER_RAM_BYTE19_URGP_MASK)

◆ ESC_USER_RAM_BYTE19_URGP_SHIFT

#define ESC_USER_RAM_BYTE19_URGP_SHIFT (4U)

◆ ESC_USER_RAM_BYTE1_AEMW_GET

#define ESC_USER_RAM_BYTE1_AEMW_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE1_AEMW_MASK) >> ESC_USER_RAM_BYTE1_AEMW_SHIFT)

◆ ESC_USER_RAM_BYTE1_AEMW_MASK

#define ESC_USER_RAM_BYTE1_AEMW_MASK (0x40U)

◆ ESC_USER_RAM_BYTE1_AEMW_SET

#define ESC_USER_RAM_BYTE1_AEMW_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE1_AEMW_SHIFT) & ESC_USER_RAM_BYTE1_AEMW_MASK)

◆ ESC_USER_RAM_BYTE1_AEMW_SHIFT

#define ESC_USER_RAM_BYTE1_AEMW_SHIFT (6U)

◆ ESC_USER_RAM_BYTE1_ALSCR_GET

#define ESC_USER_RAM_BYTE1_ALSCR_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE1_ALSCR_MASK) >> ESC_USER_RAM_BYTE1_ALSCR_SHIFT)

◆ ESC_USER_RAM_BYTE1_ALSCR_MASK

#define ESC_USER_RAM_BYTE1_ALSCR_MASK (0x2U)

◆ ESC_USER_RAM_BYTE1_ALSCR_SET

#define ESC_USER_RAM_BYTE1_ALSCR_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE1_ALSCR_SHIFT) & ESC_USER_RAM_BYTE1_ALSCR_MASK)

◆ ESC_USER_RAM_BYTE1_ALSCR_SHIFT

#define ESC_USER_RAM_BYTE1_ALSCR_SHIFT (1U)

◆ ESC_USER_RAM_BYTE1_CSA_GET

#define ESC_USER_RAM_BYTE1_CSA_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE1_CSA_MASK) >> ESC_USER_RAM_BYTE1_CSA_SHIFT)

◆ ESC_USER_RAM_BYTE1_CSA_MASK

#define ESC_USER_RAM_BYTE1_CSA_MASK (0x8U)

◆ ESC_USER_RAM_BYTE1_CSA_SET

#define ESC_USER_RAM_BYTE1_CSA_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE1_CSA_SHIFT) & ESC_USER_RAM_BYTE1_CSA_MASK)

◆ ESC_USER_RAM_BYTE1_CSA_SHIFT

#define ESC_USER_RAM_BYTE1_CSA_SHIFT (3U)

◆ ESC_USER_RAM_BYTE1_EDLCR_GET

#define ESC_USER_RAM_BYTE1_EDLCR_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE1_EDLCR_MASK) >> ESC_USER_RAM_BYTE1_EDLCR_SHIFT)

◆ ESC_USER_RAM_BYTE1_EDLCR_MASK

#define ESC_USER_RAM_BYTE1_EDLCR_MASK (0x1U)

◆ ESC_USER_RAM_BYTE1_EDLCR_SET

#define ESC_USER_RAM_BYTE1_EDLCR_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE1_EDLCR_SHIFT) & ESC_USER_RAM_BYTE1_EDLCR_MASK)

◆ ESC_USER_RAM_BYTE1_EDLCR_SHIFT

#define ESC_USER_RAM_BYTE1_EDLCR_SHIFT (0U)

◆ ESC_USER_RAM_BYTE1_EIM_GET

#define ESC_USER_RAM_BYTE1_EIM_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE1_EIM_MASK) >> ESC_USER_RAM_BYTE1_EIM_SHIFT)

◆ ESC_USER_RAM_BYTE1_EIM_MASK

#define ESC_USER_RAM_BYTE1_EIM_MASK (0x4U)

◆ ESC_USER_RAM_BYTE1_EIM_SET

#define ESC_USER_RAM_BYTE1_EIM_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE1_EIM_SHIFT) & ESC_USER_RAM_BYTE1_EIM_MASK)

◆ ESC_USER_RAM_BYTE1_EIM_SHIFT

#define ESC_USER_RAM_BYTE1_EIM_SHIFT (2U)

◆ ESC_USER_RAM_BYTE1_GPI_GET

#define ESC_USER_RAM_BYTE1_GPI_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE1_GPI_MASK) >> ESC_USER_RAM_BYTE1_GPI_SHIFT)

◆ ESC_USER_RAM_BYTE1_GPI_MASK

#define ESC_USER_RAM_BYTE1_GPI_MASK (0x10U)

◆ ESC_USER_RAM_BYTE1_GPI_SET

#define ESC_USER_RAM_BYTE1_GPI_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE1_GPI_SHIFT) & ESC_USER_RAM_BYTE1_GPI_MASK)

◆ ESC_USER_RAM_BYTE1_GPI_SHIFT

#define ESC_USER_RAM_BYTE1_GPI_SHIFT (4U)

◆ ESC_USER_RAM_BYTE1_GPO_GET

#define ESC_USER_RAM_BYTE1_GPO_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE1_GPO_MASK) >> ESC_USER_RAM_BYTE1_GPO_SHIFT)

◆ ESC_USER_RAM_BYTE1_GPO_MASK

#define ESC_USER_RAM_BYTE1_GPO_MASK (0x20U)

◆ ESC_USER_RAM_BYTE1_GPO_SET

#define ESC_USER_RAM_BYTE1_GPO_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE1_GPO_SHIFT) & ESC_USER_RAM_BYTE1_GPO_MASK)

◆ ESC_USER_RAM_BYTE1_GPO_SHIFT

#define ESC_USER_RAM_BYTE1_GPO_SHIFT (5U)

◆ ESC_USER_RAM_BYTE1_PRWO_GET

#define ESC_USER_RAM_BYTE1_PRWO_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE1_PRWO_MASK) >> ESC_USER_RAM_BYTE1_PRWO_SHIFT)

◆ ESC_USER_RAM_BYTE1_PRWO_MASK

#define ESC_USER_RAM_BYTE1_PRWO_MASK (0x80U)

◆ ESC_USER_RAM_BYTE1_PRWO_SET

#define ESC_USER_RAM_BYTE1_PRWO_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE1_PRWO_SHIFT) & ESC_USER_RAM_BYTE1_PRWO_MASK)

◆ ESC_USER_RAM_BYTE1_PRWO_SHIFT

#define ESC_USER_RAM_BYTE1_PRWO_SHIFT (7U)

◆ ESC_USER_RAM_BYTE2_DCSMET_GET

#define ESC_USER_RAM_BYTE2_DCSMET_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE2_DCSMET_MASK) >> ESC_USER_RAM_BYTE2_DCSMET_SHIFT)

◆ ESC_USER_RAM_BYTE2_DCSMET_MASK

#define ESC_USER_RAM_BYTE2_DCSMET_MASK (0x20U)

◆ ESC_USER_RAM_BYTE2_DCSMET_SET

#define ESC_USER_RAM_BYTE2_DCSMET_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE2_DCSMET_SHIFT) & ESC_USER_RAM_BYTE2_DCSMET_MASK)

◆ ESC_USER_RAM_BYTE2_DCSMET_SHIFT

#define ESC_USER_RAM_BYTE2_DCSMET_SHIFT (5U)

◆ ESC_USER_RAM_BYTE2_EPUPEC_GET

#define ESC_USER_RAM_BYTE2_EPUPEC_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE2_EPUPEC_MASK) >> ESC_USER_RAM_BYTE2_EPUPEC_SHIFT)

◆ ESC_USER_RAM_BYTE2_EPUPEC_MASK

#define ESC_USER_RAM_BYTE2_EPUPEC_MASK (0x40U)

◆ ESC_USER_RAM_BYTE2_EPUPEC_SET

#define ESC_USER_RAM_BYTE2_EPUPEC_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE2_EPUPEC_SHIFT) & ESC_USER_RAM_BYTE2_EPUPEC_MASK)

◆ ESC_USER_RAM_BYTE2_EPUPEC_SHIFT

#define ESC_USER_RAM_BYTE2_EPUPEC_SHIFT (6U)

◆ ESC_USER_RAM_BYTE2_ESCFG_GET

#define ESC_USER_RAM_BYTE2_ESCFG_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE2_ESCFG_MASK) >> ESC_USER_RAM_BYTE2_ESCFG_SHIFT)

◆ ESC_USER_RAM_BYTE2_ESCFG_MASK

#define ESC_USER_RAM_BYTE2_ESCFG_MASK (0x80U)

◆ ESC_USER_RAM_BYTE2_ESCFG_SET

#define ESC_USER_RAM_BYTE2_ESCFG_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE2_ESCFG_SHIFT) & ESC_USER_RAM_BYTE2_ESCFG_MASK)

◆ ESC_USER_RAM_BYTE2_ESCFG_SHIFT

#define ESC_USER_RAM_BYTE2_ESCFG_SHIFT (7U)

◆ ESC_USER_RAM_BYTE2_RESET_GET

#define ESC_USER_RAM_BYTE2_RESET_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE2_RESET_MASK) >> ESC_USER_RAM_BYTE2_RESET_SHIFT)

◆ ESC_USER_RAM_BYTE2_RESET_MASK

#define ESC_USER_RAM_BYTE2_RESET_MASK (0x8U)

◆ ESC_USER_RAM_BYTE2_RESET_SET

#define ESC_USER_RAM_BYTE2_RESET_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE2_RESET_SHIFT) & ESC_USER_RAM_BYTE2_RESET_MASK)

◆ ESC_USER_RAM_BYTE2_RESET_SHIFT

#define ESC_USER_RAM_BYTE2_RESET_SHIFT (3U)

◆ ESC_USER_RAM_BYTE2_WDGCNT_GET

#define ESC_USER_RAM_BYTE2_WDGCNT_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE2_WDGCNT_MASK) >> ESC_USER_RAM_BYTE2_WDGCNT_SHIFT)

◆ ESC_USER_RAM_BYTE2_WDGCNT_MASK

#define ESC_USER_RAM_BYTE2_WDGCNT_MASK (0x2U)

◆ ESC_USER_RAM_BYTE2_WDGCNT_SET

#define ESC_USER_RAM_BYTE2_WDGCNT_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE2_WDGCNT_SHIFT) & ESC_USER_RAM_BYTE2_WDGCNT_MASK)

◆ ESC_USER_RAM_BYTE2_WDGCNT_SHIFT

#define ESC_USER_RAM_BYTE2_WDGCNT_SHIFT (1U)

◆ ESC_USER_RAM_BYTE2_WDW_GET

#define ESC_USER_RAM_BYTE2_WDW_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE2_WDW_MASK) >> ESC_USER_RAM_BYTE2_WDW_SHIFT)

◆ ESC_USER_RAM_BYTE2_WDW_MASK

#define ESC_USER_RAM_BYTE2_WDW_MASK (0x1U)

◆ ESC_USER_RAM_BYTE2_WDW_SET

#define ESC_USER_RAM_BYTE2_WDW_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE2_WDW_SHIFT) & ESC_USER_RAM_BYTE2_WDW_MASK)

◆ ESC_USER_RAM_BYTE2_WDW_SHIFT

#define ESC_USER_RAM_BYTE2_WDW_SHIFT (0U)

◆ ESC_USER_RAM_BYTE2_WP_GET

#define ESC_USER_RAM_BYTE2_WP_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE2_WP_MASK) >> ESC_USER_RAM_BYTE2_WP_SHIFT)

◆ ESC_USER_RAM_BYTE2_WP_MASK

#define ESC_USER_RAM_BYTE2_WP_MASK (0x4U)

◆ ESC_USER_RAM_BYTE2_WP_SET

#define ESC_USER_RAM_BYTE2_WP_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE2_WP_SHIFT) & ESC_USER_RAM_BYTE2_WP_MASK)

◆ ESC_USER_RAM_BYTE2_WP_SHIFT

#define ESC_USER_RAM_BYTE2_WP_SHIFT (2U)

◆ ESC_USER_RAM_BYTE3_ELDE_GET

#define ESC_USER_RAM_BYTE3_ELDE_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE3_ELDE_MASK) >> ESC_USER_RAM_BYTE3_ELDE_SHIFT)

◆ ESC_USER_RAM_BYTE3_ELDE_MASK

#define ESC_USER_RAM_BYTE3_ELDE_MASK (0x40U)

◆ ESC_USER_RAM_BYTE3_ELDE_SET

#define ESC_USER_RAM_BYTE3_ELDE_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE3_ELDE_SHIFT) & ESC_USER_RAM_BYTE3_ELDE_MASK)

◆ ESC_USER_RAM_BYTE3_ELDE_SHIFT

#define ESC_USER_RAM_BYTE3_ELDE_SHIFT (6U)

◆ ESC_USER_RAM_BYTE3_ELDM_GET

#define ESC_USER_RAM_BYTE3_ELDM_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE3_ELDM_MASK) >> ESC_USER_RAM_BYTE3_ELDM_SHIFT)

◆ ESC_USER_RAM_BYTE3_ELDM_MASK

#define ESC_USER_RAM_BYTE3_ELDM_MASK (0x20U)

◆ ESC_USER_RAM_BYTE3_ELDM_SET

#define ESC_USER_RAM_BYTE3_ELDM_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE3_ELDM_SHIFT) & ESC_USER_RAM_BYTE3_ELDM_MASK)

◆ ESC_USER_RAM_BYTE3_ELDM_SHIFT

#define ESC_USER_RAM_BYTE3_ELDM_SHIFT (5U)

◆ ESC_USER_RAM_BYTE3_LLC_GET

#define ESC_USER_RAM_BYTE3_LLC_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE3_LLC_MASK) >> ESC_USER_RAM_BYTE3_LLC_SHIFT)

◆ ESC_USER_RAM_BYTE3_LLC_MASK

#define ESC_USER_RAM_BYTE3_LLC_MASK (0x8U)

◆ ESC_USER_RAM_BYTE3_LLC_SET

#define ESC_USER_RAM_BYTE3_LLC_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE3_LLC_SHIFT) & ESC_USER_RAM_BYTE3_LLC_MASK)

◆ ESC_USER_RAM_BYTE3_LLC_SHIFT

#define ESC_USER_RAM_BYTE3_LLC_SHIFT (3U)

◆ ESC_USER_RAM_BYTE3_MMI_GET

#define ESC_USER_RAM_BYTE3_MMI_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE3_MMI_MASK) >> ESC_USER_RAM_BYTE3_MMI_SHIFT)

◆ ESC_USER_RAM_BYTE3_MMI_MASK

#define ESC_USER_RAM_BYTE3_MMI_MASK (0x10U)

◆ ESC_USER_RAM_BYTE3_MMI_SET

#define ESC_USER_RAM_BYTE3_MMI_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE3_MMI_SHIFT) & ESC_USER_RAM_BYTE3_MMI_MASK)

◆ ESC_USER_RAM_BYTE3_MMI_SHIFT

#define ESC_USER_RAM_BYTE3_MMI_SHIFT (4U)

◆ ESC_USER_RAM_BYTE3_RLED_GET

#define ESC_USER_RAM_BYTE3_RLED_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE3_RLED_MASK) >> ESC_USER_RAM_BYTE3_RLED_SHIFT)

◆ ESC_USER_RAM_BYTE3_RLED_MASK

#define ESC_USER_RAM_BYTE3_RLED_MASK (0x80U)

◆ ESC_USER_RAM_BYTE3_RLED_SET

#define ESC_USER_RAM_BYTE3_RLED_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE3_RLED_SHIFT) & ESC_USER_RAM_BYTE3_RLED_MASK)

◆ ESC_USER_RAM_BYTE3_RLED_SHIFT

#define ESC_USER_RAM_BYTE3_RLED_SHIFT (7U)

◆ ESC_USER_RAM_BYTE4_DLIU_GET

#define ESC_USER_RAM_BYTE4_DLIU_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE4_DLIU_MASK) >> ESC_USER_RAM_BYTE4_DLIU_SHIFT)

◆ ESC_USER_RAM_BYTE4_DLIU_MASK

#define ESC_USER_RAM_BYTE4_DLIU_MASK (0x8U)

◆ ESC_USER_RAM_BYTE4_DLIU_SET

#define ESC_USER_RAM_BYTE4_DLIU_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE4_DLIU_SHIFT) & ESC_USER_RAM_BYTE4_DLIU_MASK)

◆ ESC_USER_RAM_BYTE4_DLIU_SHIFT

#define ESC_USER_RAM_BYTE4_DLIU_SHIFT (3U)

◆ ESC_USER_RAM_BYTE4_DSOU_GET

#define ESC_USER_RAM_BYTE4_DSOU_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE4_DSOU_MASK) >> ESC_USER_RAM_BYTE4_DSOU_SHIFT)

◆ ESC_USER_RAM_BYTE4_DSOU_MASK

#define ESC_USER_RAM_BYTE4_DSOU_MASK (0x20U)

◆ ESC_USER_RAM_BYTE4_DSOU_SET

#define ESC_USER_RAM_BYTE4_DSOU_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE4_DSOU_SHIFT) & ESC_USER_RAM_BYTE4_DSOU_MASK)

◆ ESC_USER_RAM_BYTE4_DSOU_SHIFT

#define ESC_USER_RAM_BYTE4_DSOU_SHIFT (5U)

◆ ESC_USER_RAM_BYTE4_DTLC_GET

#define ESC_USER_RAM_BYTE4_DTLC_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE4_DTLC_MASK) >> ESC_USER_RAM_BYTE4_DTLC_SHIFT)

◆ ESC_USER_RAM_BYTE4_DTLC_MASK

#define ESC_USER_RAM_BYTE4_DTLC_MASK (0x40U)

◆ ESC_USER_RAM_BYTE4_DTLC_SET

#define ESC_USER_RAM_BYTE4_DTLC_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE4_DTLC_SHIFT) & ESC_USER_RAM_BYTE4_DTLC_MASK)

◆ ESC_USER_RAM_BYTE4_DTLC_SHIFT

#define ESC_USER_RAM_BYTE4_DTLC_SHIFT (6U)

◆ ESC_USER_RAM_BYTE4_LALED_GET

#define ESC_USER_RAM_BYTE4_LALED_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE4_LALED_MASK) >> ESC_USER_RAM_BYTE4_LALED_SHIFT)

◆ ESC_USER_RAM_BYTE4_LALED_MASK

#define ESC_USER_RAM_BYTE4_LALED_MASK (0x1U)

◆ ESC_USER_RAM_BYTE4_LALED_SET

#define ESC_USER_RAM_BYTE4_LALED_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE4_LALED_SHIFT) & ESC_USER_RAM_BYTE4_LALED_MASK)

◆ ESC_USER_RAM_BYTE4_LALED_SHIFT

#define ESC_USER_RAM_BYTE4_LALED_SHIFT (0U)

◆ ESC_USER_RAM_BYTE4_LDCM_GET

#define ESC_USER_RAM_BYTE4_LDCM_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE4_LDCM_MASK) >> ESC_USER_RAM_BYTE4_LDCM_SHIFT)

◆ ESC_USER_RAM_BYTE4_LDCM_MASK

#define ESC_USER_RAM_BYTE4_LDCM_MASK (0x80U)

◆ ESC_USER_RAM_BYTE4_LDCM_SET

#define ESC_USER_RAM_BYTE4_LDCM_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE4_LDCM_SHIFT) & ESC_USER_RAM_BYTE4_LDCM_MASK)

◆ ESC_USER_RAM_BYTE4_LDCM_SHIFT

#define ESC_USER_RAM_BYTE4_LDCM_SHIFT (7U)

◆ ESC_USER_RAM_BYTE5_ATS_GET

#define ESC_USER_RAM_BYTE5_ATS_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE5_ATS_MASK) >> ESC_USER_RAM_BYTE5_ATS_SHIFT)

◆ ESC_USER_RAM_BYTE5_ATS_MASK

#define ESC_USER_RAM_BYTE5_ATS_MASK (0x2U)

◆ ESC_USER_RAM_BYTE5_ATS_SET

#define ESC_USER_RAM_BYTE5_ATS_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE5_ATS_SHIFT) & ESC_USER_RAM_BYTE5_ATS_MASK)

◆ ESC_USER_RAM_BYTE5_ATS_SHIFT

#define ESC_USER_RAM_BYTE5_ATS_SHIFT (1U)

◆ ESC_USER_RAM_BYTE5_DDIOR_GET

#define ESC_USER_RAM_BYTE5_DDIOR_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE5_DDIOR_MASK) >> ESC_USER_RAM_BYTE5_DDIOR_SHIFT)

◆ ESC_USER_RAM_BYTE5_DDIOR_MASK

#define ESC_USER_RAM_BYTE5_DDIOR_MASK (0x20U)

◆ ESC_USER_RAM_BYTE5_DDIOR_SET

#define ESC_USER_RAM_BYTE5_DDIOR_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE5_DDIOR_SHIFT) & ESC_USER_RAM_BYTE5_DDIOR_MASK)

◆ ESC_USER_RAM_BYTE5_DDIOR_SHIFT

#define ESC_USER_RAM_BYTE5_DDIOR_SHIFT (5U)

◆ ESC_USER_RAM_BYTE5_EEU_GET

#define ESC_USER_RAM_BYTE5_EEU_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE5_EEU_MASK) >> ESC_USER_RAM_BYTE5_EEU_SHIFT)

◆ ESC_USER_RAM_BYTE5_EEU_MASK

#define ESC_USER_RAM_BYTE5_EEU_MASK (0x4U)

◆ ESC_USER_RAM_BYTE5_EEU_SET

#define ESC_USER_RAM_BYTE5_EEU_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE5_EEU_SHIFT) & ESC_USER_RAM_BYTE5_EEU_MASK)

◆ ESC_USER_RAM_BYTE5_EEU_SHIFT

#define ESC_USER_RAM_BYTE5_EEU_SHIFT (2U)

◆ ESC_USER_RAM_BYTE5_MCPP_GET

#define ESC_USER_RAM_BYTE5_MCPP_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE5_MCPP_MASK) >> ESC_USER_RAM_BYTE5_MCPP_SHIFT)

◆ ESC_USER_RAM_BYTE5_MCPP_MASK

#define ESC_USER_RAM_BYTE5_MCPP_MASK (0x1U)

◆ ESC_USER_RAM_BYTE5_MCPP_SET

#define ESC_USER_RAM_BYTE5_MCPP_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE5_MCPP_SHIFT) & ESC_USER_RAM_BYTE5_MCPP_MASK)

◆ ESC_USER_RAM_BYTE5_MCPP_SHIFT

#define ESC_USER_RAM_BYTE5_MCPP_SHIFT (0U)

◆ ESC_USER_RAM_BYTE6_RELEDOR_GET

#define ESC_USER_RAM_BYTE6_RELEDOR_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE6_RELEDOR_MASK) >> ESC_USER_RAM_BYTE6_RELEDOR_SHIFT)

◆ ESC_USER_RAM_BYTE6_RELEDOR_MASK

#define ESC_USER_RAM_BYTE6_RELEDOR_MASK (0x4U)

◆ ESC_USER_RAM_BYTE6_RELEDOR_SET

#define ESC_USER_RAM_BYTE6_RELEDOR_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE6_RELEDOR_SHIFT) & ESC_USER_RAM_BYTE6_RELEDOR_MASK)

◆ ESC_USER_RAM_BYTE6_RELEDOR_SHIFT

#define ESC_USER_RAM_BYTE6_RELEDOR_SHIFT (2U)

◆ ESC_USER_RAM_BYTE7_DCRT_GET

#define ESC_USER_RAM_BYTE7_DCRT_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE7_DCRT_MASK) >> ESC_USER_RAM_BYTE7_DCRT_SHIFT)

◆ ESC_USER_RAM_BYTE7_DCRT_MASK

#define ESC_USER_RAM_BYTE7_DCRT_MASK (0x40U)

◆ ESC_USER_RAM_BYTE7_DCRT_SET

#define ESC_USER_RAM_BYTE7_DCRT_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE7_DCRT_SHIFT) & ESC_USER_RAM_BYTE7_DCRT_MASK)

◆ ESC_USER_RAM_BYTE7_DCRT_SHIFT

#define ESC_USER_RAM_BYTE7_DCRT_SHIFT (6U)

◆ ESC_USER_RAM_BYTE7_DCS1D_GET

#define ESC_USER_RAM_BYTE7_DCS1D_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE7_DCS1D_MASK) >> ESC_USER_RAM_BYTE7_DCS1D_SHIFT)

◆ ESC_USER_RAM_BYTE7_DCS1D_MASK

#define ESC_USER_RAM_BYTE7_DCS1D_MASK (0x8U)

◆ ESC_USER_RAM_BYTE7_DCS1D_SET

#define ESC_USER_RAM_BYTE7_DCS1D_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE7_DCS1D_SHIFT) & ESC_USER_RAM_BYTE7_DCS1D_MASK)

◆ ESC_USER_RAM_BYTE7_DCS1D_SHIFT

#define ESC_USER_RAM_BYTE7_DCS1D_SHIFT (3U)

◆ ESC_USER_RAM_BYTE7_DCST_GET

#define ESC_USER_RAM_BYTE7_DCST_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE7_DCST_MASK) >> ESC_USER_RAM_BYTE7_DCST_SHIFT)

◆ ESC_USER_RAM_BYTE7_DCST_MASK

#define ESC_USER_RAM_BYTE7_DCST_MASK (0x80U)

◆ ESC_USER_RAM_BYTE7_DCST_SET

#define ESC_USER_RAM_BYTE7_DCST_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE7_DCST_SHIFT) & ESC_USER_RAM_BYTE7_DCST_MASK)

◆ ESC_USER_RAM_BYTE7_DCST_SHIFT

#define ESC_USER_RAM_BYTE7_DCST_SHIFT (7U)

◆ ESC_USER_RAM_BYTE8_APDI_GET

#define ESC_USER_RAM_BYTE8_APDI_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE8_APDI_MASK) >> ESC_USER_RAM_BYTE8_APDI_SHIFT)

◆ ESC_USER_RAM_BYTE8_APDI_MASK

#define ESC_USER_RAM_BYTE8_APDI_MASK (0x8U)

◆ ESC_USER_RAM_BYTE8_APDI_SET

#define ESC_USER_RAM_BYTE8_APDI_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE8_APDI_SHIFT) & ESC_USER_RAM_BYTE8_APDI_MASK)

◆ ESC_USER_RAM_BYTE8_APDI_SHIFT

#define ESC_USER_RAM_BYTE8_APDI_SHIFT (3U)

◆ ESC_USER_RAM_BYTE8_DC64_GET

#define ESC_USER_RAM_BYTE8_DC64_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE8_DC64_MASK) >> ESC_USER_RAM_BYTE8_DC64_SHIFT)

◆ ESC_USER_RAM_BYTE8_DC64_MASK

#define ESC_USER_RAM_BYTE8_DC64_MASK (0x1U)

◆ ESC_USER_RAM_BYTE8_DC64_SET

#define ESC_USER_RAM_BYTE8_DC64_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE8_DC64_SHIFT) & ESC_USER_RAM_BYTE8_DC64_MASK)

◆ ESC_USER_RAM_BYTE8_DC64_SHIFT

#define ESC_USER_RAM_BYTE8_DC64_SHIFT (0U)

◆ ESC_USER_RAM_BYTE8_OPDI_GET

#define ESC_USER_RAM_BYTE8_OPDI_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE8_OPDI_MASK) >> ESC_USER_RAM_BYTE8_OPDI_SHIFT)

◆ ESC_USER_RAM_BYTE8_OPDI_MASK

#define ESC_USER_RAM_BYTE8_OPDI_MASK (0x10U)

◆ ESC_USER_RAM_BYTE8_OPDI_SET

#define ESC_USER_RAM_BYTE8_OPDI_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE8_OPDI_SHIFT) & ESC_USER_RAM_BYTE8_OPDI_MASK)

◆ ESC_USER_RAM_BYTE8_OPDI_SHIFT

#define ESC_USER_RAM_BYTE8_OPDI_SHIFT (4U)

◆ ESC_USER_RAM_BYTE8_PDICEC_GET

#define ESC_USER_RAM_BYTE8_PDICEC_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE8_PDICEC_MASK) >> ESC_USER_RAM_BYTE8_PDICEC_SHIFT)

◆ ESC_USER_RAM_BYTE8_PDICEC_MASK

#define ESC_USER_RAM_BYTE8_PDICEC_MASK (0x4U)

◆ ESC_USER_RAM_BYTE8_PDICEC_SET

#define ESC_USER_RAM_BYTE8_PDICEC_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE8_PDICEC_SHIFT) & ESC_USER_RAM_BYTE8_PDICEC_MASK)

◆ ESC_USER_RAM_BYTE8_PDICEC_SHIFT

#define ESC_USER_RAM_BYTE8_PDICEC_SHIFT (2U)

◆ ESC_USER_RAM_BYTE8_PPDI_GET

#define ESC_USER_RAM_BYTE8_PPDI_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE8_PPDI_MASK) >> ESC_USER_RAM_BYTE8_PPDI_SHIFT)

◆ ESC_USER_RAM_BYTE8_PPDI_MASK

#define ESC_USER_RAM_BYTE8_PPDI_MASK (0x20U)

◆ ESC_USER_RAM_BYTE8_PPDI_SET

#define ESC_USER_RAM_BYTE8_PPDI_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE8_PPDI_SHIFT) & ESC_USER_RAM_BYTE8_PPDI_MASK)

◆ ESC_USER_RAM_BYTE8_PPDI_SHIFT

#define ESC_USER_RAM_BYTE8_PPDI_SHIFT (5U)

◆ ESC_USER_RAM_BYTE9_DR_GET

#define ESC_USER_RAM_BYTE9_DR_GET ( x ) (((uint8_t)(x) & ESC_USER_RAM_BYTE9_DR_MASK) >> ESC_USER_RAM_BYTE9_DR_SHIFT)

◆ ESC_USER_RAM_BYTE9_DR_MASK

#define ESC_USER_RAM_BYTE9_DR_MASK (0x80U)

◆ ESC_USER_RAM_BYTE9_DR_SET

#define ESC_USER_RAM_BYTE9_DR_SET ( x ) (((uint8_t)(x) << ESC_USER_RAM_BYTE9_DR_SHIFT) & ESC_USER_RAM_BYTE9_DR_MASK)

◆ ESC_USER_RAM_BYTE9_DR_SHIFT

#define ESC_USER_RAM_BYTE9_DR_SHIFT (7U)

◆ ESC_VID_VID_GET

#define ESC_VID_VID_GET ( x ) (((uint64_t)(x) & ESC_VID_VID_MASK) >> ESC_VID_VID_SHIFT)

◆ ESC_VID_VID_MASK

#define ESC_VID_VID_MASK (0xFFFFFFFFFFFFFFFFULL)

◆ ESC_VID_VID_SHIFT

#define ESC_VID_VID_SHIFT (0U)

◆ ESC_WDG_CNT_PDAT_CNT_GET

#define ESC_WDG_CNT_PDAT_CNT_GET ( x ) (((uint8_t)(x) & ESC_WDG_CNT_PDAT_CNT_MASK) >> ESC_WDG_CNT_PDAT_CNT_SHIFT)

◆ ESC_WDG_CNT_PDAT_CNT_MASK

#define ESC_WDG_CNT_PDAT_CNT_MASK (0xFFU)

◆ ESC_WDG_CNT_PDAT_CNT_SHIFT

#define ESC_WDG_CNT_PDAT_CNT_SHIFT (0U)

◆ ESC_WDG_CNT_PDI_CNT_GET

#define ESC_WDG_CNT_PDI_CNT_GET ( x ) (((uint8_t)(x) & ESC_WDG_CNT_PDI_CNT_MASK) >> ESC_WDG_CNT_PDI_CNT_SHIFT)

◆ ESC_WDG_CNT_PDI_CNT_MASK

#define ESC_WDG_CNT_PDI_CNT_MASK (0xFFU)

◆ ESC_WDG_CNT_PDI_CNT_SHIFT

#define ESC_WDG_CNT_PDI_CNT_SHIFT (0U)

◆ ESC_WDG_DIV_DIV_GET

#define ESC_WDG_DIV_DIV_GET ( x ) (((uint16_t)(x) & ESC_WDG_DIV_DIV_MASK) >> ESC_WDG_DIV_DIV_SHIFT)

◆ ESC_WDG_DIV_DIV_MASK

#define ESC_WDG_DIV_DIV_MASK (0xFFFFU)

◆ ESC_WDG_DIV_DIV_SHIFT

#define ESC_WDG_DIV_DIV_SHIFT (0U)

◆ ESC_WDG_STAT_PDAT_ST_GET

#define ESC_WDG_STAT_PDAT_ST_GET ( x ) (((uint16_t)(x) & ESC_WDG_STAT_PDAT_ST_MASK) >> ESC_WDG_STAT_PDAT_ST_SHIFT)

◆ ESC_WDG_STAT_PDAT_ST_MASK

#define ESC_WDG_STAT_PDAT_ST_MASK (0x1U)

◆ ESC_WDG_STAT_PDAT_ST_SET

#define ESC_WDG_STAT_PDAT_ST_SET ( x ) (((uint16_t)(x) << ESC_WDG_STAT_PDAT_ST_SHIFT) & ESC_WDG_STAT_PDAT_ST_MASK)

◆ ESC_WDG_STAT_PDAT_ST_SHIFT

#define ESC_WDG_STAT_PDAT_ST_SHIFT (0U)

◆ ESC_WDG_TIME_PDAT_TIME_GET

#define ESC_WDG_TIME_PDAT_TIME_GET ( x ) (((uint16_t)(x) & ESC_WDG_TIME_PDAT_TIME_MASK) >> ESC_WDG_TIME_PDAT_TIME_SHIFT)

◆ ESC_WDG_TIME_PDAT_TIME_MASK

#define ESC_WDG_TIME_PDAT_TIME_MASK (0xFFFFU)

◆ ESC_WDG_TIME_PDAT_TIME_SHIFT

#define ESC_WDG_TIME_PDAT_TIME_SHIFT (0U)

◆ ESC_WDG_TIME_PDI_TIME_GET

#define ESC_WDG_TIME_PDI_TIME_GET ( x ) (((uint16_t)(x) & ESC_WDG_TIME_PDI_TIME_MASK) >> ESC_WDG_TIME_PDI_TIME_SHIFT)

◆ ESC_WDG_TIME_PDI_TIME_MASK

#define ESC_WDG_TIME_PDI_TIME_MASK (0xFFFFU)

◆ ESC_WDG_TIME_PDI_TIME_SHIFT

#define ESC_WDG_TIME_PDI_TIME_SHIFT (0U)

Data Structures

Macros