hpm_gwc_drv.h

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/*
 * Copyright (c) 2023 HPMicro
 *
 * SPDX-License-Identifier: BSD-3-Clause
 *
 */
 
#ifndef HPM_GWC_DRV_H
#define HPM_GWC_DRV_H
 
#include "hpm_common.h"
#include "hpm_soc.h"
#include "hpm_gwc_regs.h"
 
typedef struct gwc_ch_config {
    bool freeze;  
    uint16_t start_col; 
    uint16_t start_row; 
    uint16_t end_col; 
    uint16_t end_row; 
    uint32_t ref_crc; 
} gwc_ch_config_t;
 
typedef enum gwc_clk_pol {
    gwc_clk_pol_normal = 0,
    gwc_clk_pol_invert
} gwc_clk_pol_t;
 
typedef struct gwc_config {
    gwc_clk_pol_t clk_pol;
} gwc_config_t;
 
#ifdef __cplusplus
extern "C" {
#endif
 
void gwc_get_default_config(gwc_config_t *cfg);
 
void gwc_init(GWC_Type *ptr, gwc_config_t *cfg);
 
void gwc_enable(GWC_Type *ptr);
 
void gwc_disable(GWC_Type *ptr);
 
static inline void gwc_enable_interrupt(GWC_Type *ptr, uint32_t mask)
{
    ptr->IRQ_MASK &= ~mask;
}
 
static inline void gwc_disable_interrupt(GWC_Type *ptr, uint32_t mask)
{
    ptr->IRQ_MASK |= mask;
}
 
static inline uint32_t gwc_get_status(GWC_Type *ptr)
{
    return ptr->IRQ_STS;
}
 
static inline void gwc_clear_status(GWC_Type *ptr, uint32_t mask)
{
    ptr->IRQ_STS = mask;
}
 
void gwc_freeze_interrupt_control(GWC_Type *ptr);
 
void gwc_ch_init(GWC_Type *ptr, uint8_t ch_index, gwc_ch_config_t *cfg);
 
static inline void gwc_ch_enable(GWC_Type *ptr, uint8_t ch_index)
{
    assert(ch_index <= GWC_CHANNEL_CH15);
    ptr->CHANNEL[ch_index].CFG0 |= GWC_CHANNEL_CFG0_ENABLE_MASK;
}
 
static inline void gwc_ch_disable(GWC_Type *ptr, uint8_t ch_index)
{
    assert(ch_index <= GWC_CHANNEL_CH15);
    ptr->CHANNEL[ch_index].CFG0 &= ~GWC_CHANNEL_CFG0_ENABLE_MASK;
}
 
static inline uint32_t gwc_ch_get_crc(GWC_Type *ptr, uint8_t ch_index)
{
    assert(ch_index <= GWC_CHANNEL_CH15);
    return ptr->CHANNEL[ch_index].CALCRC;
}
 
#ifdef __cplusplus
}
#endif
 
#endif /* HPM_GWC_DRV_H */