HPM SDK
HPMicro Software Development Kit
Macros
hpm_soc.h File Reference
#include "hpm_common.h"
#include "hpm_gpio_regs.h"
#include "hpm_plic_regs.h"
#include "hpm_mchtmr_regs.h"
#include "hpm_plic_sw_regs.h"
#include "hpm_gpiom_regs.h"
#include "hpm_adc12_regs.h"
#include "hpm_adc16_regs.h"
#include "hpm_acmp_regs.h"
#include "hpm_spi_regs.h"
#include "hpm_uart_regs.h"
#include "hpm_can_regs.h"
#include "hpm_wdg_regs.h"
#include "hpm_mbx_regs.h"
#include "hpm_ptpc_regs.h"
#include "hpm_dmamux_regs.h"
#include "hpm_dma_regs.h"
#include "hpm_rng_regs.h"
#include "hpm_keym_regs.h"
#include "hpm_i2s_regs.h"
#include "hpm_dao_regs.h"
#include "hpm_pdm_regs.h"
#include "hpm_pwm_regs.h"
#include "hpm_hall_regs.h"
#include "hpm_qei_regs.h"
#include "hpm_trgm_regs.h"
#include "hpm_synt_regs.h"
#include "hpm_lcdc_regs.h"
#include "hpm_cam_regs.h"
#include "hpm_pdma_regs.h"
#include "hpm_jpeg_regs.h"
#include "hpm_enet_regs.h"
#include "hpm_gptmr_regs.h"
#include "hpm_usb_regs.h"
#include "hpm_sdxc_regs.h"
#include "hpm_conctl_regs.h"
#include "hpm_i2c_regs.h"
#include "hpm_sdp_regs.h"
#include "hpm_femc_regs.h"
#include "hpm_sysctl_regs.h"
#include "hpm_ioc_regs.h"
#include "hpm_otp_regs.h"
#include "hpm_ppor_regs.h"
#include "hpm_pcfg_regs.h"
#include "hpm_psec_regs.h"
#include "hpm_pmon_regs.h"
#include "hpm_pgpr_regs.h"
#include "hpm_vad_regs.h"
#include "hpm_pllctl_regs.h"
#include "hpm_bpor_regs.h"
#include "hpm_bcfg_regs.h"
#include "hpm_butn_regs.h"
#include "hpm_bgpr_regs.h"
#include "hpm_rtc_regs.h"
#include "hpm_bsec_regs.h"
#include "hpm_bkey_regs.h"
#include "hpm_bmon_regs.h"
#include "hpm_tamp_regs.h"
#include "hpm_mono_regs.h"
#include "riscv/riscv_core.h"
#include "hpm_csr_regs.h"
#include "hpm_interrupt.h"
#include "hpm_misc.h"
#include "hpm_otp_table.h"
#include "hpm_dmamux_src.h"
#include "hpm_trgmmux_src.h"
#include "hpm_iomux.h"
#include "hpm_pmic_iomux.h"
#include "hpm_batt_iomux.h"

Go to the source code of this file.

Macros

#define IRQn_GPIO0_A   1 /* GPIO0_A IRQ */
 
#define IRQn_GPIO0_B   2 /* GPIO0_B IRQ */
 
#define IRQn_GPIO0_C   3 /* GPIO0_C IRQ */
 
#define IRQn_GPIO0_D   4 /* GPIO0_D IRQ */
 
#define IRQn_GPIO0_E   5 /* GPIO0_E IRQ */
 
#define IRQn_GPIO0_F   6 /* GPIO0_F IRQ */
 
#define IRQn_GPIO0_X   7 /* GPIO0_X IRQ */
 
#define IRQn_GPIO0_Y   8 /* GPIO0_Y IRQ */
 
#define IRQn_GPIO0_Z   9 /* GPIO0_Z IRQ */
 
#define IRQn_GPIO1_A   10 /* GPIO1_A IRQ */
 
#define IRQn_GPIO1_B   11 /* GPIO1_B IRQ */
 
#define IRQn_GPIO1_C   12 /* GPIO1_C IRQ */
 
#define IRQn_GPIO1_D   13 /* GPIO1_D IRQ */
 
#define IRQn_GPIO1_E   14 /* GPIO1_E IRQ */
 
#define IRQn_GPIO1_F   15 /* GPIO1_F IRQ */
 
#define IRQn_GPIO1_X   16 /* GPIO1_X IRQ */
 
#define IRQn_GPIO1_Y   17 /* GPIO1_Y IRQ */
 
#define IRQn_GPIO1_Z   18 /* GPIO1_Z IRQ */
 
#define IRQn_ADC0   19 /* ADC0 IRQ */
 
#define IRQn_ADC1   20 /* ADC1 IRQ */
 
#define IRQn_ADC2   21 /* ADC2 IRQ */
 
#define IRQn_ADC3   22 /* ADC3 IRQ */
 
#define IRQn_ACMP_0   23 /* ACMP[0] IRQ */
 
#define IRQn_ACMP_1   24 /* ACMP[1] IRQ */
 
#define IRQn_ACMP_2   25 /* ACMP[2] IRQ */
 
#define IRQn_ACMP_3   26 /* ACMP[3] IRQ */
 
#define IRQn_SPI0   27 /* SPI0 IRQ */
 
#define IRQn_SPI1   28 /* SPI1 IRQ */
 
#define IRQn_SPI2   29 /* SPI2 IRQ */
 
#define IRQn_SPI3   30 /* SPI3 IRQ */
 
#define IRQn_UART0   31 /* UART0 IRQ */
 
#define IRQn_UART1   32 /* UART1 IRQ */
 
#define IRQn_UART2   33 /* UART2 IRQ */
 
#define IRQn_UART3   34 /* UART3 IRQ */
 
#define IRQn_UART4   35 /* UART4 IRQ */
 
#define IRQn_UART5   36 /* UART5 IRQ */
 
#define IRQn_UART6   37 /* UART6 IRQ */
 
#define IRQn_UART7   38 /* UART7 IRQ */
 
#define IRQn_UART8   39 /* UART8 IRQ */
 
#define IRQn_UART9   40 /* UART9 IRQ */
 
#define IRQn_UART10   41 /* UART10 IRQ */
 
#define IRQn_UART11   42 /* UART11 IRQ */
 
#define IRQn_UART12   43 /* UART12 IRQ */
 
#define IRQn_UART13   44 /* UART13 IRQ */
 
#define IRQn_UART14   45 /* UART14 IRQ */
 
#define IRQn_UART15   46 /* UART15 IRQ */
 
#define IRQn_CAN0   47 /* CAN0 IRQ */
 
#define IRQn_CAN1   48 /* CAN1 IRQ */
 
#define IRQn_CAN2   49 /* CAN2 IRQ */
 
#define IRQn_CAN3   50 /* CAN3 IRQ */
 
#define IRQn_PTPC   51 /* PTPC IRQ */
 
#define IRQn_WDG0   52 /* WDG0 IRQ */
 
#define IRQn_WDG1   53 /* WDG1 IRQ */
 
#define IRQn_WDG2   54 /* WDG2 IRQ */
 
#define IRQn_WDG3   55 /* WDG3 IRQ */
 
#define IRQn_MBX0A   56 /* MBX0A IRQ */
 
#define IRQn_MBX0B   57 /* MBX0B IRQ */
 
#define IRQn_MBX1A   58 /* MBX1A IRQ */
 
#define IRQn_MBX1B   59 /* MBX1B IRQ */
 
#define IRQn_GPTMR0   60 /* GPTMR0 IRQ */
 
#define IRQn_GPTMR1   61 /* GPTMR1 IRQ */
 
#define IRQn_GPTMR2   62 /* GPTMR2 IRQ */
 
#define IRQn_GPTMR3   63 /* GPTMR3 IRQ */
 
#define IRQn_GPTMR4   64 /* GPTMR4 IRQ */
 
#define IRQn_GPTMR5   65 /* GPTMR5 IRQ */
 
#define IRQn_GPTMR6   66 /* GPTMR6 IRQ */
 
#define IRQn_GPTMR7   67 /* GPTMR7 IRQ */
 
#define IRQn_I2C0   68 /* I2C0 IRQ */
 
#define IRQn_I2C1   69 /* I2C1 IRQ */
 
#define IRQn_I2C2   70 /* I2C2 IRQ */
 
#define IRQn_I2C3   71 /* I2C3 IRQ */
 
#define IRQn_PWM0   72 /* PWM0 IRQ */
 
#define IRQn_HALL0   73 /* HALL0 IRQ */
 
#define IRQn_QEI0   74 /* QEI0 IRQ */
 
#define IRQn_PWM1   75 /* PWM1 IRQ */
 
#define IRQn_HALL1   76 /* HALL1 IRQ */
 
#define IRQn_QEI1   77 /* QEI1 IRQ */
 
#define IRQn_PWM2   78 /* PWM2 IRQ */
 
#define IRQn_HALL2   79 /* HALL2 IRQ */
 
#define IRQn_QEI2   80 /* QEI2 IRQ */
 
#define IRQn_PWM3   81 /* PWM3 IRQ */
 
#define IRQn_HALL3   82 /* HALL3 IRQ */
 
#define IRQn_QEI3   83 /* QEI3 IRQ */
 
#define IRQn_SDP   84 /* SDP IRQ */
 
#define IRQn_XPI0   85 /* XPI0 IRQ */
 
#define IRQn_XPI1   86 /* XPI1 IRQ */
 
#define IRQn_XDMA   87 /* XDMA IRQ */
 
#define IRQn_HDMA   88 /* HDMA IRQ */
 
#define IRQn_FEMC   89 /* FEMC IRQ */
 
#define IRQn_RNG   90 /* RNG IRQ */
 
#define IRQn_I2S0   91 /* I2S0 IRQ */
 
#define IRQn_I2S1   92 /* I2S1 IRQ */
 
#define IRQn_I2S2   93 /* I2S2 IRQ */
 
#define IRQn_I2S3   94 /* I2S3 IRQ */
 
#define IRQn_DAO   95 /* DAO IRQ */
 
#define IRQn_PDM   96 /* PDM IRQ */
 
#define IRQn_CAM0   97 /* CAM0 IRQ */
 
#define IRQn_CAM1   98 /* CAM1 IRQ */
 
#define IRQn_LCDC_D0   99 /* LCDC_D0 IRQ */
 
#define IRQn_LCDC_D1   100 /* LCDC_D1 IRQ */
 
#define IRQn_PDMA_D0   101 /* PDMA_D0 IRQ */
 
#define IRQn_PDMA_D1   102 /* PDMA_D1 IRQ */
 
#define IRQn_JPEG   103 /* JPEG IRQ */
 
#define IRQn_NTMR0   104 /* NTMR0 IRQ */
 
#define IRQn_NTMR1   105 /* NTMR1 IRQ */
 
#define IRQn_USB0   106 /* USB0 IRQ */
 
#define IRQn_USB1   107 /* USB1 IRQ */
 
#define IRQn_ENET0   108 /* ENET0 IRQ */
 
#define IRQn_ENET1   109 /* ENET1 IRQ */
 
#define IRQn_SDXC0   110 /* SDXC0 IRQ */
 
#define IRQn_SDXC1   111 /* SDXC1 IRQ */
 
#define IRQn_PSEC   112 /* PSEC IRQ */
 
#define IRQn_PGPIO   113 /* PGPIO IRQ */
 
#define IRQn_PWDG   114 /* PWDG IRQ */
 
#define IRQn_PTMR   115 /* PTMR IRQ */
 
#define IRQn_PUART   116 /* PUART IRQ */
 
#define IRQn_VAD   117 /* VAD IRQ */
 
#define IRQn_FUSE   118 /* FUSE IRQ */
 
#define IRQn_SECMON   119 /* SECMON IRQ */
 
#define IRQn_RTC   120 /* RTC IRQ */
 
#define IRQn_BUTN   121 /* BUTN IRQ */
 
#define IRQn_BGPIO   122 /* BGPIO IRQ */
 
#define IRQn_BVIO   123 /* BVIO IRQ */
 
#define IRQn_BROWNOUT   124 /* BROWNOUT IRQ */
 
#define IRQn_SYSCTL   125 /* SYSCTL IRQ */
 
#define IRQn_DEBUG_0   126 /* DEBUG[0] IRQ */
 
#define IRQn_DEBUG_1   127 /* DEBUG[1] IRQ */
 
#define HPM_FGPIO_BASE   (0xC0000UL)
 
#define HPM_FGPIO   ((GPIO_Type *) HPM_FGPIO_BASE)
 
#define HPM_GPIO0_BASE   (0xF0000000UL)
 
#define HPM_GPIO0   ((GPIO_Type *) HPM_GPIO0_BASE)
 
#define HPM_GPIO1_BASE   (0xF0004000UL)
 
#define HPM_GPIO1   ((GPIO_Type *) HPM_GPIO1_BASE)
 
#define HPM_PGPIO_BASE   (0xF40DC000UL)
 
#define HPM_PGPIO   ((GPIO_Type *) HPM_PGPIO_BASE)
 
#define HPM_BGPIO_BASE   (0xF5014000UL)
 
#define HPM_BGPIO   ((GPIO_Type *) HPM_BGPIO_BASE)
 
#define HPM_DM_BASE   (0x30000000UL)
 
#define HPM_PLIC_BASE   (0xE4000000UL)
 
#define HPM_PLIC   ((PLIC_Type *) HPM_PLIC_BASE)
 
#define HPM_MCHTMR_BASE   (0xE6000000UL)
 
#define HPM_MCHTMR   ((MCHTMR_Type *) HPM_MCHTMR_BASE)
 
#define HPM_PLICSW_BASE   (0xE6400000UL)
 
#define HPM_PLICSW   ((PLIC_SW_Type *) HPM_PLICSW_BASE)
 
#define HPM_GPIOM_BASE   (0xF0008000UL)
 
#define HPM_GPIOM   ((GPIOM_Type *) HPM_GPIOM_BASE)
 
#define HPM_ADC0_BASE   (0xF0010000UL)
 
#define HPM_ADC0   ((ADC12_Type *) HPM_ADC0_BASE)
 
#define HPM_ADC1_BASE   (0xF0014000UL)
 
#define HPM_ADC1   ((ADC12_Type *) HPM_ADC1_BASE)
 
#define HPM_ADC2_BASE   (0xF0018000UL)
 
#define HPM_ADC2   ((ADC12_Type *) HPM_ADC2_BASE)
 
#define HPM_ADC3_BASE   (0xF001C000UL)
 
#define HPM_ADC3   ((ADC16_Type *) HPM_ADC3_BASE)
 
#define HPM_ACMP_BASE   (0xF0020000UL)
 
#define HPM_ACMP   ((ACMP_Type *) HPM_ACMP_BASE)
 
#define HPM_SPI0_BASE   (0xF0030000UL)
 
#define HPM_SPI0   ((SPI_Type *) HPM_SPI0_BASE)
 
#define HPM_SPI1_BASE   (0xF0034000UL)
 
#define HPM_SPI1   ((SPI_Type *) HPM_SPI1_BASE)
 
#define HPM_SPI2_BASE   (0xF0038000UL)
 
#define HPM_SPI2   ((SPI_Type *) HPM_SPI2_BASE)
 
#define HPM_SPI3_BASE   (0xF003C000UL)
 
#define HPM_SPI3   ((SPI_Type *) HPM_SPI3_BASE)
 
#define HPM_UART0_BASE   (0xF0040000UL)
 
#define HPM_UART0   ((UART_Type *) HPM_UART0_BASE)
 
#define HPM_UART1_BASE   (0xF0044000UL)
 
#define HPM_UART1   ((UART_Type *) HPM_UART1_BASE)
 
#define HPM_UART2_BASE   (0xF0048000UL)
 
#define HPM_UART2   ((UART_Type *) HPM_UART2_BASE)
 
#define HPM_UART3_BASE   (0xF004C000UL)
 
#define HPM_UART3   ((UART_Type *) HPM_UART3_BASE)
 
#define HPM_UART4_BASE   (0xF0050000UL)
 
#define HPM_UART4   ((UART_Type *) HPM_UART4_BASE)
 
#define HPM_UART5_BASE   (0xF0054000UL)
 
#define HPM_UART5   ((UART_Type *) HPM_UART5_BASE)
 
#define HPM_UART6_BASE   (0xF0058000UL)
 
#define HPM_UART6   ((UART_Type *) HPM_UART6_BASE)
 
#define HPM_UART7_BASE   (0xF005C000UL)
 
#define HPM_UART7   ((UART_Type *) HPM_UART7_BASE)
 
#define HPM_UART8_BASE   (0xF0060000UL)
 
#define HPM_UART8   ((UART_Type *) HPM_UART8_BASE)
 
#define HPM_UART9_BASE   (0xF0064000UL)
 
#define HPM_UART9   ((UART_Type *) HPM_UART9_BASE)
 
#define HPM_UART10_BASE   (0xF0068000UL)
 
#define HPM_UART10   ((UART_Type *) HPM_UART10_BASE)
 
#define HPM_UART11_BASE   (0xF006C000UL)
 
#define HPM_UART11   ((UART_Type *) HPM_UART11_BASE)
 
#define HPM_UART12_BASE   (0xF0070000UL)
 
#define HPM_UART12   ((UART_Type *) HPM_UART12_BASE)
 
#define HPM_UART13_BASE   (0xF0074000UL)
 
#define HPM_UART13   ((UART_Type *) HPM_UART13_BASE)
 
#define HPM_UART14_BASE   (0xF0078000UL)
 
#define HPM_UART14   ((UART_Type *) HPM_UART14_BASE)
 
#define HPM_UART15_BASE   (0xF007C000UL)
 
#define HPM_UART15   ((UART_Type *) HPM_UART15_BASE)
 
#define HPM_PUART_BASE   (0xF40E4000UL)
 
#define HPM_PUART   ((UART_Type *) HPM_PUART_BASE)
 
#define HPM_CAN0_BASE   (0xF0080000UL)
 
#define HPM_CAN0   ((CAN_Type *) HPM_CAN0_BASE)
 
#define HPM_CAN1_BASE   (0xF0084000UL)
 
#define HPM_CAN1   ((CAN_Type *) HPM_CAN1_BASE)
 
#define HPM_CAN2_BASE   (0xF0088000UL)
 
#define HPM_CAN2   ((CAN_Type *) HPM_CAN2_BASE)
 
#define HPM_CAN3_BASE   (0xF008C000UL)
 
#define HPM_CAN3   ((CAN_Type *) HPM_CAN3_BASE)
 
#define HPM_WDG0_BASE   (0xF0090000UL)
 
#define HPM_WDG0   ((WDG_Type *) HPM_WDG0_BASE)
 
#define HPM_WDG1_BASE   (0xF0094000UL)
 
#define HPM_WDG1   ((WDG_Type *) HPM_WDG1_BASE)
 
#define HPM_WDG2_BASE   (0xF0098000UL)
 
#define HPM_WDG2   ((WDG_Type *) HPM_WDG2_BASE)
 
#define HPM_WDG3_BASE   (0xF009C000UL)
 
#define HPM_WDG3   ((WDG_Type *) HPM_WDG3_BASE)
 
#define HPM_PWDG_BASE   (0xF40E8000UL)
 
#define HPM_PWDG   ((WDG_Type *) HPM_PWDG_BASE)
 
#define HPM_MBX0A_BASE   (0xF00A0000UL)
 
#define HPM_MBX0A   ((MBX_Type *) HPM_MBX0A_BASE)
 
#define HPM_MBX0B_BASE   (0xF00A4000UL)
 
#define HPM_MBX0B   ((MBX_Type *) HPM_MBX0B_BASE)
 
#define HPM_MBX1A_BASE   (0xF00A8000UL)
 
#define HPM_MBX1A   ((MBX_Type *) HPM_MBX1A_BASE)
 
#define HPM_MBX1B_BASE   (0xF00AC000UL)
 
#define HPM_MBX1B   ((MBX_Type *) HPM_MBX1B_BASE)
 
#define HPM_PTPC_BASE   (0xF00B0000UL)
 
#define HPM_PTPC   ((PTPC_Type *) HPM_PTPC_BASE)
 
#define HPM_DMAMUX_BASE   (0xF00C0000UL)
 
#define HPM_DMAMUX   ((DMAMUX_Type *) HPM_DMAMUX_BASE)
 
#define HPM_HDMA_BASE   (0xF00C4000UL)
 
#define HPM_HDMA   ((DMA_Type *) HPM_HDMA_BASE)
 
#define HPM_XDMA_BASE   (0xF3048000UL)
 
#define HPM_XDMA   ((DMA_Type *) HPM_XDMA_BASE)
 
#define HPM_RNG_BASE   (0xF00C8000UL)
 
#define HPM_RNG   ((RNG_Type *) HPM_RNG_BASE)
 
#define HPM_KEYM_BASE   (0xF00CC000UL)
 
#define HPM_KEYM   ((KEYM_Type *) HPM_KEYM_BASE)
 
#define HPM_I2S0_BASE   (0xF0100000UL)
 
#define HPM_I2S0   ((I2S_Type *) HPM_I2S0_BASE)
 
#define HPM_I2S1_BASE   (0xF0104000UL)
 
#define HPM_I2S1   ((I2S_Type *) HPM_I2S1_BASE)
 
#define HPM_I2S2_BASE   (0xF0108000UL)
 
#define HPM_I2S2   ((I2S_Type *) HPM_I2S2_BASE)
 
#define HPM_I2S3_BASE   (0xF010C000UL)
 
#define HPM_I2S3   ((I2S_Type *) HPM_I2S3_BASE)
 
#define HPM_DAO_BASE   (0xF0110000UL)
 
#define HPM_DAO   ((DAO_Type *) HPM_DAO_BASE)
 
#define HPM_PDM_BASE   (0xF0114000UL)
 
#define HPM_PDM   ((PDM_Type *) HPM_PDM_BASE)
 
#define HPM_PWM0_BASE   (0xF0200000UL)
 
#define HPM_PWM0   ((PWM_Type *) HPM_PWM0_BASE)
 
#define HPM_PWM1_BASE   (0xF0210000UL)
 
#define HPM_PWM1   ((PWM_Type *) HPM_PWM1_BASE)
 
#define HPM_PWM2_BASE   (0xF0220000UL)
 
#define HPM_PWM2   ((PWM_Type *) HPM_PWM2_BASE)
 
#define HPM_PWM3_BASE   (0xF0230000UL)
 
#define HPM_PWM3   ((PWM_Type *) HPM_PWM3_BASE)
 
#define HPM_HALL0_BASE   (0xF0204000UL)
 
#define HPM_HALL0   ((HALL_Type *) HPM_HALL0_BASE)
 
#define HPM_HALL1_BASE   (0xF0214000UL)
 
#define HPM_HALL1   ((HALL_Type *) HPM_HALL1_BASE)
 
#define HPM_HALL2_BASE   (0xF0224000UL)
 
#define HPM_HALL2   ((HALL_Type *) HPM_HALL2_BASE)
 
#define HPM_HALL3_BASE   (0xF0234000UL)
 
#define HPM_HALL3   ((HALL_Type *) HPM_HALL3_BASE)
 
#define HPM_QEI0_BASE   (0xF0208000UL)
 
#define HPM_QEI0   ((QEI_Type *) HPM_QEI0_BASE)
 
#define HPM_QEI1_BASE   (0xF0218000UL)
 
#define HPM_QEI1   ((QEI_Type *) HPM_QEI1_BASE)
 
#define HPM_QEI2_BASE   (0xF0228000UL)
 
#define HPM_QEI2   ((QEI_Type *) HPM_QEI2_BASE)
 
#define HPM_QEI3_BASE   (0xF0238000UL)
 
#define HPM_QEI3   ((QEI_Type *) HPM_QEI3_BASE)
 
#define HPM_TRGM0_BASE   (0xF020C000UL)
 
#define HPM_TRGM0   ((TRGM_Type *) HPM_TRGM0_BASE)
 
#define HPM_TRGM1_BASE   (0xF021C000UL)
 
#define HPM_TRGM1   ((TRGM_Type *) HPM_TRGM1_BASE)
 
#define HPM_TRGM2_BASE   (0xF022C000UL)
 
#define HPM_TRGM2   ((TRGM_Type *) HPM_TRGM2_BASE)
 
#define HPM_TRGM3_BASE   (0xF023C000UL)
 
#define HPM_TRGM3   ((TRGM_Type *) HPM_TRGM3_BASE)
 
#define HPM_SYNT_BASE   (0xF0240000UL)
 
#define HPM_SYNT   ((SYNT_Type *) HPM_SYNT_BASE)
 
#define HPM_LCDC_BASE   (0xF1000000UL)
 
#define HPM_LCDC   ((LCDC_Type *) HPM_LCDC_BASE)
 
#define HPM_CAM0_BASE   (0xF1008000UL)
 
#define HPM_CAM0   ((CAM_Type *) HPM_CAM0_BASE)
 
#define HPM_CAM1_BASE   (0xF100C000UL)
 
#define HPM_CAM1   ((CAM_Type *) HPM_CAM1_BASE)
 
#define HPM_PDMA_BASE   (0xF1010000UL)
 
#define HPM_PDMA   ((PDMA_Type *) HPM_PDMA_BASE)
 
#define HPM_JPEG_BASE   (0xF1014000UL)
 
#define HPM_JPEG   ((JPEG_Type *) HPM_JPEG_BASE)
 
#define HPM_ENET0_BASE   (0xF2000000UL)
 
#define HPM_ENET0   ((ENET_Type *) HPM_ENET0_BASE)
 
#define HPM_ENET1_BASE   (0xF2004000UL)
 
#define HPM_ENET1   ((ENET_Type *) HPM_ENET1_BASE)
 
#define HPM_NTMR0_BASE   (0xF2010000UL)
 
#define HPM_NTMR0   ((GPTMR_Type *) HPM_NTMR0_BASE)
 
#define HPM_NTMR1_BASE   (0xF2014000UL)
 
#define HPM_NTMR1   ((GPTMR_Type *) HPM_NTMR1_BASE)
 
#define HPM_GPTMR0_BASE   (0xF3000000UL)
 
#define HPM_GPTMR0   ((GPTMR_Type *) HPM_GPTMR0_BASE)
 
#define HPM_GPTMR1_BASE   (0xF3004000UL)
 
#define HPM_GPTMR1   ((GPTMR_Type *) HPM_GPTMR1_BASE)
 
#define HPM_GPTMR2_BASE   (0xF3008000UL)
 
#define HPM_GPTMR2   ((GPTMR_Type *) HPM_GPTMR2_BASE)
 
#define HPM_GPTMR3_BASE   (0xF300C000UL)
 
#define HPM_GPTMR3   ((GPTMR_Type *) HPM_GPTMR3_BASE)
 
#define HPM_GPTMR4_BASE   (0xF3010000UL)
 
#define HPM_GPTMR4   ((GPTMR_Type *) HPM_GPTMR4_BASE)
 
#define HPM_GPTMR5_BASE   (0xF3014000UL)
 
#define HPM_GPTMR5   ((GPTMR_Type *) HPM_GPTMR5_BASE)
 
#define HPM_GPTMR6_BASE   (0xF3018000UL)
 
#define HPM_GPTMR6   ((GPTMR_Type *) HPM_GPTMR6_BASE)
 
#define HPM_GPTMR7_BASE   (0xF301C000UL)
 
#define HPM_GPTMR7   ((GPTMR_Type *) HPM_GPTMR7_BASE)
 
#define HPM_PTMR_BASE   (0xF40E0000UL)
 
#define HPM_PTMR   ((GPTMR_Type *) HPM_PTMR_BASE)
 
#define HPM_USB0_BASE   (0xF2020000UL)
 
#define HPM_USB0   ((USB_Type *) HPM_USB0_BASE)
 
#define HPM_USB1_BASE   (0xF2024000UL)
 
#define HPM_USB1   ((USB_Type *) HPM_USB1_BASE)
 
#define HPM_SDXC0_BASE   (0xF2030000UL)
 
#define HPM_SDXC0   ((SDXC_Type *) HPM_SDXC0_BASE)
 
#define HPM_SDXC1_BASE   (0xF2034000UL)
 
#define HPM_SDXC1   ((SDXC_Type *) HPM_SDXC1_BASE)
 
#define HPM_CONCTL_BASE   (0xF2040000UL)
 
#define HPM_CONCTL   ((CONCTL_Type *) HPM_CONCTL_BASE)
 
#define HPM_I2C0_BASE   (0xF3020000UL)
 
#define HPM_I2C0   ((I2C_Type *) HPM_I2C0_BASE)
 
#define HPM_I2C1_BASE   (0xF3024000UL)
 
#define HPM_I2C1   ((I2C_Type *) HPM_I2C1_BASE)
 
#define HPM_I2C2_BASE   (0xF3028000UL)
 
#define HPM_I2C2   ((I2C_Type *) HPM_I2C2_BASE)
 
#define HPM_I2C3_BASE   (0xF302C000UL)
 
#define HPM_I2C3   ((I2C_Type *) HPM_I2C3_BASE)
 
#define HPM_SDP_BASE   (0xF304C000UL)
 
#define HPM_SDP   ((SDP_Type *) HPM_SDP_BASE)
 
#define HPM_FEMC_BASE   (0xF3050000UL)
 
#define HPM_FEMC   ((FEMC_Type *) HPM_FEMC_BASE)
 
#define HPM_SYSCTL_BASE   (0xF4000000UL)
 
#define HPM_SYSCTL   ((SYSCTL_Type *) HPM_SYSCTL_BASE)
 
#define HPM_IOC_BASE   (0xF4040000UL)
 
#define HPM_IOC   ((IOC_Type *) HPM_IOC_BASE)
 
#define HPM_PIOC_BASE   (0xF40D8000UL)
 
#define HPM_PIOC   ((IOC_Type *) HPM_PIOC_BASE)
 
#define HPM_BIOC_BASE   (0xF5010000UL)
 
#define HPM_BIOC   ((IOC_Type *) HPM_BIOC_BASE)
 
#define HPM_OTPSHW_BASE   (0xF4080000UL)
 
#define HPM_OTPSHW   ((OTP_Type *) HPM_OTPSHW_BASE)
 
#define HPM_OTP_BASE   (0xF40C8000UL)
 
#define HPM_OTP   ((OTP_Type *) HPM_OTP_BASE)
 
#define HPM_PPOR_BASE   (0xF40C0000UL)
 
#define HPM_PPOR   ((PPOR_Type *) HPM_PPOR_BASE)
 
#define HPM_PCFG_BASE   (0xF40C4000UL)
 
#define HPM_PCFG   ((PCFG_Type *) HPM_PCFG_BASE)
 
#define HPM_PSEC_BASE   (0xF40CC000UL)
 
#define HPM_PSEC   ((PSEC_Type *) HPM_PSEC_BASE)
 
#define HPM_PMON_BASE   (0xF40D0000UL)
 
#define HPM_PMON   ((PMON_Type *) HPM_PMON_BASE)
 
#define HPM_PGPR_BASE   (0xF40D4000UL)
 
#define HPM_PGPR   ((PGPR_Type *) HPM_PGPR_BASE)
 
#define HPM_VAD_BASE   (0xF40EC000UL)
 
#define HPM_VAD   ((VAD_Type *) HPM_VAD_BASE)
 
#define HPM_PLLCTL_BASE   (0xF4100000UL)
 
#define HPM_PLLCTL   ((PLLCTL_Type *) HPM_PLLCTL_BASE)
 
#define HPM_BPOR_BASE   (0xF5004000UL)
 
#define HPM_BPOR   ((BPOR_Type *) HPM_BPOR_BASE)
 
#define HPM_BCFG_BASE   (0xF5008000UL)
 
#define HPM_BCFG   ((BCFG_Type *) HPM_BCFG_BASE)
 
#define HPM_BUTN_BASE   (0xF500C000UL)
 
#define HPM_BUTN   ((BUTN_Type *) HPM_BUTN_BASE)
 
#define HPM_BGPR_BASE   (0xF5018000UL)
 
#define HPM_BGPR   ((BGPR_Type *) HPM_BGPR_BASE)
 
#define HPM_RTCSHW_BASE   (0xF501C000UL)
 
#define HPM_RTCSHW   ((RTC_Type *) HPM_RTCSHW_BASE)
 
#define HPM_RTC_BASE   (0xF5044000UL)
 
#define HPM_RTC   ((RTC_Type *) HPM_RTC_BASE)
 
#define HPM_BSEC_BASE   (0xF5040000UL)
 
#define HPM_BSEC   ((BSEC_Type *) HPM_BSEC_BASE)
 
#define HPM_BKEY_BASE   (0xF5048000UL)
 
#define HPM_BKEY   ((BKEY_Type *) HPM_BKEY_BASE)
 
#define HPM_BMON_BASE   (0xF504C000UL)
 
#define HPM_BMON   ((BMON_Type *) HPM_BMON_BASE)
 
#define HPM_TAMP_BASE   (0xF5050000UL)
 
#define HPM_TAMP   ((TAMP_Type *) HPM_TAMP_BASE)
 
#define HPM_MONO_BASE   (0xF5054000UL)
 
#define HPM_MONO   ((MONO_Type *) HPM_MONO_BASE)
 

Macro Definition Documentation

◆ HPM_ACMP

#define HPM_ACMP   ((ACMP_Type *) HPM_ACMP_BASE)

◆ HPM_ACMP_BASE

#define HPM_ACMP_BASE   (0xF0020000UL)

◆ HPM_ADC0

#define HPM_ADC0   ((ADC12_Type *) HPM_ADC0_BASE)

◆ HPM_ADC0_BASE

#define HPM_ADC0_BASE   (0xF0010000UL)

◆ HPM_ADC1

#define HPM_ADC1   ((ADC12_Type *) HPM_ADC1_BASE)

◆ HPM_ADC1_BASE

#define HPM_ADC1_BASE   (0xF0014000UL)

◆ HPM_ADC2

#define HPM_ADC2   ((ADC12_Type *) HPM_ADC2_BASE)

◆ HPM_ADC2_BASE

#define HPM_ADC2_BASE   (0xF0018000UL)

◆ HPM_ADC3

#define HPM_ADC3   ((ADC16_Type *) HPM_ADC3_BASE)

◆ HPM_ADC3_BASE

#define HPM_ADC3_BASE   (0xF001C000UL)

◆ HPM_BCFG

#define HPM_BCFG   ((BCFG_Type *) HPM_BCFG_BASE)

◆ HPM_BCFG_BASE

#define HPM_BCFG_BASE   (0xF5008000UL)

◆ HPM_BGPIO

#define HPM_BGPIO   ((GPIO_Type *) HPM_BGPIO_BASE)

◆ HPM_BGPIO_BASE

#define HPM_BGPIO_BASE   (0xF5014000UL)

◆ HPM_BGPR

#define HPM_BGPR   ((BGPR_Type *) HPM_BGPR_BASE)

◆ HPM_BGPR_BASE

#define HPM_BGPR_BASE   (0xF5018000UL)

◆ HPM_BIOC

#define HPM_BIOC   ((IOC_Type *) HPM_BIOC_BASE)

◆ HPM_BIOC_BASE

#define HPM_BIOC_BASE   (0xF5010000UL)

◆ HPM_BKEY

#define HPM_BKEY   ((BKEY_Type *) HPM_BKEY_BASE)

◆ HPM_BKEY_BASE

#define HPM_BKEY_BASE   (0xF5048000UL)

◆ HPM_BMON

#define HPM_BMON   ((BMON_Type *) HPM_BMON_BASE)

◆ HPM_BMON_BASE

#define HPM_BMON_BASE   (0xF504C000UL)

◆ HPM_BPOR

#define HPM_BPOR   ((BPOR_Type *) HPM_BPOR_BASE)

◆ HPM_BPOR_BASE

#define HPM_BPOR_BASE   (0xF5004000UL)

◆ HPM_BSEC

#define HPM_BSEC   ((BSEC_Type *) HPM_BSEC_BASE)

◆ HPM_BSEC_BASE

#define HPM_BSEC_BASE   (0xF5040000UL)

◆ HPM_BUTN

#define HPM_BUTN   ((BUTN_Type *) HPM_BUTN_BASE)

◆ HPM_BUTN_BASE

#define HPM_BUTN_BASE   (0xF500C000UL)

◆ HPM_CAM0

#define HPM_CAM0   ((CAM_Type *) HPM_CAM0_BASE)

◆ HPM_CAM0_BASE

#define HPM_CAM0_BASE   (0xF1008000UL)

◆ HPM_CAM1

#define HPM_CAM1   ((CAM_Type *) HPM_CAM1_BASE)

◆ HPM_CAM1_BASE

#define HPM_CAM1_BASE   (0xF100C000UL)

◆ HPM_CAN0

#define HPM_CAN0   ((CAN_Type *) HPM_CAN0_BASE)

◆ HPM_CAN0_BASE

#define HPM_CAN0_BASE   (0xF0080000UL)

◆ HPM_CAN1

#define HPM_CAN1   ((CAN_Type *) HPM_CAN1_BASE)

◆ HPM_CAN1_BASE

#define HPM_CAN1_BASE   (0xF0084000UL)

◆ HPM_CAN2

#define HPM_CAN2   ((CAN_Type *) HPM_CAN2_BASE)

◆ HPM_CAN2_BASE

#define HPM_CAN2_BASE   (0xF0088000UL)

◆ HPM_CAN3

#define HPM_CAN3   ((CAN_Type *) HPM_CAN3_BASE)

◆ HPM_CAN3_BASE

#define HPM_CAN3_BASE   (0xF008C000UL)

◆ HPM_CONCTL

#define HPM_CONCTL   ((CONCTL_Type *) HPM_CONCTL_BASE)

◆ HPM_CONCTL_BASE

#define HPM_CONCTL_BASE   (0xF2040000UL)

◆ HPM_DAO

#define HPM_DAO   ((DAO_Type *) HPM_DAO_BASE)

◆ HPM_DAO_BASE

#define HPM_DAO_BASE   (0xF0110000UL)

◆ HPM_DM_BASE

#define HPM_DM_BASE   (0x30000000UL)

◆ HPM_DMAMUX

#define HPM_DMAMUX   ((DMAMUX_Type *) HPM_DMAMUX_BASE)

◆ HPM_DMAMUX_BASE

#define HPM_DMAMUX_BASE   (0xF00C0000UL)

◆ HPM_ENET0

#define HPM_ENET0   ((ENET_Type *) HPM_ENET0_BASE)

◆ HPM_ENET0_BASE

#define HPM_ENET0_BASE   (0xF2000000UL)

◆ HPM_ENET1

#define HPM_ENET1   ((ENET_Type *) HPM_ENET1_BASE)

◆ HPM_ENET1_BASE

#define HPM_ENET1_BASE   (0xF2004000UL)

◆ HPM_FEMC

#define HPM_FEMC   ((FEMC_Type *) HPM_FEMC_BASE)

◆ HPM_FEMC_BASE

#define HPM_FEMC_BASE   (0xF3050000UL)

◆ HPM_FGPIO

#define HPM_FGPIO   ((GPIO_Type *) HPM_FGPIO_BASE)

◆ HPM_FGPIO_BASE

#define HPM_FGPIO_BASE   (0xC0000UL)

◆ HPM_GPIO0

#define HPM_GPIO0   ((GPIO_Type *) HPM_GPIO0_BASE)

◆ HPM_GPIO0_BASE

#define HPM_GPIO0_BASE   (0xF0000000UL)

◆ HPM_GPIO1

#define HPM_GPIO1   ((GPIO_Type *) HPM_GPIO1_BASE)

◆ HPM_GPIO1_BASE

#define HPM_GPIO1_BASE   (0xF0004000UL)

◆ HPM_GPIOM

#define HPM_GPIOM   ((GPIOM_Type *) HPM_GPIOM_BASE)

◆ HPM_GPIOM_BASE

#define HPM_GPIOM_BASE   (0xF0008000UL)

◆ HPM_GPTMR0

#define HPM_GPTMR0   ((GPTMR_Type *) HPM_GPTMR0_BASE)

◆ HPM_GPTMR0_BASE

#define HPM_GPTMR0_BASE   (0xF3000000UL)

◆ HPM_GPTMR1

#define HPM_GPTMR1   ((GPTMR_Type *) HPM_GPTMR1_BASE)

◆ HPM_GPTMR1_BASE

#define HPM_GPTMR1_BASE   (0xF3004000UL)

◆ HPM_GPTMR2

#define HPM_GPTMR2   ((GPTMR_Type *) HPM_GPTMR2_BASE)

◆ HPM_GPTMR2_BASE

#define HPM_GPTMR2_BASE   (0xF3008000UL)

◆ HPM_GPTMR3

#define HPM_GPTMR3   ((GPTMR_Type *) HPM_GPTMR3_BASE)

◆ HPM_GPTMR3_BASE

#define HPM_GPTMR3_BASE   (0xF300C000UL)

◆ HPM_GPTMR4

#define HPM_GPTMR4   ((GPTMR_Type *) HPM_GPTMR4_BASE)

◆ HPM_GPTMR4_BASE

#define HPM_GPTMR4_BASE   (0xF3010000UL)

◆ HPM_GPTMR5

#define HPM_GPTMR5   ((GPTMR_Type *) HPM_GPTMR5_BASE)

◆ HPM_GPTMR5_BASE

#define HPM_GPTMR5_BASE   (0xF3014000UL)

◆ HPM_GPTMR6

#define HPM_GPTMR6   ((GPTMR_Type *) HPM_GPTMR6_BASE)

◆ HPM_GPTMR6_BASE

#define HPM_GPTMR6_BASE   (0xF3018000UL)

◆ HPM_GPTMR7

#define HPM_GPTMR7   ((GPTMR_Type *) HPM_GPTMR7_BASE)

◆ HPM_GPTMR7_BASE

#define HPM_GPTMR7_BASE   (0xF301C000UL)

◆ HPM_HALL0

#define HPM_HALL0   ((HALL_Type *) HPM_HALL0_BASE)

◆ HPM_HALL0_BASE

#define HPM_HALL0_BASE   (0xF0204000UL)

◆ HPM_HALL1

#define HPM_HALL1   ((HALL_Type *) HPM_HALL1_BASE)

◆ HPM_HALL1_BASE

#define HPM_HALL1_BASE   (0xF0214000UL)

◆ HPM_HALL2

#define HPM_HALL2   ((HALL_Type *) HPM_HALL2_BASE)

◆ HPM_HALL2_BASE

#define HPM_HALL2_BASE   (0xF0224000UL)

◆ HPM_HALL3

#define HPM_HALL3   ((HALL_Type *) HPM_HALL3_BASE)

◆ HPM_HALL3_BASE

#define HPM_HALL3_BASE   (0xF0234000UL)

◆ HPM_HDMA

#define HPM_HDMA   ((DMA_Type *) HPM_HDMA_BASE)

◆ HPM_HDMA_BASE

#define HPM_HDMA_BASE   (0xF00C4000UL)

◆ HPM_I2C0

#define HPM_I2C0   ((I2C_Type *) HPM_I2C0_BASE)

◆ HPM_I2C0_BASE

#define HPM_I2C0_BASE   (0xF3020000UL)

◆ HPM_I2C1

#define HPM_I2C1   ((I2C_Type *) HPM_I2C1_BASE)

◆ HPM_I2C1_BASE

#define HPM_I2C1_BASE   (0xF3024000UL)

◆ HPM_I2C2

#define HPM_I2C2   ((I2C_Type *) HPM_I2C2_BASE)

◆ HPM_I2C2_BASE

#define HPM_I2C2_BASE   (0xF3028000UL)

◆ HPM_I2C3

#define HPM_I2C3   ((I2C_Type *) HPM_I2C3_BASE)

◆ HPM_I2C3_BASE

#define HPM_I2C3_BASE   (0xF302C000UL)

◆ HPM_I2S0

#define HPM_I2S0   ((I2S_Type *) HPM_I2S0_BASE)

◆ HPM_I2S0_BASE

#define HPM_I2S0_BASE   (0xF0100000UL)

◆ HPM_I2S1

#define HPM_I2S1   ((I2S_Type *) HPM_I2S1_BASE)

◆ HPM_I2S1_BASE

#define HPM_I2S1_BASE   (0xF0104000UL)

◆ HPM_I2S2

#define HPM_I2S2   ((I2S_Type *) HPM_I2S2_BASE)

◆ HPM_I2S2_BASE

#define HPM_I2S2_BASE   (0xF0108000UL)

◆ HPM_I2S3

#define HPM_I2S3   ((I2S_Type *) HPM_I2S3_BASE)

◆ HPM_I2S3_BASE

#define HPM_I2S3_BASE   (0xF010C000UL)

◆ HPM_IOC

#define HPM_IOC   ((IOC_Type *) HPM_IOC_BASE)

◆ HPM_IOC_BASE

#define HPM_IOC_BASE   (0xF4040000UL)

◆ HPM_JPEG

#define HPM_JPEG   ((JPEG_Type *) HPM_JPEG_BASE)

◆ HPM_JPEG_BASE

#define HPM_JPEG_BASE   (0xF1014000UL)

◆ HPM_KEYM

#define HPM_KEYM   ((KEYM_Type *) HPM_KEYM_BASE)

◆ HPM_KEYM_BASE

#define HPM_KEYM_BASE   (0xF00CC000UL)

◆ HPM_LCDC

#define HPM_LCDC   ((LCDC_Type *) HPM_LCDC_BASE)

◆ HPM_LCDC_BASE

#define HPM_LCDC_BASE   (0xF1000000UL)

◆ HPM_MBX0A

#define HPM_MBX0A   ((MBX_Type *) HPM_MBX0A_BASE)

◆ HPM_MBX0A_BASE

#define HPM_MBX0A_BASE   (0xF00A0000UL)

◆ HPM_MBX0B

#define HPM_MBX0B   ((MBX_Type *) HPM_MBX0B_BASE)

◆ HPM_MBX0B_BASE

#define HPM_MBX0B_BASE   (0xF00A4000UL)

◆ HPM_MBX1A

#define HPM_MBX1A   ((MBX_Type *) HPM_MBX1A_BASE)

◆ HPM_MBX1A_BASE

#define HPM_MBX1A_BASE   (0xF00A8000UL)

◆ HPM_MBX1B

#define HPM_MBX1B   ((MBX_Type *) HPM_MBX1B_BASE)

◆ HPM_MBX1B_BASE

#define HPM_MBX1B_BASE   (0xF00AC000UL)

◆ HPM_MCHTMR

#define HPM_MCHTMR   ((MCHTMR_Type *) HPM_MCHTMR_BASE)

◆ HPM_MCHTMR_BASE

#define HPM_MCHTMR_BASE   (0xE6000000UL)

◆ HPM_MONO

#define HPM_MONO   ((MONO_Type *) HPM_MONO_BASE)

◆ HPM_MONO_BASE

#define HPM_MONO_BASE   (0xF5054000UL)

◆ HPM_NTMR0

#define HPM_NTMR0   ((GPTMR_Type *) HPM_NTMR0_BASE)

◆ HPM_NTMR0_BASE

#define HPM_NTMR0_BASE   (0xF2010000UL)

◆ HPM_NTMR1

#define HPM_NTMR1   ((GPTMR_Type *) HPM_NTMR1_BASE)

◆ HPM_NTMR1_BASE

#define HPM_NTMR1_BASE   (0xF2014000UL)

◆ HPM_OTP

#define HPM_OTP   ((OTP_Type *) HPM_OTP_BASE)

◆ HPM_OTP_BASE

#define HPM_OTP_BASE   (0xF40C8000UL)

◆ HPM_OTPSHW

#define HPM_OTPSHW   ((OTP_Type *) HPM_OTPSHW_BASE)

◆ HPM_OTPSHW_BASE

#define HPM_OTPSHW_BASE   (0xF4080000UL)

◆ HPM_PCFG

#define HPM_PCFG   ((PCFG_Type *) HPM_PCFG_BASE)

◆ HPM_PCFG_BASE

#define HPM_PCFG_BASE   (0xF40C4000UL)

◆ HPM_PDM

#define HPM_PDM   ((PDM_Type *) HPM_PDM_BASE)

◆ HPM_PDM_BASE

#define HPM_PDM_BASE   (0xF0114000UL)

◆ HPM_PDMA

#define HPM_PDMA   ((PDMA_Type *) HPM_PDMA_BASE)

◆ HPM_PDMA_BASE

#define HPM_PDMA_BASE   (0xF1010000UL)

◆ HPM_PGPIO

#define HPM_PGPIO   ((GPIO_Type *) HPM_PGPIO_BASE)

◆ HPM_PGPIO_BASE

#define HPM_PGPIO_BASE   (0xF40DC000UL)

◆ HPM_PGPR

#define HPM_PGPR   ((PGPR_Type *) HPM_PGPR_BASE)

◆ HPM_PGPR_BASE

#define HPM_PGPR_BASE   (0xF40D4000UL)

◆ HPM_PIOC

#define HPM_PIOC   ((IOC_Type *) HPM_PIOC_BASE)

◆ HPM_PIOC_BASE

#define HPM_PIOC_BASE   (0xF40D8000UL)

◆ HPM_PLIC

#define HPM_PLIC   ((PLIC_Type *) HPM_PLIC_BASE)

◆ HPM_PLIC_BASE

#define HPM_PLIC_BASE   (0xE4000000UL)

◆ HPM_PLICSW

#define HPM_PLICSW   ((PLIC_SW_Type *) HPM_PLICSW_BASE)

◆ HPM_PLICSW_BASE

#define HPM_PLICSW_BASE   (0xE6400000UL)

◆ HPM_PLLCTL

#define HPM_PLLCTL   ((PLLCTL_Type *) HPM_PLLCTL_BASE)

◆ HPM_PLLCTL_BASE

#define HPM_PLLCTL_BASE   (0xF4100000UL)

◆ HPM_PMON

#define HPM_PMON   ((PMON_Type *) HPM_PMON_BASE)

◆ HPM_PMON_BASE

#define HPM_PMON_BASE   (0xF40D0000UL)

◆ HPM_PPOR

#define HPM_PPOR   ((PPOR_Type *) HPM_PPOR_BASE)

◆ HPM_PPOR_BASE

#define HPM_PPOR_BASE   (0xF40C0000UL)

◆ HPM_PSEC

#define HPM_PSEC   ((PSEC_Type *) HPM_PSEC_BASE)

◆ HPM_PSEC_BASE

#define HPM_PSEC_BASE   (0xF40CC000UL)

◆ HPM_PTMR

#define HPM_PTMR   ((GPTMR_Type *) HPM_PTMR_BASE)

◆ HPM_PTMR_BASE

#define HPM_PTMR_BASE   (0xF40E0000UL)

◆ HPM_PTPC

#define HPM_PTPC   ((PTPC_Type *) HPM_PTPC_BASE)

◆ HPM_PTPC_BASE

#define HPM_PTPC_BASE   (0xF00B0000UL)

◆ HPM_PUART

#define HPM_PUART   ((UART_Type *) HPM_PUART_BASE)

◆ HPM_PUART_BASE

#define HPM_PUART_BASE   (0xF40E4000UL)

◆ HPM_PWDG

#define HPM_PWDG   ((WDG_Type *) HPM_PWDG_BASE)

◆ HPM_PWDG_BASE

#define HPM_PWDG_BASE   (0xF40E8000UL)

◆ HPM_PWM0

#define HPM_PWM0   ((PWM_Type *) HPM_PWM0_BASE)

◆ HPM_PWM0_BASE

#define HPM_PWM0_BASE   (0xF0200000UL)

◆ HPM_PWM1

#define HPM_PWM1   ((PWM_Type *) HPM_PWM1_BASE)

◆ HPM_PWM1_BASE

#define HPM_PWM1_BASE   (0xF0210000UL)

◆ HPM_PWM2

#define HPM_PWM2   ((PWM_Type *) HPM_PWM2_BASE)

◆ HPM_PWM2_BASE

#define HPM_PWM2_BASE   (0xF0220000UL)

◆ HPM_PWM3

#define HPM_PWM3   ((PWM_Type *) HPM_PWM3_BASE)

◆ HPM_PWM3_BASE

#define HPM_PWM3_BASE   (0xF0230000UL)

◆ HPM_QEI0

#define HPM_QEI0   ((QEI_Type *) HPM_QEI0_BASE)

◆ HPM_QEI0_BASE

#define HPM_QEI0_BASE   (0xF0208000UL)

◆ HPM_QEI1

#define HPM_QEI1   ((QEI_Type *) HPM_QEI1_BASE)

◆ HPM_QEI1_BASE

#define HPM_QEI1_BASE   (0xF0218000UL)

◆ HPM_QEI2

#define HPM_QEI2   ((QEI_Type *) HPM_QEI2_BASE)

◆ HPM_QEI2_BASE

#define HPM_QEI2_BASE   (0xF0228000UL)

◆ HPM_QEI3

#define HPM_QEI3   ((QEI_Type *) HPM_QEI3_BASE)

◆ HPM_QEI3_BASE

#define HPM_QEI3_BASE   (0xF0238000UL)

◆ HPM_RNG

#define HPM_RNG   ((RNG_Type *) HPM_RNG_BASE)

◆ HPM_RNG_BASE

#define HPM_RNG_BASE   (0xF00C8000UL)

◆ HPM_RTC

#define HPM_RTC   ((RTC_Type *) HPM_RTC_BASE)

◆ HPM_RTC_BASE

#define HPM_RTC_BASE   (0xF5044000UL)

◆ HPM_RTCSHW

#define HPM_RTCSHW   ((RTC_Type *) HPM_RTCSHW_BASE)

◆ HPM_RTCSHW_BASE

#define HPM_RTCSHW_BASE   (0xF501C000UL)

◆ HPM_SDP

#define HPM_SDP   ((SDP_Type *) HPM_SDP_BASE)

◆ HPM_SDP_BASE

#define HPM_SDP_BASE   (0xF304C000UL)

◆ HPM_SDXC0

#define HPM_SDXC0   ((SDXC_Type *) HPM_SDXC0_BASE)

◆ HPM_SDXC0_BASE

#define HPM_SDXC0_BASE   (0xF2030000UL)

◆ HPM_SDXC1

#define HPM_SDXC1   ((SDXC_Type *) HPM_SDXC1_BASE)

◆ HPM_SDXC1_BASE

#define HPM_SDXC1_BASE   (0xF2034000UL)

◆ HPM_SPI0

#define HPM_SPI0   ((SPI_Type *) HPM_SPI0_BASE)

◆ HPM_SPI0_BASE

#define HPM_SPI0_BASE   (0xF0030000UL)

◆ HPM_SPI1

#define HPM_SPI1   ((SPI_Type *) HPM_SPI1_BASE)

◆ HPM_SPI1_BASE

#define HPM_SPI1_BASE   (0xF0034000UL)

◆ HPM_SPI2

#define HPM_SPI2   ((SPI_Type *) HPM_SPI2_BASE)

◆ HPM_SPI2_BASE

#define HPM_SPI2_BASE   (0xF0038000UL)

◆ HPM_SPI3

#define HPM_SPI3   ((SPI_Type *) HPM_SPI3_BASE)

◆ HPM_SPI3_BASE

#define HPM_SPI3_BASE   (0xF003C000UL)

◆ HPM_SYNT

#define HPM_SYNT   ((SYNT_Type *) HPM_SYNT_BASE)

◆ HPM_SYNT_BASE

#define HPM_SYNT_BASE   (0xF0240000UL)

◆ HPM_SYSCTL

#define HPM_SYSCTL   ((SYSCTL_Type *) HPM_SYSCTL_BASE)

◆ HPM_SYSCTL_BASE

#define HPM_SYSCTL_BASE   (0xF4000000UL)

◆ HPM_TAMP

#define HPM_TAMP   ((TAMP_Type *) HPM_TAMP_BASE)

◆ HPM_TAMP_BASE

#define HPM_TAMP_BASE   (0xF5050000UL)

◆ HPM_TRGM0

#define HPM_TRGM0   ((TRGM_Type *) HPM_TRGM0_BASE)

◆ HPM_TRGM0_BASE

#define HPM_TRGM0_BASE   (0xF020C000UL)

◆ HPM_TRGM1

#define HPM_TRGM1   ((TRGM_Type *) HPM_TRGM1_BASE)

◆ HPM_TRGM1_BASE

#define HPM_TRGM1_BASE   (0xF021C000UL)

◆ HPM_TRGM2

#define HPM_TRGM2   ((TRGM_Type *) HPM_TRGM2_BASE)

◆ HPM_TRGM2_BASE

#define HPM_TRGM2_BASE   (0xF022C000UL)

◆ HPM_TRGM3

#define HPM_TRGM3   ((TRGM_Type *) HPM_TRGM3_BASE)

◆ HPM_TRGM3_BASE

#define HPM_TRGM3_BASE   (0xF023C000UL)

◆ HPM_UART0

#define HPM_UART0   ((UART_Type *) HPM_UART0_BASE)

◆ HPM_UART0_BASE

#define HPM_UART0_BASE   (0xF0040000UL)

◆ HPM_UART1

#define HPM_UART1   ((UART_Type *) HPM_UART1_BASE)

◆ HPM_UART10

#define HPM_UART10   ((UART_Type *) HPM_UART10_BASE)

◆ HPM_UART10_BASE

#define HPM_UART10_BASE   (0xF0068000UL)

◆ HPM_UART11

#define HPM_UART11   ((UART_Type *) HPM_UART11_BASE)

◆ HPM_UART11_BASE

#define HPM_UART11_BASE   (0xF006C000UL)

◆ HPM_UART12

#define HPM_UART12   ((UART_Type *) HPM_UART12_BASE)

◆ HPM_UART12_BASE

#define HPM_UART12_BASE   (0xF0070000UL)

◆ HPM_UART13

#define HPM_UART13   ((UART_Type *) HPM_UART13_BASE)

◆ HPM_UART13_BASE

#define HPM_UART13_BASE   (0xF0074000UL)

◆ HPM_UART14

#define HPM_UART14   ((UART_Type *) HPM_UART14_BASE)

◆ HPM_UART14_BASE

#define HPM_UART14_BASE   (0xF0078000UL)

◆ HPM_UART15

#define HPM_UART15   ((UART_Type *) HPM_UART15_BASE)

◆ HPM_UART15_BASE

#define HPM_UART15_BASE   (0xF007C000UL)

◆ HPM_UART1_BASE

#define HPM_UART1_BASE   (0xF0044000UL)

◆ HPM_UART2

#define HPM_UART2   ((UART_Type *) HPM_UART2_BASE)

◆ HPM_UART2_BASE

#define HPM_UART2_BASE   (0xF0048000UL)

◆ HPM_UART3

#define HPM_UART3   ((UART_Type *) HPM_UART3_BASE)

◆ HPM_UART3_BASE

#define HPM_UART3_BASE   (0xF004C000UL)

◆ HPM_UART4

#define HPM_UART4   ((UART_Type *) HPM_UART4_BASE)

◆ HPM_UART4_BASE

#define HPM_UART4_BASE   (0xF0050000UL)

◆ HPM_UART5

#define HPM_UART5   ((UART_Type *) HPM_UART5_BASE)

◆ HPM_UART5_BASE

#define HPM_UART5_BASE   (0xF0054000UL)

◆ HPM_UART6

#define HPM_UART6   ((UART_Type *) HPM_UART6_BASE)

◆ HPM_UART6_BASE

#define HPM_UART6_BASE   (0xF0058000UL)

◆ HPM_UART7

#define HPM_UART7   ((UART_Type *) HPM_UART7_BASE)

◆ HPM_UART7_BASE

#define HPM_UART7_BASE   (0xF005C000UL)

◆ HPM_UART8

#define HPM_UART8   ((UART_Type *) HPM_UART8_BASE)

◆ HPM_UART8_BASE

#define HPM_UART8_BASE   (0xF0060000UL)

◆ HPM_UART9

#define HPM_UART9   ((UART_Type *) HPM_UART9_BASE)

◆ HPM_UART9_BASE

#define HPM_UART9_BASE   (0xF0064000UL)

◆ HPM_USB0

#define HPM_USB0   ((USB_Type *) HPM_USB0_BASE)

◆ HPM_USB0_BASE

#define HPM_USB0_BASE   (0xF2020000UL)

◆ HPM_USB1

#define HPM_USB1   ((USB_Type *) HPM_USB1_BASE)

◆ HPM_USB1_BASE

#define HPM_USB1_BASE   (0xF2024000UL)

◆ HPM_VAD

#define HPM_VAD   ((VAD_Type *) HPM_VAD_BASE)

◆ HPM_VAD_BASE

#define HPM_VAD_BASE   (0xF40EC000UL)

◆ HPM_WDG0

#define HPM_WDG0   ((WDG_Type *) HPM_WDG0_BASE)

◆ HPM_WDG0_BASE

#define HPM_WDG0_BASE   (0xF0090000UL)

◆ HPM_WDG1

#define HPM_WDG1   ((WDG_Type *) HPM_WDG1_BASE)

◆ HPM_WDG1_BASE

#define HPM_WDG1_BASE   (0xF0094000UL)

◆ HPM_WDG2

#define HPM_WDG2   ((WDG_Type *) HPM_WDG2_BASE)

◆ HPM_WDG2_BASE

#define HPM_WDG2_BASE   (0xF0098000UL)

◆ HPM_WDG3

#define HPM_WDG3   ((WDG_Type *) HPM_WDG3_BASE)

◆ HPM_WDG3_BASE

#define HPM_WDG3_BASE   (0xF009C000UL)

◆ HPM_XDMA

#define HPM_XDMA   ((DMA_Type *) HPM_XDMA_BASE)

◆ HPM_XDMA_BASE

#define HPM_XDMA_BASE   (0xF3048000UL)

◆ IRQn_ACMP_0

#define IRQn_ACMP_0   23 /* ACMP[0] IRQ */

◆ IRQn_ACMP_1

#define IRQn_ACMP_1   24 /* ACMP[1] IRQ */

◆ IRQn_ACMP_2

#define IRQn_ACMP_2   25 /* ACMP[2] IRQ */

◆ IRQn_ACMP_3

#define IRQn_ACMP_3   26 /* ACMP[3] IRQ */

◆ IRQn_ADC0

#define IRQn_ADC0   19 /* ADC0 IRQ */

◆ IRQn_ADC1

#define IRQn_ADC1   20 /* ADC1 IRQ */

◆ IRQn_ADC2

#define IRQn_ADC2   21 /* ADC2 IRQ */

◆ IRQn_ADC3

#define IRQn_ADC3   22 /* ADC3 IRQ */

◆ IRQn_BGPIO

#define IRQn_BGPIO   122 /* BGPIO IRQ */

◆ IRQn_BROWNOUT

#define IRQn_BROWNOUT   124 /* BROWNOUT IRQ */

◆ IRQn_BUTN

#define IRQn_BUTN   121 /* BUTN IRQ */

◆ IRQn_BVIO

#define IRQn_BVIO   123 /* BVIO IRQ */

◆ IRQn_CAM0

#define IRQn_CAM0   97 /* CAM0 IRQ */

◆ IRQn_CAM1

#define IRQn_CAM1   98 /* CAM1 IRQ */

◆ IRQn_CAN0

#define IRQn_CAN0   47 /* CAN0 IRQ */

◆ IRQn_CAN1

#define IRQn_CAN1   48 /* CAN1 IRQ */

◆ IRQn_CAN2

#define IRQn_CAN2   49 /* CAN2 IRQ */

◆ IRQn_CAN3

#define IRQn_CAN3   50 /* CAN3 IRQ */

◆ IRQn_DAO

#define IRQn_DAO   95 /* DAO IRQ */

◆ IRQn_DEBUG_0

#define IRQn_DEBUG_0   126 /* DEBUG[0] IRQ */

◆ IRQn_DEBUG_1

#define IRQn_DEBUG_1   127 /* DEBUG[1] IRQ */

◆ IRQn_ENET0

#define IRQn_ENET0   108 /* ENET0 IRQ */

◆ IRQn_ENET1

#define IRQn_ENET1   109 /* ENET1 IRQ */

◆ IRQn_FEMC

#define IRQn_FEMC   89 /* FEMC IRQ */

◆ IRQn_FUSE

#define IRQn_FUSE   118 /* FUSE IRQ */

◆ IRQn_GPIO0_A

#define IRQn_GPIO0_A   1 /* GPIO0_A IRQ */

◆ IRQn_GPIO0_B

#define IRQn_GPIO0_B   2 /* GPIO0_B IRQ */

◆ IRQn_GPIO0_C

#define IRQn_GPIO0_C   3 /* GPIO0_C IRQ */

◆ IRQn_GPIO0_D

#define IRQn_GPIO0_D   4 /* GPIO0_D IRQ */

◆ IRQn_GPIO0_E

#define IRQn_GPIO0_E   5 /* GPIO0_E IRQ */

◆ IRQn_GPIO0_F

#define IRQn_GPIO0_F   6 /* GPIO0_F IRQ */

◆ IRQn_GPIO0_X

#define IRQn_GPIO0_X   7 /* GPIO0_X IRQ */

◆ IRQn_GPIO0_Y

#define IRQn_GPIO0_Y   8 /* GPIO0_Y IRQ */

◆ IRQn_GPIO0_Z

#define IRQn_GPIO0_Z   9 /* GPIO0_Z IRQ */

◆ IRQn_GPIO1_A

#define IRQn_GPIO1_A   10 /* GPIO1_A IRQ */

◆ IRQn_GPIO1_B

#define IRQn_GPIO1_B   11 /* GPIO1_B IRQ */

◆ IRQn_GPIO1_C

#define IRQn_GPIO1_C   12 /* GPIO1_C IRQ */

◆ IRQn_GPIO1_D

#define IRQn_GPIO1_D   13 /* GPIO1_D IRQ */

◆ IRQn_GPIO1_E

#define IRQn_GPIO1_E   14 /* GPIO1_E IRQ */

◆ IRQn_GPIO1_F

#define IRQn_GPIO1_F   15 /* GPIO1_F IRQ */

◆ IRQn_GPIO1_X

#define IRQn_GPIO1_X   16 /* GPIO1_X IRQ */

◆ IRQn_GPIO1_Y

#define IRQn_GPIO1_Y   17 /* GPIO1_Y IRQ */

◆ IRQn_GPIO1_Z

#define IRQn_GPIO1_Z   18 /* GPIO1_Z IRQ */

◆ IRQn_GPTMR0

#define IRQn_GPTMR0   60 /* GPTMR0 IRQ */

◆ IRQn_GPTMR1

#define IRQn_GPTMR1   61 /* GPTMR1 IRQ */

◆ IRQn_GPTMR2

#define IRQn_GPTMR2   62 /* GPTMR2 IRQ */

◆ IRQn_GPTMR3

#define IRQn_GPTMR3   63 /* GPTMR3 IRQ */

◆ IRQn_GPTMR4

#define IRQn_GPTMR4   64 /* GPTMR4 IRQ */

◆ IRQn_GPTMR5

#define IRQn_GPTMR5   65 /* GPTMR5 IRQ */

◆ IRQn_GPTMR6

#define IRQn_GPTMR6   66 /* GPTMR6 IRQ */

◆ IRQn_GPTMR7

#define IRQn_GPTMR7   67 /* GPTMR7 IRQ */

◆ IRQn_HALL0

#define IRQn_HALL0   73 /* HALL0 IRQ */

◆ IRQn_HALL1

#define IRQn_HALL1   76 /* HALL1 IRQ */

◆ IRQn_HALL2

#define IRQn_HALL2   79 /* HALL2 IRQ */

◆ IRQn_HALL3

#define IRQn_HALL3   82 /* HALL3 IRQ */

◆ IRQn_HDMA

#define IRQn_HDMA   88 /* HDMA IRQ */

◆ IRQn_I2C0

#define IRQn_I2C0   68 /* I2C0 IRQ */

◆ IRQn_I2C1

#define IRQn_I2C1   69 /* I2C1 IRQ */

◆ IRQn_I2C2

#define IRQn_I2C2   70 /* I2C2 IRQ */

◆ IRQn_I2C3

#define IRQn_I2C3   71 /* I2C3 IRQ */

◆ IRQn_I2S0

#define IRQn_I2S0   91 /* I2S0 IRQ */

◆ IRQn_I2S1

#define IRQn_I2S1   92 /* I2S1 IRQ */

◆ IRQn_I2S2

#define IRQn_I2S2   93 /* I2S2 IRQ */

◆ IRQn_I2S3

#define IRQn_I2S3   94 /* I2S3 IRQ */

◆ IRQn_JPEG

#define IRQn_JPEG   103 /* JPEG IRQ */

◆ IRQn_LCDC_D0

#define IRQn_LCDC_D0   99 /* LCDC_D0 IRQ */

◆ IRQn_LCDC_D1

#define IRQn_LCDC_D1   100 /* LCDC_D1 IRQ */

◆ IRQn_MBX0A

#define IRQn_MBX0A   56 /* MBX0A IRQ */

◆ IRQn_MBX0B

#define IRQn_MBX0B   57 /* MBX0B IRQ */

◆ IRQn_MBX1A

#define IRQn_MBX1A   58 /* MBX1A IRQ */

◆ IRQn_MBX1B

#define IRQn_MBX1B   59 /* MBX1B IRQ */

◆ IRQn_NTMR0

#define IRQn_NTMR0   104 /* NTMR0 IRQ */

◆ IRQn_NTMR1

#define IRQn_NTMR1   105 /* NTMR1 IRQ */

◆ IRQn_PDM

#define IRQn_PDM   96 /* PDM IRQ */

◆ IRQn_PDMA_D0

#define IRQn_PDMA_D0   101 /* PDMA_D0 IRQ */

◆ IRQn_PDMA_D1

#define IRQn_PDMA_D1   102 /* PDMA_D1 IRQ */

◆ IRQn_PGPIO

#define IRQn_PGPIO   113 /* PGPIO IRQ */

◆ IRQn_PSEC

#define IRQn_PSEC   112 /* PSEC IRQ */

◆ IRQn_PTMR

#define IRQn_PTMR   115 /* PTMR IRQ */

◆ IRQn_PTPC

#define IRQn_PTPC   51 /* PTPC IRQ */

◆ IRQn_PUART

#define IRQn_PUART   116 /* PUART IRQ */

◆ IRQn_PWDG

#define IRQn_PWDG   114 /* PWDG IRQ */

◆ IRQn_PWM0

#define IRQn_PWM0   72 /* PWM0 IRQ */

◆ IRQn_PWM1

#define IRQn_PWM1   75 /* PWM1 IRQ */

◆ IRQn_PWM2

#define IRQn_PWM2   78 /* PWM2 IRQ */

◆ IRQn_PWM3

#define IRQn_PWM3   81 /* PWM3 IRQ */

◆ IRQn_QEI0

#define IRQn_QEI0   74 /* QEI0 IRQ */

◆ IRQn_QEI1

#define IRQn_QEI1   77 /* QEI1 IRQ */

◆ IRQn_QEI2

#define IRQn_QEI2   80 /* QEI2 IRQ */

◆ IRQn_QEI3

#define IRQn_QEI3   83 /* QEI3 IRQ */

◆ IRQn_RNG

#define IRQn_RNG   90 /* RNG IRQ */

◆ IRQn_RTC

#define IRQn_RTC   120 /* RTC IRQ */

◆ IRQn_SDP

#define IRQn_SDP   84 /* SDP IRQ */

◆ IRQn_SDXC0

#define IRQn_SDXC0   110 /* SDXC0 IRQ */

◆ IRQn_SDXC1

#define IRQn_SDXC1   111 /* SDXC1 IRQ */

◆ IRQn_SECMON

#define IRQn_SECMON   119 /* SECMON IRQ */

◆ IRQn_SPI0

#define IRQn_SPI0   27 /* SPI0 IRQ */

◆ IRQn_SPI1

#define IRQn_SPI1   28 /* SPI1 IRQ */

◆ IRQn_SPI2

#define IRQn_SPI2   29 /* SPI2 IRQ */

◆ IRQn_SPI3

#define IRQn_SPI3   30 /* SPI3 IRQ */

◆ IRQn_SYSCTL

#define IRQn_SYSCTL   125 /* SYSCTL IRQ */

◆ IRQn_UART0

#define IRQn_UART0   31 /* UART0 IRQ */

◆ IRQn_UART1

#define IRQn_UART1   32 /* UART1 IRQ */

◆ IRQn_UART10

#define IRQn_UART10   41 /* UART10 IRQ */

◆ IRQn_UART11

#define IRQn_UART11   42 /* UART11 IRQ */

◆ IRQn_UART12

#define IRQn_UART12   43 /* UART12 IRQ */

◆ IRQn_UART13

#define IRQn_UART13   44 /* UART13 IRQ */

◆ IRQn_UART14

#define IRQn_UART14   45 /* UART14 IRQ */

◆ IRQn_UART15

#define IRQn_UART15   46 /* UART15 IRQ */

◆ IRQn_UART2

#define IRQn_UART2   33 /* UART2 IRQ */

◆ IRQn_UART3

#define IRQn_UART3   34 /* UART3 IRQ */

◆ IRQn_UART4

#define IRQn_UART4   35 /* UART4 IRQ */

◆ IRQn_UART5

#define IRQn_UART5   36 /* UART5 IRQ */

◆ IRQn_UART6

#define IRQn_UART6   37 /* UART6 IRQ */

◆ IRQn_UART7

#define IRQn_UART7   38 /* UART7 IRQ */

◆ IRQn_UART8

#define IRQn_UART8   39 /* UART8 IRQ */

◆ IRQn_UART9

#define IRQn_UART9   40 /* UART9 IRQ */

◆ IRQn_USB0

#define IRQn_USB0   106 /* USB0 IRQ */

◆ IRQn_USB1

#define IRQn_USB1   107 /* USB1 IRQ */

◆ IRQn_VAD

#define IRQn_VAD   117 /* VAD IRQ */

◆ IRQn_WDG0

#define IRQn_WDG0   52 /* WDG0 IRQ */

◆ IRQn_WDG1

#define IRQn_WDG1   53 /* WDG1 IRQ */

◆ IRQn_WDG2

#define IRQn_WDG2   54 /* WDG2 IRQ */

◆ IRQn_WDG3

#define IRQn_WDG3   55 /* WDG3 IRQ */

◆ IRQn_XDMA

#define IRQn_XDMA   87 /* XDMA IRQ */

◆ IRQn_XPI0

#define IRQn_XPI0   85 /* XPI0 IRQ */

◆ IRQn_XPI1

#define IRQn_XPI1   86 /* XPI1 IRQ */