Macros
#define	HPM_DMA_SRC_SPI0_RX (0x0UL)

#define	HPM_DMA_SRC_SPI0_TX (0x1UL)

#define	HPM_DMA_SRC_SPI1_RX (0x2UL)

#define	HPM_DMA_SRC_SPI1_TX (0x3UL)

#define	HPM_DMA_SRC_SPI2_RX (0x4UL)

#define	HPM_DMA_SRC_SPI2_TX (0x5UL)

#define	HPM_DMA_SRC_SPI3_RX (0x6UL)

#define	HPM_DMA_SRC_SPI3_TX (0x7UL)

#define	HPM_DMA_SRC_UART0_RX (0x8UL)

#define	HPM_DMA_SRC_UART0_TX (0x9UL)

#define	HPM_DMA_SRC_UART1_RX (0xAUL)

#define	HPM_DMA_SRC_UART1_TX (0xBUL)

#define	HPM_DMA_SRC_UART2_RX (0xCUL)

#define	HPM_DMA_SRC_UART2_TX (0xDUL)

#define	HPM_DMA_SRC_UART3_RX (0xEUL)

#define	HPM_DMA_SRC_UART3_TX (0xFUL)

#define	HPM_DMA_SRC_UART4_RX (0x10UL)

#define	HPM_DMA_SRC_UART4_TX (0x11UL)

#define	HPM_DMA_SRC_UART5_RX (0x12UL)

#define	HPM_DMA_SRC_UART5_TX (0x13UL)

#define	HPM_DMA_SRC_UART6_RX (0x14UL)

#define	HPM_DMA_SRC_UART6_TX (0x15UL)

#define	HPM_DMA_SRC_UART7_RX (0x16UL)

#define	HPM_DMA_SRC_UART7_TX (0x17UL)

#define	HPM_DMA_SRC_MCAN0 (0x18UL)

#define	HPM_DMA_SRC_MCAN1 (0x19UL)

#define	HPM_DMA_SRC_MCAN2 (0x1AUL)

#define	HPM_DMA_SRC_MCAN3 (0x1BUL)

#define	HPM_DMA_SRC_MCAN4 (0x1CUL)

#define	HPM_DMA_SRC_MCAN5 (0x1DUL)

#define	HPM_DMA_SRC_MCAN6 (0x1EUL)

#define	HPM_DMA_SRC_MCAN7 (0x1FUL)

#define	HPM_DMA_SRC_I2S0_RX (0x20UL)

#define	HPM_DMA_SRC_I2S0_TX (0x21UL)

#define	HPM_DMA_SRC_I2S1_RX (0x22UL)

#define	HPM_DMA_SRC_I2S1_TX (0x23UL)

#define	HPM_DMA_SRC_I2S2_RX (0x24UL)

#define	HPM_DMA_SRC_I2S2_TX (0x25UL)

#define	HPM_DMA_SRC_I2S3_RX (0x26UL)

#define	HPM_DMA_SRC_I2S3_TX (0x27UL)

#define	HPM_DMA_SRC_GPTMR0_0 (0x28UL)

#define	HPM_DMA_SRC_GPTMR0_1 (0x29UL)

#define	HPM_DMA_SRC_GPTMR0_2 (0x2AUL)

#define	HPM_DMA_SRC_GPTMR0_3 (0x2BUL)

#define	HPM_DMA_SRC_GPTMR1_0 (0x2CUL)

#define	HPM_DMA_SRC_GPTMR1_1 (0x2DUL)

#define	HPM_DMA_SRC_GPTMR1_2 (0x2EUL)

#define	HPM_DMA_SRC_GPTMR1_3 (0x2FUL)

#define	HPM_DMA_SRC_GPTMR2_0 (0x30UL)

#define	HPM_DMA_SRC_GPTMR2_1 (0x31UL)

#define	HPM_DMA_SRC_GPTMR2_2 (0x32UL)

#define	HPM_DMA_SRC_GPTMR2_3 (0x33UL)

#define	HPM_DMA_SRC_GPTMR3_0 (0x34UL)

#define	HPM_DMA_SRC_GPTMR3_1 (0x35UL)

#define	HPM_DMA_SRC_GPTMR3_2 (0x36UL)

#define	HPM_DMA_SRC_GPTMR3_3 (0x37UL)

#define	HPM_DMA_SRC_GPTMR4_0 (0x38UL)

#define	HPM_DMA_SRC_GPTMR4_1 (0x39UL)

#define	HPM_DMA_SRC_GPTMR4_2 (0x3AUL)

#define	HPM_DMA_SRC_GPTMR4_3 (0x3BUL)

#define	HPM_DMA_SRC_GPTMR5_0 (0x3CUL)

#define	HPM_DMA_SRC_GPTMR5_1 (0x3DUL)

#define	HPM_DMA_SRC_GPTMR5_2 (0x3EUL)

#define	HPM_DMA_SRC_GPTMR5_3 (0x3FUL)

#define	HPM_DMA_SRC_GPTMR6_0 (0x40UL)

#define	HPM_DMA_SRC_GPTMR6_1 (0x41UL)

#define	HPM_DMA_SRC_GPTMR6_2 (0x42UL)

#define	HPM_DMA_SRC_GPTMR6_3 (0x43UL)

#define	HPM_DMA_SRC_GPTMR7_0 (0x44UL)

#define	HPM_DMA_SRC_GPTMR7_1 (0x45UL)

#define	HPM_DMA_SRC_GPTMR7_2 (0x46UL)

#define	HPM_DMA_SRC_GPTMR7_3 (0x47UL)

#define	HPM_DMA_SRC_I2C0 (0x48UL)

#define	HPM_DMA_SRC_I2C1 (0x49UL)

#define	HPM_DMA_SRC_I2C2 (0x4AUL)

#define	HPM_DMA_SRC_I2C3 (0x4BUL)

#define	HPM_DMA_SRC_XPI0_RX (0x4CUL)

#define	HPM_DMA_SRC_XPI0_TX (0x4DUL)

Macro Definition Documentation

◆ HPM_DMA_SRC_GPTMR0_0

#define HPM_DMA_SRC_GPTMR0_0 (0x28UL)

◆ HPM_DMA_SRC_GPTMR0_1

#define HPM_DMA_SRC_GPTMR0_1 (0x29UL)

◆ HPM_DMA_SRC_GPTMR0_2

#define HPM_DMA_SRC_GPTMR0_2 (0x2AUL)

◆ HPM_DMA_SRC_GPTMR0_3

#define HPM_DMA_SRC_GPTMR0_3 (0x2BUL)

◆ HPM_DMA_SRC_GPTMR1_0

#define HPM_DMA_SRC_GPTMR1_0 (0x2CUL)

◆ HPM_DMA_SRC_GPTMR1_1

#define HPM_DMA_SRC_GPTMR1_1 (0x2DUL)

◆ HPM_DMA_SRC_GPTMR1_2

#define HPM_DMA_SRC_GPTMR1_2 (0x2EUL)

◆ HPM_DMA_SRC_GPTMR1_3

#define HPM_DMA_SRC_GPTMR1_3 (0x2FUL)

◆ HPM_DMA_SRC_GPTMR2_0

#define HPM_DMA_SRC_GPTMR2_0 (0x30UL)

◆ HPM_DMA_SRC_GPTMR2_1

#define HPM_DMA_SRC_GPTMR2_1 (0x31UL)

◆ HPM_DMA_SRC_GPTMR2_2

#define HPM_DMA_SRC_GPTMR2_2 (0x32UL)

◆ HPM_DMA_SRC_GPTMR2_3

#define HPM_DMA_SRC_GPTMR2_3 (0x33UL)

◆ HPM_DMA_SRC_GPTMR3_0

#define HPM_DMA_SRC_GPTMR3_0 (0x34UL)

◆ HPM_DMA_SRC_GPTMR3_1

#define HPM_DMA_SRC_GPTMR3_1 (0x35UL)

◆ HPM_DMA_SRC_GPTMR3_2

#define HPM_DMA_SRC_GPTMR3_2 (0x36UL)

◆ HPM_DMA_SRC_GPTMR3_3

#define HPM_DMA_SRC_GPTMR3_3 (0x37UL)

◆ HPM_DMA_SRC_GPTMR4_0

#define HPM_DMA_SRC_GPTMR4_0 (0x38UL)

◆ HPM_DMA_SRC_GPTMR4_1

#define HPM_DMA_SRC_GPTMR4_1 (0x39UL)

◆ HPM_DMA_SRC_GPTMR4_2

#define HPM_DMA_SRC_GPTMR4_2 (0x3AUL)

◆ HPM_DMA_SRC_GPTMR4_3

#define HPM_DMA_SRC_GPTMR4_3 (0x3BUL)

◆ HPM_DMA_SRC_GPTMR5_0

#define HPM_DMA_SRC_GPTMR5_0 (0x3CUL)

◆ HPM_DMA_SRC_GPTMR5_1

#define HPM_DMA_SRC_GPTMR5_1 (0x3DUL)

◆ HPM_DMA_SRC_GPTMR5_2

#define HPM_DMA_SRC_GPTMR5_2 (0x3EUL)

◆ HPM_DMA_SRC_GPTMR5_3

#define HPM_DMA_SRC_GPTMR5_3 (0x3FUL)

◆ HPM_DMA_SRC_GPTMR6_0

#define HPM_DMA_SRC_GPTMR6_0 (0x40UL)

◆ HPM_DMA_SRC_GPTMR6_1

#define HPM_DMA_SRC_GPTMR6_1 (0x41UL)

◆ HPM_DMA_SRC_GPTMR6_2

#define HPM_DMA_SRC_GPTMR6_2 (0x42UL)

◆ HPM_DMA_SRC_GPTMR6_3

#define HPM_DMA_SRC_GPTMR6_3 (0x43UL)

◆ HPM_DMA_SRC_GPTMR7_0

#define HPM_DMA_SRC_GPTMR7_0 (0x44UL)

◆ HPM_DMA_SRC_GPTMR7_1

#define HPM_DMA_SRC_GPTMR7_1 (0x45UL)

◆ HPM_DMA_SRC_GPTMR7_2

#define HPM_DMA_SRC_GPTMR7_2 (0x46UL)

◆ HPM_DMA_SRC_GPTMR7_3

#define HPM_DMA_SRC_GPTMR7_3 (0x47UL)

◆ HPM_DMA_SRC_I2C0

#define HPM_DMA_SRC_I2C0 (0x48UL)

◆ HPM_DMA_SRC_I2C1

#define HPM_DMA_SRC_I2C1 (0x49UL)

◆ HPM_DMA_SRC_I2C2

#define HPM_DMA_SRC_I2C2 (0x4AUL)

◆ HPM_DMA_SRC_I2C3

#define HPM_DMA_SRC_I2C3 (0x4BUL)

◆ HPM_DMA_SRC_I2S0_RX

#define HPM_DMA_SRC_I2S0_RX (0x20UL)

◆ HPM_DMA_SRC_I2S0_TX

#define HPM_DMA_SRC_I2S0_TX (0x21UL)

◆ HPM_DMA_SRC_I2S1_RX

#define HPM_DMA_SRC_I2S1_RX (0x22UL)

◆ HPM_DMA_SRC_I2S1_TX

#define HPM_DMA_SRC_I2S1_TX (0x23UL)

◆ HPM_DMA_SRC_I2S2_RX

#define HPM_DMA_SRC_I2S2_RX (0x24UL)

◆ HPM_DMA_SRC_I2S2_TX

#define HPM_DMA_SRC_I2S2_TX (0x25UL)

◆ HPM_DMA_SRC_I2S3_RX

#define HPM_DMA_SRC_I2S3_RX (0x26UL)

◆ HPM_DMA_SRC_I2S3_TX

#define HPM_DMA_SRC_I2S3_TX (0x27UL)

◆ HPM_DMA_SRC_MCAN0

#define HPM_DMA_SRC_MCAN0 (0x18UL)

◆ HPM_DMA_SRC_MCAN1

#define HPM_DMA_SRC_MCAN1 (0x19UL)

◆ HPM_DMA_SRC_MCAN2

#define HPM_DMA_SRC_MCAN2 (0x1AUL)

◆ HPM_DMA_SRC_MCAN3

#define HPM_DMA_SRC_MCAN3 (0x1BUL)

◆ HPM_DMA_SRC_MCAN4

#define HPM_DMA_SRC_MCAN4 (0x1CUL)

◆ HPM_DMA_SRC_MCAN5

#define HPM_DMA_SRC_MCAN5 (0x1DUL)

◆ HPM_DMA_SRC_MCAN6

#define HPM_DMA_SRC_MCAN6 (0x1EUL)

◆ HPM_DMA_SRC_MCAN7

#define HPM_DMA_SRC_MCAN7 (0x1FUL)

◆ HPM_DMA_SRC_SPI0_RX

#define HPM_DMA_SRC_SPI0_RX (0x0UL)

◆ HPM_DMA_SRC_SPI0_TX

#define HPM_DMA_SRC_SPI0_TX (0x1UL)

◆ HPM_DMA_SRC_SPI1_RX

#define HPM_DMA_SRC_SPI1_RX (0x2UL)

◆ HPM_DMA_SRC_SPI1_TX

#define HPM_DMA_SRC_SPI1_TX (0x3UL)

◆ HPM_DMA_SRC_SPI2_RX

#define HPM_DMA_SRC_SPI2_RX (0x4UL)

◆ HPM_DMA_SRC_SPI2_TX

#define HPM_DMA_SRC_SPI2_TX (0x5UL)

◆ HPM_DMA_SRC_SPI3_RX

#define HPM_DMA_SRC_SPI3_RX (0x6UL)

◆ HPM_DMA_SRC_SPI3_TX

#define HPM_DMA_SRC_SPI3_TX (0x7UL)

◆ HPM_DMA_SRC_UART0_RX

#define HPM_DMA_SRC_UART0_RX (0x8UL)

◆ HPM_DMA_SRC_UART0_TX

#define HPM_DMA_SRC_UART0_TX (0x9UL)

◆ HPM_DMA_SRC_UART1_RX

#define HPM_DMA_SRC_UART1_RX (0xAUL)

◆ HPM_DMA_SRC_UART1_TX

#define HPM_DMA_SRC_UART1_TX (0xBUL)

◆ HPM_DMA_SRC_UART2_RX

#define HPM_DMA_SRC_UART2_RX (0xCUL)

◆ HPM_DMA_SRC_UART2_TX

#define HPM_DMA_SRC_UART2_TX (0xDUL)

◆ HPM_DMA_SRC_UART3_RX

#define HPM_DMA_SRC_UART3_RX (0xEUL)

◆ HPM_DMA_SRC_UART3_TX

#define HPM_DMA_SRC_UART3_TX (0xFUL)

◆ HPM_DMA_SRC_UART4_RX

#define HPM_DMA_SRC_UART4_RX (0x10UL)

◆ HPM_DMA_SRC_UART4_TX

#define HPM_DMA_SRC_UART4_TX (0x11UL)

◆ HPM_DMA_SRC_UART5_RX

#define HPM_DMA_SRC_UART5_RX (0x12UL)

◆ HPM_DMA_SRC_UART5_TX

#define HPM_DMA_SRC_UART5_TX (0x13UL)

◆ HPM_DMA_SRC_UART6_RX

#define HPM_DMA_SRC_UART6_RX (0x14UL)

◆ HPM_DMA_SRC_UART6_TX

#define HPM_DMA_SRC_UART6_TX (0x15UL)

◆ HPM_DMA_SRC_UART7_RX

#define HPM_DMA_SRC_UART7_RX (0x16UL)

◆ HPM_DMA_SRC_UART7_TX

#define HPM_DMA_SRC_UART7_TX (0x17UL)

◆ HPM_DMA_SRC_XPI0_RX

#define HPM_DMA_SRC_XPI0_RX (0x4CUL)

◆ HPM_DMA_SRC_XPI0_TX

#define HPM_DMA_SRC_XPI0_TX (0x4DUL)

Macros