HPM SDK
HPMicro Software Development Kit
Macros | Functions | Variables
hpm_l1c_drv.h File Reference
#include "hpm_common.h"
#include "hpm_csr_drv.h"
#include "hpm_soc.h"

Go to the source code of this file.

Macros

#define HPM_L1C_CACHE_SIZE   (uint32_t)(16 * SIZE_1KB)
 
#define HPM_L1C_ICACHE_SIZE   (HPM_L1C_CACHE_SIZE)
 
#define HPM_L1C_DCACHE_SIZE   (HPM_L1C_CACHE_SIZE)
 
#define HPM_L1C_CACHELINE_SIZE   (32)
 
#define HPM_L1C_CACHELINES_PER_WAY   (128)
 
#define HPM_MCACHE_CTL_IC_EN_SHIFT   (0UL)
 
#define HPM_MCACHE_CTL_IC_EN_MASK   (1UL << HPM_MCACHE_CTL_IC_EN_SHIFT)
 
#define HPM_MCACHE_CTL_IC_EN(x)    (uint32_t)(((x) << HPM_MCACHE_CTL_IC_EN_SHIFT) & HPM_MCACHE_CTL_IC_EN_MASK)
 
#define HPM_MCACHE_CTL_DC_EN_SHIFT   (1UL)
 
#define HPM_MCACHE_CTL_DC_EN_MASK   (1UL << HPM_MCACHE_CTL_DC_EN_SHIFT)
 
#define HPM_MCACHE_CTL_DC_EN(x)    (uint32_t)(((x) << HPM_MCACHE_CTL_DC_EN_SHIFT) & HPM_MCACHE_CTL_DC_EN_MASK)
 
#define HPM_MCACHE_CTL_IC_ECCEN_SHIFT   (0x2UL)
 
#define HPM_MCACHE_CTL_IC_ECCEN_MASK   (0x3UL << HPM_MCACHE_CTL_IC_ECCEN_SHIFT)
 
#define HPM_MCACHE_CTL_IC_ECCEN(x)    (uint32_t)(((x) << HPM_MCACHE_CTL_IC_ECCEN_SHIFT) & HPM_MCACHE_CTL_IC_ECCEN_MASK)
 
#define HPM_MCACHE_CTL_DC_ECCEN_SHIFT   (0x4UL)
 
#define HPM_MCACHE_CTL_DC_ECCEN_MASK   (0x3UL << HPM_MCACHE_CTL_DC_ECCEN_SHIFT)
 
#define HPM_MCACHE_CTL_DC_ECCEN(x)    (uint32_t)(((x) << HPM_MCACHE_CTL_DC_ECCEN_SHIFT) & HPM_MCACHE_CTL_DC_ECCEN_MASK)
 
#define HPM_MCACHE_CTL_IC_RWECC_SHIFT   (0x6UL)
 
#define HPM_MCACHE_CTL_IC_RWECC_MASK   (0x1UL << HPM_MCACHE_CTL_IC_RWECC_SHIFT)
 
#define HPM_MCACHE_CTL_IC_RWECC(x)    (uint32_t)(((x) << HPM_MCACHE_CTL_IC_RWECC_SHIFT) & HPM_MCACHE_CTL_IC_RWECC_MASK)
 
#define HPM_MCACHE_CTL_DC_RWECC_SHIFT   (0x7UL)
 
#define HPM_MCACHE_CTL_DC_RWECC_MASK   (0x1UL << HPM_MCACHE_CTL_DC_RWECC_SHIFT)
 
#define HPM_MCACHE_CTL_DC_RWECC(x)    (uint32_t)(((x) << HPM_MCACHE_CTL_DC_RWECC_SHIFT) & HPM_MCACHE_CTL_DC_RWECC_MASK)
 
#define HPM_MCACHE_CTL_CCTL_SUEN_SHIFT   (0x8UL)
 
#define HPM_MCACHE_CTL_CCTL_SUEN_MASK   (0x1UL << HPM_MCACHE_CTL_CCTL_SUEN_SHIFT)
 
#define HPM_MCACHE_CTL_CCTL_SUEN(x)    (uint32_t)(((x) << HPM_MCACHE_CTL_CCTL_SUEN_SHIFT) & HPM_MCACHE_CTL_CCTL_SUEN_MASK)
 
#define HPM_MCACHE_CTL_IPREF_EN_SHIFT   (0x9UL)
 
#define HPM_MCACHE_CTL_IPREF_EN_MASK   (0x1UL << HPM_MCACHE_CTL_IPREF_EN_SHIFT)
 
#define HPM_MCACHE_CTL_IPREF_EN(x)    (uint32_t)(((x) << HPM_MCACHE_CTL_IPREF_EN_SHIFT) & HPM_MCACHE_CTL_IPREF_EN_MASK)
 
#define HPM_MCACHE_CTL_DPREF_EN_SHIFT   (0x10UL)
 
#define HPM_MCACHE_CTL_DPREF_EN_MASK   (0x1UL << HPM_MCACHE_CTL_DPREF_EN_SHIFT)
 
#define HPM_MCACHE_CTL_DPREF_EN(x)    (uint32_t)(((x) << HPM_MCACHE_CTL_DPREF_EN_SHIFT) & HPM_MCACHE_CTL_DPREF_EN_MASK)
 
#define HPM_MCACHE_CTL_IC_FIRST_WORD_SHIFT   (0x11UL)
 
#define HPM_MCACHE_CTL_IC_FIRST_WORD_MASK   (0x1UL << HPM_MCACHE_CTL_IC_FIRST_WORD_SHIFT)
 
#define HPM_MCACHE_CTL_IC_FIRST_WORD(x)    (uint32_t)(((x) << HPM_MCACHE_CTL_IC_FIRST_WORD_SHIFT) & HPM_MCACHE_CTL_IC_FIRST_WORD_MASK)
 
#define HPM_MCACHE_CTL_DC_FIRST_WORD_SHIFT   (0x12UL)
 
#define HPM_MCACHE_CTL_DC_FIRST_WORD_MASK   (0x1UL << HPM_MCACHE_CTL_DC_FIRST_WORD_SHIFT)
 
#define HPM_MCACHE_CTL_DC_FIRST_WORD(x)    (uint32_t)(((x) << HPM_MCACHE_CTL_DC_FIRST_WORD_SHIFT) & HPM_MCACHE_CTL_DC_FIRST_WORD_MASK)
 
#define HPM_MCACHE_CTL_DC_WAROUND_SHIFT   (0x13UL)
 
#define HPM_MCACHE_CTL_DC_WAROUND_MASK   (0x3UL << HPM_MCACHE_CTL_DC_WAROUND_SHIFT)
 
#define HPM_MCACHE_CTL_DC_WAROUND(x)    (uint32_t)(((x) << HPM_MCACHE_CTL_DC_WAROUND_SHIFT) & HPM_MCACHE_CTL_DC_WAROUND_MASK)
 
#define HPM_L1C_CCTL_CMD_L1D_VA_INVAL   (0UL)
 
#define HPM_L1C_CCTL_CMD_L1D_VA_WB   (1UL)
 
#define HPM_L1C_CCTL_CMD_L1D_VA_WBINVAL   (2UL)
 
#define HPM_L1C_CCTL_CMD_L1D_VA_LOCK   (3UL)
 
#define HPM_L1C_CCTL_CMD_L1D_VA_UNLOCK   (4UL)
 
#define HPM_L1C_CCTL_CMD_L1D_WBINVAL_ALL   (6UL)
 
#define HPM_L1C_CCTL_CMD_L1D_WB_ALL   (7UL)
 
#define HPM_L1C_CCTL_CMD_L1I_VA_INVAL   (8UL)
 
#define HPM_L1C_CCTL_CMD_L1I_VA_LOCK   (11UL)
 
#define HPM_L1C_CCTL_CMD_L1I_VA_UNLOCK   (12UL)
 
#define HPM_L1C_CCTL_CMD_L1D_IX_INVAL   (16UL)
 
#define HPM_L1C_CCTL_CMD_L1D_IX_WB   (17UL)
 
#define HPM_L1C_CCTL_CMD_L1D_IX_WBINVAL   (18UL)
 
#define HPM_L1C_CCTL_CMD_L1D_IX_RTAG   (19UL)
 
#define HPM_L1C_CCTL_CMD_L1D_IX_RDATA   (20UL)
 
#define HPM_L1C_CCTL_CMD_L1D_IX_WTAG   (21UL)
 
#define HPM_L1C_CCTL_CMD_L1D_IX_WDATA   (22UL)
 
#define HPM_L1C_CCTL_CMD_L1D_INVAL_ALL   (23UL)
 
#define HPM_L1C_CCTL_CMD_L1I_IX_INVAL   (24UL)
 
#define HPM_L1C_CCTL_CMD_L1I_IX_RTAG   (27UL)
 
#define HPM_L1C_CCTL_CMD_L1I_IX_RDATA   (28UL)
 
#define HPM_L1C_CCTL_CMD_L1I_IX_WTAG   (29UL)
 
#define HPM_L1C_CCTL_CMD_L1I_IX_WDATA   (30UL)
 
#define HPM_L1C_CCTL_CMD_SUCCESS   (1UL)
 
#define HPM_L1C_CCTL_CMD_FAIL   (0UL)
 
#define HPM_MCCTLBEGINADDR_OFFSET_SHIFT   (2UL)
 
#define HPM_MCCTLBEGINADDR_OFFSET_MASK   ((uint32_t) 0xF << HPM_MCCTLBEGINADDR_OFFSET_SHIFT)
 
#define HPM_MCCTLBEGINADDR_OFFSET(x)    (uint32_t)(((x) << HPM_MCCTLBEGINADDR_OFFSET_SHIFT) & HPM_MCCTLBEGINADDR_OFFSET_MASK)
 
#define HPM_MCCTLBEGINADDR_INDEX_SHIFT   (6UL)
 
#define HPM_MCCTLBEGINADDR_INDEX_MASK   ((uint32_t) 0x3F << HPM_MCCTLBEGINADDR_INDEX_SHIFT)
 
#define HPM_MCCTLBEGINADDR_INDEX(x)    (uint32_t)(((x) << HPM_MCCTLBEGINADDR_INDEX_SHIFT) & HPM_MCCTLBEGINADDR_INDEX_MASK)
 
#define HPM_MCCTLBEGINADDR_WAY_SHIFT   (13UL)
 
#define HPM_MCCTLBEGINADDR_WAY_MASK   ((uint32_t) 0x3 << HPM_MCCTLBEGINADDR_WAY_SHIFT)
 
#define HPM_MCCTLBEGINADDR_WAY(x)    (uint32_t)(((x) << HPM_MCCTLBEGINADDR_WAY_SHIFT) & HPM_MCCTLBEGINADDR_WAY_MASK)
 
#define HPM_MCCTLDATA_I_TAG_ADDRESS_SHIFT   (2UL)
 
#define HPM_MCCTLDATA_I_TAG_ADDRESS_MASK   (uint32_t)(0XFFFFF << HPM_MCCTLDATA_I_TAG_ADDRESS_SHIFT)
 
#define HPM_MCCTLDATA_I_TAG_ADDRESS(x)    (uint32_t)(((x) << HPM_MCCTLDATA_I_TAG_ADDRESS_SHIFT) & HPM_MCCTLDATA_I_TAG_ADDRESS_MASK)
 
#define HPM_MCCTLDATA_I_TAG_LOCK_DUP_SHIFT   (29UL)
 
#define HPM_MCCTLDATA_I_TAG_LOCK_DUP_MASK   (uint32_t)(1 << HPM_MCCTLDATA_I_TAG_LOCK_DUP_SHIFT)
 
#define HPM_MCCTLDATA_I_TAG_LOCK_DUP(x)    (uint32_t)(((x) << HPM_MCCTLDATA_I_TAG_LOCK_DUP_SHIFT) & HPM_MCCTLDATA_I_TAG_LOCK_DUP_MASK)
 
#define HPM_MCCTLDATA_I_TAG_LOCK_SHIFT   (30UL)
 
#define HPM_MCCTLDATA_I_TAG_LOCK_MASK   (uint32_t)(1 << HPM_MCCTLDATA_I_TAG_LOCK_SHIFT)
 
#define HPM_MCCTLDATA_I_TAG_LOCK(x)    (uint32_t)(((x) << HPM_MCCTLDATA_I_TAG_LOCK_SHIFT) & HPM_MCCTLDATA_I_TAG_LOCK_MASK)
 
#define HPM_MCCTLDATA_I_TAG_VALID_SHIFT   (31UL)
 
#define HPM_MCCTLDATA_I_TAG_VALID_MASK   (uint32_t)(1 << HPM_MCCTLDATA_I_TAG_VALID_SHIFT)
 
#define HPM_MCCTLDATA_I_TAG_VALID(x)    (uint32_t)(((x) << HPM_MCCTLDATA_I_TAG_VALID_SHIFT) & HPM_MCCTLDATA_I_TAG_VALID_MASK)
 
#define HPM_MCCTLDATA_D_TAG_MESI_SHIFT   (0UL)
 
#define HPM_MCCTLDATA_D_TAG_MESI_MASK   (uint32_t)(0x3 << HPM_MCCTLDATA_D_TAG_MESI_SHIFT)
 
#define HPM_MCCTLDATA_D_TAG_MESI(x)    (uint32_t)(((x) << HPM_MCCTLDATA_D_TAG_MESI_SHIFT) & HPM_MCCTLDATA_D_TAG_MESI_MASK)
 
#define HPM_MCCTLDATA_D_TAG_LOCK_SHIFT   (3UL)
 
#define HPM_MCCTLDATA_D_TAG_LOCK_MASK   (uint32_t)(0x1 << HPM_MCCTLDATA_D_TAG_LOCK_SHIFT)
 
#define HPM_MCCTLDATA_D_TAG_LOCK(x)    (uint32_t)(((x) << HPM_MCCTLDATA_D_TAG_LOCK_SHIFT) & HPM_MCCTLDATA_D_TAG_LOCK_MASK)
 
#define HPM_MCCTLDATA_D_TAG_TAG_SHIFT   (4UL)
 
#define HPM_MCCTLDATA_D_TAG_TAG_MASK   (uint32_t)(0xFFFF << HPM_MCCTLDATA_D_TAG_LOCK_SHIFT)
 
#define HPM_MCCTLDATA_D_TAG_TAG(x)    (uint32_t)(((x) << HPM_MCCTLDATA_D_TAG_TAG_SHIFT) & HPM_MCCTLDATA_D_TAG_TAG_MASK)
 
#define HPM_L1C_CFG_SET_SHIFT   (0UL)
 
#define HPM_L1C_CFG_SET_MASK   (uint32_t)(0x7 << HPM_L1C_CFG_SET_SHIFT)
 
#define HPM_L1C_CFG_WAY_SHIFT   (3UL)
 
#define HPM_L1C_CFG_WAY_MASK   (uint32_t)(0x7 << HPM_L1C_CFG_WAY_SHIFT)
 
#define HPM_L1C_CFG_SIZE_SHIFT   (6UL)
 
#define HPM_L1C_CFG_SIZE_MASK   (uint32_t)(0x7 << HPM_L1C_CFG_SIZE_SHIFT)
 
#define HPM_L1C_CFG_LOCK_SHIFT   (9UL)
 
#define HPM_L1C_CFG_LOCK_MASK   (uint32_t)(0x1 << HPM_L1C_CFG_LOCK_SHIFT)
 
#define HPM_L1C_CFG_ECC_SHIFT   (10UL)
 
#define HPM_L1C_CFG_ECC_MASK   (uint32_t)(0x3 << HPM_L1C_CFG_ECC_SHIFT)
 
#define HPM_L1C_CFG_LMB_SHIFT   (12UL)
 
#define HPM_L1C_CFG_LMB_MASK   (uint32_t)(0x7 << HPM_L1C_CFG_LMB_SHIFT)
 
#define HPM_L1C_CFG_LM_SIZE_SHIFT   (15UL)
 
#define HPM_L1C_CFG_LM_SIZE_MASK   (uint32_t)(0x1F << HPM_L1C_CFG_LM_SIZE_SHIFT)
 
#define HPM_L1C_CFG_LM_ECC_SHIFT   (21UL)
 
#define HPM_L1C_CFG_LM_ECC_MASK   (uint32_t)(0x3 << HPM_L1C_CFG_LM_ECC_SHIFT)
 
#define HPM_L1C_CFG_SETH_SHIFT   (24UL)
 
#define HPM_L1C_CFG_SETH_MASK   (uint32_t)(0x1 << HPM_L1C_CFG_SETH_SHIFT)
 
#define HPM_L1C_CACHELINE_ALIGN_DOWN(n)   ((uint32_t)(n) & ~(HPM_L1C_CACHELINE_SIZE - 1U))
 Align down based on cache line size. More...
 
#define HPM_L1C_CACHELINE_ALIGN_UP(n)   HPM_L1C_CACHELINE_ALIGN_DOWN((uint32_t)(n) + HPM_L1C_CACHELINE_SIZE - 1U)
 Align up based on cache line size. More...
 

Functions

 write_csr ((0x7CC), cmd)
 
static ATTR_ALWAYS_INLINE uint32_t l1c_cctl_address_cmd_read (uint8_t cmd, uint32_t address, uint32_t *ecc_data)
 
static ATTR_ALWAYS_INLINE void l1c_cctl_address_cmd_write (uint8_t cmd, uint32_t address, uint32_t data, uint32_t ecc_data)
 
static ATTR_ALWAYS_INLINE uint32_t l1c_ic_get_config (void)
 Get I-cache configuration. More...
 
static ATTR_ALWAYS_INLINE uint32_t l1c_dc_get_config (void)
 Get D-cache configuration. More...
 
void l1c_dc_disable (void)
 
void l1c_dc_enable (void)
 
void l1c_dc_invalidate (uint32_t address, uint32_t size)
 
void l1c_dc_writeback (uint32_t address, uint32_t size)
 
void l1c_dc_flush (uint32_t address, uint32_t size)
 
void l1c_dc_fill_lock (uint32_t address, uint32_t size)
 
void l1c_ic_disable (void)
 
void l1c_ic_enable (void)
 
void l1c_ic_invalidate (uint32_t address, uint32_t size)
 
void l1c_ic_fill_lock (uint32_t address, uint32_t size)
 
void l1c_fence_i (void)
 
void l1c_dc_invalidate_all (void)
 
void l1c_dc_writeback_all (void)
 
void l1c_dc_flush_all (void)
 

Variables

uint32_t address