HPM SDK
HPMicro Software Development Kit
Data Structures | Macros
hpm_dac_regs.h File Reference

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Data Structures

struct  DAC_Type
 

Macros

#define DAC_CFG0_SW_DAC_DATA_MASK   (0xFFF0000UL)
 
#define DAC_CFG0_SW_DAC_DATA_SHIFT   (16U)
 
#define DAC_CFG0_SW_DAC_DATA_SET(x)   (((uint32_t)(x) << DAC_CFG0_SW_DAC_DATA_SHIFT) & DAC_CFG0_SW_DAC_DATA_MASK)
 
#define DAC_CFG0_SW_DAC_DATA_GET(x)   (((uint32_t)(x) & DAC_CFG0_SW_DAC_DATA_MASK) >> DAC_CFG0_SW_DAC_DATA_SHIFT)
 
#define DAC_CFG0_DMA_AHB_EN_MASK   (0x200U)
 
#define DAC_CFG0_DMA_AHB_EN_SHIFT   (9U)
 
#define DAC_CFG0_DMA_AHB_EN_SET(x)   (((uint32_t)(x) << DAC_CFG0_DMA_AHB_EN_SHIFT) & DAC_CFG0_DMA_AHB_EN_MASK)
 
#define DAC_CFG0_DMA_AHB_EN_GET(x)   (((uint32_t)(x) & DAC_CFG0_DMA_AHB_EN_MASK) >> DAC_CFG0_DMA_AHB_EN_SHIFT)
 
#define DAC_CFG0_SYNC_MODE_MASK   (0x100U)
 
#define DAC_CFG0_SYNC_MODE_SHIFT   (8U)
 
#define DAC_CFG0_SYNC_MODE_SET(x)   (((uint32_t)(x) << DAC_CFG0_SYNC_MODE_SHIFT) & DAC_CFG0_SYNC_MODE_MASK)
 
#define DAC_CFG0_SYNC_MODE_GET(x)   (((uint32_t)(x) & DAC_CFG0_SYNC_MODE_MASK) >> DAC_CFG0_SYNC_MODE_SHIFT)
 
#define DAC_CFG0_TRIG_MODE_MASK   (0x80U)
 
#define DAC_CFG0_TRIG_MODE_SHIFT   (7U)
 
#define DAC_CFG0_TRIG_MODE_SET(x)   (((uint32_t)(x) << DAC_CFG0_TRIG_MODE_SHIFT) & DAC_CFG0_TRIG_MODE_MASK)
 
#define DAC_CFG0_TRIG_MODE_GET(x)   (((uint32_t)(x) & DAC_CFG0_TRIG_MODE_MASK) >> DAC_CFG0_TRIG_MODE_SHIFT)
 
#define DAC_CFG0_HW_TRIG_EN_MASK   (0x40U)
 
#define DAC_CFG0_HW_TRIG_EN_SHIFT   (6U)
 
#define DAC_CFG0_HW_TRIG_EN_SET(x)   (((uint32_t)(x) << DAC_CFG0_HW_TRIG_EN_SHIFT) & DAC_CFG0_HW_TRIG_EN_MASK)
 
#define DAC_CFG0_HW_TRIG_EN_GET(x)   (((uint32_t)(x) & DAC_CFG0_HW_TRIG_EN_MASK) >> DAC_CFG0_HW_TRIG_EN_SHIFT)
 
#define DAC_CFG0_DAC_MODE_MASK   (0x30U)
 
#define DAC_CFG0_DAC_MODE_SHIFT   (4U)
 
#define DAC_CFG0_DAC_MODE_SET(x)   (((uint32_t)(x) << DAC_CFG0_DAC_MODE_SHIFT) & DAC_CFG0_DAC_MODE_MASK)
 
#define DAC_CFG0_DAC_MODE_GET(x)   (((uint32_t)(x) & DAC_CFG0_DAC_MODE_MASK) >> DAC_CFG0_DAC_MODE_SHIFT)
 
#define DAC_CFG0_BUF_DATA_MODE_MASK   (0x8U)
 
#define DAC_CFG0_BUF_DATA_MODE_SHIFT   (3U)
 
#define DAC_CFG0_BUF_DATA_MODE_SET(x)   (((uint32_t)(x) << DAC_CFG0_BUF_DATA_MODE_SHIFT) & DAC_CFG0_BUF_DATA_MODE_MASK)
 
#define DAC_CFG0_BUF_DATA_MODE_GET(x)   (((uint32_t)(x) & DAC_CFG0_BUF_DATA_MODE_MASK) >> DAC_CFG0_BUF_DATA_MODE_SHIFT)
 
#define DAC_CFG0_HBURST_CFG_MASK   (0x7U)
 
#define DAC_CFG0_HBURST_CFG_SHIFT   (0U)
 
#define DAC_CFG0_HBURST_CFG_SET(x)   (((uint32_t)(x) << DAC_CFG0_HBURST_CFG_SHIFT) & DAC_CFG0_HBURST_CFG_MASK)
 
#define DAC_CFG0_HBURST_CFG_GET(x)   (((uint32_t)(x) & DAC_CFG0_HBURST_CFG_MASK) >> DAC_CFG0_HBURST_CFG_SHIFT)
 
#define DAC_CFG1_ANA_CLK_EN_MASK   (0x40000UL)
 
#define DAC_CFG1_ANA_CLK_EN_SHIFT   (18U)
 
#define DAC_CFG1_ANA_CLK_EN_SET(x)   (((uint32_t)(x) << DAC_CFG1_ANA_CLK_EN_SHIFT) & DAC_CFG1_ANA_CLK_EN_MASK)
 
#define DAC_CFG1_ANA_CLK_EN_GET(x)   (((uint32_t)(x) & DAC_CFG1_ANA_CLK_EN_MASK) >> DAC_CFG1_ANA_CLK_EN_SHIFT)
 
#define DAC_CFG1_ANA_DIV_CFG_MASK   (0x30000UL)
 
#define DAC_CFG1_ANA_DIV_CFG_SHIFT   (16U)
 
#define DAC_CFG1_ANA_DIV_CFG_SET(x)   (((uint32_t)(x) << DAC_CFG1_ANA_DIV_CFG_SHIFT) & DAC_CFG1_ANA_DIV_CFG_MASK)
 
#define DAC_CFG1_ANA_DIV_CFG_GET(x)   (((uint32_t)(x) & DAC_CFG1_ANA_DIV_CFG_MASK) >> DAC_CFG1_ANA_DIV_CFG_SHIFT)
 
#define DAC_CFG1_DIV_CFG_MASK   (0xFFFFU)
 
#define DAC_CFG1_DIV_CFG_SHIFT   (0U)
 
#define DAC_CFG1_DIV_CFG_SET(x)   (((uint32_t)(x) << DAC_CFG1_DIV_CFG_SHIFT) & DAC_CFG1_DIV_CFG_MASK)
 
#define DAC_CFG1_DIV_CFG_GET(x)   (((uint32_t)(x) & DAC_CFG1_DIV_CFG_MASK) >> DAC_CFG1_DIV_CFG_SHIFT)
 
#define DAC_CFG2_DMA_RST1_MASK   (0x80U)
 
#define DAC_CFG2_DMA_RST1_SHIFT   (7U)
 
#define DAC_CFG2_DMA_RST1_SET(x)   (((uint32_t)(x) << DAC_CFG2_DMA_RST1_SHIFT) & DAC_CFG2_DMA_RST1_MASK)
 
#define DAC_CFG2_DMA_RST1_GET(x)   (((uint32_t)(x) & DAC_CFG2_DMA_RST1_MASK) >> DAC_CFG2_DMA_RST1_SHIFT)
 
#define DAC_CFG2_DMA_RST0_MASK   (0x40U)
 
#define DAC_CFG2_DMA_RST0_SHIFT   (6U)
 
#define DAC_CFG2_DMA_RST0_SET(x)   (((uint32_t)(x) << DAC_CFG2_DMA_RST0_SHIFT) & DAC_CFG2_DMA_RST0_MASK)
 
#define DAC_CFG2_DMA_RST0_GET(x)   (((uint32_t)(x) & DAC_CFG2_DMA_RST0_MASK) >> DAC_CFG2_DMA_RST0_SHIFT)
 
#define DAC_CFG2_FIFO_CLR_MASK   (0x20U)
 
#define DAC_CFG2_FIFO_CLR_SHIFT   (5U)
 
#define DAC_CFG2_FIFO_CLR_SET(x)   (((uint32_t)(x) << DAC_CFG2_FIFO_CLR_SHIFT) & DAC_CFG2_FIFO_CLR_MASK)
 
#define DAC_CFG2_FIFO_CLR_GET(x)   (((uint32_t)(x) & DAC_CFG2_FIFO_CLR_MASK) >> DAC_CFG2_FIFO_CLR_SHIFT)
 
#define DAC_CFG2_BUF_SW_TRIG_MASK   (0x10U)
 
#define DAC_CFG2_BUF_SW_TRIG_SHIFT   (4U)
 
#define DAC_CFG2_BUF_SW_TRIG_SET(x)   (((uint32_t)(x) << DAC_CFG2_BUF_SW_TRIG_SHIFT) & DAC_CFG2_BUF_SW_TRIG_MASK)
 
#define DAC_CFG2_BUF_SW_TRIG_GET(x)   (((uint32_t)(x) & DAC_CFG2_BUF_SW_TRIG_MASK) >> DAC_CFG2_BUF_SW_TRIG_SHIFT)
 
#define DAC_CFG2_STEP_SW_TRIG3_MASK   (0x8U)
 
#define DAC_CFG2_STEP_SW_TRIG3_SHIFT   (3U)
 
#define DAC_CFG2_STEP_SW_TRIG3_SET(x)   (((uint32_t)(x) << DAC_CFG2_STEP_SW_TRIG3_SHIFT) & DAC_CFG2_STEP_SW_TRIG3_MASK)
 
#define DAC_CFG2_STEP_SW_TRIG3_GET(x)   (((uint32_t)(x) & DAC_CFG2_STEP_SW_TRIG3_MASK) >> DAC_CFG2_STEP_SW_TRIG3_SHIFT)
 
#define DAC_CFG2_STEP_SW_TRIG2_MASK   (0x4U)
 
#define DAC_CFG2_STEP_SW_TRIG2_SHIFT   (2U)
 
#define DAC_CFG2_STEP_SW_TRIG2_SET(x)   (((uint32_t)(x) << DAC_CFG2_STEP_SW_TRIG2_SHIFT) & DAC_CFG2_STEP_SW_TRIG2_MASK)
 
#define DAC_CFG2_STEP_SW_TRIG2_GET(x)   (((uint32_t)(x) & DAC_CFG2_STEP_SW_TRIG2_MASK) >> DAC_CFG2_STEP_SW_TRIG2_SHIFT)
 
#define DAC_CFG2_STEP_SW_TRIG1_MASK   (0x2U)
 
#define DAC_CFG2_STEP_SW_TRIG1_SHIFT   (1U)
 
#define DAC_CFG2_STEP_SW_TRIG1_SET(x)   (((uint32_t)(x) << DAC_CFG2_STEP_SW_TRIG1_SHIFT) & DAC_CFG2_STEP_SW_TRIG1_MASK)
 
#define DAC_CFG2_STEP_SW_TRIG1_GET(x)   (((uint32_t)(x) & DAC_CFG2_STEP_SW_TRIG1_MASK) >> DAC_CFG2_STEP_SW_TRIG1_SHIFT)
 
#define DAC_CFG2_STEP_SW_TRIG0_MASK   (0x1U)
 
#define DAC_CFG2_STEP_SW_TRIG0_SHIFT   (0U)
 
#define DAC_CFG2_STEP_SW_TRIG0_SET(x)   (((uint32_t)(x) << DAC_CFG2_STEP_SW_TRIG0_SHIFT) & DAC_CFG2_STEP_SW_TRIG0_MASK)
 
#define DAC_CFG2_STEP_SW_TRIG0_GET(x)   (((uint32_t)(x) & DAC_CFG2_STEP_SW_TRIG0_MASK) >> DAC_CFG2_STEP_SW_TRIG0_SHIFT)
 
#define DAC_STEP_CFG_ROUND_MODE_MASK   (0x20000000UL)
 
#define DAC_STEP_CFG_ROUND_MODE_SHIFT   (29U)
 
#define DAC_STEP_CFG_ROUND_MODE_SET(x)   (((uint32_t)(x) << DAC_STEP_CFG_ROUND_MODE_SHIFT) & DAC_STEP_CFG_ROUND_MODE_MASK)
 
#define DAC_STEP_CFG_ROUND_MODE_GET(x)   (((uint32_t)(x) & DAC_STEP_CFG_ROUND_MODE_MASK) >> DAC_STEP_CFG_ROUND_MODE_SHIFT)
 
#define DAC_STEP_CFG_UP_DOWN_MASK   (0x10000000UL)
 
#define DAC_STEP_CFG_UP_DOWN_SHIFT   (28U)
 
#define DAC_STEP_CFG_UP_DOWN_SET(x)   (((uint32_t)(x) << DAC_STEP_CFG_UP_DOWN_SHIFT) & DAC_STEP_CFG_UP_DOWN_MASK)
 
#define DAC_STEP_CFG_UP_DOWN_GET(x)   (((uint32_t)(x) & DAC_STEP_CFG_UP_DOWN_MASK) >> DAC_STEP_CFG_UP_DOWN_SHIFT)
 
#define DAC_STEP_CFG_END_POINT_MASK   (0xFFF0000UL)
 
#define DAC_STEP_CFG_END_POINT_SHIFT   (16U)
 
#define DAC_STEP_CFG_END_POINT_SET(x)   (((uint32_t)(x) << DAC_STEP_CFG_END_POINT_SHIFT) & DAC_STEP_CFG_END_POINT_MASK)
 
#define DAC_STEP_CFG_END_POINT_GET(x)   (((uint32_t)(x) & DAC_STEP_CFG_END_POINT_MASK) >> DAC_STEP_CFG_END_POINT_SHIFT)
 
#define DAC_STEP_CFG_STEP_NUM_MASK   (0xF000U)
 
#define DAC_STEP_CFG_STEP_NUM_SHIFT   (12U)
 
#define DAC_STEP_CFG_STEP_NUM_SET(x)   (((uint32_t)(x) << DAC_STEP_CFG_STEP_NUM_SHIFT) & DAC_STEP_CFG_STEP_NUM_MASK)
 
#define DAC_STEP_CFG_STEP_NUM_GET(x)   (((uint32_t)(x) & DAC_STEP_CFG_STEP_NUM_MASK) >> DAC_STEP_CFG_STEP_NUM_SHIFT)
 
#define DAC_STEP_CFG_START_POINT_MASK   (0xFFFU)
 
#define DAC_STEP_CFG_START_POINT_SHIFT   (0U)
 
#define DAC_STEP_CFG_START_POINT_SET(x)   (((uint32_t)(x) << DAC_STEP_CFG_START_POINT_SHIFT) & DAC_STEP_CFG_START_POINT_MASK)
 
#define DAC_STEP_CFG_START_POINT_GET(x)   (((uint32_t)(x) & DAC_STEP_CFG_START_POINT_MASK) >> DAC_STEP_CFG_START_POINT_SHIFT)
 
#define DAC_BUF_ADDR_BUF_START_ADDR_MASK   (0xFFFFFFFCUL)
 
#define DAC_BUF_ADDR_BUF_START_ADDR_SHIFT   (2U)
 
#define DAC_BUF_ADDR_BUF_START_ADDR_SET(x)   (((uint32_t)(x) << DAC_BUF_ADDR_BUF_START_ADDR_SHIFT) & DAC_BUF_ADDR_BUF_START_ADDR_MASK)
 
#define DAC_BUF_ADDR_BUF_START_ADDR_GET(x)   (((uint32_t)(x) & DAC_BUF_ADDR_BUF_START_ADDR_MASK) >> DAC_BUF_ADDR_BUF_START_ADDR_SHIFT)
 
#define DAC_BUF_ADDR_BUF_STOP_MASK   (0x1U)
 
#define DAC_BUF_ADDR_BUF_STOP_SHIFT   (0U)
 
#define DAC_BUF_ADDR_BUF_STOP_SET(x)   (((uint32_t)(x) << DAC_BUF_ADDR_BUF_STOP_SHIFT) & DAC_BUF_ADDR_BUF_STOP_MASK)
 
#define DAC_BUF_ADDR_BUF_STOP_GET(x)   (((uint32_t)(x) & DAC_BUF_ADDR_BUF_STOP_MASK) >> DAC_BUF_ADDR_BUF_STOP_SHIFT)
 
#define DAC_BUF_LENGTH_BUF1_LEN_MASK   (0xFFFF0000UL)
 
#define DAC_BUF_LENGTH_BUF1_LEN_SHIFT   (16U)
 
#define DAC_BUF_LENGTH_BUF1_LEN_SET(x)   (((uint32_t)(x) << DAC_BUF_LENGTH_BUF1_LEN_SHIFT) & DAC_BUF_LENGTH_BUF1_LEN_MASK)
 
#define DAC_BUF_LENGTH_BUF1_LEN_GET(x)   (((uint32_t)(x) & DAC_BUF_LENGTH_BUF1_LEN_MASK) >> DAC_BUF_LENGTH_BUF1_LEN_SHIFT)
 
#define DAC_BUF_LENGTH_BUF0_LEN_MASK   (0xFFFFU)
 
#define DAC_BUF_LENGTH_BUF0_LEN_SHIFT   (0U)
 
#define DAC_BUF_LENGTH_BUF0_LEN_SET(x)   (((uint32_t)(x) << DAC_BUF_LENGTH_BUF0_LEN_SHIFT) & DAC_BUF_LENGTH_BUF0_LEN_MASK)
 
#define DAC_BUF_LENGTH_BUF0_LEN_GET(x)   (((uint32_t)(x) & DAC_BUF_LENGTH_BUF0_LEN_MASK) >> DAC_BUF_LENGTH_BUF0_LEN_SHIFT)
 
#define DAC_IRQ_STS_STEP_CMPT_MASK   (0x10U)
 
#define DAC_IRQ_STS_STEP_CMPT_SHIFT   (4U)
 
#define DAC_IRQ_STS_STEP_CMPT_SET(x)   (((uint32_t)(x) << DAC_IRQ_STS_STEP_CMPT_SHIFT) & DAC_IRQ_STS_STEP_CMPT_MASK)
 
#define DAC_IRQ_STS_STEP_CMPT_GET(x)   (((uint32_t)(x) & DAC_IRQ_STS_STEP_CMPT_MASK) >> DAC_IRQ_STS_STEP_CMPT_SHIFT)
 
#define DAC_IRQ_STS_AHB_ERROR_MASK   (0x8U)
 
#define DAC_IRQ_STS_AHB_ERROR_SHIFT   (3U)
 
#define DAC_IRQ_STS_AHB_ERROR_SET(x)   (((uint32_t)(x) << DAC_IRQ_STS_AHB_ERROR_SHIFT) & DAC_IRQ_STS_AHB_ERROR_MASK)
 
#define DAC_IRQ_STS_AHB_ERROR_GET(x)   (((uint32_t)(x) & DAC_IRQ_STS_AHB_ERROR_MASK) >> DAC_IRQ_STS_AHB_ERROR_SHIFT)
 
#define DAC_IRQ_STS_FIFO_EMPTY_MASK   (0x4U)
 
#define DAC_IRQ_STS_FIFO_EMPTY_SHIFT   (2U)
 
#define DAC_IRQ_STS_FIFO_EMPTY_SET(x)   (((uint32_t)(x) << DAC_IRQ_STS_FIFO_EMPTY_SHIFT) & DAC_IRQ_STS_FIFO_EMPTY_MASK)
 
#define DAC_IRQ_STS_FIFO_EMPTY_GET(x)   (((uint32_t)(x) & DAC_IRQ_STS_FIFO_EMPTY_MASK) >> DAC_IRQ_STS_FIFO_EMPTY_SHIFT)
 
#define DAC_IRQ_STS_BUF1_CMPT_MASK   (0x2U)
 
#define DAC_IRQ_STS_BUF1_CMPT_SHIFT   (1U)
 
#define DAC_IRQ_STS_BUF1_CMPT_SET(x)   (((uint32_t)(x) << DAC_IRQ_STS_BUF1_CMPT_SHIFT) & DAC_IRQ_STS_BUF1_CMPT_MASK)
 
#define DAC_IRQ_STS_BUF1_CMPT_GET(x)   (((uint32_t)(x) & DAC_IRQ_STS_BUF1_CMPT_MASK) >> DAC_IRQ_STS_BUF1_CMPT_SHIFT)
 
#define DAC_IRQ_STS_BUF0_CMPT_MASK   (0x1U)
 
#define DAC_IRQ_STS_BUF0_CMPT_SHIFT   (0U)
 
#define DAC_IRQ_STS_BUF0_CMPT_SET(x)   (((uint32_t)(x) << DAC_IRQ_STS_BUF0_CMPT_SHIFT) & DAC_IRQ_STS_BUF0_CMPT_MASK)
 
#define DAC_IRQ_STS_BUF0_CMPT_GET(x)   (((uint32_t)(x) & DAC_IRQ_STS_BUF0_CMPT_MASK) >> DAC_IRQ_STS_BUF0_CMPT_SHIFT)
 
#define DAC_IRQ_EN_STEP_CMPT_MASK   (0x10U)
 
#define DAC_IRQ_EN_STEP_CMPT_SHIFT   (4U)
 
#define DAC_IRQ_EN_STEP_CMPT_SET(x)   (((uint32_t)(x) << DAC_IRQ_EN_STEP_CMPT_SHIFT) & DAC_IRQ_EN_STEP_CMPT_MASK)
 
#define DAC_IRQ_EN_STEP_CMPT_GET(x)   (((uint32_t)(x) & DAC_IRQ_EN_STEP_CMPT_MASK) >> DAC_IRQ_EN_STEP_CMPT_SHIFT)
 
#define DAC_IRQ_EN_AHB_ERROR_MASK   (0x8U)
 
#define DAC_IRQ_EN_AHB_ERROR_SHIFT   (3U)
 
#define DAC_IRQ_EN_AHB_ERROR_SET(x)   (((uint32_t)(x) << DAC_IRQ_EN_AHB_ERROR_SHIFT) & DAC_IRQ_EN_AHB_ERROR_MASK)
 
#define DAC_IRQ_EN_AHB_ERROR_GET(x)   (((uint32_t)(x) & DAC_IRQ_EN_AHB_ERROR_MASK) >> DAC_IRQ_EN_AHB_ERROR_SHIFT)
 
#define DAC_IRQ_EN_FIFO_EMPTY_MASK   (0x4U)
 
#define DAC_IRQ_EN_FIFO_EMPTY_SHIFT   (2U)
 
#define DAC_IRQ_EN_FIFO_EMPTY_SET(x)   (((uint32_t)(x) << DAC_IRQ_EN_FIFO_EMPTY_SHIFT) & DAC_IRQ_EN_FIFO_EMPTY_MASK)
 
#define DAC_IRQ_EN_FIFO_EMPTY_GET(x)   (((uint32_t)(x) & DAC_IRQ_EN_FIFO_EMPTY_MASK) >> DAC_IRQ_EN_FIFO_EMPTY_SHIFT)
 
#define DAC_IRQ_EN_BUF1_CMPT_MASK   (0x2U)
 
#define DAC_IRQ_EN_BUF1_CMPT_SHIFT   (1U)
 
#define DAC_IRQ_EN_BUF1_CMPT_SET(x)   (((uint32_t)(x) << DAC_IRQ_EN_BUF1_CMPT_SHIFT) & DAC_IRQ_EN_BUF1_CMPT_MASK)
 
#define DAC_IRQ_EN_BUF1_CMPT_GET(x)   (((uint32_t)(x) & DAC_IRQ_EN_BUF1_CMPT_MASK) >> DAC_IRQ_EN_BUF1_CMPT_SHIFT)
 
#define DAC_IRQ_EN_BUF0_CMPT_MASK   (0x1U)
 
#define DAC_IRQ_EN_BUF0_CMPT_SHIFT   (0U)
 
#define DAC_IRQ_EN_BUF0_CMPT_SET(x)   (((uint32_t)(x) << DAC_IRQ_EN_BUF0_CMPT_SHIFT) & DAC_IRQ_EN_BUF0_CMPT_MASK)
 
#define DAC_IRQ_EN_BUF0_CMPT_GET(x)   (((uint32_t)(x) & DAC_IRQ_EN_BUF0_CMPT_MASK) >> DAC_IRQ_EN_BUF0_CMPT_SHIFT)
 
#define DAC_DMA_EN_STEP_CMPT_MASK   (0x10U)
 
#define DAC_DMA_EN_STEP_CMPT_SHIFT   (4U)
 
#define DAC_DMA_EN_STEP_CMPT_SET(x)   (((uint32_t)(x) << DAC_DMA_EN_STEP_CMPT_SHIFT) & DAC_DMA_EN_STEP_CMPT_MASK)
 
#define DAC_DMA_EN_STEP_CMPT_GET(x)   (((uint32_t)(x) & DAC_DMA_EN_STEP_CMPT_MASK) >> DAC_DMA_EN_STEP_CMPT_SHIFT)
 
#define DAC_DMA_EN_BUF1_CMPT_MASK   (0x2U)
 
#define DAC_DMA_EN_BUF1_CMPT_SHIFT   (1U)
 
#define DAC_DMA_EN_BUF1_CMPT_SET(x)   (((uint32_t)(x) << DAC_DMA_EN_BUF1_CMPT_SHIFT) & DAC_DMA_EN_BUF1_CMPT_MASK)
 
#define DAC_DMA_EN_BUF1_CMPT_GET(x)   (((uint32_t)(x) & DAC_DMA_EN_BUF1_CMPT_MASK) >> DAC_DMA_EN_BUF1_CMPT_SHIFT)
 
#define DAC_DMA_EN_BUF0_CMPT_MASK   (0x1U)
 
#define DAC_DMA_EN_BUF0_CMPT_SHIFT   (0U)
 
#define DAC_DMA_EN_BUF0_CMPT_SET(x)   (((uint32_t)(x) << DAC_DMA_EN_BUF0_CMPT_SHIFT) & DAC_DMA_EN_BUF0_CMPT_MASK)
 
#define DAC_DMA_EN_BUF0_CMPT_GET(x)   (((uint32_t)(x) & DAC_DMA_EN_BUF0_CMPT_MASK) >> DAC_DMA_EN_BUF0_CMPT_SHIFT)
 
#define DAC_ANA_CFG0_DAC12BIT_LP_MODE_MASK   (0x100U)
 
#define DAC_ANA_CFG0_DAC12BIT_LP_MODE_SHIFT   (8U)
 
#define DAC_ANA_CFG0_DAC12BIT_LP_MODE_SET(x)   (((uint32_t)(x) << DAC_ANA_CFG0_DAC12BIT_LP_MODE_SHIFT) & DAC_ANA_CFG0_DAC12BIT_LP_MODE_MASK)
 
#define DAC_ANA_CFG0_DAC12BIT_LP_MODE_GET(x)   (((uint32_t)(x) & DAC_ANA_CFG0_DAC12BIT_LP_MODE_MASK) >> DAC_ANA_CFG0_DAC12BIT_LP_MODE_SHIFT)
 
#define DAC_ANA_CFG0_DAC_CONFIG_MASK   (0xF0U)
 
#define DAC_ANA_CFG0_DAC_CONFIG_SHIFT   (4U)
 
#define DAC_ANA_CFG0_DAC_CONFIG_SET(x)   (((uint32_t)(x) << DAC_ANA_CFG0_DAC_CONFIG_SHIFT) & DAC_ANA_CFG0_DAC_CONFIG_MASK)
 
#define DAC_ANA_CFG0_DAC_CONFIG_GET(x)   (((uint32_t)(x) & DAC_ANA_CFG0_DAC_CONFIG_MASK) >> DAC_ANA_CFG0_DAC_CONFIG_SHIFT)
 
#define DAC_ANA_CFG0_CALI_DELTA_V_CFG_MASK   (0xCU)
 
#define DAC_ANA_CFG0_CALI_DELTA_V_CFG_SHIFT   (2U)
 
#define DAC_ANA_CFG0_CALI_DELTA_V_CFG_SET(x)   (((uint32_t)(x) << DAC_ANA_CFG0_CALI_DELTA_V_CFG_SHIFT) & DAC_ANA_CFG0_CALI_DELTA_V_CFG_MASK)
 
#define DAC_ANA_CFG0_CALI_DELTA_V_CFG_GET(x)   (((uint32_t)(x) & DAC_ANA_CFG0_CALI_DELTA_V_CFG_MASK) >> DAC_ANA_CFG0_CALI_DELTA_V_CFG_SHIFT)
 
#define DAC_ANA_CFG0_BYPASS_CALI_GM_MASK   (0x2U)
 
#define DAC_ANA_CFG0_BYPASS_CALI_GM_SHIFT   (1U)
 
#define DAC_ANA_CFG0_BYPASS_CALI_GM_SET(x)   (((uint32_t)(x) << DAC_ANA_CFG0_BYPASS_CALI_GM_SHIFT) & DAC_ANA_CFG0_BYPASS_CALI_GM_MASK)
 
#define DAC_ANA_CFG0_BYPASS_CALI_GM_GET(x)   (((uint32_t)(x) & DAC_ANA_CFG0_BYPASS_CALI_GM_MASK) >> DAC_ANA_CFG0_BYPASS_CALI_GM_SHIFT)
 
#define DAC_ANA_CFG0_DAC12BIT_EN_MASK   (0x1U)
 
#define DAC_ANA_CFG0_DAC12BIT_EN_SHIFT   (0U)
 
#define DAC_ANA_CFG0_DAC12BIT_EN_SET(x)   (((uint32_t)(x) << DAC_ANA_CFG0_DAC12BIT_EN_SHIFT) & DAC_ANA_CFG0_DAC12BIT_EN_MASK)
 
#define DAC_ANA_CFG0_DAC12BIT_EN_GET(x)   (((uint32_t)(x) & DAC_ANA_CFG0_DAC12BIT_EN_MASK) >> DAC_ANA_CFG0_DAC12BIT_EN_SHIFT)
 
#define DAC_CFG0_BAK_SW_DAC_DATA_MASK   (0xFFF0000UL)
 
#define DAC_CFG0_BAK_SW_DAC_DATA_SHIFT   (16U)
 
#define DAC_CFG0_BAK_SW_DAC_DATA_SET(x)   (((uint32_t)(x) << DAC_CFG0_BAK_SW_DAC_DATA_SHIFT) & DAC_CFG0_BAK_SW_DAC_DATA_MASK)
 
#define DAC_CFG0_BAK_SW_DAC_DATA_GET(x)   (((uint32_t)(x) & DAC_CFG0_BAK_SW_DAC_DATA_MASK) >> DAC_CFG0_BAK_SW_DAC_DATA_SHIFT)
 
#define DAC_CFG0_BAK_DMA_AHB_EN_MASK   (0x200U)
 
#define DAC_CFG0_BAK_DMA_AHB_EN_SHIFT   (9U)
 
#define DAC_CFG0_BAK_DMA_AHB_EN_SET(x)   (((uint32_t)(x) << DAC_CFG0_BAK_DMA_AHB_EN_SHIFT) & DAC_CFG0_BAK_DMA_AHB_EN_MASK)
 
#define DAC_CFG0_BAK_DMA_AHB_EN_GET(x)   (((uint32_t)(x) & DAC_CFG0_BAK_DMA_AHB_EN_MASK) >> DAC_CFG0_BAK_DMA_AHB_EN_SHIFT)
 
#define DAC_CFG0_BAK_SYNC_MODE_MASK   (0x100U)
 
#define DAC_CFG0_BAK_SYNC_MODE_SHIFT   (8U)
 
#define DAC_CFG0_BAK_SYNC_MODE_SET(x)   (((uint32_t)(x) << DAC_CFG0_BAK_SYNC_MODE_SHIFT) & DAC_CFG0_BAK_SYNC_MODE_MASK)
 
#define DAC_CFG0_BAK_SYNC_MODE_GET(x)   (((uint32_t)(x) & DAC_CFG0_BAK_SYNC_MODE_MASK) >> DAC_CFG0_BAK_SYNC_MODE_SHIFT)
 
#define DAC_CFG0_BAK_TRIG_MODE_MASK   (0x80U)
 
#define DAC_CFG0_BAK_TRIG_MODE_SHIFT   (7U)
 
#define DAC_CFG0_BAK_TRIG_MODE_SET(x)   (((uint32_t)(x) << DAC_CFG0_BAK_TRIG_MODE_SHIFT) & DAC_CFG0_BAK_TRIG_MODE_MASK)
 
#define DAC_CFG0_BAK_TRIG_MODE_GET(x)   (((uint32_t)(x) & DAC_CFG0_BAK_TRIG_MODE_MASK) >> DAC_CFG0_BAK_TRIG_MODE_SHIFT)
 
#define DAC_CFG0_BAK_HW_TRIG_EN_MASK   (0x40U)
 
#define DAC_CFG0_BAK_HW_TRIG_EN_SHIFT   (6U)
 
#define DAC_CFG0_BAK_HW_TRIG_EN_SET(x)   (((uint32_t)(x) << DAC_CFG0_BAK_HW_TRIG_EN_SHIFT) & DAC_CFG0_BAK_HW_TRIG_EN_MASK)
 
#define DAC_CFG0_BAK_HW_TRIG_EN_GET(x)   (((uint32_t)(x) & DAC_CFG0_BAK_HW_TRIG_EN_MASK) >> DAC_CFG0_BAK_HW_TRIG_EN_SHIFT)
 
#define DAC_CFG0_BAK_DAC_MODE_MASK   (0x30U)
 
#define DAC_CFG0_BAK_DAC_MODE_SHIFT   (4U)
 
#define DAC_CFG0_BAK_DAC_MODE_SET(x)   (((uint32_t)(x) << DAC_CFG0_BAK_DAC_MODE_SHIFT) & DAC_CFG0_BAK_DAC_MODE_MASK)
 
#define DAC_CFG0_BAK_DAC_MODE_GET(x)   (((uint32_t)(x) & DAC_CFG0_BAK_DAC_MODE_MASK) >> DAC_CFG0_BAK_DAC_MODE_SHIFT)
 
#define DAC_CFG0_BAK_BUF_DATA_MODE_MASK   (0x8U)
 
#define DAC_CFG0_BAK_BUF_DATA_MODE_SHIFT   (3U)
 
#define DAC_CFG0_BAK_BUF_DATA_MODE_SET(x)   (((uint32_t)(x) << DAC_CFG0_BAK_BUF_DATA_MODE_SHIFT) & DAC_CFG0_BAK_BUF_DATA_MODE_MASK)
 
#define DAC_CFG0_BAK_BUF_DATA_MODE_GET(x)   (((uint32_t)(x) & DAC_CFG0_BAK_BUF_DATA_MODE_MASK) >> DAC_CFG0_BAK_BUF_DATA_MODE_SHIFT)
 
#define DAC_CFG0_BAK_HBURST_CFG_MASK   (0x7U)
 
#define DAC_CFG0_BAK_HBURST_CFG_SHIFT   (0U)
 
#define DAC_CFG0_BAK_HBURST_CFG_SET(x)   (((uint32_t)(x) << DAC_CFG0_BAK_HBURST_CFG_SHIFT) & DAC_CFG0_BAK_HBURST_CFG_MASK)
 
#define DAC_CFG0_BAK_HBURST_CFG_GET(x)   (((uint32_t)(x) & DAC_CFG0_BAK_HBURST_CFG_MASK) >> DAC_CFG0_BAK_HBURST_CFG_SHIFT)
 
#define DAC_STATUS0_CUR_BUF_OFFSET_MASK   (0xFFFF00UL)
 
#define DAC_STATUS0_CUR_BUF_OFFSET_SHIFT   (8U)
 
#define DAC_STATUS0_CUR_BUF_OFFSET_SET(x)   (((uint32_t)(x) << DAC_STATUS0_CUR_BUF_OFFSET_SHIFT) & DAC_STATUS0_CUR_BUF_OFFSET_MASK)
 
#define DAC_STATUS0_CUR_BUF_OFFSET_GET(x)   (((uint32_t)(x) & DAC_STATUS0_CUR_BUF_OFFSET_MASK) >> DAC_STATUS0_CUR_BUF_OFFSET_SHIFT)
 
#define DAC_STATUS0_CUR_BUF_INDEX_MASK   (0x80U)
 
#define DAC_STATUS0_CUR_BUF_INDEX_SHIFT   (7U)
 
#define DAC_STATUS0_CUR_BUF_INDEX_SET(x)   (((uint32_t)(x) << DAC_STATUS0_CUR_BUF_INDEX_SHIFT) & DAC_STATUS0_CUR_BUF_INDEX_MASK)
 
#define DAC_STATUS0_CUR_BUF_INDEX_GET(x)   (((uint32_t)(x) & DAC_STATUS0_CUR_BUF_INDEX_MASK) >> DAC_STATUS0_CUR_BUF_INDEX_SHIFT)
 
#define DAC_STEP_CFG_STEP0   (0UL)
 
#define DAC_STEP_CFG_STEP1   (1UL)
 
#define DAC_STEP_CFG_STEP2   (2UL)
 
#define DAC_STEP_CFG_STEP3   (3UL)
 
#define DAC_BUF_ADDR_BUF0   (0UL)
 
#define DAC_BUF_ADDR_BUF1   (1UL)
 

Macro Definition Documentation

◆ DAC_ANA_CFG0_BYPASS_CALI_GM_GET

#define DAC_ANA_CFG0_BYPASS_CALI_GM_GET (   x)    (((uint32_t)(x) & DAC_ANA_CFG0_BYPASS_CALI_GM_MASK) >> DAC_ANA_CFG0_BYPASS_CALI_GM_SHIFT)

◆ DAC_ANA_CFG0_BYPASS_CALI_GM_MASK

#define DAC_ANA_CFG0_BYPASS_CALI_GM_MASK   (0x2U)

◆ DAC_ANA_CFG0_BYPASS_CALI_GM_SET

#define DAC_ANA_CFG0_BYPASS_CALI_GM_SET (   x)    (((uint32_t)(x) << DAC_ANA_CFG0_BYPASS_CALI_GM_SHIFT) & DAC_ANA_CFG0_BYPASS_CALI_GM_MASK)

◆ DAC_ANA_CFG0_BYPASS_CALI_GM_SHIFT

#define DAC_ANA_CFG0_BYPASS_CALI_GM_SHIFT   (1U)

◆ DAC_ANA_CFG0_CALI_DELTA_V_CFG_GET

#define DAC_ANA_CFG0_CALI_DELTA_V_CFG_GET (   x)    (((uint32_t)(x) & DAC_ANA_CFG0_CALI_DELTA_V_CFG_MASK) >> DAC_ANA_CFG0_CALI_DELTA_V_CFG_SHIFT)

◆ DAC_ANA_CFG0_CALI_DELTA_V_CFG_MASK

#define DAC_ANA_CFG0_CALI_DELTA_V_CFG_MASK   (0xCU)

◆ DAC_ANA_CFG0_CALI_DELTA_V_CFG_SET

#define DAC_ANA_CFG0_CALI_DELTA_V_CFG_SET (   x)    (((uint32_t)(x) << DAC_ANA_CFG0_CALI_DELTA_V_CFG_SHIFT) & DAC_ANA_CFG0_CALI_DELTA_V_CFG_MASK)

◆ DAC_ANA_CFG0_CALI_DELTA_V_CFG_SHIFT

#define DAC_ANA_CFG0_CALI_DELTA_V_CFG_SHIFT   (2U)

◆ DAC_ANA_CFG0_DAC12BIT_EN_GET

#define DAC_ANA_CFG0_DAC12BIT_EN_GET (   x)    (((uint32_t)(x) & DAC_ANA_CFG0_DAC12BIT_EN_MASK) >> DAC_ANA_CFG0_DAC12BIT_EN_SHIFT)

◆ DAC_ANA_CFG0_DAC12BIT_EN_MASK

#define DAC_ANA_CFG0_DAC12BIT_EN_MASK   (0x1U)

◆ DAC_ANA_CFG0_DAC12BIT_EN_SET

#define DAC_ANA_CFG0_DAC12BIT_EN_SET (   x)    (((uint32_t)(x) << DAC_ANA_CFG0_DAC12BIT_EN_SHIFT) & DAC_ANA_CFG0_DAC12BIT_EN_MASK)

◆ DAC_ANA_CFG0_DAC12BIT_EN_SHIFT

#define DAC_ANA_CFG0_DAC12BIT_EN_SHIFT   (0U)

◆ DAC_ANA_CFG0_DAC12BIT_LP_MODE_GET

#define DAC_ANA_CFG0_DAC12BIT_LP_MODE_GET (   x)    (((uint32_t)(x) & DAC_ANA_CFG0_DAC12BIT_LP_MODE_MASK) >> DAC_ANA_CFG0_DAC12BIT_LP_MODE_SHIFT)

◆ DAC_ANA_CFG0_DAC12BIT_LP_MODE_MASK

#define DAC_ANA_CFG0_DAC12BIT_LP_MODE_MASK   (0x100U)

◆ DAC_ANA_CFG0_DAC12BIT_LP_MODE_SET

#define DAC_ANA_CFG0_DAC12BIT_LP_MODE_SET (   x)    (((uint32_t)(x) << DAC_ANA_CFG0_DAC12BIT_LP_MODE_SHIFT) & DAC_ANA_CFG0_DAC12BIT_LP_MODE_MASK)

◆ DAC_ANA_CFG0_DAC12BIT_LP_MODE_SHIFT

#define DAC_ANA_CFG0_DAC12BIT_LP_MODE_SHIFT   (8U)

◆ DAC_ANA_CFG0_DAC_CONFIG_GET

#define DAC_ANA_CFG0_DAC_CONFIG_GET (   x)    (((uint32_t)(x) & DAC_ANA_CFG0_DAC_CONFIG_MASK) >> DAC_ANA_CFG0_DAC_CONFIG_SHIFT)

◆ DAC_ANA_CFG0_DAC_CONFIG_MASK

#define DAC_ANA_CFG0_DAC_CONFIG_MASK   (0xF0U)

◆ DAC_ANA_CFG0_DAC_CONFIG_SET

#define DAC_ANA_CFG0_DAC_CONFIG_SET (   x)    (((uint32_t)(x) << DAC_ANA_CFG0_DAC_CONFIG_SHIFT) & DAC_ANA_CFG0_DAC_CONFIG_MASK)

◆ DAC_ANA_CFG0_DAC_CONFIG_SHIFT

#define DAC_ANA_CFG0_DAC_CONFIG_SHIFT   (4U)

◆ DAC_BUF_ADDR_BUF0

#define DAC_BUF_ADDR_BUF0   (0UL)

◆ DAC_BUF_ADDR_BUF1

#define DAC_BUF_ADDR_BUF1   (1UL)

◆ DAC_BUF_ADDR_BUF_START_ADDR_GET

#define DAC_BUF_ADDR_BUF_START_ADDR_GET (   x)    (((uint32_t)(x) & DAC_BUF_ADDR_BUF_START_ADDR_MASK) >> DAC_BUF_ADDR_BUF_START_ADDR_SHIFT)

◆ DAC_BUF_ADDR_BUF_START_ADDR_MASK

#define DAC_BUF_ADDR_BUF_START_ADDR_MASK   (0xFFFFFFFCUL)

◆ DAC_BUF_ADDR_BUF_START_ADDR_SET

#define DAC_BUF_ADDR_BUF_START_ADDR_SET (   x)    (((uint32_t)(x) << DAC_BUF_ADDR_BUF_START_ADDR_SHIFT) & DAC_BUF_ADDR_BUF_START_ADDR_MASK)

◆ DAC_BUF_ADDR_BUF_START_ADDR_SHIFT

#define DAC_BUF_ADDR_BUF_START_ADDR_SHIFT   (2U)

◆ DAC_BUF_ADDR_BUF_STOP_GET

#define DAC_BUF_ADDR_BUF_STOP_GET (   x)    (((uint32_t)(x) & DAC_BUF_ADDR_BUF_STOP_MASK) >> DAC_BUF_ADDR_BUF_STOP_SHIFT)

◆ DAC_BUF_ADDR_BUF_STOP_MASK

#define DAC_BUF_ADDR_BUF_STOP_MASK   (0x1U)

◆ DAC_BUF_ADDR_BUF_STOP_SET

#define DAC_BUF_ADDR_BUF_STOP_SET (   x)    (((uint32_t)(x) << DAC_BUF_ADDR_BUF_STOP_SHIFT) & DAC_BUF_ADDR_BUF_STOP_MASK)

◆ DAC_BUF_ADDR_BUF_STOP_SHIFT

#define DAC_BUF_ADDR_BUF_STOP_SHIFT   (0U)

◆ DAC_BUF_LENGTH_BUF0_LEN_GET

#define DAC_BUF_LENGTH_BUF0_LEN_GET (   x)    (((uint32_t)(x) & DAC_BUF_LENGTH_BUF0_LEN_MASK) >> DAC_BUF_LENGTH_BUF0_LEN_SHIFT)

◆ DAC_BUF_LENGTH_BUF0_LEN_MASK

#define DAC_BUF_LENGTH_BUF0_LEN_MASK   (0xFFFFU)

◆ DAC_BUF_LENGTH_BUF0_LEN_SET

#define DAC_BUF_LENGTH_BUF0_LEN_SET (   x)    (((uint32_t)(x) << DAC_BUF_LENGTH_BUF0_LEN_SHIFT) & DAC_BUF_LENGTH_BUF0_LEN_MASK)

◆ DAC_BUF_LENGTH_BUF0_LEN_SHIFT

#define DAC_BUF_LENGTH_BUF0_LEN_SHIFT   (0U)

◆ DAC_BUF_LENGTH_BUF1_LEN_GET

#define DAC_BUF_LENGTH_BUF1_LEN_GET (   x)    (((uint32_t)(x) & DAC_BUF_LENGTH_BUF1_LEN_MASK) >> DAC_BUF_LENGTH_BUF1_LEN_SHIFT)

◆ DAC_BUF_LENGTH_BUF1_LEN_MASK

#define DAC_BUF_LENGTH_BUF1_LEN_MASK   (0xFFFF0000UL)

◆ DAC_BUF_LENGTH_BUF1_LEN_SET

#define DAC_BUF_LENGTH_BUF1_LEN_SET (   x)    (((uint32_t)(x) << DAC_BUF_LENGTH_BUF1_LEN_SHIFT) & DAC_BUF_LENGTH_BUF1_LEN_MASK)

◆ DAC_BUF_LENGTH_BUF1_LEN_SHIFT

#define DAC_BUF_LENGTH_BUF1_LEN_SHIFT   (16U)

◆ DAC_CFG0_BAK_BUF_DATA_MODE_GET

#define DAC_CFG0_BAK_BUF_DATA_MODE_GET (   x)    (((uint32_t)(x) & DAC_CFG0_BAK_BUF_DATA_MODE_MASK) >> DAC_CFG0_BAK_BUF_DATA_MODE_SHIFT)

◆ DAC_CFG0_BAK_BUF_DATA_MODE_MASK

#define DAC_CFG0_BAK_BUF_DATA_MODE_MASK   (0x8U)

◆ DAC_CFG0_BAK_BUF_DATA_MODE_SET

#define DAC_CFG0_BAK_BUF_DATA_MODE_SET (   x)    (((uint32_t)(x) << DAC_CFG0_BAK_BUF_DATA_MODE_SHIFT) & DAC_CFG0_BAK_BUF_DATA_MODE_MASK)

◆ DAC_CFG0_BAK_BUF_DATA_MODE_SHIFT

#define DAC_CFG0_BAK_BUF_DATA_MODE_SHIFT   (3U)

◆ DAC_CFG0_BAK_DAC_MODE_GET

#define DAC_CFG0_BAK_DAC_MODE_GET (   x)    (((uint32_t)(x) & DAC_CFG0_BAK_DAC_MODE_MASK) >> DAC_CFG0_BAK_DAC_MODE_SHIFT)

◆ DAC_CFG0_BAK_DAC_MODE_MASK

#define DAC_CFG0_BAK_DAC_MODE_MASK   (0x30U)

◆ DAC_CFG0_BAK_DAC_MODE_SET

#define DAC_CFG0_BAK_DAC_MODE_SET (   x)    (((uint32_t)(x) << DAC_CFG0_BAK_DAC_MODE_SHIFT) & DAC_CFG0_BAK_DAC_MODE_MASK)

◆ DAC_CFG0_BAK_DAC_MODE_SHIFT

#define DAC_CFG0_BAK_DAC_MODE_SHIFT   (4U)

◆ DAC_CFG0_BAK_DMA_AHB_EN_GET

#define DAC_CFG0_BAK_DMA_AHB_EN_GET (   x)    (((uint32_t)(x) & DAC_CFG0_BAK_DMA_AHB_EN_MASK) >> DAC_CFG0_BAK_DMA_AHB_EN_SHIFT)

◆ DAC_CFG0_BAK_DMA_AHB_EN_MASK

#define DAC_CFG0_BAK_DMA_AHB_EN_MASK   (0x200U)

◆ DAC_CFG0_BAK_DMA_AHB_EN_SET

#define DAC_CFG0_BAK_DMA_AHB_EN_SET (   x)    (((uint32_t)(x) << DAC_CFG0_BAK_DMA_AHB_EN_SHIFT) & DAC_CFG0_BAK_DMA_AHB_EN_MASK)

◆ DAC_CFG0_BAK_DMA_AHB_EN_SHIFT

#define DAC_CFG0_BAK_DMA_AHB_EN_SHIFT   (9U)

◆ DAC_CFG0_BAK_HBURST_CFG_GET

#define DAC_CFG0_BAK_HBURST_CFG_GET (   x)    (((uint32_t)(x) & DAC_CFG0_BAK_HBURST_CFG_MASK) >> DAC_CFG0_BAK_HBURST_CFG_SHIFT)

◆ DAC_CFG0_BAK_HBURST_CFG_MASK

#define DAC_CFG0_BAK_HBURST_CFG_MASK   (0x7U)

◆ DAC_CFG0_BAK_HBURST_CFG_SET

#define DAC_CFG0_BAK_HBURST_CFG_SET (   x)    (((uint32_t)(x) << DAC_CFG0_BAK_HBURST_CFG_SHIFT) & DAC_CFG0_BAK_HBURST_CFG_MASK)

◆ DAC_CFG0_BAK_HBURST_CFG_SHIFT

#define DAC_CFG0_BAK_HBURST_CFG_SHIFT   (0U)

◆ DAC_CFG0_BAK_HW_TRIG_EN_GET

#define DAC_CFG0_BAK_HW_TRIG_EN_GET (   x)    (((uint32_t)(x) & DAC_CFG0_BAK_HW_TRIG_EN_MASK) >> DAC_CFG0_BAK_HW_TRIG_EN_SHIFT)

◆ DAC_CFG0_BAK_HW_TRIG_EN_MASK

#define DAC_CFG0_BAK_HW_TRIG_EN_MASK   (0x40U)

◆ DAC_CFG0_BAK_HW_TRIG_EN_SET

#define DAC_CFG0_BAK_HW_TRIG_EN_SET (   x)    (((uint32_t)(x) << DAC_CFG0_BAK_HW_TRIG_EN_SHIFT) & DAC_CFG0_BAK_HW_TRIG_EN_MASK)

◆ DAC_CFG0_BAK_HW_TRIG_EN_SHIFT

#define DAC_CFG0_BAK_HW_TRIG_EN_SHIFT   (6U)

◆ DAC_CFG0_BAK_SW_DAC_DATA_GET

#define DAC_CFG0_BAK_SW_DAC_DATA_GET (   x)    (((uint32_t)(x) & DAC_CFG0_BAK_SW_DAC_DATA_MASK) >> DAC_CFG0_BAK_SW_DAC_DATA_SHIFT)

◆ DAC_CFG0_BAK_SW_DAC_DATA_MASK

#define DAC_CFG0_BAK_SW_DAC_DATA_MASK   (0xFFF0000UL)

◆ DAC_CFG0_BAK_SW_DAC_DATA_SET

#define DAC_CFG0_BAK_SW_DAC_DATA_SET (   x)    (((uint32_t)(x) << DAC_CFG0_BAK_SW_DAC_DATA_SHIFT) & DAC_CFG0_BAK_SW_DAC_DATA_MASK)

◆ DAC_CFG0_BAK_SW_DAC_DATA_SHIFT

#define DAC_CFG0_BAK_SW_DAC_DATA_SHIFT   (16U)

◆ DAC_CFG0_BAK_SYNC_MODE_GET

#define DAC_CFG0_BAK_SYNC_MODE_GET (   x)    (((uint32_t)(x) & DAC_CFG0_BAK_SYNC_MODE_MASK) >> DAC_CFG0_BAK_SYNC_MODE_SHIFT)

◆ DAC_CFG0_BAK_SYNC_MODE_MASK

#define DAC_CFG0_BAK_SYNC_MODE_MASK   (0x100U)

◆ DAC_CFG0_BAK_SYNC_MODE_SET

#define DAC_CFG0_BAK_SYNC_MODE_SET (   x)    (((uint32_t)(x) << DAC_CFG0_BAK_SYNC_MODE_SHIFT) & DAC_CFG0_BAK_SYNC_MODE_MASK)

◆ DAC_CFG0_BAK_SYNC_MODE_SHIFT

#define DAC_CFG0_BAK_SYNC_MODE_SHIFT   (8U)

◆ DAC_CFG0_BAK_TRIG_MODE_GET

#define DAC_CFG0_BAK_TRIG_MODE_GET (   x)    (((uint32_t)(x) & DAC_CFG0_BAK_TRIG_MODE_MASK) >> DAC_CFG0_BAK_TRIG_MODE_SHIFT)

◆ DAC_CFG0_BAK_TRIG_MODE_MASK

#define DAC_CFG0_BAK_TRIG_MODE_MASK   (0x80U)

◆ DAC_CFG0_BAK_TRIG_MODE_SET

#define DAC_CFG0_BAK_TRIG_MODE_SET (   x)    (((uint32_t)(x) << DAC_CFG0_BAK_TRIG_MODE_SHIFT) & DAC_CFG0_BAK_TRIG_MODE_MASK)

◆ DAC_CFG0_BAK_TRIG_MODE_SHIFT

#define DAC_CFG0_BAK_TRIG_MODE_SHIFT   (7U)

◆ DAC_CFG0_BUF_DATA_MODE_GET

#define DAC_CFG0_BUF_DATA_MODE_GET (   x)    (((uint32_t)(x) & DAC_CFG0_BUF_DATA_MODE_MASK) >> DAC_CFG0_BUF_DATA_MODE_SHIFT)

◆ DAC_CFG0_BUF_DATA_MODE_MASK

#define DAC_CFG0_BUF_DATA_MODE_MASK   (0x8U)

◆ DAC_CFG0_BUF_DATA_MODE_SET

#define DAC_CFG0_BUF_DATA_MODE_SET (   x)    (((uint32_t)(x) << DAC_CFG0_BUF_DATA_MODE_SHIFT) & DAC_CFG0_BUF_DATA_MODE_MASK)

◆ DAC_CFG0_BUF_DATA_MODE_SHIFT

#define DAC_CFG0_BUF_DATA_MODE_SHIFT   (3U)

◆ DAC_CFG0_DAC_MODE_GET

#define DAC_CFG0_DAC_MODE_GET (   x)    (((uint32_t)(x) & DAC_CFG0_DAC_MODE_MASK) >> DAC_CFG0_DAC_MODE_SHIFT)

◆ DAC_CFG0_DAC_MODE_MASK

#define DAC_CFG0_DAC_MODE_MASK   (0x30U)

◆ DAC_CFG0_DAC_MODE_SET

#define DAC_CFG0_DAC_MODE_SET (   x)    (((uint32_t)(x) << DAC_CFG0_DAC_MODE_SHIFT) & DAC_CFG0_DAC_MODE_MASK)

◆ DAC_CFG0_DAC_MODE_SHIFT

#define DAC_CFG0_DAC_MODE_SHIFT   (4U)

◆ DAC_CFG0_DMA_AHB_EN_GET

#define DAC_CFG0_DMA_AHB_EN_GET (   x)    (((uint32_t)(x) & DAC_CFG0_DMA_AHB_EN_MASK) >> DAC_CFG0_DMA_AHB_EN_SHIFT)

◆ DAC_CFG0_DMA_AHB_EN_MASK

#define DAC_CFG0_DMA_AHB_EN_MASK   (0x200U)

◆ DAC_CFG0_DMA_AHB_EN_SET

#define DAC_CFG0_DMA_AHB_EN_SET (   x)    (((uint32_t)(x) << DAC_CFG0_DMA_AHB_EN_SHIFT) & DAC_CFG0_DMA_AHB_EN_MASK)

◆ DAC_CFG0_DMA_AHB_EN_SHIFT

#define DAC_CFG0_DMA_AHB_EN_SHIFT   (9U)

◆ DAC_CFG0_HBURST_CFG_GET

#define DAC_CFG0_HBURST_CFG_GET (   x)    (((uint32_t)(x) & DAC_CFG0_HBURST_CFG_MASK) >> DAC_CFG0_HBURST_CFG_SHIFT)

◆ DAC_CFG0_HBURST_CFG_MASK

#define DAC_CFG0_HBURST_CFG_MASK   (0x7U)

◆ DAC_CFG0_HBURST_CFG_SET

#define DAC_CFG0_HBURST_CFG_SET (   x)    (((uint32_t)(x) << DAC_CFG0_HBURST_CFG_SHIFT) & DAC_CFG0_HBURST_CFG_MASK)

◆ DAC_CFG0_HBURST_CFG_SHIFT

#define DAC_CFG0_HBURST_CFG_SHIFT   (0U)

◆ DAC_CFG0_HW_TRIG_EN_GET

#define DAC_CFG0_HW_TRIG_EN_GET (   x)    (((uint32_t)(x) & DAC_CFG0_HW_TRIG_EN_MASK) >> DAC_CFG0_HW_TRIG_EN_SHIFT)

◆ DAC_CFG0_HW_TRIG_EN_MASK

#define DAC_CFG0_HW_TRIG_EN_MASK   (0x40U)

◆ DAC_CFG0_HW_TRIG_EN_SET

#define DAC_CFG0_HW_TRIG_EN_SET (   x)    (((uint32_t)(x) << DAC_CFG0_HW_TRIG_EN_SHIFT) & DAC_CFG0_HW_TRIG_EN_MASK)

◆ DAC_CFG0_HW_TRIG_EN_SHIFT

#define DAC_CFG0_HW_TRIG_EN_SHIFT   (6U)

◆ DAC_CFG0_SW_DAC_DATA_GET

#define DAC_CFG0_SW_DAC_DATA_GET (   x)    (((uint32_t)(x) & DAC_CFG0_SW_DAC_DATA_MASK) >> DAC_CFG0_SW_DAC_DATA_SHIFT)

◆ DAC_CFG0_SW_DAC_DATA_MASK

#define DAC_CFG0_SW_DAC_DATA_MASK   (0xFFF0000UL)

◆ DAC_CFG0_SW_DAC_DATA_SET

#define DAC_CFG0_SW_DAC_DATA_SET (   x)    (((uint32_t)(x) << DAC_CFG0_SW_DAC_DATA_SHIFT) & DAC_CFG0_SW_DAC_DATA_MASK)

◆ DAC_CFG0_SW_DAC_DATA_SHIFT

#define DAC_CFG0_SW_DAC_DATA_SHIFT   (16U)

◆ DAC_CFG0_SYNC_MODE_GET

#define DAC_CFG0_SYNC_MODE_GET (   x)    (((uint32_t)(x) & DAC_CFG0_SYNC_MODE_MASK) >> DAC_CFG0_SYNC_MODE_SHIFT)

◆ DAC_CFG0_SYNC_MODE_MASK

#define DAC_CFG0_SYNC_MODE_MASK   (0x100U)

◆ DAC_CFG0_SYNC_MODE_SET

#define DAC_CFG0_SYNC_MODE_SET (   x)    (((uint32_t)(x) << DAC_CFG0_SYNC_MODE_SHIFT) & DAC_CFG0_SYNC_MODE_MASK)

◆ DAC_CFG0_SYNC_MODE_SHIFT

#define DAC_CFG0_SYNC_MODE_SHIFT   (8U)

◆ DAC_CFG0_TRIG_MODE_GET

#define DAC_CFG0_TRIG_MODE_GET (   x)    (((uint32_t)(x) & DAC_CFG0_TRIG_MODE_MASK) >> DAC_CFG0_TRIG_MODE_SHIFT)

◆ DAC_CFG0_TRIG_MODE_MASK

#define DAC_CFG0_TRIG_MODE_MASK   (0x80U)

◆ DAC_CFG0_TRIG_MODE_SET

#define DAC_CFG0_TRIG_MODE_SET (   x)    (((uint32_t)(x) << DAC_CFG0_TRIG_MODE_SHIFT) & DAC_CFG0_TRIG_MODE_MASK)

◆ DAC_CFG0_TRIG_MODE_SHIFT

#define DAC_CFG0_TRIG_MODE_SHIFT   (7U)

◆ DAC_CFG1_ANA_CLK_EN_GET

#define DAC_CFG1_ANA_CLK_EN_GET (   x)    (((uint32_t)(x) & DAC_CFG1_ANA_CLK_EN_MASK) >> DAC_CFG1_ANA_CLK_EN_SHIFT)

◆ DAC_CFG1_ANA_CLK_EN_MASK

#define DAC_CFG1_ANA_CLK_EN_MASK   (0x40000UL)

◆ DAC_CFG1_ANA_CLK_EN_SET

#define DAC_CFG1_ANA_CLK_EN_SET (   x)    (((uint32_t)(x) << DAC_CFG1_ANA_CLK_EN_SHIFT) & DAC_CFG1_ANA_CLK_EN_MASK)

◆ DAC_CFG1_ANA_CLK_EN_SHIFT

#define DAC_CFG1_ANA_CLK_EN_SHIFT   (18U)

◆ DAC_CFG1_ANA_DIV_CFG_GET

#define DAC_CFG1_ANA_DIV_CFG_GET (   x)    (((uint32_t)(x) & DAC_CFG1_ANA_DIV_CFG_MASK) >> DAC_CFG1_ANA_DIV_CFG_SHIFT)

◆ DAC_CFG1_ANA_DIV_CFG_MASK

#define DAC_CFG1_ANA_DIV_CFG_MASK   (0x30000UL)

◆ DAC_CFG1_ANA_DIV_CFG_SET

#define DAC_CFG1_ANA_DIV_CFG_SET (   x)    (((uint32_t)(x) << DAC_CFG1_ANA_DIV_CFG_SHIFT) & DAC_CFG1_ANA_DIV_CFG_MASK)

◆ DAC_CFG1_ANA_DIV_CFG_SHIFT

#define DAC_CFG1_ANA_DIV_CFG_SHIFT   (16U)

◆ DAC_CFG1_DIV_CFG_GET

#define DAC_CFG1_DIV_CFG_GET (   x)    (((uint32_t)(x) & DAC_CFG1_DIV_CFG_MASK) >> DAC_CFG1_DIV_CFG_SHIFT)

◆ DAC_CFG1_DIV_CFG_MASK

#define DAC_CFG1_DIV_CFG_MASK   (0xFFFFU)

◆ DAC_CFG1_DIV_CFG_SET

#define DAC_CFG1_DIV_CFG_SET (   x)    (((uint32_t)(x) << DAC_CFG1_DIV_CFG_SHIFT) & DAC_CFG1_DIV_CFG_MASK)

◆ DAC_CFG1_DIV_CFG_SHIFT

#define DAC_CFG1_DIV_CFG_SHIFT   (0U)

◆ DAC_CFG2_BUF_SW_TRIG_GET

#define DAC_CFG2_BUF_SW_TRIG_GET (   x)    (((uint32_t)(x) & DAC_CFG2_BUF_SW_TRIG_MASK) >> DAC_CFG2_BUF_SW_TRIG_SHIFT)

◆ DAC_CFG2_BUF_SW_TRIG_MASK

#define DAC_CFG2_BUF_SW_TRIG_MASK   (0x10U)

◆ DAC_CFG2_BUF_SW_TRIG_SET

#define DAC_CFG2_BUF_SW_TRIG_SET (   x)    (((uint32_t)(x) << DAC_CFG2_BUF_SW_TRIG_SHIFT) & DAC_CFG2_BUF_SW_TRIG_MASK)

◆ DAC_CFG2_BUF_SW_TRIG_SHIFT

#define DAC_CFG2_BUF_SW_TRIG_SHIFT   (4U)

◆ DAC_CFG2_DMA_RST0_GET

#define DAC_CFG2_DMA_RST0_GET (   x)    (((uint32_t)(x) & DAC_CFG2_DMA_RST0_MASK) >> DAC_CFG2_DMA_RST0_SHIFT)

◆ DAC_CFG2_DMA_RST0_MASK

#define DAC_CFG2_DMA_RST0_MASK   (0x40U)

◆ DAC_CFG2_DMA_RST0_SET

#define DAC_CFG2_DMA_RST0_SET (   x)    (((uint32_t)(x) << DAC_CFG2_DMA_RST0_SHIFT) & DAC_CFG2_DMA_RST0_MASK)

◆ DAC_CFG2_DMA_RST0_SHIFT

#define DAC_CFG2_DMA_RST0_SHIFT   (6U)

◆ DAC_CFG2_DMA_RST1_GET

#define DAC_CFG2_DMA_RST1_GET (   x)    (((uint32_t)(x) & DAC_CFG2_DMA_RST1_MASK) >> DAC_CFG2_DMA_RST1_SHIFT)

◆ DAC_CFG2_DMA_RST1_MASK

#define DAC_CFG2_DMA_RST1_MASK   (0x80U)

◆ DAC_CFG2_DMA_RST1_SET

#define DAC_CFG2_DMA_RST1_SET (   x)    (((uint32_t)(x) << DAC_CFG2_DMA_RST1_SHIFT) & DAC_CFG2_DMA_RST1_MASK)

◆ DAC_CFG2_DMA_RST1_SHIFT

#define DAC_CFG2_DMA_RST1_SHIFT   (7U)

◆ DAC_CFG2_FIFO_CLR_GET

#define DAC_CFG2_FIFO_CLR_GET (   x)    (((uint32_t)(x) & DAC_CFG2_FIFO_CLR_MASK) >> DAC_CFG2_FIFO_CLR_SHIFT)

◆ DAC_CFG2_FIFO_CLR_MASK

#define DAC_CFG2_FIFO_CLR_MASK   (0x20U)

◆ DAC_CFG2_FIFO_CLR_SET

#define DAC_CFG2_FIFO_CLR_SET (   x)    (((uint32_t)(x) << DAC_CFG2_FIFO_CLR_SHIFT) & DAC_CFG2_FIFO_CLR_MASK)

◆ DAC_CFG2_FIFO_CLR_SHIFT

#define DAC_CFG2_FIFO_CLR_SHIFT   (5U)

◆ DAC_CFG2_STEP_SW_TRIG0_GET

#define DAC_CFG2_STEP_SW_TRIG0_GET (   x)    (((uint32_t)(x) & DAC_CFG2_STEP_SW_TRIG0_MASK) >> DAC_CFG2_STEP_SW_TRIG0_SHIFT)

◆ DAC_CFG2_STEP_SW_TRIG0_MASK

#define DAC_CFG2_STEP_SW_TRIG0_MASK   (0x1U)

◆ DAC_CFG2_STEP_SW_TRIG0_SET

#define DAC_CFG2_STEP_SW_TRIG0_SET (   x)    (((uint32_t)(x) << DAC_CFG2_STEP_SW_TRIG0_SHIFT) & DAC_CFG2_STEP_SW_TRIG0_MASK)

◆ DAC_CFG2_STEP_SW_TRIG0_SHIFT

#define DAC_CFG2_STEP_SW_TRIG0_SHIFT   (0U)

◆ DAC_CFG2_STEP_SW_TRIG1_GET

#define DAC_CFG2_STEP_SW_TRIG1_GET (   x)    (((uint32_t)(x) & DAC_CFG2_STEP_SW_TRIG1_MASK) >> DAC_CFG2_STEP_SW_TRIG1_SHIFT)

◆ DAC_CFG2_STEP_SW_TRIG1_MASK

#define DAC_CFG2_STEP_SW_TRIG1_MASK   (0x2U)

◆ DAC_CFG2_STEP_SW_TRIG1_SET

#define DAC_CFG2_STEP_SW_TRIG1_SET (   x)    (((uint32_t)(x) << DAC_CFG2_STEP_SW_TRIG1_SHIFT) & DAC_CFG2_STEP_SW_TRIG1_MASK)

◆ DAC_CFG2_STEP_SW_TRIG1_SHIFT

#define DAC_CFG2_STEP_SW_TRIG1_SHIFT   (1U)

◆ DAC_CFG2_STEP_SW_TRIG2_GET

#define DAC_CFG2_STEP_SW_TRIG2_GET (   x)    (((uint32_t)(x) & DAC_CFG2_STEP_SW_TRIG2_MASK) >> DAC_CFG2_STEP_SW_TRIG2_SHIFT)

◆ DAC_CFG2_STEP_SW_TRIG2_MASK

#define DAC_CFG2_STEP_SW_TRIG2_MASK   (0x4U)

◆ DAC_CFG2_STEP_SW_TRIG2_SET

#define DAC_CFG2_STEP_SW_TRIG2_SET (   x)    (((uint32_t)(x) << DAC_CFG2_STEP_SW_TRIG2_SHIFT) & DAC_CFG2_STEP_SW_TRIG2_MASK)

◆ DAC_CFG2_STEP_SW_TRIG2_SHIFT

#define DAC_CFG2_STEP_SW_TRIG2_SHIFT   (2U)

◆ DAC_CFG2_STEP_SW_TRIG3_GET

#define DAC_CFG2_STEP_SW_TRIG3_GET (   x)    (((uint32_t)(x) & DAC_CFG2_STEP_SW_TRIG3_MASK) >> DAC_CFG2_STEP_SW_TRIG3_SHIFT)

◆ DAC_CFG2_STEP_SW_TRIG3_MASK

#define DAC_CFG2_STEP_SW_TRIG3_MASK   (0x8U)

◆ DAC_CFG2_STEP_SW_TRIG3_SET

#define DAC_CFG2_STEP_SW_TRIG3_SET (   x)    (((uint32_t)(x) << DAC_CFG2_STEP_SW_TRIG3_SHIFT) & DAC_CFG2_STEP_SW_TRIG3_MASK)

◆ DAC_CFG2_STEP_SW_TRIG3_SHIFT

#define DAC_CFG2_STEP_SW_TRIG3_SHIFT   (3U)

◆ DAC_DMA_EN_BUF0_CMPT_GET

#define DAC_DMA_EN_BUF0_CMPT_GET (   x)    (((uint32_t)(x) & DAC_DMA_EN_BUF0_CMPT_MASK) >> DAC_DMA_EN_BUF0_CMPT_SHIFT)

◆ DAC_DMA_EN_BUF0_CMPT_MASK

#define DAC_DMA_EN_BUF0_CMPT_MASK   (0x1U)

◆ DAC_DMA_EN_BUF0_CMPT_SET

#define DAC_DMA_EN_BUF0_CMPT_SET (   x)    (((uint32_t)(x) << DAC_DMA_EN_BUF0_CMPT_SHIFT) & DAC_DMA_EN_BUF0_CMPT_MASK)

◆ DAC_DMA_EN_BUF0_CMPT_SHIFT

#define DAC_DMA_EN_BUF0_CMPT_SHIFT   (0U)

◆ DAC_DMA_EN_BUF1_CMPT_GET

#define DAC_DMA_EN_BUF1_CMPT_GET (   x)    (((uint32_t)(x) & DAC_DMA_EN_BUF1_CMPT_MASK) >> DAC_DMA_EN_BUF1_CMPT_SHIFT)

◆ DAC_DMA_EN_BUF1_CMPT_MASK

#define DAC_DMA_EN_BUF1_CMPT_MASK   (0x2U)

◆ DAC_DMA_EN_BUF1_CMPT_SET

#define DAC_DMA_EN_BUF1_CMPT_SET (   x)    (((uint32_t)(x) << DAC_DMA_EN_BUF1_CMPT_SHIFT) & DAC_DMA_EN_BUF1_CMPT_MASK)

◆ DAC_DMA_EN_BUF1_CMPT_SHIFT

#define DAC_DMA_EN_BUF1_CMPT_SHIFT   (1U)

◆ DAC_DMA_EN_STEP_CMPT_GET

#define DAC_DMA_EN_STEP_CMPT_GET (   x)    (((uint32_t)(x) & DAC_DMA_EN_STEP_CMPT_MASK) >> DAC_DMA_EN_STEP_CMPT_SHIFT)

◆ DAC_DMA_EN_STEP_CMPT_MASK

#define DAC_DMA_EN_STEP_CMPT_MASK   (0x10U)

◆ DAC_DMA_EN_STEP_CMPT_SET

#define DAC_DMA_EN_STEP_CMPT_SET (   x)    (((uint32_t)(x) << DAC_DMA_EN_STEP_CMPT_SHIFT) & DAC_DMA_EN_STEP_CMPT_MASK)

◆ DAC_DMA_EN_STEP_CMPT_SHIFT

#define DAC_DMA_EN_STEP_CMPT_SHIFT   (4U)

◆ DAC_IRQ_EN_AHB_ERROR_GET

#define DAC_IRQ_EN_AHB_ERROR_GET (   x)    (((uint32_t)(x) & DAC_IRQ_EN_AHB_ERROR_MASK) >> DAC_IRQ_EN_AHB_ERROR_SHIFT)

◆ DAC_IRQ_EN_AHB_ERROR_MASK

#define DAC_IRQ_EN_AHB_ERROR_MASK   (0x8U)

◆ DAC_IRQ_EN_AHB_ERROR_SET

#define DAC_IRQ_EN_AHB_ERROR_SET (   x)    (((uint32_t)(x) << DAC_IRQ_EN_AHB_ERROR_SHIFT) & DAC_IRQ_EN_AHB_ERROR_MASK)

◆ DAC_IRQ_EN_AHB_ERROR_SHIFT

#define DAC_IRQ_EN_AHB_ERROR_SHIFT   (3U)

◆ DAC_IRQ_EN_BUF0_CMPT_GET

#define DAC_IRQ_EN_BUF0_CMPT_GET (   x)    (((uint32_t)(x) & DAC_IRQ_EN_BUF0_CMPT_MASK) >> DAC_IRQ_EN_BUF0_CMPT_SHIFT)

◆ DAC_IRQ_EN_BUF0_CMPT_MASK

#define DAC_IRQ_EN_BUF0_CMPT_MASK   (0x1U)

◆ DAC_IRQ_EN_BUF0_CMPT_SET

#define DAC_IRQ_EN_BUF0_CMPT_SET (   x)    (((uint32_t)(x) << DAC_IRQ_EN_BUF0_CMPT_SHIFT) & DAC_IRQ_EN_BUF0_CMPT_MASK)

◆ DAC_IRQ_EN_BUF0_CMPT_SHIFT

#define DAC_IRQ_EN_BUF0_CMPT_SHIFT   (0U)

◆ DAC_IRQ_EN_BUF1_CMPT_GET

#define DAC_IRQ_EN_BUF1_CMPT_GET (   x)    (((uint32_t)(x) & DAC_IRQ_EN_BUF1_CMPT_MASK) >> DAC_IRQ_EN_BUF1_CMPT_SHIFT)

◆ DAC_IRQ_EN_BUF1_CMPT_MASK

#define DAC_IRQ_EN_BUF1_CMPT_MASK   (0x2U)

◆ DAC_IRQ_EN_BUF1_CMPT_SET

#define DAC_IRQ_EN_BUF1_CMPT_SET (   x)    (((uint32_t)(x) << DAC_IRQ_EN_BUF1_CMPT_SHIFT) & DAC_IRQ_EN_BUF1_CMPT_MASK)

◆ DAC_IRQ_EN_BUF1_CMPT_SHIFT

#define DAC_IRQ_EN_BUF1_CMPT_SHIFT   (1U)

◆ DAC_IRQ_EN_FIFO_EMPTY_GET

#define DAC_IRQ_EN_FIFO_EMPTY_GET (   x)    (((uint32_t)(x) & DAC_IRQ_EN_FIFO_EMPTY_MASK) >> DAC_IRQ_EN_FIFO_EMPTY_SHIFT)

◆ DAC_IRQ_EN_FIFO_EMPTY_MASK

#define DAC_IRQ_EN_FIFO_EMPTY_MASK   (0x4U)

◆ DAC_IRQ_EN_FIFO_EMPTY_SET

#define DAC_IRQ_EN_FIFO_EMPTY_SET (   x)    (((uint32_t)(x) << DAC_IRQ_EN_FIFO_EMPTY_SHIFT) & DAC_IRQ_EN_FIFO_EMPTY_MASK)

◆ DAC_IRQ_EN_FIFO_EMPTY_SHIFT

#define DAC_IRQ_EN_FIFO_EMPTY_SHIFT   (2U)

◆ DAC_IRQ_EN_STEP_CMPT_GET

#define DAC_IRQ_EN_STEP_CMPT_GET (   x)    (((uint32_t)(x) & DAC_IRQ_EN_STEP_CMPT_MASK) >> DAC_IRQ_EN_STEP_CMPT_SHIFT)

◆ DAC_IRQ_EN_STEP_CMPT_MASK

#define DAC_IRQ_EN_STEP_CMPT_MASK   (0x10U)

◆ DAC_IRQ_EN_STEP_CMPT_SET

#define DAC_IRQ_EN_STEP_CMPT_SET (   x)    (((uint32_t)(x) << DAC_IRQ_EN_STEP_CMPT_SHIFT) & DAC_IRQ_EN_STEP_CMPT_MASK)

◆ DAC_IRQ_EN_STEP_CMPT_SHIFT

#define DAC_IRQ_EN_STEP_CMPT_SHIFT   (4U)

◆ DAC_IRQ_STS_AHB_ERROR_GET

#define DAC_IRQ_STS_AHB_ERROR_GET (   x)    (((uint32_t)(x) & DAC_IRQ_STS_AHB_ERROR_MASK) >> DAC_IRQ_STS_AHB_ERROR_SHIFT)

◆ DAC_IRQ_STS_AHB_ERROR_MASK

#define DAC_IRQ_STS_AHB_ERROR_MASK   (0x8U)

◆ DAC_IRQ_STS_AHB_ERROR_SET

#define DAC_IRQ_STS_AHB_ERROR_SET (   x)    (((uint32_t)(x) << DAC_IRQ_STS_AHB_ERROR_SHIFT) & DAC_IRQ_STS_AHB_ERROR_MASK)

◆ DAC_IRQ_STS_AHB_ERROR_SHIFT

#define DAC_IRQ_STS_AHB_ERROR_SHIFT   (3U)

◆ DAC_IRQ_STS_BUF0_CMPT_GET

#define DAC_IRQ_STS_BUF0_CMPT_GET (   x)    (((uint32_t)(x) & DAC_IRQ_STS_BUF0_CMPT_MASK) >> DAC_IRQ_STS_BUF0_CMPT_SHIFT)

◆ DAC_IRQ_STS_BUF0_CMPT_MASK

#define DAC_IRQ_STS_BUF0_CMPT_MASK   (0x1U)

◆ DAC_IRQ_STS_BUF0_CMPT_SET

#define DAC_IRQ_STS_BUF0_CMPT_SET (   x)    (((uint32_t)(x) << DAC_IRQ_STS_BUF0_CMPT_SHIFT) & DAC_IRQ_STS_BUF0_CMPT_MASK)

◆ DAC_IRQ_STS_BUF0_CMPT_SHIFT

#define DAC_IRQ_STS_BUF0_CMPT_SHIFT   (0U)

◆ DAC_IRQ_STS_BUF1_CMPT_GET

#define DAC_IRQ_STS_BUF1_CMPT_GET (   x)    (((uint32_t)(x) & DAC_IRQ_STS_BUF1_CMPT_MASK) >> DAC_IRQ_STS_BUF1_CMPT_SHIFT)

◆ DAC_IRQ_STS_BUF1_CMPT_MASK

#define DAC_IRQ_STS_BUF1_CMPT_MASK   (0x2U)

◆ DAC_IRQ_STS_BUF1_CMPT_SET

#define DAC_IRQ_STS_BUF1_CMPT_SET (   x)    (((uint32_t)(x) << DAC_IRQ_STS_BUF1_CMPT_SHIFT) & DAC_IRQ_STS_BUF1_CMPT_MASK)

◆ DAC_IRQ_STS_BUF1_CMPT_SHIFT

#define DAC_IRQ_STS_BUF1_CMPT_SHIFT   (1U)

◆ DAC_IRQ_STS_FIFO_EMPTY_GET

#define DAC_IRQ_STS_FIFO_EMPTY_GET (   x)    (((uint32_t)(x) & DAC_IRQ_STS_FIFO_EMPTY_MASK) >> DAC_IRQ_STS_FIFO_EMPTY_SHIFT)

◆ DAC_IRQ_STS_FIFO_EMPTY_MASK

#define DAC_IRQ_STS_FIFO_EMPTY_MASK   (0x4U)

◆ DAC_IRQ_STS_FIFO_EMPTY_SET

#define DAC_IRQ_STS_FIFO_EMPTY_SET (   x)    (((uint32_t)(x) << DAC_IRQ_STS_FIFO_EMPTY_SHIFT) & DAC_IRQ_STS_FIFO_EMPTY_MASK)

◆ DAC_IRQ_STS_FIFO_EMPTY_SHIFT

#define DAC_IRQ_STS_FIFO_EMPTY_SHIFT   (2U)

◆ DAC_IRQ_STS_STEP_CMPT_GET

#define DAC_IRQ_STS_STEP_CMPT_GET (   x)    (((uint32_t)(x) & DAC_IRQ_STS_STEP_CMPT_MASK) >> DAC_IRQ_STS_STEP_CMPT_SHIFT)

◆ DAC_IRQ_STS_STEP_CMPT_MASK

#define DAC_IRQ_STS_STEP_CMPT_MASK   (0x10U)

◆ DAC_IRQ_STS_STEP_CMPT_SET

#define DAC_IRQ_STS_STEP_CMPT_SET (   x)    (((uint32_t)(x) << DAC_IRQ_STS_STEP_CMPT_SHIFT) & DAC_IRQ_STS_STEP_CMPT_MASK)

◆ DAC_IRQ_STS_STEP_CMPT_SHIFT

#define DAC_IRQ_STS_STEP_CMPT_SHIFT   (4U)

◆ DAC_STATUS0_CUR_BUF_INDEX_GET

#define DAC_STATUS0_CUR_BUF_INDEX_GET (   x)    (((uint32_t)(x) & DAC_STATUS0_CUR_BUF_INDEX_MASK) >> DAC_STATUS0_CUR_BUF_INDEX_SHIFT)

◆ DAC_STATUS0_CUR_BUF_INDEX_MASK

#define DAC_STATUS0_CUR_BUF_INDEX_MASK   (0x80U)

◆ DAC_STATUS0_CUR_BUF_INDEX_SET

#define DAC_STATUS0_CUR_BUF_INDEX_SET (   x)    (((uint32_t)(x) << DAC_STATUS0_CUR_BUF_INDEX_SHIFT) & DAC_STATUS0_CUR_BUF_INDEX_MASK)

◆ DAC_STATUS0_CUR_BUF_INDEX_SHIFT

#define DAC_STATUS0_CUR_BUF_INDEX_SHIFT   (7U)

◆ DAC_STATUS0_CUR_BUF_OFFSET_GET

#define DAC_STATUS0_CUR_BUF_OFFSET_GET (   x)    (((uint32_t)(x) & DAC_STATUS0_CUR_BUF_OFFSET_MASK) >> DAC_STATUS0_CUR_BUF_OFFSET_SHIFT)

◆ DAC_STATUS0_CUR_BUF_OFFSET_MASK

#define DAC_STATUS0_CUR_BUF_OFFSET_MASK   (0xFFFF00UL)

◆ DAC_STATUS0_CUR_BUF_OFFSET_SET

#define DAC_STATUS0_CUR_BUF_OFFSET_SET (   x)    (((uint32_t)(x) << DAC_STATUS0_CUR_BUF_OFFSET_SHIFT) & DAC_STATUS0_CUR_BUF_OFFSET_MASK)

◆ DAC_STATUS0_CUR_BUF_OFFSET_SHIFT

#define DAC_STATUS0_CUR_BUF_OFFSET_SHIFT   (8U)

◆ DAC_STEP_CFG_END_POINT_GET

#define DAC_STEP_CFG_END_POINT_GET (   x)    (((uint32_t)(x) & DAC_STEP_CFG_END_POINT_MASK) >> DAC_STEP_CFG_END_POINT_SHIFT)

◆ DAC_STEP_CFG_END_POINT_MASK

#define DAC_STEP_CFG_END_POINT_MASK   (0xFFF0000UL)

◆ DAC_STEP_CFG_END_POINT_SET

#define DAC_STEP_CFG_END_POINT_SET (   x)    (((uint32_t)(x) << DAC_STEP_CFG_END_POINT_SHIFT) & DAC_STEP_CFG_END_POINT_MASK)

◆ DAC_STEP_CFG_END_POINT_SHIFT

#define DAC_STEP_CFG_END_POINT_SHIFT   (16U)

◆ DAC_STEP_CFG_ROUND_MODE_GET

#define DAC_STEP_CFG_ROUND_MODE_GET (   x)    (((uint32_t)(x) & DAC_STEP_CFG_ROUND_MODE_MASK) >> DAC_STEP_CFG_ROUND_MODE_SHIFT)

◆ DAC_STEP_CFG_ROUND_MODE_MASK

#define DAC_STEP_CFG_ROUND_MODE_MASK   (0x20000000UL)

◆ DAC_STEP_CFG_ROUND_MODE_SET

#define DAC_STEP_CFG_ROUND_MODE_SET (   x)    (((uint32_t)(x) << DAC_STEP_CFG_ROUND_MODE_SHIFT) & DAC_STEP_CFG_ROUND_MODE_MASK)

◆ DAC_STEP_CFG_ROUND_MODE_SHIFT

#define DAC_STEP_CFG_ROUND_MODE_SHIFT   (29U)

◆ DAC_STEP_CFG_START_POINT_GET

#define DAC_STEP_CFG_START_POINT_GET (   x)    (((uint32_t)(x) & DAC_STEP_CFG_START_POINT_MASK) >> DAC_STEP_CFG_START_POINT_SHIFT)

◆ DAC_STEP_CFG_START_POINT_MASK

#define DAC_STEP_CFG_START_POINT_MASK   (0xFFFU)

◆ DAC_STEP_CFG_START_POINT_SET

#define DAC_STEP_CFG_START_POINT_SET (   x)    (((uint32_t)(x) << DAC_STEP_CFG_START_POINT_SHIFT) & DAC_STEP_CFG_START_POINT_MASK)

◆ DAC_STEP_CFG_START_POINT_SHIFT

#define DAC_STEP_CFG_START_POINT_SHIFT   (0U)

◆ DAC_STEP_CFG_STEP0

#define DAC_STEP_CFG_STEP0   (0UL)

◆ DAC_STEP_CFG_STEP1

#define DAC_STEP_CFG_STEP1   (1UL)

◆ DAC_STEP_CFG_STEP2

#define DAC_STEP_CFG_STEP2   (2UL)

◆ DAC_STEP_CFG_STEP3

#define DAC_STEP_CFG_STEP3   (3UL)

◆ DAC_STEP_CFG_STEP_NUM_GET

#define DAC_STEP_CFG_STEP_NUM_GET (   x)    (((uint32_t)(x) & DAC_STEP_CFG_STEP_NUM_MASK) >> DAC_STEP_CFG_STEP_NUM_SHIFT)

◆ DAC_STEP_CFG_STEP_NUM_MASK

#define DAC_STEP_CFG_STEP_NUM_MASK   (0xF000U)

◆ DAC_STEP_CFG_STEP_NUM_SET

#define DAC_STEP_CFG_STEP_NUM_SET (   x)    (((uint32_t)(x) << DAC_STEP_CFG_STEP_NUM_SHIFT) & DAC_STEP_CFG_STEP_NUM_MASK)

◆ DAC_STEP_CFG_STEP_NUM_SHIFT

#define DAC_STEP_CFG_STEP_NUM_SHIFT   (12U)

◆ DAC_STEP_CFG_UP_DOWN_GET

#define DAC_STEP_CFG_UP_DOWN_GET (   x)    (((uint32_t)(x) & DAC_STEP_CFG_UP_DOWN_MASK) >> DAC_STEP_CFG_UP_DOWN_SHIFT)

◆ DAC_STEP_CFG_UP_DOWN_MASK

#define DAC_STEP_CFG_UP_DOWN_MASK   (0x10000000UL)

◆ DAC_STEP_CFG_UP_DOWN_SET

#define DAC_STEP_CFG_UP_DOWN_SET (   x)    (((uint32_t)(x) << DAC_STEP_CFG_UP_DOWN_SHIFT) & DAC_STEP_CFG_UP_DOWN_MASK)

◆ DAC_STEP_CFG_UP_DOWN_SHIFT

#define DAC_STEP_CFG_UP_DOWN_SHIFT   (28U)