Go to the source code of this file.
Data Structures | |
| struct | I2C_Type |
| #define I2C_ADDR_ADDR_GET | ( | x | ) | (((uint32_t)(x) & I2C_ADDR_ADDR_MASK) >> I2C_ADDR_ADDR_SHIFT) |
| #define I2C_ADDR_ADDR_MASK (0x3FFU) |
| #define I2C_ADDR_ADDR_SET | ( | x | ) | (((uint32_t)(x) << I2C_ADDR_ADDR_SHIFT) & I2C_ADDR_ADDR_MASK) |
| #define I2C_ADDR_ADDR_SHIFT (0U) |
| #define I2C_CFG_FIFOSIZE_GET | ( | x | ) | (((uint32_t)(x) & I2C_CFG_FIFOSIZE_MASK) >> I2C_CFG_FIFOSIZE_SHIFT) |
| #define I2C_CFG_FIFOSIZE_MASK (0x3U) |
| #define I2C_CFG_FIFOSIZE_SHIFT (0U) |
| #define I2C_CMD_CMD_GET | ( | x | ) | (((uint32_t)(x) & I2C_CMD_CMD_MASK) >> I2C_CMD_CMD_SHIFT) |
| #define I2C_CMD_CMD_MASK (0x7U) |
| #define I2C_CMD_CMD_SET | ( | x | ) | (((uint32_t)(x) << I2C_CMD_CMD_SHIFT) & I2C_CMD_CMD_MASK) |
| #define I2C_CMD_CMD_SHIFT (0U) |
| #define I2C_CTRL_DATACNT_GET | ( | x | ) | (((uint32_t)(x) & I2C_CTRL_DATACNT_MASK) >> I2C_CTRL_DATACNT_SHIFT) |
| #define I2C_CTRL_DATACNT_MASK (0xFFU) |
| #define I2C_CTRL_DATACNT_SET | ( | x | ) | (((uint32_t)(x) << I2C_CTRL_DATACNT_SHIFT) & I2C_CTRL_DATACNT_MASK) |
| #define I2C_CTRL_DATACNT_SHIFT (0U) |
| #define I2C_CTRL_DIR_GET | ( | x | ) | (((uint32_t)(x) & I2C_CTRL_DIR_MASK) >> I2C_CTRL_DIR_SHIFT) |
| #define I2C_CTRL_DIR_MASK (0x100U) |
| #define I2C_CTRL_DIR_SET | ( | x | ) | (((uint32_t)(x) << I2C_CTRL_DIR_SHIFT) & I2C_CTRL_DIR_MASK) |
| #define I2C_CTRL_DIR_SHIFT (8U) |
| #define I2C_CTRL_PHASE_ADDR_GET | ( | x | ) | (((uint32_t)(x) & I2C_CTRL_PHASE_ADDR_MASK) >> I2C_CTRL_PHASE_ADDR_SHIFT) |
| #define I2C_CTRL_PHASE_ADDR_MASK (0x800U) |
| #define I2C_CTRL_PHASE_ADDR_SET | ( | x | ) | (((uint32_t)(x) << I2C_CTRL_PHASE_ADDR_SHIFT) & I2C_CTRL_PHASE_ADDR_MASK) |
| #define I2C_CTRL_PHASE_ADDR_SHIFT (11U) |
| #define I2C_CTRL_PHASE_DATA_GET | ( | x | ) | (((uint32_t)(x) & I2C_CTRL_PHASE_DATA_MASK) >> I2C_CTRL_PHASE_DATA_SHIFT) |
| #define I2C_CTRL_PHASE_DATA_MASK (0x400U) |
| #define I2C_CTRL_PHASE_DATA_SET | ( | x | ) | (((uint32_t)(x) << I2C_CTRL_PHASE_DATA_SHIFT) & I2C_CTRL_PHASE_DATA_MASK) |
| #define I2C_CTRL_PHASE_DATA_SHIFT (10U) |
| #define I2C_CTRL_PHASE_START_GET | ( | x | ) | (((uint32_t)(x) & I2C_CTRL_PHASE_START_MASK) >> I2C_CTRL_PHASE_START_SHIFT) |
| #define I2C_CTRL_PHASE_START_MASK (0x1000U) |
| #define I2C_CTRL_PHASE_START_SET | ( | x | ) | (((uint32_t)(x) << I2C_CTRL_PHASE_START_SHIFT) & I2C_CTRL_PHASE_START_MASK) |
| #define I2C_CTRL_PHASE_START_SHIFT (12U) |
| #define I2C_CTRL_PHASE_STOP_GET | ( | x | ) | (((uint32_t)(x) & I2C_CTRL_PHASE_STOP_MASK) >> I2C_CTRL_PHASE_STOP_SHIFT) |
| #define I2C_CTRL_PHASE_STOP_MASK (0x200U) |
| #define I2C_CTRL_PHASE_STOP_SET | ( | x | ) | (((uint32_t)(x) << I2C_CTRL_PHASE_STOP_SHIFT) & I2C_CTRL_PHASE_STOP_MASK) |
| #define I2C_CTRL_PHASE_STOP_SHIFT (9U) |
| #define I2C_DATA_DATA_GET | ( | x | ) | (((uint32_t)(x) & I2C_DATA_DATA_MASK) >> I2C_DATA_DATA_SHIFT) |
| #define I2C_DATA_DATA_MASK (0xFFU) |
| #define I2C_DATA_DATA_SET | ( | x | ) | (((uint32_t)(x) << I2C_DATA_DATA_SHIFT) & I2C_DATA_DATA_MASK) |
| #define I2C_DATA_DATA_SHIFT (0U) |
| #define I2C_INTEN_ADDRHIT_GET | ( | x | ) | (((uint32_t)(x) & I2C_INTEN_ADDRHIT_MASK) >> I2C_INTEN_ADDRHIT_SHIFT) |
| #define I2C_INTEN_ADDRHIT_MASK (0x8U) |
| #define I2C_INTEN_ADDRHIT_SET | ( | x | ) | (((uint32_t)(x) << I2C_INTEN_ADDRHIT_SHIFT) & I2C_INTEN_ADDRHIT_MASK) |
| #define I2C_INTEN_ADDRHIT_SHIFT (3U) |
| #define I2C_INTEN_ARBLOSE_GET | ( | x | ) | (((uint32_t)(x) & I2C_INTEN_ARBLOSE_MASK) >> I2C_INTEN_ARBLOSE_SHIFT) |
| #define I2C_INTEN_ARBLOSE_MASK (0x10U) |
| #define I2C_INTEN_ARBLOSE_SET | ( | x | ) | (((uint32_t)(x) << I2C_INTEN_ARBLOSE_SHIFT) & I2C_INTEN_ARBLOSE_MASK) |
| #define I2C_INTEN_ARBLOSE_SHIFT (4U) |
| #define I2C_INTEN_BYTERECV_GET | ( | x | ) | (((uint32_t)(x) & I2C_INTEN_BYTERECV_MASK) >> I2C_INTEN_BYTERECV_SHIFT) |
| #define I2C_INTEN_BYTERECV_MASK (0x100U) |
| #define I2C_INTEN_BYTERECV_SET | ( | x | ) | (((uint32_t)(x) << I2C_INTEN_BYTERECV_SHIFT) & I2C_INTEN_BYTERECV_MASK) |
| #define I2C_INTEN_BYTERECV_SHIFT (8U) |
| #define I2C_INTEN_BYTETRANS_GET | ( | x | ) | (((uint32_t)(x) & I2C_INTEN_BYTETRANS_MASK) >> I2C_INTEN_BYTETRANS_SHIFT) |
| #define I2C_INTEN_BYTETRANS_MASK (0x80U) |
| #define I2C_INTEN_BYTETRANS_SET | ( | x | ) | (((uint32_t)(x) << I2C_INTEN_BYTETRANS_SHIFT) & I2C_INTEN_BYTETRANS_MASK) |
| #define I2C_INTEN_BYTETRANS_SHIFT (7U) |
| #define I2C_INTEN_CMPL_GET | ( | x | ) | (((uint32_t)(x) & I2C_INTEN_CMPL_MASK) >> I2C_INTEN_CMPL_SHIFT) |
| #define I2C_INTEN_CMPL_MASK (0x200U) |
| #define I2C_INTEN_CMPL_SET | ( | x | ) | (((uint32_t)(x) << I2C_INTEN_CMPL_SHIFT) & I2C_INTEN_CMPL_MASK) |
| #define I2C_INTEN_CMPL_SHIFT (9U) |
| #define I2C_INTEN_FIFOEMPTY_GET | ( | x | ) | (((uint32_t)(x) & I2C_INTEN_FIFOEMPTY_MASK) >> I2C_INTEN_FIFOEMPTY_SHIFT) |
| #define I2C_INTEN_FIFOEMPTY_MASK (0x1U) |
| #define I2C_INTEN_FIFOEMPTY_SET | ( | x | ) | (((uint32_t)(x) << I2C_INTEN_FIFOEMPTY_SHIFT) & I2C_INTEN_FIFOEMPTY_MASK) |
| #define I2C_INTEN_FIFOEMPTY_SHIFT (0U) |
| #define I2C_INTEN_FIFOFULL_GET | ( | x | ) | (((uint32_t)(x) & I2C_INTEN_FIFOFULL_MASK) >> I2C_INTEN_FIFOFULL_SHIFT) |
| #define I2C_INTEN_FIFOFULL_MASK (0x2U) |
| #define I2C_INTEN_FIFOFULL_SET | ( | x | ) | (((uint32_t)(x) << I2C_INTEN_FIFOFULL_SHIFT) & I2C_INTEN_FIFOFULL_MASK) |
| #define I2C_INTEN_FIFOFULL_SHIFT (1U) |
| #define I2C_INTEN_FIFOHALF_GET | ( | x | ) | (((uint32_t)(x) & I2C_INTEN_FIFOHALF_MASK) >> I2C_INTEN_FIFOHALF_SHIFT) |
| #define I2C_INTEN_FIFOHALF_MASK (0x4U) |
| #define I2C_INTEN_FIFOHALF_SET | ( | x | ) | (((uint32_t)(x) << I2C_INTEN_FIFOHALF_SHIFT) & I2C_INTEN_FIFOHALF_MASK) |
| #define I2C_INTEN_FIFOHALF_SHIFT (2U) |
| #define I2C_INTEN_START_GET | ( | x | ) | (((uint32_t)(x) & I2C_INTEN_START_MASK) >> I2C_INTEN_START_SHIFT) |
| #define I2C_INTEN_START_MASK (0x40U) |
| #define I2C_INTEN_START_SET | ( | x | ) | (((uint32_t)(x) << I2C_INTEN_START_SHIFT) & I2C_INTEN_START_MASK) |
| #define I2C_INTEN_START_SHIFT (6U) |
| #define I2C_INTEN_STOP_GET | ( | x | ) | (((uint32_t)(x) & I2C_INTEN_STOP_MASK) >> I2C_INTEN_STOP_SHIFT) |
| #define I2C_INTEN_STOP_MASK (0x20U) |
| #define I2C_INTEN_STOP_SET | ( | x | ) | (((uint32_t)(x) << I2C_INTEN_STOP_SHIFT) & I2C_INTEN_STOP_MASK) |
| #define I2C_INTEN_STOP_SHIFT (5U) |
| #define I2C_SETUP_ADDRESSING_GET | ( | x | ) | (((uint32_t)(x) & I2C_SETUP_ADDRESSING_MASK) >> I2C_SETUP_ADDRESSING_SHIFT) |
| #define I2C_SETUP_ADDRESSING_MASK (0x2U) |
| #define I2C_SETUP_ADDRESSING_SET | ( | x | ) | (((uint32_t)(x) << I2C_SETUP_ADDRESSING_SHIFT) & I2C_SETUP_ADDRESSING_MASK) |
| #define I2C_SETUP_ADDRESSING_SHIFT (1U) |
| #define I2C_SETUP_DMAEN_GET | ( | x | ) | (((uint32_t)(x) & I2C_SETUP_DMAEN_MASK) >> I2C_SETUP_DMAEN_SHIFT) |
| #define I2C_SETUP_DMAEN_MASK (0x8U) |
| #define I2C_SETUP_DMAEN_SET | ( | x | ) | (((uint32_t)(x) << I2C_SETUP_DMAEN_SHIFT) & I2C_SETUP_DMAEN_MASK) |
| #define I2C_SETUP_DMAEN_SHIFT (3U) |
| #define I2C_SETUP_IICEN_GET | ( | x | ) | (((uint32_t)(x) & I2C_SETUP_IICEN_MASK) >> I2C_SETUP_IICEN_SHIFT) |
| #define I2C_SETUP_IICEN_MASK (0x1U) |
| #define I2C_SETUP_IICEN_SET | ( | x | ) | (((uint32_t)(x) << I2C_SETUP_IICEN_SHIFT) & I2C_SETUP_IICEN_MASK) |
| #define I2C_SETUP_IICEN_SHIFT (0U) |
| #define I2C_SETUP_MASTER_GET | ( | x | ) | (((uint32_t)(x) & I2C_SETUP_MASTER_MASK) >> I2C_SETUP_MASTER_SHIFT) |
| #define I2C_SETUP_MASTER_MASK (0x4U) |
| #define I2C_SETUP_MASTER_SET | ( | x | ) | (((uint32_t)(x) << I2C_SETUP_MASTER_SHIFT) & I2C_SETUP_MASTER_MASK) |
| #define I2C_SETUP_MASTER_SHIFT (2U) |
| #define I2C_SETUP_T_HDDAT_GET | ( | x | ) | (((uint32_t)(x) & I2C_SETUP_T_HDDAT_MASK) >> I2C_SETUP_T_HDDAT_SHIFT) |
| #define I2C_SETUP_T_HDDAT_MASK (0x1F0000UL) |
| #define I2C_SETUP_T_HDDAT_SET | ( | x | ) | (((uint32_t)(x) << I2C_SETUP_T_HDDAT_SHIFT) & I2C_SETUP_T_HDDAT_MASK) |
| #define I2C_SETUP_T_HDDAT_SHIFT (16U) |
| #define I2C_SETUP_T_SCLHI_GET | ( | x | ) | (((uint32_t)(x) & I2C_SETUP_T_SCLHI_MASK) >> I2C_SETUP_T_SCLHI_SHIFT) |
| #define I2C_SETUP_T_SCLHI_MASK (0x1FF0U) |
| #define I2C_SETUP_T_SCLHI_SET | ( | x | ) | (((uint32_t)(x) << I2C_SETUP_T_SCLHI_SHIFT) & I2C_SETUP_T_SCLHI_MASK) |
| #define I2C_SETUP_T_SCLHI_SHIFT (4U) |
| #define I2C_SETUP_T_SCLRADIO_GET | ( | x | ) | (((uint32_t)(x) & I2C_SETUP_T_SCLRADIO_MASK) >> I2C_SETUP_T_SCLRADIO_SHIFT) |
| #define I2C_SETUP_T_SCLRADIO_MASK (0x2000U) |
| #define I2C_SETUP_T_SCLRADIO_SET | ( | x | ) | (((uint32_t)(x) << I2C_SETUP_T_SCLRADIO_SHIFT) & I2C_SETUP_T_SCLRADIO_MASK) |
| #define I2C_SETUP_T_SCLRADIO_SHIFT (13U) |
| #define I2C_SETUP_T_SP_GET | ( | x | ) | (((uint32_t)(x) & I2C_SETUP_T_SP_MASK) >> I2C_SETUP_T_SP_SHIFT) |
| #define I2C_SETUP_T_SP_MASK (0xE00000UL) |
| #define I2C_SETUP_T_SP_SET | ( | x | ) | (((uint32_t)(x) << I2C_SETUP_T_SP_SHIFT) & I2C_SETUP_T_SP_MASK) |
| #define I2C_SETUP_T_SP_SHIFT (21U) |
| #define I2C_SETUP_T_SUDAT_GET | ( | x | ) | (((uint32_t)(x) & I2C_SETUP_T_SUDAT_MASK) >> I2C_SETUP_T_SUDAT_SHIFT) |
| #define I2C_SETUP_T_SUDAT_MASK (0x1F000000UL) |
| #define I2C_SETUP_T_SUDAT_SET | ( | x | ) | (((uint32_t)(x) << I2C_SETUP_T_SUDAT_SHIFT) & I2C_SETUP_T_SUDAT_MASK) |
| #define I2C_SETUP_T_SUDAT_SHIFT (24U) |
| #define I2C_STATUS_ACK_GET | ( | x | ) | (((uint32_t)(x) & I2C_STATUS_ACK_MASK) >> I2C_STATUS_ACK_SHIFT) |
| #define I2C_STATUS_ACK_MASK (0x400U) |
| #define I2C_STATUS_ACK_SHIFT (10U) |
| #define I2C_STATUS_ADDRHIT_GET | ( | x | ) | (((uint32_t)(x) & I2C_STATUS_ADDRHIT_MASK) >> I2C_STATUS_ADDRHIT_SHIFT) |
| #define I2C_STATUS_ADDRHIT_MASK (0x8U) |
| #define I2C_STATUS_ADDRHIT_SET | ( | x | ) | (((uint32_t)(x) << I2C_STATUS_ADDRHIT_SHIFT) & I2C_STATUS_ADDRHIT_MASK) |
| #define I2C_STATUS_ADDRHIT_SHIFT (3U) |
| #define I2C_STATUS_ARBLOSE_GET | ( | x | ) | (((uint32_t)(x) & I2C_STATUS_ARBLOSE_MASK) >> I2C_STATUS_ARBLOSE_SHIFT) |
| #define I2C_STATUS_ARBLOSE_MASK (0x10U) |
| #define I2C_STATUS_ARBLOSE_SET | ( | x | ) | (((uint32_t)(x) << I2C_STATUS_ARBLOSE_SHIFT) & I2C_STATUS_ARBLOSE_MASK) |
| #define I2C_STATUS_ARBLOSE_SHIFT (4U) |
| #define I2C_STATUS_BUSBUSY_GET | ( | x | ) | (((uint32_t)(x) & I2C_STATUS_BUSBUSY_MASK) >> I2C_STATUS_BUSBUSY_SHIFT) |
| #define I2C_STATUS_BUSBUSY_MASK (0x800U) |
| #define I2C_STATUS_BUSBUSY_SHIFT (11U) |
| #define I2C_STATUS_BYTERECV_GET | ( | x | ) | (((uint32_t)(x) & I2C_STATUS_BYTERECV_MASK) >> I2C_STATUS_BYTERECV_SHIFT) |
| #define I2C_STATUS_BYTERECV_MASK (0x100U) |
| #define I2C_STATUS_BYTERECV_SET | ( | x | ) | (((uint32_t)(x) << I2C_STATUS_BYTERECV_SHIFT) & I2C_STATUS_BYTERECV_MASK) |
| #define I2C_STATUS_BYTERECV_SHIFT (8U) |
| #define I2C_STATUS_BYTETRANS_GET | ( | x | ) | (((uint32_t)(x) & I2C_STATUS_BYTETRANS_MASK) >> I2C_STATUS_BYTETRANS_SHIFT) |
| #define I2C_STATUS_BYTETRANS_MASK (0x80U) |
| #define I2C_STATUS_BYTETRANS_SET | ( | x | ) | (((uint32_t)(x) << I2C_STATUS_BYTETRANS_SHIFT) & I2C_STATUS_BYTETRANS_MASK) |
| #define I2C_STATUS_BYTETRANS_SHIFT (7U) |
| #define I2C_STATUS_CMPL_GET | ( | x | ) | (((uint32_t)(x) & I2C_STATUS_CMPL_MASK) >> I2C_STATUS_CMPL_SHIFT) |
| #define I2C_STATUS_CMPL_MASK (0x200U) |
| #define I2C_STATUS_CMPL_SET | ( | x | ) | (((uint32_t)(x) << I2C_STATUS_CMPL_SHIFT) & I2C_STATUS_CMPL_MASK) |
| #define I2C_STATUS_CMPL_SHIFT (9U) |
| #define I2C_STATUS_FIFOEMPTY_GET | ( | x | ) | (((uint32_t)(x) & I2C_STATUS_FIFOEMPTY_MASK) >> I2C_STATUS_FIFOEMPTY_SHIFT) |
| #define I2C_STATUS_FIFOEMPTY_MASK (0x1U) |
| #define I2C_STATUS_FIFOEMPTY_SHIFT (0U) |
| #define I2C_STATUS_FIFOFULL_GET | ( | x | ) | (((uint32_t)(x) & I2C_STATUS_FIFOFULL_MASK) >> I2C_STATUS_FIFOFULL_SHIFT) |
| #define I2C_STATUS_FIFOFULL_MASK (0x2U) |
| #define I2C_STATUS_FIFOFULL_SHIFT (1U) |
| #define I2C_STATUS_FIFOHALF_GET | ( | x | ) | (((uint32_t)(x) & I2C_STATUS_FIFOHALF_MASK) >> I2C_STATUS_FIFOHALF_SHIFT) |
| #define I2C_STATUS_FIFOHALF_MASK (0x4U) |
| #define I2C_STATUS_FIFOHALF_SHIFT (2U) |
| #define I2C_STATUS_GENCALL_GET | ( | x | ) | (((uint32_t)(x) & I2C_STATUS_GENCALL_MASK) >> I2C_STATUS_GENCALL_SHIFT) |
| #define I2C_STATUS_GENCALL_MASK (0x1000U) |
| #define I2C_STATUS_GENCALL_SHIFT (12U) |
| #define I2C_STATUS_LINESCL_GET | ( | x | ) | (((uint32_t)(x) & I2C_STATUS_LINESCL_MASK) >> I2C_STATUS_LINESCL_SHIFT) |
| #define I2C_STATUS_LINESCL_MASK (0x2000U) |
| #define I2C_STATUS_LINESCL_SHIFT (13U) |
| #define I2C_STATUS_LINESDA_GET | ( | x | ) | (((uint32_t)(x) & I2C_STATUS_LINESDA_MASK) >> I2C_STATUS_LINESDA_SHIFT) |
| #define I2C_STATUS_LINESDA_MASK (0x4000U) |
| #define I2C_STATUS_LINESDA_SHIFT (14U) |
| #define I2C_STATUS_START_GET | ( | x | ) | (((uint32_t)(x) & I2C_STATUS_START_MASK) >> I2C_STATUS_START_SHIFT) |
| #define I2C_STATUS_START_MASK (0x40U) |
| #define I2C_STATUS_START_SET | ( | x | ) | (((uint32_t)(x) << I2C_STATUS_START_SHIFT) & I2C_STATUS_START_MASK) |
| #define I2C_STATUS_START_SHIFT (6U) |
| #define I2C_STATUS_STOP_GET | ( | x | ) | (((uint32_t)(x) & I2C_STATUS_STOP_MASK) >> I2C_STATUS_STOP_SHIFT) |
| #define I2C_STATUS_STOP_MASK (0x20U) |
| #define I2C_STATUS_STOP_SET | ( | x | ) | (((uint32_t)(x) << I2C_STATUS_STOP_SHIFT) & I2C_STATUS_STOP_MASK) |
| #define I2C_STATUS_STOP_SHIFT (5U) |
| #define I2C_TPM_TPM_GET | ( | x | ) | (((uint32_t)(x) & I2C_TPM_TPM_MASK) >> I2C_TPM_TPM_SHIFT) |
| #define I2C_TPM_TPM_MASK (0x1FU) |
| #define I2C_TPM_TPM_SET | ( | x | ) | (((uint32_t)(x) << I2C_TPM_TPM_SHIFT) & I2C_TPM_TPM_MASK) |
| #define I2C_TPM_TPM_SHIFT (0U) |