hpm_pdm_regs.h File Reference

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Data Structures
struct	PDM_Type

Macros
#define	PDM_CTRL_SFTRST_MASK   (0x80000000UL)
#define	PDM_CTRL_SFTRST_SHIFT   (31U)
#define	PDM_CTRL_SFTRST_SET(x)   (((uint32_t)(x) << PDM_CTRL_SFTRST_SHIFT) & PDM_CTRL_SFTRST_MASK)
#define	PDM_CTRL_SFTRST_GET(x)   (((uint32_t)(x) & PDM_CTRL_SFTRST_MASK) >> PDM_CTRL_SFTRST_SHIFT)
#define	PDM_CTRL_SOF_FEDGE_MASK   (0x800000UL)
#define	PDM_CTRL_SOF_FEDGE_SHIFT   (23U)
#define	PDM_CTRL_SOF_FEDGE_SET(x)   (((uint32_t)(x) << PDM_CTRL_SOF_FEDGE_SHIFT) & PDM_CTRL_SOF_FEDGE_MASK)
#define	PDM_CTRL_SOF_FEDGE_GET(x)   (((uint32_t)(x) & PDM_CTRL_SOF_FEDGE_MASK) >> PDM_CTRL_SOF_FEDGE_SHIFT)
#define	PDM_CTRL_USE_COEF_RAM_MASK   (0x100000UL)
#define	PDM_CTRL_USE_COEF_RAM_SHIFT   (20U)
#define	PDM_CTRL_USE_COEF_RAM_SET(x)   (((uint32_t)(x) << PDM_CTRL_USE_COEF_RAM_SHIFT) & PDM_CTRL_USE_COEF_RAM_MASK)
#define	PDM_CTRL_USE_COEF_RAM_GET(x)   (((uint32_t)(x) & PDM_CTRL_USE_COEF_RAM_MASK) >> PDM_CTRL_USE_COEF_RAM_SHIFT)
#define	PDM_CTRL_FILT_CRX_ERR_IE_MASK   (0x80000UL)
#define	PDM_CTRL_FILT_CRX_ERR_IE_SHIFT   (19U)
#define	PDM_CTRL_FILT_CRX_ERR_IE_SET(x)   (((uint32_t)(x) << PDM_CTRL_FILT_CRX_ERR_IE_SHIFT) & PDM_CTRL_FILT_CRX_ERR_IE_MASK)
#define	PDM_CTRL_FILT_CRX_ERR_IE_GET(x)   (((uint32_t)(x) & PDM_CTRL_FILT_CRX_ERR_IE_MASK) >> PDM_CTRL_FILT_CRX_ERR_IE_SHIFT)
#define	PDM_CTRL_OFIFO_OVFL_ERR_IE_MASK   (0x40000UL)
#define	PDM_CTRL_OFIFO_OVFL_ERR_IE_SHIFT   (18U)
#define	PDM_CTRL_OFIFO_OVFL_ERR_IE_SET(x)   (((uint32_t)(x) << PDM_CTRL_OFIFO_OVFL_ERR_IE_SHIFT) & PDM_CTRL_OFIFO_OVFL_ERR_IE_MASK)
#define	PDM_CTRL_OFIFO_OVFL_ERR_IE_GET(x)   (((uint32_t)(x) & PDM_CTRL_OFIFO_OVFL_ERR_IE_MASK) >> PDM_CTRL_OFIFO_OVFL_ERR_IE_SHIFT)
#define	PDM_CTRL_CIC_OVLD_ERR_IE_MASK   (0x20000UL)
#define	PDM_CTRL_CIC_OVLD_ERR_IE_SHIFT   (17U)
#define	PDM_CTRL_CIC_OVLD_ERR_IE_SET(x)   (((uint32_t)(x) << PDM_CTRL_CIC_OVLD_ERR_IE_SHIFT) & PDM_CTRL_CIC_OVLD_ERR_IE_MASK)
#define	PDM_CTRL_CIC_OVLD_ERR_IE_GET(x)   (((uint32_t)(x) & PDM_CTRL_CIC_OVLD_ERR_IE_MASK) >> PDM_CTRL_CIC_OVLD_ERR_IE_SHIFT)
#define	PDM_CTRL_CIC_SAT_ERR_IE_MASK   (0x10000UL)
#define	PDM_CTRL_CIC_SAT_ERR_IE_SHIFT   (16U)
#define	PDM_CTRL_CIC_SAT_ERR_IE_SET(x)   (((uint32_t)(x) << PDM_CTRL_CIC_SAT_ERR_IE_SHIFT) & PDM_CTRL_CIC_SAT_ERR_IE_MASK)
#define	PDM_CTRL_CIC_SAT_ERR_IE_GET(x)   (((uint32_t)(x) & PDM_CTRL_CIC_SAT_ERR_IE_MASK) >> PDM_CTRL_CIC_SAT_ERR_IE_SHIFT)
#define	PDM_CTRL_DEC_AFT_CIC_MASK   (0xF000U)
#define	PDM_CTRL_DEC_AFT_CIC_SHIFT   (12U)
#define	PDM_CTRL_DEC_AFT_CIC_SET(x)   (((uint32_t)(x) << PDM_CTRL_DEC_AFT_CIC_SHIFT) & PDM_CTRL_DEC_AFT_CIC_MASK)
#define	PDM_CTRL_DEC_AFT_CIC_GET(x)   (((uint32_t)(x) & PDM_CTRL_DEC_AFT_CIC_MASK) >> PDM_CTRL_DEC_AFT_CIC_SHIFT)
#define	PDM_CTRL_CAPT_DLY_MASK   (0x780U)
#define	PDM_CTRL_CAPT_DLY_SHIFT   (7U)
#define	PDM_CTRL_CAPT_DLY_SET(x)   (((uint32_t)(x) << PDM_CTRL_CAPT_DLY_SHIFT) & PDM_CTRL_CAPT_DLY_MASK)
#define	PDM_CTRL_CAPT_DLY_GET(x)   (((uint32_t)(x) & PDM_CTRL_CAPT_DLY_MASK) >> PDM_CTRL_CAPT_DLY_SHIFT)
#define	PDM_CTRL_PDM_CLK_HFDIV_MASK   (0x78U)
#define	PDM_CTRL_PDM_CLK_HFDIV_SHIFT   (3U)
#define	PDM_CTRL_PDM_CLK_HFDIV_SET(x)   (((uint32_t)(x) << PDM_CTRL_PDM_CLK_HFDIV_SHIFT) & PDM_CTRL_PDM_CLK_HFDIV_MASK)
#define	PDM_CTRL_PDM_CLK_HFDIV_GET(x)   (((uint32_t)(x) & PDM_CTRL_PDM_CLK_HFDIV_MASK) >> PDM_CTRL_PDM_CLK_HFDIV_SHIFT)
#define	PDM_CTRL_PDM_CLK_DIV_BYPASS_MASK   (0x4U)
#define	PDM_CTRL_PDM_CLK_DIV_BYPASS_SHIFT   (2U)
#define	PDM_CTRL_PDM_CLK_DIV_BYPASS_SET(x)   (((uint32_t)(x) << PDM_CTRL_PDM_CLK_DIV_BYPASS_SHIFT) & PDM_CTRL_PDM_CLK_DIV_BYPASS_MASK)
#define	PDM_CTRL_PDM_CLK_DIV_BYPASS_GET(x)   (((uint32_t)(x) & PDM_CTRL_PDM_CLK_DIV_BYPASS_MASK) >> PDM_CTRL_PDM_CLK_DIV_BYPASS_SHIFT)
#define	PDM_CTRL_PDM_CLK_OE_MASK   (0x2U)
#define	PDM_CTRL_PDM_CLK_OE_SHIFT   (1U)
#define	PDM_CTRL_PDM_CLK_OE_SET(x)   (((uint32_t)(x) << PDM_CTRL_PDM_CLK_OE_SHIFT) & PDM_CTRL_PDM_CLK_OE_MASK)
#define	PDM_CTRL_PDM_CLK_OE_GET(x)   (((uint32_t)(x) & PDM_CTRL_PDM_CLK_OE_MASK) >> PDM_CTRL_PDM_CLK_OE_SHIFT)
#define	PDM_CTRL_HPF_EN_MASK   (0x1U)
#define	PDM_CTRL_HPF_EN_SHIFT   (0U)
#define	PDM_CTRL_HPF_EN_SET(x)   (((uint32_t)(x) << PDM_CTRL_HPF_EN_SHIFT) & PDM_CTRL_HPF_EN_MASK)
#define	PDM_CTRL_HPF_EN_GET(x)   (((uint32_t)(x) & PDM_CTRL_HPF_EN_MASK) >> PDM_CTRL_HPF_EN_SHIFT)
#define	PDM_CH_CTRL_CH_POL_MASK   (0xFF0000UL)
#define	PDM_CH_CTRL_CH_POL_SHIFT   (16U)
#define	PDM_CH_CTRL_CH_POL_SET(x)   (((uint32_t)(x) << PDM_CH_CTRL_CH_POL_SHIFT) & PDM_CH_CTRL_CH_POL_MASK)
#define	PDM_CH_CTRL_CH_POL_GET(x)   (((uint32_t)(x) & PDM_CH_CTRL_CH_POL_MASK) >> PDM_CH_CTRL_CH_POL_SHIFT)
#define	PDM_CH_CTRL_CH_EN_MASK   (0x3FFU)
#define	PDM_CH_CTRL_CH_EN_SHIFT   (0U)
#define	PDM_CH_CTRL_CH_EN_SET(x)   (((uint32_t)(x) << PDM_CH_CTRL_CH_EN_SHIFT) & PDM_CH_CTRL_CH_EN_MASK)
#define	PDM_CH_CTRL_CH_EN_GET(x)   (((uint32_t)(x) & PDM_CH_CTRL_CH_EN_MASK) >> PDM_CH_CTRL_CH_EN_SHIFT)
#define	PDM_ST_FILT_CRX_ERR_MASK   (0x8U)
#define	PDM_ST_FILT_CRX_ERR_SHIFT   (3U)
#define	PDM_ST_FILT_CRX_ERR_SET(x)   (((uint32_t)(x) << PDM_ST_FILT_CRX_ERR_SHIFT) & PDM_ST_FILT_CRX_ERR_MASK)
#define	PDM_ST_FILT_CRX_ERR_GET(x)   (((uint32_t)(x) & PDM_ST_FILT_CRX_ERR_MASK) >> PDM_ST_FILT_CRX_ERR_SHIFT)
#define	PDM_ST_OFIFO_OVFL_ERR_MASK   (0x4U)
#define	PDM_ST_OFIFO_OVFL_ERR_SHIFT   (2U)
#define	PDM_ST_OFIFO_OVFL_ERR_SET(x)   (((uint32_t)(x) << PDM_ST_OFIFO_OVFL_ERR_SHIFT) & PDM_ST_OFIFO_OVFL_ERR_MASK)
#define	PDM_ST_OFIFO_OVFL_ERR_GET(x)   (((uint32_t)(x) & PDM_ST_OFIFO_OVFL_ERR_MASK) >> PDM_ST_OFIFO_OVFL_ERR_SHIFT)
#define	PDM_ST_CIC_OVLD_ERR_MASK   (0x2U)
#define	PDM_ST_CIC_OVLD_ERR_SHIFT   (1U)
#define	PDM_ST_CIC_OVLD_ERR_SET(x)   (((uint32_t)(x) << PDM_ST_CIC_OVLD_ERR_SHIFT) & PDM_ST_CIC_OVLD_ERR_MASK)
#define	PDM_ST_CIC_OVLD_ERR_GET(x)   (((uint32_t)(x) & PDM_ST_CIC_OVLD_ERR_MASK) >> PDM_ST_CIC_OVLD_ERR_SHIFT)
#define	PDM_ST_CIC_SAT_ERR_MASK   (0x1U)
#define	PDM_ST_CIC_SAT_ERR_SHIFT   (0U)
#define	PDM_ST_CIC_SAT_ERR_SET(x)   (((uint32_t)(x) << PDM_ST_CIC_SAT_ERR_SHIFT) & PDM_ST_CIC_SAT_ERR_MASK)
#define	PDM_ST_CIC_SAT_ERR_GET(x)   (((uint32_t)(x) & PDM_ST_CIC_SAT_ERR_MASK) >> PDM_ST_CIC_SAT_ERR_SHIFT)
#define	PDM_CH_CFG_CH9_TYPE_MASK   (0xC0000UL)
#define	PDM_CH_CFG_CH9_TYPE_SHIFT   (18U)
#define	PDM_CH_CFG_CH9_TYPE_SET(x)   (((uint32_t)(x) << PDM_CH_CFG_CH9_TYPE_SHIFT) & PDM_CH_CFG_CH9_TYPE_MASK)
#define	PDM_CH_CFG_CH9_TYPE_GET(x)   (((uint32_t)(x) & PDM_CH_CFG_CH9_TYPE_MASK) >> PDM_CH_CFG_CH9_TYPE_SHIFT)
#define	PDM_CH_CFG_CH8_TYPE_MASK   (0x30000UL)
#define	PDM_CH_CFG_CH8_TYPE_SHIFT   (16U)
#define	PDM_CH_CFG_CH8_TYPE_SET(x)   (((uint32_t)(x) << PDM_CH_CFG_CH8_TYPE_SHIFT) & PDM_CH_CFG_CH8_TYPE_MASK)
#define	PDM_CH_CFG_CH8_TYPE_GET(x)   (((uint32_t)(x) & PDM_CH_CFG_CH8_TYPE_MASK) >> PDM_CH_CFG_CH8_TYPE_SHIFT)
#define	PDM_CH_CFG_CH7_TYPE_MASK   (0xC000U)
#define	PDM_CH_CFG_CH7_TYPE_SHIFT   (14U)
#define	PDM_CH_CFG_CH7_TYPE_SET(x)   (((uint32_t)(x) << PDM_CH_CFG_CH7_TYPE_SHIFT) & PDM_CH_CFG_CH7_TYPE_MASK)
#define	PDM_CH_CFG_CH7_TYPE_GET(x)   (((uint32_t)(x) & PDM_CH_CFG_CH7_TYPE_MASK) >> PDM_CH_CFG_CH7_TYPE_SHIFT)
#define	PDM_CH_CFG_CH6_TYPE_MASK   (0x3000U)
#define	PDM_CH_CFG_CH6_TYPE_SHIFT   (12U)
#define	PDM_CH_CFG_CH6_TYPE_SET(x)   (((uint32_t)(x) << PDM_CH_CFG_CH6_TYPE_SHIFT) & PDM_CH_CFG_CH6_TYPE_MASK)
#define	PDM_CH_CFG_CH6_TYPE_GET(x)   (((uint32_t)(x) & PDM_CH_CFG_CH6_TYPE_MASK) >> PDM_CH_CFG_CH6_TYPE_SHIFT)
#define	PDM_CH_CFG_CH5_TYPE_MASK   (0xC00U)
#define	PDM_CH_CFG_CH5_TYPE_SHIFT   (10U)
#define	PDM_CH_CFG_CH5_TYPE_SET(x)   (((uint32_t)(x) << PDM_CH_CFG_CH5_TYPE_SHIFT) & PDM_CH_CFG_CH5_TYPE_MASK)
#define	PDM_CH_CFG_CH5_TYPE_GET(x)   (((uint32_t)(x) & PDM_CH_CFG_CH5_TYPE_MASK) >> PDM_CH_CFG_CH5_TYPE_SHIFT)
#define	PDM_CH_CFG_CH4_TYPE_MASK   (0x300U)
#define	PDM_CH_CFG_CH4_TYPE_SHIFT   (8U)
#define	PDM_CH_CFG_CH4_TYPE_SET(x)   (((uint32_t)(x) << PDM_CH_CFG_CH4_TYPE_SHIFT) & PDM_CH_CFG_CH4_TYPE_MASK)
#define	PDM_CH_CFG_CH4_TYPE_GET(x)   (((uint32_t)(x) & PDM_CH_CFG_CH4_TYPE_MASK) >> PDM_CH_CFG_CH4_TYPE_SHIFT)
#define	PDM_CH_CFG_CH3_TYPE_MASK   (0xC0U)
#define	PDM_CH_CFG_CH3_TYPE_SHIFT   (6U)
#define	PDM_CH_CFG_CH3_TYPE_SET(x)   (((uint32_t)(x) << PDM_CH_CFG_CH3_TYPE_SHIFT) & PDM_CH_CFG_CH3_TYPE_MASK)
#define	PDM_CH_CFG_CH3_TYPE_GET(x)   (((uint32_t)(x) & PDM_CH_CFG_CH3_TYPE_MASK) >> PDM_CH_CFG_CH3_TYPE_SHIFT)
#define	PDM_CH_CFG_CH2_TYPE_MASK   (0x30U)
#define	PDM_CH_CFG_CH2_TYPE_SHIFT   (4U)
#define	PDM_CH_CFG_CH2_TYPE_SET(x)   (((uint32_t)(x) << PDM_CH_CFG_CH2_TYPE_SHIFT) & PDM_CH_CFG_CH2_TYPE_MASK)
#define	PDM_CH_CFG_CH2_TYPE_GET(x)   (((uint32_t)(x) & PDM_CH_CFG_CH2_TYPE_MASK) >> PDM_CH_CFG_CH2_TYPE_SHIFT)
#define	PDM_CH_CFG_CH1_TYPE_MASK   (0xCU)
#define	PDM_CH_CFG_CH1_TYPE_SHIFT   (2U)
#define	PDM_CH_CFG_CH1_TYPE_SET(x)   (((uint32_t)(x) << PDM_CH_CFG_CH1_TYPE_SHIFT) & PDM_CH_CFG_CH1_TYPE_MASK)
#define	PDM_CH_CFG_CH1_TYPE_GET(x)   (((uint32_t)(x) & PDM_CH_CFG_CH1_TYPE_MASK) >> PDM_CH_CFG_CH1_TYPE_SHIFT)
#define	PDM_CH_CFG_CH0_TYPE_MASK   (0x3U)
#define	PDM_CH_CFG_CH0_TYPE_SHIFT   (0U)
#define	PDM_CH_CFG_CH0_TYPE_SET(x)   (((uint32_t)(x) << PDM_CH_CFG_CH0_TYPE_SHIFT) & PDM_CH_CFG_CH0_TYPE_MASK)
#define	PDM_CH_CFG_CH0_TYPE_GET(x)   (((uint32_t)(x) & PDM_CH_CFG_CH0_TYPE_MASK) >> PDM_CH_CFG_CH0_TYPE_SHIFT)
#define	PDM_CIC_CFG_POST_SCALE_MASK   (0xFC00U)
#define	PDM_CIC_CFG_POST_SCALE_SHIFT   (10U)
#define	PDM_CIC_CFG_POST_SCALE_SET(x)   (((uint32_t)(x) << PDM_CIC_CFG_POST_SCALE_SHIFT) & PDM_CIC_CFG_POST_SCALE_MASK)
#define	PDM_CIC_CFG_POST_SCALE_GET(x)   (((uint32_t)(x) & PDM_CIC_CFG_POST_SCALE_MASK) >> PDM_CIC_CFG_POST_SCALE_SHIFT)
#define	PDM_CIC_CFG_SGD_MASK   (0x300U)
#define	PDM_CIC_CFG_SGD_SHIFT   (8U)
#define	PDM_CIC_CFG_SGD_SET(x)   (((uint32_t)(x) << PDM_CIC_CFG_SGD_SHIFT) & PDM_CIC_CFG_SGD_MASK)
#define	PDM_CIC_CFG_SGD_GET(x)   (((uint32_t)(x) & PDM_CIC_CFG_SGD_MASK) >> PDM_CIC_CFG_SGD_SHIFT)
#define	PDM_CIC_CFG_CIC_DEC_RATIO_MASK   (0xFFU)
#define	PDM_CIC_CFG_CIC_DEC_RATIO_SHIFT   (0U)
#define	PDM_CIC_CFG_CIC_DEC_RATIO_SET(x)   (((uint32_t)(x) << PDM_CIC_CFG_CIC_DEC_RATIO_SHIFT) & PDM_CIC_CFG_CIC_DEC_RATIO_MASK)
#define	PDM_CIC_CFG_CIC_DEC_RATIO_GET(x)   (((uint32_t)(x) & PDM_CIC_CFG_CIC_DEC_RATIO_MASK) >> PDM_CIC_CFG_CIC_DEC_RATIO_SHIFT)
#define	PDM_CTRL_INBUF_MAX_PTR_MASK   (0x3FC00000UL)
#define	PDM_CTRL_INBUF_MAX_PTR_SHIFT   (22U)
#define	PDM_CTRL_INBUF_MAX_PTR_SET(x)   (((uint32_t)(x) << PDM_CTRL_INBUF_MAX_PTR_SHIFT) & PDM_CTRL_INBUF_MAX_PTR_MASK)
#define	PDM_CTRL_INBUF_MAX_PTR_GET(x)   (((uint32_t)(x) & PDM_CTRL_INBUF_MAX_PTR_MASK) >> PDM_CTRL_INBUF_MAX_PTR_SHIFT)
#define	PDM_CTRL_INBUF_PITCH_MASK   (0x3FF800UL)
#define	PDM_CTRL_INBUF_PITCH_SHIFT   (11U)
#define	PDM_CTRL_INBUF_PITCH_SET(x)   (((uint32_t)(x) << PDM_CTRL_INBUF_PITCH_SHIFT) & PDM_CTRL_INBUF_PITCH_MASK)
#define	PDM_CTRL_INBUF_PITCH_GET(x)   (((uint32_t)(x) & PDM_CTRL_INBUF_PITCH_MASK) >> PDM_CTRL_INBUF_PITCH_SHIFT)
#define	PDM_CTRL_INBUF_START_ADDR_MASK   (0x7FFU)
#define	PDM_CTRL_INBUF_START_ADDR_SHIFT   (0U)
#define	PDM_CTRL_INBUF_START_ADDR_SET(x)   (((uint32_t)(x) << PDM_CTRL_INBUF_START_ADDR_SHIFT) & PDM_CTRL_INBUF_START_ADDR_MASK)
#define	PDM_CTRL_INBUF_START_ADDR_GET(x)   (((uint32_t)(x) & PDM_CTRL_INBUF_START_ADDR_MASK) >> PDM_CTRL_INBUF_START_ADDR_SHIFT)
#define	PDM_CTRL_FILT0_COEF_LEN_M0_MASK   (0xFF00U)
#define	PDM_CTRL_FILT0_COEF_LEN_M0_SHIFT   (8U)
#define	PDM_CTRL_FILT0_COEF_LEN_M0_SET(x)   (((uint32_t)(x) << PDM_CTRL_FILT0_COEF_LEN_M0_SHIFT) & PDM_CTRL_FILT0_COEF_LEN_M0_MASK)
#define	PDM_CTRL_FILT0_COEF_LEN_M0_GET(x)   (((uint32_t)(x) & PDM_CTRL_FILT0_COEF_LEN_M0_MASK) >> PDM_CTRL_FILT0_COEF_LEN_M0_SHIFT)
#define	PDM_CTRL_FILT0_COEF_START_ADDR_MASK   (0xFFU)
#define	PDM_CTRL_FILT0_COEF_START_ADDR_SHIFT   (0U)
#define	PDM_CTRL_FILT0_COEF_START_ADDR_SET(x)   (((uint32_t)(x) << PDM_CTRL_FILT0_COEF_START_ADDR_SHIFT) & PDM_CTRL_FILT0_COEF_START_ADDR_MASK)
#define	PDM_CTRL_FILT0_COEF_START_ADDR_GET(x)   (((uint32_t)(x) & PDM_CTRL_FILT0_COEF_START_ADDR_MASK) >> PDM_CTRL_FILT0_COEF_START_ADDR_SHIFT)
#define	PDM_CTRL_FILT1_COEF_LEN_M1_MASK   (0xFF00U)
#define	PDM_CTRL_FILT1_COEF_LEN_M1_SHIFT   (8U)
#define	PDM_CTRL_FILT1_COEF_LEN_M1_SET(x)   (((uint32_t)(x) << PDM_CTRL_FILT1_COEF_LEN_M1_SHIFT) & PDM_CTRL_FILT1_COEF_LEN_M1_MASK)
#define	PDM_CTRL_FILT1_COEF_LEN_M1_GET(x)   (((uint32_t)(x) & PDM_CTRL_FILT1_COEF_LEN_M1_MASK) >> PDM_CTRL_FILT1_COEF_LEN_M1_SHIFT)
#define	PDM_CTRL_FILT1_COEF_START_ADDR_MASK   (0xFFU)
#define	PDM_CTRL_FILT1_COEF_START_ADDR_SHIFT   (0U)
#define	PDM_CTRL_FILT1_COEF_START_ADDR_SET(x)   (((uint32_t)(x) << PDM_CTRL_FILT1_COEF_START_ADDR_SHIFT) & PDM_CTRL_FILT1_COEF_START_ADDR_MASK)
#define	PDM_CTRL_FILT1_COEF_START_ADDR_GET(x)   (((uint32_t)(x) & PDM_CTRL_FILT1_COEF_START_ADDR_MASK) >> PDM_CTRL_FILT1_COEF_START_ADDR_SHIFT)
#define	PDM_RUN_PDM_EN_MASK   (0x1U)
#define	PDM_RUN_PDM_EN_SHIFT   (0U)
#define	PDM_RUN_PDM_EN_SET(x)   (((uint32_t)(x) << PDM_RUN_PDM_EN_SHIFT) & PDM_RUN_PDM_EN_MASK)
#define	PDM_RUN_PDM_EN_GET(x)   (((uint32_t)(x) & PDM_RUN_PDM_EN_MASK) >> PDM_RUN_PDM_EN_SHIFT)
#define	PDM_MEMADDR_ADDR_MASK   (0xFFFFFFFFUL)
#define	PDM_MEMADDR_ADDR_SHIFT   (0U)
#define	PDM_MEMADDR_ADDR_SET(x)   (((uint32_t)(x) << PDM_MEMADDR_ADDR_SHIFT) & PDM_MEMADDR_ADDR_MASK)
#define	PDM_MEMADDR_ADDR_GET(x)   (((uint32_t)(x) & PDM_MEMADDR_ADDR_MASK) >> PDM_MEMADDR_ADDR_SHIFT)
#define	PDM_MEMDATA_DATA_MASK   (0xFFFFFFFFUL)
#define	PDM_MEMDATA_DATA_SHIFT   (0U)
#define	PDM_MEMDATA_DATA_SET(x)   (((uint32_t)(x) << PDM_MEMDATA_DATA_SHIFT) & PDM_MEMDATA_DATA_MASK)
#define	PDM_MEMDATA_DATA_GET(x)   (((uint32_t)(x) & PDM_MEMDATA_DATA_MASK) >> PDM_MEMDATA_DATA_SHIFT)
#define	PDM_HPF_MA_COEF_MASK   (0xFFFFFFFFUL)
#define	PDM_HPF_MA_COEF_SHIFT   (0U)
#define	PDM_HPF_MA_COEF_SET(x)   (((uint32_t)(x) << PDM_HPF_MA_COEF_SHIFT) & PDM_HPF_MA_COEF_MASK)
#define	PDM_HPF_MA_COEF_GET(x)   (((uint32_t)(x) & PDM_HPF_MA_COEF_MASK) >> PDM_HPF_MA_COEF_SHIFT)
#define	PDM_HPF_B_COEF_MASK   (0xFFFFFFFFUL)
#define	PDM_HPF_B_COEF_SHIFT   (0U)
#define	PDM_HPF_B_COEF_SET(x)   (((uint32_t)(x) << PDM_HPF_B_COEF_SHIFT) & PDM_HPF_B_COEF_MASK)
#define	PDM_HPF_B_COEF_GET(x)   (((uint32_t)(x) & PDM_HPF_B_COEF_MASK) >> PDM_HPF_B_COEF_SHIFT)

Macro Definition Documentation

PDM_CH_CFG_CH0_TYPE_GET

#define PDM_CH_CFG_CH0_TYPE_GET

(

x

)

(((uint32_t)(x) & PDM_CH_CFG_CH0_TYPE_MASK) >> PDM_CH_CFG_CH0_TYPE_SHIFT)

PDM_CH_CFG_CH0_TYPE_MASK

#define PDM_CH_CFG_CH0_TYPE_MASK   (0x3U)

PDM_CH_CFG_CH0_TYPE_SET

#define PDM_CH_CFG_CH0_TYPE_SET

(

x

)

(((uint32_t)(x) << PDM_CH_CFG_CH0_TYPE_SHIFT) & PDM_CH_CFG_CH0_TYPE_MASK)

PDM_CH_CFG_CH0_TYPE_SHIFT

#define PDM_CH_CFG_CH0_TYPE_SHIFT   (0U)

PDM_CH_CFG_CH1_TYPE_GET

#define PDM_CH_CFG_CH1_TYPE_GET

(

x

)

(((uint32_t)(x) & PDM_CH_CFG_CH1_TYPE_MASK) >> PDM_CH_CFG_CH1_TYPE_SHIFT)

PDM_CH_CFG_CH1_TYPE_MASK

#define PDM_CH_CFG_CH1_TYPE_MASK   (0xCU)

PDM_CH_CFG_CH1_TYPE_SET

#define PDM_CH_CFG_CH1_TYPE_SET

(

x

)

(((uint32_t)(x) << PDM_CH_CFG_CH1_TYPE_SHIFT) & PDM_CH_CFG_CH1_TYPE_MASK)

PDM_CH_CFG_CH1_TYPE_SHIFT

#define PDM_CH_CFG_CH1_TYPE_SHIFT   (2U)

PDM_CH_CFG_CH2_TYPE_GET

#define PDM_CH_CFG_CH2_TYPE_GET

(

x

)

(((uint32_t)(x) & PDM_CH_CFG_CH2_TYPE_MASK) >> PDM_CH_CFG_CH2_TYPE_SHIFT)

PDM_CH_CFG_CH2_TYPE_MASK

#define PDM_CH_CFG_CH2_TYPE_MASK   (0x30U)

PDM_CH_CFG_CH2_TYPE_SET

#define PDM_CH_CFG_CH2_TYPE_SET

(

x

)

(((uint32_t)(x) << PDM_CH_CFG_CH2_TYPE_SHIFT) & PDM_CH_CFG_CH2_TYPE_MASK)

PDM_CH_CFG_CH2_TYPE_SHIFT

#define PDM_CH_CFG_CH2_TYPE_SHIFT   (4U)

PDM_CH_CFG_CH3_TYPE_GET

#define PDM_CH_CFG_CH3_TYPE_GET

(

x

)

(((uint32_t)(x) & PDM_CH_CFG_CH3_TYPE_MASK) >> PDM_CH_CFG_CH3_TYPE_SHIFT)

PDM_CH_CFG_CH3_TYPE_MASK

#define PDM_CH_CFG_CH3_TYPE_MASK   (0xC0U)

PDM_CH_CFG_CH3_TYPE_SET

#define PDM_CH_CFG_CH3_TYPE_SET

(

x

)

(((uint32_t)(x) << PDM_CH_CFG_CH3_TYPE_SHIFT) & PDM_CH_CFG_CH3_TYPE_MASK)

PDM_CH_CFG_CH3_TYPE_SHIFT

#define PDM_CH_CFG_CH3_TYPE_SHIFT   (6U)

PDM_CH_CFG_CH4_TYPE_GET

#define PDM_CH_CFG_CH4_TYPE_GET

(

x

)

(((uint32_t)(x) & PDM_CH_CFG_CH4_TYPE_MASK) >> PDM_CH_CFG_CH4_TYPE_SHIFT)

PDM_CH_CFG_CH4_TYPE_MASK

#define PDM_CH_CFG_CH4_TYPE_MASK   (0x300U)

PDM_CH_CFG_CH4_TYPE_SET

#define PDM_CH_CFG_CH4_TYPE_SET

(

x

)

(((uint32_t)(x) << PDM_CH_CFG_CH4_TYPE_SHIFT) & PDM_CH_CFG_CH4_TYPE_MASK)

PDM_CH_CFG_CH4_TYPE_SHIFT

#define PDM_CH_CFG_CH4_TYPE_SHIFT   (8U)

PDM_CH_CFG_CH5_TYPE_GET

#define PDM_CH_CFG_CH5_TYPE_GET

(

x

)

(((uint32_t)(x) & PDM_CH_CFG_CH5_TYPE_MASK) >> PDM_CH_CFG_CH5_TYPE_SHIFT)

PDM_CH_CFG_CH5_TYPE_MASK

#define PDM_CH_CFG_CH5_TYPE_MASK   (0xC00U)

PDM_CH_CFG_CH5_TYPE_SET

#define PDM_CH_CFG_CH5_TYPE_SET

(

x

)

(((uint32_t)(x) << PDM_CH_CFG_CH5_TYPE_SHIFT) & PDM_CH_CFG_CH5_TYPE_MASK)

PDM_CH_CFG_CH5_TYPE_SHIFT

#define PDM_CH_CFG_CH5_TYPE_SHIFT   (10U)

PDM_CH_CFG_CH6_TYPE_GET

#define PDM_CH_CFG_CH6_TYPE_GET

(

x

)

(((uint32_t)(x) & PDM_CH_CFG_CH6_TYPE_MASK) >> PDM_CH_CFG_CH6_TYPE_SHIFT)

PDM_CH_CFG_CH6_TYPE_MASK

#define PDM_CH_CFG_CH6_TYPE_MASK   (0x3000U)

PDM_CH_CFG_CH6_TYPE_SET

#define PDM_CH_CFG_CH6_TYPE_SET

(

x

)

(((uint32_t)(x) << PDM_CH_CFG_CH6_TYPE_SHIFT) & PDM_CH_CFG_CH6_TYPE_MASK)

PDM_CH_CFG_CH6_TYPE_SHIFT

#define PDM_CH_CFG_CH6_TYPE_SHIFT   (12U)

PDM_CH_CFG_CH7_TYPE_GET

#define PDM_CH_CFG_CH7_TYPE_GET

(

x

)

(((uint32_t)(x) & PDM_CH_CFG_CH7_TYPE_MASK) >> PDM_CH_CFG_CH7_TYPE_SHIFT)

PDM_CH_CFG_CH7_TYPE_MASK

#define PDM_CH_CFG_CH7_TYPE_MASK   (0xC000U)

PDM_CH_CFG_CH7_TYPE_SET

#define PDM_CH_CFG_CH7_TYPE_SET

(

x

)

(((uint32_t)(x) << PDM_CH_CFG_CH7_TYPE_SHIFT) & PDM_CH_CFG_CH7_TYPE_MASK)

PDM_CH_CFG_CH7_TYPE_SHIFT

#define PDM_CH_CFG_CH7_TYPE_SHIFT   (14U)

PDM_CH_CFG_CH8_TYPE_GET

#define PDM_CH_CFG_CH8_TYPE_GET

(

x

)

(((uint32_t)(x) & PDM_CH_CFG_CH8_TYPE_MASK) >> PDM_CH_CFG_CH8_TYPE_SHIFT)

PDM_CH_CFG_CH8_TYPE_MASK

#define PDM_CH_CFG_CH8_TYPE_MASK   (0x30000UL)

PDM_CH_CFG_CH8_TYPE_SET

#define PDM_CH_CFG_CH8_TYPE_SET

(

x

)

(((uint32_t)(x) << PDM_CH_CFG_CH8_TYPE_SHIFT) & PDM_CH_CFG_CH8_TYPE_MASK)

PDM_CH_CFG_CH8_TYPE_SHIFT

#define PDM_CH_CFG_CH8_TYPE_SHIFT   (16U)

PDM_CH_CFG_CH9_TYPE_GET

#define PDM_CH_CFG_CH9_TYPE_GET

(

x

)

(((uint32_t)(x) & PDM_CH_CFG_CH9_TYPE_MASK) >> PDM_CH_CFG_CH9_TYPE_SHIFT)

PDM_CH_CFG_CH9_TYPE_MASK

#define PDM_CH_CFG_CH9_TYPE_MASK   (0xC0000UL)

PDM_CH_CFG_CH9_TYPE_SET

#define PDM_CH_CFG_CH9_TYPE_SET

(

x

)

(((uint32_t)(x) << PDM_CH_CFG_CH9_TYPE_SHIFT) & PDM_CH_CFG_CH9_TYPE_MASK)

PDM_CH_CFG_CH9_TYPE_SHIFT

#define PDM_CH_CFG_CH9_TYPE_SHIFT   (18U)

PDM_CH_CTRL_CH_EN_GET

#define PDM_CH_CTRL_CH_EN_GET

(

x

)

(((uint32_t)(x) & PDM_CH_CTRL_CH_EN_MASK) >> PDM_CH_CTRL_CH_EN_SHIFT)

PDM_CH_CTRL_CH_EN_MASK

#define PDM_CH_CTRL_CH_EN_MASK   (0x3FFU)

PDM_CH_CTRL_CH_EN_SET

#define PDM_CH_CTRL_CH_EN_SET

(

x

)

(((uint32_t)(x) << PDM_CH_CTRL_CH_EN_SHIFT) & PDM_CH_CTRL_CH_EN_MASK)

PDM_CH_CTRL_CH_EN_SHIFT

#define PDM_CH_CTRL_CH_EN_SHIFT   (0U)

PDM_CH_CTRL_CH_POL_GET

#define PDM_CH_CTRL_CH_POL_GET

(

x

)

(((uint32_t)(x) & PDM_CH_CTRL_CH_POL_MASK) >> PDM_CH_CTRL_CH_POL_SHIFT)

PDM_CH_CTRL_CH_POL_MASK

#define PDM_CH_CTRL_CH_POL_MASK   (0xFF0000UL)

PDM_CH_CTRL_CH_POL_SET

#define PDM_CH_CTRL_CH_POL_SET

(

x

)

(((uint32_t)(x) << PDM_CH_CTRL_CH_POL_SHIFT) & PDM_CH_CTRL_CH_POL_MASK)

PDM_CH_CTRL_CH_POL_SHIFT

#define PDM_CH_CTRL_CH_POL_SHIFT   (16U)

PDM_CIC_CFG_CIC_DEC_RATIO_GET

#define PDM_CIC_CFG_CIC_DEC_RATIO_GET

(

x

)

(((uint32_t)(x) & PDM_CIC_CFG_CIC_DEC_RATIO_MASK) >> PDM_CIC_CFG_CIC_DEC_RATIO_SHIFT)

PDM_CIC_CFG_CIC_DEC_RATIO_MASK

#define PDM_CIC_CFG_CIC_DEC_RATIO_MASK   (0xFFU)

PDM_CIC_CFG_CIC_DEC_RATIO_SET

#define PDM_CIC_CFG_CIC_DEC_RATIO_SET

(

x

)

(((uint32_t)(x) << PDM_CIC_CFG_CIC_DEC_RATIO_SHIFT) & PDM_CIC_CFG_CIC_DEC_RATIO_MASK)

PDM_CIC_CFG_CIC_DEC_RATIO_SHIFT

#define PDM_CIC_CFG_CIC_DEC_RATIO_SHIFT   (0U)

PDM_CIC_CFG_POST_SCALE_GET

#define PDM_CIC_CFG_POST_SCALE_GET

(

x

)

(((uint32_t)(x) & PDM_CIC_CFG_POST_SCALE_MASK) >> PDM_CIC_CFG_POST_SCALE_SHIFT)

PDM_CIC_CFG_POST_SCALE_MASK

#define PDM_CIC_CFG_POST_SCALE_MASK   (0xFC00U)

PDM_CIC_CFG_POST_SCALE_SET

#define PDM_CIC_CFG_POST_SCALE_SET

(

x

)

(((uint32_t)(x) << PDM_CIC_CFG_POST_SCALE_SHIFT) & PDM_CIC_CFG_POST_SCALE_MASK)

PDM_CIC_CFG_POST_SCALE_SHIFT

#define PDM_CIC_CFG_POST_SCALE_SHIFT   (10U)

PDM_CIC_CFG_SGD_GET

#define PDM_CIC_CFG_SGD_GET

(

x

)

(((uint32_t)(x) & PDM_CIC_CFG_SGD_MASK) >> PDM_CIC_CFG_SGD_SHIFT)

PDM_CIC_CFG_SGD_MASK

#define PDM_CIC_CFG_SGD_MASK   (0x300U)

PDM_CIC_CFG_SGD_SET

#define PDM_CIC_CFG_SGD_SET

(

x

)

(((uint32_t)(x) << PDM_CIC_CFG_SGD_SHIFT) & PDM_CIC_CFG_SGD_MASK)

PDM_CIC_CFG_SGD_SHIFT

#define PDM_CIC_CFG_SGD_SHIFT   (8U)

PDM_CTRL_CAPT_DLY_GET

#define PDM_CTRL_CAPT_DLY_GET

(

x

)

(((uint32_t)(x) & PDM_CTRL_CAPT_DLY_MASK) >> PDM_CTRL_CAPT_DLY_SHIFT)

PDM_CTRL_CAPT_DLY_MASK

#define PDM_CTRL_CAPT_DLY_MASK   (0x780U)

PDM_CTRL_CAPT_DLY_SET

#define PDM_CTRL_CAPT_DLY_SET

(

x

)

(((uint32_t)(x) << PDM_CTRL_CAPT_DLY_SHIFT) & PDM_CTRL_CAPT_DLY_MASK)

PDM_CTRL_CAPT_DLY_SHIFT

#define PDM_CTRL_CAPT_DLY_SHIFT   (7U)

PDM_CTRL_CIC_OVLD_ERR_IE_GET

#define PDM_CTRL_CIC_OVLD_ERR_IE_GET

(

x

)

(((uint32_t)(x) & PDM_CTRL_CIC_OVLD_ERR_IE_MASK) >> PDM_CTRL_CIC_OVLD_ERR_IE_SHIFT)

PDM_CTRL_CIC_OVLD_ERR_IE_MASK

#define PDM_CTRL_CIC_OVLD_ERR_IE_MASK   (0x20000UL)

PDM_CTRL_CIC_OVLD_ERR_IE_SET

#define PDM_CTRL_CIC_OVLD_ERR_IE_SET

(

x

)

(((uint32_t)(x) << PDM_CTRL_CIC_OVLD_ERR_IE_SHIFT) & PDM_CTRL_CIC_OVLD_ERR_IE_MASK)

PDM_CTRL_CIC_OVLD_ERR_IE_SHIFT

#define PDM_CTRL_CIC_OVLD_ERR_IE_SHIFT   (17U)

PDM_CTRL_CIC_SAT_ERR_IE_GET

#define PDM_CTRL_CIC_SAT_ERR_IE_GET

(

x

)

(((uint32_t)(x) & PDM_CTRL_CIC_SAT_ERR_IE_MASK) >> PDM_CTRL_CIC_SAT_ERR_IE_SHIFT)

PDM_CTRL_CIC_SAT_ERR_IE_MASK

#define PDM_CTRL_CIC_SAT_ERR_IE_MASK   (0x10000UL)

PDM_CTRL_CIC_SAT_ERR_IE_SET

#define PDM_CTRL_CIC_SAT_ERR_IE_SET

(

x

)

(((uint32_t)(x) << PDM_CTRL_CIC_SAT_ERR_IE_SHIFT) & PDM_CTRL_CIC_SAT_ERR_IE_MASK)

PDM_CTRL_CIC_SAT_ERR_IE_SHIFT

#define PDM_CTRL_CIC_SAT_ERR_IE_SHIFT   (16U)

PDM_CTRL_DEC_AFT_CIC_GET

#define PDM_CTRL_DEC_AFT_CIC_GET

(

x

)

(((uint32_t)(x) & PDM_CTRL_DEC_AFT_CIC_MASK) >> PDM_CTRL_DEC_AFT_CIC_SHIFT)

PDM_CTRL_DEC_AFT_CIC_MASK

#define PDM_CTRL_DEC_AFT_CIC_MASK   (0xF000U)

PDM_CTRL_DEC_AFT_CIC_SET

#define PDM_CTRL_DEC_AFT_CIC_SET

(

x

)

(((uint32_t)(x) << PDM_CTRL_DEC_AFT_CIC_SHIFT) & PDM_CTRL_DEC_AFT_CIC_MASK)

PDM_CTRL_DEC_AFT_CIC_SHIFT

#define PDM_CTRL_DEC_AFT_CIC_SHIFT   (12U)

PDM_CTRL_FILT0_COEF_LEN_M0_GET

#define PDM_CTRL_FILT0_COEF_LEN_M0_GET

(

x

)

(((uint32_t)(x) & PDM_CTRL_FILT0_COEF_LEN_M0_MASK) >> PDM_CTRL_FILT0_COEF_LEN_M0_SHIFT)

PDM_CTRL_FILT0_COEF_LEN_M0_MASK

#define PDM_CTRL_FILT0_COEF_LEN_M0_MASK   (0xFF00U)

PDM_CTRL_FILT0_COEF_LEN_M0_SET

#define PDM_CTRL_FILT0_COEF_LEN_M0_SET

(

x

)

(((uint32_t)(x) << PDM_CTRL_FILT0_COEF_LEN_M0_SHIFT) & PDM_CTRL_FILT0_COEF_LEN_M0_MASK)

PDM_CTRL_FILT0_COEF_LEN_M0_SHIFT

#define PDM_CTRL_FILT0_COEF_LEN_M0_SHIFT   (8U)

PDM_CTRL_FILT0_COEF_START_ADDR_GET

#define PDM_CTRL_FILT0_COEF_START_ADDR_GET

(

x

)

(((uint32_t)(x) & PDM_CTRL_FILT0_COEF_START_ADDR_MASK) >> PDM_CTRL_FILT0_COEF_START_ADDR_SHIFT)

PDM_CTRL_FILT0_COEF_START_ADDR_MASK

#define PDM_CTRL_FILT0_COEF_START_ADDR_MASK   (0xFFU)

PDM_CTRL_FILT0_COEF_START_ADDR_SET

#define PDM_CTRL_FILT0_COEF_START_ADDR_SET

(

x

)

(((uint32_t)(x) << PDM_CTRL_FILT0_COEF_START_ADDR_SHIFT) & PDM_CTRL_FILT0_COEF_START_ADDR_MASK)

PDM_CTRL_FILT0_COEF_START_ADDR_SHIFT

#define PDM_CTRL_FILT0_COEF_START_ADDR_SHIFT   (0U)

PDM_CTRL_FILT1_COEF_LEN_M1_GET

#define PDM_CTRL_FILT1_COEF_LEN_M1_GET

(

x

)

(((uint32_t)(x) & PDM_CTRL_FILT1_COEF_LEN_M1_MASK) >> PDM_CTRL_FILT1_COEF_LEN_M1_SHIFT)

PDM_CTRL_FILT1_COEF_LEN_M1_MASK

#define PDM_CTRL_FILT1_COEF_LEN_M1_MASK   (0xFF00U)

PDM_CTRL_FILT1_COEF_LEN_M1_SET

#define PDM_CTRL_FILT1_COEF_LEN_M1_SET

(

x

)

(((uint32_t)(x) << PDM_CTRL_FILT1_COEF_LEN_M1_SHIFT) & PDM_CTRL_FILT1_COEF_LEN_M1_MASK)

PDM_CTRL_FILT1_COEF_LEN_M1_SHIFT

#define PDM_CTRL_FILT1_COEF_LEN_M1_SHIFT   (8U)

PDM_CTRL_FILT1_COEF_START_ADDR_GET

#define PDM_CTRL_FILT1_COEF_START_ADDR_GET

(

x

)

(((uint32_t)(x) & PDM_CTRL_FILT1_COEF_START_ADDR_MASK) >> PDM_CTRL_FILT1_COEF_START_ADDR_SHIFT)

PDM_CTRL_FILT1_COEF_START_ADDR_MASK

#define PDM_CTRL_FILT1_COEF_START_ADDR_MASK   (0xFFU)

PDM_CTRL_FILT1_COEF_START_ADDR_SET

#define PDM_CTRL_FILT1_COEF_START_ADDR_SET

(

x

)

(((uint32_t)(x) << PDM_CTRL_FILT1_COEF_START_ADDR_SHIFT) & PDM_CTRL_FILT1_COEF_START_ADDR_MASK)

PDM_CTRL_FILT1_COEF_START_ADDR_SHIFT

#define PDM_CTRL_FILT1_COEF_START_ADDR_SHIFT   (0U)

PDM_CTRL_FILT_CRX_ERR_IE_GET

#define PDM_CTRL_FILT_CRX_ERR_IE_GET

(

x

)

(((uint32_t)(x) & PDM_CTRL_FILT_CRX_ERR_IE_MASK) >> PDM_CTRL_FILT_CRX_ERR_IE_SHIFT)

PDM_CTRL_FILT_CRX_ERR_IE_MASK

#define PDM_CTRL_FILT_CRX_ERR_IE_MASK   (0x80000UL)

PDM_CTRL_FILT_CRX_ERR_IE_SET

#define PDM_CTRL_FILT_CRX_ERR_IE_SET

(

x

)

(((uint32_t)(x) << PDM_CTRL_FILT_CRX_ERR_IE_SHIFT) & PDM_CTRL_FILT_CRX_ERR_IE_MASK)

PDM_CTRL_FILT_CRX_ERR_IE_SHIFT

#define PDM_CTRL_FILT_CRX_ERR_IE_SHIFT   (19U)

PDM_CTRL_HPF_EN_GET

#define PDM_CTRL_HPF_EN_GET

(

x

)

(((uint32_t)(x) & PDM_CTRL_HPF_EN_MASK) >> PDM_CTRL_HPF_EN_SHIFT)

PDM_CTRL_HPF_EN_MASK

#define PDM_CTRL_HPF_EN_MASK   (0x1U)

PDM_CTRL_HPF_EN_SET

#define PDM_CTRL_HPF_EN_SET

(

x

)

(((uint32_t)(x) << PDM_CTRL_HPF_EN_SHIFT) & PDM_CTRL_HPF_EN_MASK)

PDM_CTRL_HPF_EN_SHIFT

#define PDM_CTRL_HPF_EN_SHIFT   (0U)

PDM_CTRL_INBUF_MAX_PTR_GET

#define PDM_CTRL_INBUF_MAX_PTR_GET

(

x

)

(((uint32_t)(x) & PDM_CTRL_INBUF_MAX_PTR_MASK) >> PDM_CTRL_INBUF_MAX_PTR_SHIFT)

PDM_CTRL_INBUF_MAX_PTR_MASK

#define PDM_CTRL_INBUF_MAX_PTR_MASK   (0x3FC00000UL)

PDM_CTRL_INBUF_MAX_PTR_SET

#define PDM_CTRL_INBUF_MAX_PTR_SET

(

x

)

(((uint32_t)(x) << PDM_CTRL_INBUF_MAX_PTR_SHIFT) & PDM_CTRL_INBUF_MAX_PTR_MASK)

PDM_CTRL_INBUF_MAX_PTR_SHIFT

#define PDM_CTRL_INBUF_MAX_PTR_SHIFT   (22U)

PDM_CTRL_INBUF_PITCH_GET

#define PDM_CTRL_INBUF_PITCH_GET

(

x

)

(((uint32_t)(x) & PDM_CTRL_INBUF_PITCH_MASK) >> PDM_CTRL_INBUF_PITCH_SHIFT)

PDM_CTRL_INBUF_PITCH_MASK

#define PDM_CTRL_INBUF_PITCH_MASK   (0x3FF800UL)

PDM_CTRL_INBUF_PITCH_SET

#define PDM_CTRL_INBUF_PITCH_SET

(

x

)

(((uint32_t)(x) << PDM_CTRL_INBUF_PITCH_SHIFT) & PDM_CTRL_INBUF_PITCH_MASK)

PDM_CTRL_INBUF_PITCH_SHIFT

#define PDM_CTRL_INBUF_PITCH_SHIFT   (11U)

PDM_CTRL_INBUF_START_ADDR_GET

#define PDM_CTRL_INBUF_START_ADDR_GET

(

x

)

(((uint32_t)(x) & PDM_CTRL_INBUF_START_ADDR_MASK) >> PDM_CTRL_INBUF_START_ADDR_SHIFT)

PDM_CTRL_INBUF_START_ADDR_MASK

#define PDM_CTRL_INBUF_START_ADDR_MASK   (0x7FFU)

PDM_CTRL_INBUF_START_ADDR_SET

#define PDM_CTRL_INBUF_START_ADDR_SET

(

x

)

(((uint32_t)(x) << PDM_CTRL_INBUF_START_ADDR_SHIFT) & PDM_CTRL_INBUF_START_ADDR_MASK)

PDM_CTRL_INBUF_START_ADDR_SHIFT

#define PDM_CTRL_INBUF_START_ADDR_SHIFT   (0U)

PDM_CTRL_OFIFO_OVFL_ERR_IE_GET

#define PDM_CTRL_OFIFO_OVFL_ERR_IE_GET

(

x

)

(((uint32_t)(x) & PDM_CTRL_OFIFO_OVFL_ERR_IE_MASK) >> PDM_CTRL_OFIFO_OVFL_ERR_IE_SHIFT)

PDM_CTRL_OFIFO_OVFL_ERR_IE_MASK

#define PDM_CTRL_OFIFO_OVFL_ERR_IE_MASK   (0x40000UL)

PDM_CTRL_OFIFO_OVFL_ERR_IE_SET

#define PDM_CTRL_OFIFO_OVFL_ERR_IE_SET

(

x

)

(((uint32_t)(x) << PDM_CTRL_OFIFO_OVFL_ERR_IE_SHIFT) & PDM_CTRL_OFIFO_OVFL_ERR_IE_MASK)

PDM_CTRL_OFIFO_OVFL_ERR_IE_SHIFT

#define PDM_CTRL_OFIFO_OVFL_ERR_IE_SHIFT   (18U)

PDM_CTRL_PDM_CLK_DIV_BYPASS_GET

#define PDM_CTRL_PDM_CLK_DIV_BYPASS_GET

(

x

)

(((uint32_t)(x) & PDM_CTRL_PDM_CLK_DIV_BYPASS_MASK) >> PDM_CTRL_PDM_CLK_DIV_BYPASS_SHIFT)

PDM_CTRL_PDM_CLK_DIV_BYPASS_MASK

#define PDM_CTRL_PDM_CLK_DIV_BYPASS_MASK   (0x4U)

PDM_CTRL_PDM_CLK_DIV_BYPASS_SET

#define PDM_CTRL_PDM_CLK_DIV_BYPASS_SET

(

x

)

(((uint32_t)(x) << PDM_CTRL_PDM_CLK_DIV_BYPASS_SHIFT) & PDM_CTRL_PDM_CLK_DIV_BYPASS_MASK)

PDM_CTRL_PDM_CLK_DIV_BYPASS_SHIFT

#define PDM_CTRL_PDM_CLK_DIV_BYPASS_SHIFT   (2U)

PDM_CTRL_PDM_CLK_HFDIV_GET

#define PDM_CTRL_PDM_CLK_HFDIV_GET

(

x

)

(((uint32_t)(x) & PDM_CTRL_PDM_CLK_HFDIV_MASK) >> PDM_CTRL_PDM_CLK_HFDIV_SHIFT)

PDM_CTRL_PDM_CLK_HFDIV_MASK

#define PDM_CTRL_PDM_CLK_HFDIV_MASK   (0x78U)

PDM_CTRL_PDM_CLK_HFDIV_SET

#define PDM_CTRL_PDM_CLK_HFDIV_SET

(

x

)

(((uint32_t)(x) << PDM_CTRL_PDM_CLK_HFDIV_SHIFT) & PDM_CTRL_PDM_CLK_HFDIV_MASK)

PDM_CTRL_PDM_CLK_HFDIV_SHIFT

#define PDM_CTRL_PDM_CLK_HFDIV_SHIFT   (3U)

PDM_CTRL_PDM_CLK_OE_GET

#define PDM_CTRL_PDM_CLK_OE_GET

(

x

)

(((uint32_t)(x) & PDM_CTRL_PDM_CLK_OE_MASK) >> PDM_CTRL_PDM_CLK_OE_SHIFT)

PDM_CTRL_PDM_CLK_OE_MASK

#define PDM_CTRL_PDM_CLK_OE_MASK   (0x2U)

PDM_CTRL_PDM_CLK_OE_SET

#define PDM_CTRL_PDM_CLK_OE_SET

(

x

)

(((uint32_t)(x) << PDM_CTRL_PDM_CLK_OE_SHIFT) & PDM_CTRL_PDM_CLK_OE_MASK)

PDM_CTRL_PDM_CLK_OE_SHIFT

#define PDM_CTRL_PDM_CLK_OE_SHIFT   (1U)

PDM_CTRL_SFTRST_GET

#define PDM_CTRL_SFTRST_GET

(

x

)

(((uint32_t)(x) & PDM_CTRL_SFTRST_MASK) >> PDM_CTRL_SFTRST_SHIFT)

PDM_CTRL_SFTRST_MASK

#define PDM_CTRL_SFTRST_MASK   (0x80000000UL)

PDM_CTRL_SFTRST_SET

#define PDM_CTRL_SFTRST_SET

(

x

)

(((uint32_t)(x) << PDM_CTRL_SFTRST_SHIFT) & PDM_CTRL_SFTRST_MASK)

PDM_CTRL_SFTRST_SHIFT

#define PDM_CTRL_SFTRST_SHIFT   (31U)

PDM_CTRL_SOF_FEDGE_GET

#define PDM_CTRL_SOF_FEDGE_GET

(

x

)

(((uint32_t)(x) & PDM_CTRL_SOF_FEDGE_MASK) >> PDM_CTRL_SOF_FEDGE_SHIFT)

PDM_CTRL_SOF_FEDGE_MASK

#define PDM_CTRL_SOF_FEDGE_MASK   (0x800000UL)

PDM_CTRL_SOF_FEDGE_SET

#define PDM_CTRL_SOF_FEDGE_SET

(

x

)

(((uint32_t)(x) << PDM_CTRL_SOF_FEDGE_SHIFT) & PDM_CTRL_SOF_FEDGE_MASK)

PDM_CTRL_SOF_FEDGE_SHIFT

#define PDM_CTRL_SOF_FEDGE_SHIFT   (23U)

PDM_CTRL_USE_COEF_RAM_GET

#define PDM_CTRL_USE_COEF_RAM_GET

(

x

)

(((uint32_t)(x) & PDM_CTRL_USE_COEF_RAM_MASK) >> PDM_CTRL_USE_COEF_RAM_SHIFT)

PDM_CTRL_USE_COEF_RAM_MASK

#define PDM_CTRL_USE_COEF_RAM_MASK   (0x100000UL)

PDM_CTRL_USE_COEF_RAM_SET

#define PDM_CTRL_USE_COEF_RAM_SET

(

x

)

(((uint32_t)(x) << PDM_CTRL_USE_COEF_RAM_SHIFT) & PDM_CTRL_USE_COEF_RAM_MASK)

PDM_CTRL_USE_COEF_RAM_SHIFT

#define PDM_CTRL_USE_COEF_RAM_SHIFT   (20U)

PDM_HPF_B_COEF_GET

#define PDM_HPF_B_COEF_GET

(

x

)

(((uint32_t)(x) & PDM_HPF_B_COEF_MASK) >> PDM_HPF_B_COEF_SHIFT)

PDM_HPF_B_COEF_MASK

#define PDM_HPF_B_COEF_MASK   (0xFFFFFFFFUL)

PDM_HPF_B_COEF_SET

#define PDM_HPF_B_COEF_SET

(

x

)

(((uint32_t)(x) << PDM_HPF_B_COEF_SHIFT) & PDM_HPF_B_COEF_MASK)

PDM_HPF_B_COEF_SHIFT

#define PDM_HPF_B_COEF_SHIFT   (0U)

PDM_HPF_MA_COEF_GET

#define PDM_HPF_MA_COEF_GET

(

x

)

(((uint32_t)(x) & PDM_HPF_MA_COEF_MASK) >> PDM_HPF_MA_COEF_SHIFT)

PDM_HPF_MA_COEF_MASK

#define PDM_HPF_MA_COEF_MASK   (0xFFFFFFFFUL)

PDM_HPF_MA_COEF_SET

#define PDM_HPF_MA_COEF_SET

(

x

)

(((uint32_t)(x) << PDM_HPF_MA_COEF_SHIFT) & PDM_HPF_MA_COEF_MASK)

PDM_HPF_MA_COEF_SHIFT

#define PDM_HPF_MA_COEF_SHIFT   (0U)

PDM_MEMADDR_ADDR_GET

#define PDM_MEMADDR_ADDR_GET

(

x

)

(((uint32_t)(x) & PDM_MEMADDR_ADDR_MASK) >> PDM_MEMADDR_ADDR_SHIFT)

PDM_MEMADDR_ADDR_MASK

#define PDM_MEMADDR_ADDR_MASK   (0xFFFFFFFFUL)

PDM_MEMADDR_ADDR_SET

#define PDM_MEMADDR_ADDR_SET

(

x

)

(((uint32_t)(x) << PDM_MEMADDR_ADDR_SHIFT) & PDM_MEMADDR_ADDR_MASK)

PDM_MEMADDR_ADDR_SHIFT

#define PDM_MEMADDR_ADDR_SHIFT   (0U)

PDM_MEMDATA_DATA_GET

#define PDM_MEMDATA_DATA_GET

(

x

)

(((uint32_t)(x) & PDM_MEMDATA_DATA_MASK) >> PDM_MEMDATA_DATA_SHIFT)

PDM_MEMDATA_DATA_MASK

#define PDM_MEMDATA_DATA_MASK   (0xFFFFFFFFUL)

PDM_MEMDATA_DATA_SET

#define PDM_MEMDATA_DATA_SET

(

x

)

(((uint32_t)(x) << PDM_MEMDATA_DATA_SHIFT) & PDM_MEMDATA_DATA_MASK)

PDM_MEMDATA_DATA_SHIFT

#define PDM_MEMDATA_DATA_SHIFT   (0U)

PDM_RUN_PDM_EN_GET

#define PDM_RUN_PDM_EN_GET

(

x

)

(((uint32_t)(x) & PDM_RUN_PDM_EN_MASK) >> PDM_RUN_PDM_EN_SHIFT)

PDM_RUN_PDM_EN_MASK

#define PDM_RUN_PDM_EN_MASK   (0x1U)

PDM_RUN_PDM_EN_SET

#define PDM_RUN_PDM_EN_SET

(

x

)

(((uint32_t)(x) << PDM_RUN_PDM_EN_SHIFT) & PDM_RUN_PDM_EN_MASK)

PDM_RUN_PDM_EN_SHIFT

#define PDM_RUN_PDM_EN_SHIFT   (0U)

PDM_ST_CIC_OVLD_ERR_GET

#define PDM_ST_CIC_OVLD_ERR_GET

(

x

)

(((uint32_t)(x) & PDM_ST_CIC_OVLD_ERR_MASK) >> PDM_ST_CIC_OVLD_ERR_SHIFT)

PDM_ST_CIC_OVLD_ERR_MASK

#define PDM_ST_CIC_OVLD_ERR_MASK   (0x2U)

PDM_ST_CIC_OVLD_ERR_SET

#define PDM_ST_CIC_OVLD_ERR_SET

(

x

)

(((uint32_t)(x) << PDM_ST_CIC_OVLD_ERR_SHIFT) & PDM_ST_CIC_OVLD_ERR_MASK)

PDM_ST_CIC_OVLD_ERR_SHIFT

#define PDM_ST_CIC_OVLD_ERR_SHIFT   (1U)

PDM_ST_CIC_SAT_ERR_GET

#define PDM_ST_CIC_SAT_ERR_GET

(

x

)

(((uint32_t)(x) & PDM_ST_CIC_SAT_ERR_MASK) >> PDM_ST_CIC_SAT_ERR_SHIFT)

PDM_ST_CIC_SAT_ERR_MASK

#define PDM_ST_CIC_SAT_ERR_MASK   (0x1U)

PDM_ST_CIC_SAT_ERR_SET

#define PDM_ST_CIC_SAT_ERR_SET

(

x

)

(((uint32_t)(x) << PDM_ST_CIC_SAT_ERR_SHIFT) & PDM_ST_CIC_SAT_ERR_MASK)

PDM_ST_CIC_SAT_ERR_SHIFT

#define PDM_ST_CIC_SAT_ERR_SHIFT   (0U)

PDM_ST_FILT_CRX_ERR_GET

#define PDM_ST_FILT_CRX_ERR_GET

(

x

)

(((uint32_t)(x) & PDM_ST_FILT_CRX_ERR_MASK) >> PDM_ST_FILT_CRX_ERR_SHIFT)

PDM_ST_FILT_CRX_ERR_MASK

#define PDM_ST_FILT_CRX_ERR_MASK   (0x8U)

PDM_ST_FILT_CRX_ERR_SET

#define PDM_ST_FILT_CRX_ERR_SET

(

x

)

(((uint32_t)(x) << PDM_ST_FILT_CRX_ERR_SHIFT) & PDM_ST_FILT_CRX_ERR_MASK)

PDM_ST_FILT_CRX_ERR_SHIFT

#define PDM_ST_FILT_CRX_ERR_SHIFT   (3U)

PDM_ST_OFIFO_OVFL_ERR_GET

#define PDM_ST_OFIFO_OVFL_ERR_GET

(

x

)

(((uint32_t)(x) & PDM_ST_OFIFO_OVFL_ERR_MASK) >> PDM_ST_OFIFO_OVFL_ERR_SHIFT)

PDM_ST_OFIFO_OVFL_ERR_MASK

#define PDM_ST_OFIFO_OVFL_ERR_MASK   (0x4U)

PDM_ST_OFIFO_OVFL_ERR_SET

#define PDM_ST_OFIFO_OVFL_ERR_SET

(

x

)

(((uint32_t)(x) << PDM_ST_OFIFO_OVFL_ERR_SHIFT) & PDM_ST_OFIFO_OVFL_ERR_MASK)

PDM_ST_OFIFO_OVFL_ERR_SHIFT

#define PDM_ST_OFIFO_OVFL_ERR_SHIFT   (2U)