hpm_romapi.h

Go to the documentation of this file.

/*
 * Copyright (c) 2021-2024 HPMicro
 *
 * SPDX-License-Identifier: BSD-3-Clause
 *
 */
 
#ifndef HPM_ROMAPI_H
#define HPM_ROMAPI_H
 
#include "hpm_common.h"
#include "hpm_otp_drv.h"
#include "hpm_romapi_xpi_def.h"
#include "hpm_romapi_xpi_soc_def.h"
#include "hpm_romapi_xpi_nor_def.h"
#include "hpm_romapi_xpi_ram_def.h"
#include "hpm_sdp_drv.h"
 
/* XPI0 base address */
#define HPM_XPI0_BASE (0xF3040000UL)                
/* XPI0 base pointer */
#define HPM_XPI0 ((XPI_Type *) HPM_XPI0_BASE)       
/* XPI1 base address */
#define HPM_XPI1_BASE (0xF3044000UL)                
/* XPI1 base pointer */
#define HPM_XPI1 ((XPI_Type *) HPM_XPI1_BASE)       
/***********************************************************************************************************************
 *
 *
 *      Definitions
 *
 *
 **********************************************************************************************************************/
typedef union {
    uint32_t U;
    struct {
        uint32_t index: 8;          
        uint32_t peripheral: 8;     
        uint32_t src: 8;            
        uint32_t tag: 8;            
    };
} api_boot_arg_t;
 
/*EXiP Region Parameter */
typedef struct {
    uint32_t start;             
    uint32_t len;               
    uint8_t key[16];            
    uint8_t ctr[8];             
} exip_region_param_t;
 
#define API_BOOT_TAG  (0xEBU)                           
#define API_BOOT_SRC_OTP (0U)                           
#define API_BOOT_SRC_PRIMARY (1U)                       
#define API_BOOT_SRC_SERIAL_BOOT (2U)                   
#define API_BOOT_SRC_ISP (3U)                           
#define API_BOOT_PERIPH_AUTO (0U)                       
#define API_BOOT_PERIPH_UART (1U)                       
#define API_BOOT_PERIPH_USBHID (2U)                     
typedef struct {
    uint32_t _internal[138];
} sm3_context_t;
 
#define SM4_ENCRYPT     1
#define SM4_DECRYPT     0
 
typedef struct {
    uint32_t mode;
    uint32_t _internal[116];
} sm4_context_t;
 
typedef struct {
    uint32_t version;
    void (*init)(void);
    void (*deinit)(void);
    uint32_t (*read_from_shadow)(uint32_t addr);
    uint32_t (*read_from_ip)(uint32_t addr);
    hpm_stat_t (*program)(uint32_t addr, const uint32_t *src, uint32_t num_of_words);
    hpm_stat_t (*reload)(otp_region_t region);
    hpm_stat_t (*lock)(uint32_t addr, otp_lock_option_t lock_option);
    hpm_stat_t (*lock_shadow)(uint32_t addr, otp_lock_option_t lock_option);
    hpm_stat_t (*set_configurable_region)(uint32_t start, uint32_t num_of_words);
    hpm_stat_t (*write_shadow_register)(uint32_t addr, uint32_t data);
} otp_driver_interface_t;
 
typedef struct {
    uint32_t version;
    hpm_stat_t (*get_default_config)(xpi_config_t *xpi_config);
    hpm_stat_t (*get_default_device_config)(xpi_device_config_t *dev_config);
    hpm_stat_t (*init)(XPI_Type *base, xpi_config_t *xpi_config);
    hpm_stat_t (*config_ahb_buffer)(XPI_Type *base, xpi_ahb_buffer_cfg_t *ahb_buf_cfg);
    hpm_stat_t (*config_device)(XPI_Type *base, xpi_device_config_t *dev_cfg, xpi_channel_t channel);
    hpm_stat_t (*update_instr_table)(XPI_Type *base, const uint32_t *inst_base, uint32_t seq_idx, uint32_t num);
    hpm_stat_t (*transfer_blocking)(XPI_Type *base, xpi_xfer_ctx_t *xfer);
    void (*software_reset)(XPI_Type *base);
    bool (*is_idle)(XPI_Type *base);
    void (*update_dllcr)(XPI_Type *base, uint32_t serial_root_clk_freq, uint32_t data_valid_time, xpi_channel_t channel,
                         uint32_t dly_target);
    hpm_stat_t (*get_abs_apb_xfer_addr)(XPI_Type *base, xpi_xfer_channel_t channel, uint32_t in_addr,
                                        uint32_t *out_addr);
} xpi_driver_interface_t;
 
typedef struct {
    uint32_t version;
    hpm_stat_t (*get_config)(XPI_Type *base, xpi_nor_config_t *nor_cfg, xpi_nor_config_option_t *cfg_option);
    hpm_stat_t (*init)(XPI_Type *base, xpi_nor_config_t *nor_config);
    hpm_stat_t (*enable_write)(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config,
                               uint32_t addr);
    hpm_stat_t (*get_status)(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config,
                             uint32_t addr,
                             uint16_t *out_status);
    hpm_stat_t (*wait_busy)(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config,
                            uint32_t addr);
    hpm_stat_t (*erase)(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t start,
                        uint32_t length);
    hpm_stat_t (*erase_chip)(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config);
    hpm_stat_t (*erase_sector)(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config,
                               uint32_t addr);
    hpm_stat_t (*erase_block)(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config,
                              uint32_t addr);
    hpm_stat_t (*program)(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config,
                          const uint32_t *src,
                          uint32_t dst_addr, uint32_t length);
    hpm_stat_t (*read)(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t *dst,
                       uint32_t start, uint32_t length);
    hpm_stat_t (*page_program_nonblocking)(XPI_Type *base, xpi_xfer_channel_t channel,
                                           const xpi_nor_config_t *nor_config,
                                           const uint32_t *src, uint32_t dst_addr, uint32_t length);
    hpm_stat_t (*erase_sector_nonblocking)(XPI_Type *base, xpi_xfer_channel_t channel,
                                           const xpi_nor_config_t *nor_config,
                                           uint32_t addr);
    hpm_stat_t (*erase_block_nonblocking)(XPI_Type *base, xpi_xfer_channel_t channel,
                                          const xpi_nor_config_t *nor_config,
                                          uint32_t addr);
    hpm_stat_t (*erase_chip_nonblocking)(XPI_Type *base, xpi_xfer_channel_t channel,
                                         const xpi_nor_config_t *nor_config);
 
    uint32_t reserved0[3];
 
    hpm_stat_t (*auto_config)(XPI_Type *base, xpi_nor_config_t *nor_cfg, xpi_nor_config_option_t *cfg_option);
 
    hpm_stat_t (*get_property)(XPI_Type *base, xpi_nor_config_t *nor_cfg, uint32_t property_id, uint32_t *value);
 
} xpi_nor_driver_interface_t;
 
typedef struct {
    uint32_t version;
 
    hpm_stat_t (*get_config)(XPI_Type *base, xpi_ram_config_t *ram_cfg, xpi_ram_config_option_t *cfg_option);
 
    hpm_stat_t (*init)(XPI_Type *base, xpi_ram_config_t *ram_cfg);
} xpi_ram_driver_interface_t;
 
typedef struct {
    uint32_t version;
    hpm_stat_t (*sdp_ip_init)(void);
    hpm_stat_t (*sdp_ip_deinit)(void);
    hpm_stat_t (*aes_set_key)(sdp_aes_ctx_t *aes_ctx, const uint8_t *key, sdp_aes_key_bits_t keybits, uint32_t key_idx);
    hpm_stat_t (*aes_crypt_ecb)(sdp_aes_ctx_t *aes_ctx, sdp_aes_op_t op, uint32_t len, const uint8_t *in, uint8_t *out);
    hpm_stat_t (*aes_crypt_cbc)(sdp_aes_ctx_t *aes_ctx, sdp_aes_op_t op, uint32_t length, uint8_t iv[16],
                                const uint8_t *input, uint8_t *output);
    hpm_stat_t (*aes_crypt_ctr)(sdp_aes_ctx_t *aes_ctx, uint8_t *nonce_ctr, uint8_t *input, uint8_t *output,
                                uint32_t length);
    hpm_stat_t (*aes_ccm_gen_enc)(sdp_aes_ctx_t *aes_ctx, uint32_t input_len, const uint8_t *nonce, uint32_t nonce_len,
                                  const uint8_t *aad, uint32_t aad_len, const uint8_t *input, uint8_t *output,
                                  uint8_t *tag, uint32_t tag_len);
    hpm_stat_t (*aes_ccm_dec_verify)(sdp_aes_ctx_t *aes_ctx, uint32_t input_len, const uint8_t *nonce,
                                     uint32_t nonce_len, const uint8_t *aad, uint32_t aad_len, const uint8_t *input,
                                     uint8_t *output, const uint8_t *tag, uint32_t tag_len);
    hpm_stat_t (*memcpy)(sdp_dma_ctx_t *dma_ctx, void *dst, const void *src, uint32_t length);
    hpm_stat_t (*memset)(sdp_dma_ctx_t *dma_ctx, void *dst, uint8_t pattern, uint32_t length);
    hpm_stat_t (*hash_init)(sdp_hash_ctx_t *hash_ctx, sdp_hash_alg_t alg);
    hpm_stat_t (*hash_update)(sdp_hash_ctx_t *hash_ctx, const uint8_t *data, uint32_t length);
    hpm_stat_t (*hash_finish)(sdp_hash_ctx_t *hash_ctx, uint8_t *digest);
} sdp_driver_interface_t;
 
typedef struct {
    uint32_t version;
    hpm_stat_t (*init)(sm3_context_t *ctx);
    hpm_stat_t (*update)(sm3_context_t *ctx, const void *input, uint32_t len);
    hpm_stat_t (*finalize)(sm3_context_t *ctx, uint8_t output[32]);
} sm3_api_interface_t;
 
typedef struct {
    uint32_t version;
    void (*setkey_enc)(sm4_context_t *ctx, const uint8_t key[16]);
    void (*setkey_dec)(sm4_context_t *ctx, const uint8_t key[16]);
    hpm_stat_t (*crypt_ecb)(sm4_context_t *ctx, uint32_t mode, uint32_t length, const uint8_t *input, uint8_t *output);
    hpm_stat_t (*crypt_cbc)(sm4_context_t *ctx, uint32_t mode, uint32_t length, const uint8_t iv[16],
                            const uint8_t *input, uint8_t *output);
    hpm_stat_t (*crypt_ctr)(sm4_context_t *ctx, uint8_t *nonce_counter, const uint8_t *input,
                            uint8_t *output, uint32_t length);
    hpm_stat_t (*ccm_gen_enc)(sm4_context_t *ctx, uint32_t input_len, const uint8_t *iv,
                              uint32_t iv_len, const uint8_t *aad, uint32_t aad_len, const uint8_t *input,
                              uint8_t *output, uint8_t *tag, uint32_t tag_len);
    hpm_stat_t (*ccm_dec_verify)(sm4_context_t *ctx, uint32_t input_len, const uint8_t *iv,
                                 uint32_t iv_len, const uint8_t *aad, uint32_t aad_len, const uint8_t *input,
                                 uint8_t *output, const uint8_t *tag, uint32_t tag_len);
} sm4_api_interface_t;
 
typedef struct {
    const uint32_t version;
    const char *copyright;
    hpm_stat_t (*run_bootloader)(void *arg);
    const otp_driver_interface_t *otp_driver_if;
    const xpi_driver_interface_t *xpi_driver_if;
    const xpi_nor_driver_interface_t *xpi_nor_driver_if;
    const xpi_ram_driver_interface_t *xpi_ram_driver_if;
    const sdp_driver_interface_t *sdp_driver_if;
    const uint32_t reserved0;
    const sm3_api_interface_t *sm3_api_if;  /* SM3 driver interface address */
    const sm4_api_interface_t *sm4_api_if;  /* SM4 driver itnerface address */
} bootloader_api_table_t;
 
#define ROM_API_TABLE_ROOT ((const bootloader_api_table_t *)0x2001FF00U)
 
#ifdef __cplusplus
extern "C" {
#endif
 
/***********************************************************************************************************************
 *
 *
 *      Enter bootloader Wrapper
 *
 *
 **********************************************************************************************************************/
 
static inline hpm_stat_t rom_enter_bootloader(void *ctx)
{
    return ROM_API_TABLE_ROOT->run_bootloader(ctx);
}
 
/***********************************************************************************************************************
 *
 *
 *      XPI NOR Driver Wrapper
 *
 *
 **********************************************************************************************************************/
 
ATTR_RAMFUNC
static inline hpm_stat_t rom_xpi_nor_get_config(XPI_Type *base, xpi_nor_config_t *nor_cfg,
                                                xpi_nor_config_option_t *cfg_option)
{
    hpm_stat_t status;
    status = ROM_API_TABLE_ROOT->xpi_nor_driver_if->get_config(base, nor_cfg, cfg_option);
    fencei();
    return status;
}
 
ATTR_RAMFUNC
static inline hpm_stat_t rom_xpi_nor_init(XPI_Type *base, xpi_nor_config_t *nor_config)
{
    hpm_stat_t status;
    status = ROM_API_TABLE_ROOT->xpi_nor_driver_if->init(base, nor_config);
    fencei();
    return status;
}
 
ATTR_RAMFUNC
static inline hpm_stat_t rom_xpi_nor_erase(XPI_Type *base, xpi_xfer_channel_t channel,
                                           const xpi_nor_config_t *nor_config,
                                           uint32_t start, uint32_t length)
{
    hpm_stat_t status = ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase(base, channel, nor_config, start, length);
    fencei();
    return status;
}
 
ATTR_RAMFUNC
static inline hpm_stat_t rom_xpi_nor_erase_sector(XPI_Type *base, xpi_xfer_channel_t channel,
                                                  const xpi_nor_config_t *nor_config,
                                                  uint32_t start)
{
    hpm_stat_t status = ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase_sector(base, channel, nor_config, start);
    fencei();
    return status;
}
 
ATTR_RAMFUNC
static inline hpm_stat_t rom_xpi_nor_erase_sector_nonblocking(XPI_Type *base, xpi_xfer_channel_t channel,
                                                              const xpi_nor_config_t *nor_config,
                                                              uint32_t start)
{
    return ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase_sector_nonblocking(base, channel, nor_config, start);
}
 
ATTR_RAMFUNC
static inline hpm_stat_t rom_xpi_nor_erase_block(XPI_Type *base, xpi_xfer_channel_t channel,
                                                 const xpi_nor_config_t *nor_config,
                                                 uint32_t start)
{
    hpm_stat_t status = ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase_block(base, channel, nor_config, start);
    fencei();
    return status;
}
 
ATTR_RAMFUNC
static inline hpm_stat_t rom_xpi_nor_erase_block_nonblocking(XPI_Type *base, xpi_xfer_channel_t channel,
                                                             const xpi_nor_config_t *nor_config,
                                                             uint32_t start)
{
    return ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase_block_nonblocking(base, channel, nor_config, start);
}
 
ATTR_RAMFUNC
static inline hpm_stat_t rom_xpi_nor_erase_chip(XPI_Type *base, xpi_xfer_channel_t channel,
                                                const xpi_nor_config_t *nor_config)
{
    hpm_stat_t status;
    status = ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase_chip(base, channel, nor_config);
    fencei();
    return status;
}
 
ATTR_RAMFUNC
static inline hpm_stat_t rom_xpi_nor_erase_chip_nonblocking(XPI_Type *base, xpi_xfer_channel_t channel,
                                                            const xpi_nor_config_t *nor_config)
{
    hpm_stat_t status = ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase_chip_nonblocking(base, channel, nor_config);
    fencei();
    return status;
}
 
ATTR_RAMFUNC
static inline hpm_stat_t rom_xpi_nor_program(XPI_Type *base, xpi_xfer_channel_t channel,
                                             const xpi_nor_config_t *nor_config,
                                             const uint32_t *src, uint32_t dst_addr, uint32_t length)
{
    hpm_stat_t status;
    status = ROM_API_TABLE_ROOT->xpi_nor_driver_if->program(base, channel, nor_config, src, dst_addr, length);
    fencei();
    return status;
}
 
ATTR_RAMFUNC
static inline hpm_stat_t rom_xpi_nor_page_program_nonblocking(XPI_Type *base, xpi_xfer_channel_t channel,
                                                              const xpi_nor_config_t *nor_config, const uint32_t *src,
                                                              uint32_t dst_addr, uint32_t length)
{
    return ROM_API_TABLE_ROOT->xpi_nor_driver_if->page_program_nonblocking(base, channel, nor_config, src, dst_addr,
                                                                           length);
}
 
static inline hpm_stat_t rom_xpi_nor_read(XPI_Type *base, xpi_xfer_channel_t channel,
                                          const xpi_nor_config_t *nor_config,
                                          uint32_t *dst, uint32_t start, uint32_t length)
{
    return ROM_API_TABLE_ROOT->xpi_nor_driver_if->read(base, channel, nor_config, dst, start, length);
}
 
ATTR_RAMFUNC
static inline hpm_stat_t rom_xpi_nor_auto_config(XPI_Type *base, xpi_nor_config_t *config,
                                                 xpi_nor_config_option_t *cfg_option)
{
    hpm_stat_t status;
    status = ROM_API_TABLE_ROOT->xpi_nor_driver_if->auto_config(base, config, cfg_option);
    fencei();
    return status;
}
 
static inline hpm_stat_t rom_xpi_nor_get_property(XPI_Type *base, xpi_nor_config_t *nor_cfg, uint32_t property_id,
                                                  uint32_t *value)
{
    return ROM_API_TABLE_ROOT->xpi_nor_driver_if->get_property(base, nor_cfg, property_id, value);
}
 
static inline hpm_stat_t rom_xpi_nor_get_status(XPI_Type *base, xpi_xfer_channel_t channel,
                                                const xpi_nor_config_t *nor_config, uint32_t addr,
                                                uint16_t *out_status)
{
    return ROM_API_TABLE_ROOT->xpi_nor_driver_if->get_status(base, channel, nor_config, addr, out_status);
}
 
ATTR_RAMFUNC
static inline bool rom_xpi_nor_remap_config(XPI_Type *base, uint32_t start, uint32_t len, uint32_t offset)
{
    if (((base != HPM_XPI0) && (base != HPM_XPI1)) || ((start & 0xFFF) != 0) || ((len & 0xFFF) != 0)
        || ((offset & 0xFFF) != 0)) {
        return false;
    }
    static const uint8_t k_mc_xpi_remap_config[] = {
        0x2e, 0x96, 0x23, 0x22, 0xc5, 0x42, 0x23, 0x24,
        0xd5, 0x42, 0x93, 0xe5, 0x15, 0x00, 0x23, 0x20,
        0xb5, 0x42, 0x05, 0x45, 0x82, 0x80,
    };
    typedef bool (*remap_config_cb_t)(XPI_Type *, uint32_t, uint32_t, uint32_t);
    remap_config_cb_t cb = (remap_config_cb_t) &k_mc_xpi_remap_config;
    bool result = cb(base, start, len, offset);
    ROM_API_TABLE_ROOT->xpi_driver_if->software_reset(base);
    fencei();
    return result;
}
 
ATTR_RAMFUNC
static inline void rom_xpi_nor_remap_disable(XPI_Type *base)
{
    static const uint8_t k_mc_xpi_remap_disable[] = {
        0x83, 0x27, 0x05, 0x42, 0xf9, 0x9b, 0x23, 0x20,
        0xf5, 0x42, 0x82, 0x80,
    };
    typedef void (*remap_disable_cb_t)(XPI_Type *);
    remap_disable_cb_t cb = (remap_disable_cb_t) &k_mc_xpi_remap_disable;
    cb(base);
    fencei();
}
 
ATTR_RAMFUNC
static inline bool rom_xpi_nor_is_remap_enabled(XPI_Type *base)
{
    static const uint8_t k_mc_xpi_remap_enabled[] = {
        0x03, 0x25, 0x05, 0x42, 0x05, 0x89, 0x82, 0x80,
    };
    typedef bool (*remap_chk_cb_t)(XPI_Type *);
    remap_chk_cb_t chk_cb = (remap_chk_cb_t) &k_mc_xpi_remap_enabled;
    return chk_cb(base);
}
 
ATTR_RAMFUNC
static inline bool rom_xpi_nor_exip_region_config(XPI_Type *base, uint32_t index, exip_region_param_t *param)
{
    if ((base != HPM_XPI0) && (base != HPM_XPI1)) {
        return false;
    }
    static const uint8_t k_mc_exip_region_config[] = {
        0x18, 0x4a, 0x9a, 0x05, 0x2e, 0x95, 0x85, 0x67,
        0xaa, 0x97, 0x23, 0xa4, 0xe7, 0xd0, 0x4c, 0x4a,
        0x14, 0x42, 0x58, 0x42, 0x23, 0xa6, 0xb7, 0xd0,
        0x4c, 0x46, 0x36, 0x97, 0x13, 0x77, 0x07, 0xc0,
        0x23, 0xa2, 0xb7, 0xd0, 0x0c, 0x46, 0x13, 0x67,
        0x37, 0x00, 0x05, 0x45, 0x23, 0xa0, 0xb7, 0xd0,
        0x0c, 0x4e, 0x23, 0xaa, 0xb7, 0xd0, 0x50, 0x4e,
        0x23, 0xa8, 0xc7, 0xd0, 0x23, 0xac, 0xd7, 0xd0,
        0x23, 0xae, 0xe7, 0xd0, 0x82, 0x80,
    };
    typedef void (*exip_region_config_cb_t)(XPI_Type *, uint32_t, exip_region_param_t *);
    exip_region_config_cb_t cb = (exip_region_config_cb_t) &k_mc_exip_region_config;
    cb(base, index, param);
    ROM_API_TABLE_ROOT->xpi_driver_if->software_reset(base);
    fencei();
    return true;
}
 
ATTR_RAMFUNC
static inline void rom_xpi_nor_exip_region_disable(XPI_Type *base, uint32_t index)
{
    static const uint8_t k_mc_exip_region_disable[] = {
        0x9a, 0x05, 0x2e, 0x95, 0x85, 0x67, 0xaa, 0x97,
        0x03, 0xa7, 0xc7, 0xd1, 0x75, 0x9b, 0x23, 0xae,
        0xe7, 0xd0, 0x82, 0x80
    };
    typedef void (*exip_region_disable_cb_t)(XPI_Type *, uint32_t);
    exip_region_disable_cb_t cb = (exip_region_disable_cb_t) &k_mc_exip_region_disable;
    cb(base, index);
    ROM_API_TABLE_ROOT->xpi_driver_if->software_reset(base);
    fencei();
}
 
ATTR_RAMFUNC
static inline void rom_xpi_nor_exip_enable(XPI_Type *base)
{
    static const uint8_t k_mc_exip_enable[] = {
        0x85, 0x67, 0x3e, 0x95, 0x83, 0x27, 0x05, 0xc0,
        0x37, 0x07, 0x00, 0x80, 0xd9, 0x8f, 0x23, 0x20,
        0xf5, 0xc0, 0x82, 0x80
    };
    typedef void (*exip_enable_cb_t)(XPI_Type *);
    exip_enable_cb_t cb = (exip_enable_cb_t) &k_mc_exip_enable;
    cb(base);
}
 
ATTR_RAMFUNC
static inline void rom_xpi_nor_exip_disable(XPI_Type *base)
{
    static const uint8_t k_mc_exip_disable[] = {
        0x85, 0x67, 0x3e, 0x95, 0x83, 0x27, 0x05, 0xc0,
        0x86, 0x07, 0x85, 0x83, 0x23, 0x20, 0xf5, 0xc0,
        0x82, 0x80
    };
    typedef void (*exip_disable_cb_t)(XPI_Type *);
    exip_disable_cb_t cb = (exip_disable_cb_t) &k_mc_exip_disable;
    cb(base);
    ROM_API_TABLE_ROOT->xpi_driver_if->software_reset(base);
    fencei();
}
 
/***********************************************************************************************************************
 *
 *
 *      XPI RAM Driver Wrapper
 *
 *
 **********************************************************************************************************************/
static inline hpm_stat_t rom_xpi_ram_get_config(XPI_Type *base, xpi_ram_config_t *ram_cfg,
                                                xpi_ram_config_option_t *cfg_option)
{
    return ROM_API_TABLE_ROOT->xpi_ram_driver_if->get_config(base, ram_cfg, cfg_option);
}
 
static inline hpm_stat_t rom_xpi_ram_init(XPI_Type *base, xpi_ram_config_t *ram_cfg)
{
    return ROM_API_TABLE_ROOT->xpi_ram_driver_if->init(base, ram_cfg);
}
 
/***********************************************************************************************************************
 *
 *
 *      SDP Driver Wrapper
 *
 *
 **********************************************************************************************************************/
static inline void rom_sdp_init(void)
{
    ROM_API_TABLE_ROOT->sdp_driver_if->sdp_ip_init();
}
 
static inline void rom_sdp_deinit(void)
{
    ROM_API_TABLE_ROOT->sdp_driver_if->sdp_ip_deinit();
}
 
static inline hpm_stat_t rom_sdp_aes_set_key(sdp_aes_ctx_t *aes_ctx, const uint8_t *key,
                                             sdp_aes_key_bits_t key_bits, uint32_t key_idx)
{
    return ROM_API_TABLE_ROOT->sdp_driver_if->aes_set_key(aes_ctx, key, key_bits, key_idx);
}
 
static inline hpm_stat_t rom_sdp_aes_crypt_ecb(sdp_aes_ctx_t *aes_ctx, sdp_aes_op_t op,
                                               uint32_t len, const uint8_t *in, uint8_t *out)
{
    return ROM_API_TABLE_ROOT->sdp_driver_if->aes_crypt_ecb(aes_ctx, op, len, in, out);
}
 
static inline hpm_stat_t rom_sdp_aes_crypt_cbc(sdp_aes_ctx_t *aes_ctx, sdp_aes_op_t op, uint32_t length, uint8_t iv[16],
                                               const uint8_t *in, uint8_t *out)
{
    return ROM_API_TABLE_ROOT->sdp_driver_if->aes_crypt_cbc(aes_ctx, op, length, iv, in, out);
}
 
static inline hpm_stat_t rom_sdp_hash_init(sdp_hash_ctx_t *hash_ctx, sdp_hash_alg_t alg)
{
    return ROM_API_TABLE_ROOT->sdp_driver_if->hash_init(hash_ctx, alg);
}
 
static inline hpm_stat_t rom_sdp_hash_update(sdp_hash_ctx_t *hash_ctx, const uint8_t *data, uint32_t length)
{
    return ROM_API_TABLE_ROOT->sdp_driver_if->hash_update(hash_ctx, data, length);
}
 
static inline hpm_stat_t rom_sdp_hash_finish(sdp_hash_ctx_t *hash_ctx, uint8_t *digest)
{
    return ROM_API_TABLE_ROOT->sdp_driver_if->hash_finish(hash_ctx, digest);
}
 
static inline hpm_stat_t rom_sdp_memcpy(sdp_dma_ctx_t *dma_ctx, void *dst, const void *src, uint32_t length)
{
    return ROM_API_TABLE_ROOT->sdp_driver_if->memcpy(dma_ctx, dst, src, length);
}
 
static inline hpm_stat_t rom_sdp_memset(sdp_dma_ctx_t *dma_ctx, void *dst, uint8_t pattern, uint32_t length)
{
    return ROM_API_TABLE_ROOT->sdp_driver_if->memset(dma_ctx, dst, pattern, length);
}
 
 
/***********************************************************************************************************************
 *
 *
 *      SM3 Driver Wrapper
 *
 *
 **********************************************************************************************************************/
 
static inline hpm_stat_t rom_sm3_init(sm3_context_t *ctx)
{
    return ROM_API_TABLE_ROOT->sm3_api_if->init(ctx);
}
 
static inline hpm_stat_t rom_sm3_update(sm3_context_t *ctx, const void *input, uint32_t len)
{
    return ROM_API_TABLE_ROOT->sm3_api_if->update(ctx, input, len);
}
 
static inline hpm_stat_t rom_sm3_finalize(sm3_context_t *ctx, uint8_t output[32])
{
    return ROM_API_TABLE_ROOT->sm3_api_if->finalize(ctx, output);
}
 
/***********************************************************************************************************************
 *
 *
 *      SM4 Driver Wrapper
 *
 *
 **********************************************************************************************************************/
static inline void rom_sm4_setkey_enc(sm4_context_t *ctx, const uint8_t key[16])
{
    ROM_API_TABLE_ROOT->sm4_api_if->setkey_enc(ctx, key);
}
 
static inline void rom_sm4_setkey_dec(sm4_context_t *ctx, const uint8_t key[16])
{
    ROM_API_TABLE_ROOT->sm4_api_if->setkey_dec(ctx, key);
}
 
static inline hpm_stat_t rom_sm4_crypt_ecb(sm4_context_t *ctx, uint32_t mode, uint32_t length, const uint8_t *input,
                                           uint8_t *output)
{
    return ROM_API_TABLE_ROOT->sm4_api_if->crypt_ecb(ctx, mode, length, input, output);
}
 
static inline hpm_stat_t rom_sm4_crypt_cbc(sm4_context_t *ctx, uint32_t mode, uint32_t length, const uint8_t iv[16],
                                           const uint8_t *input, uint8_t *output)
{
    return ROM_API_TABLE_ROOT->sm4_api_if->crypt_cbc(ctx, mode, length, iv, input, output);
}
 
#ifdef __cplusplus
}
#endif
 
#endif /* HPM_ROMAPI_H */