HPM SDK
HPMicro Software Development Kit
Data Structures | Macros | Typedefs | Enumerations
XPI driver APIs

XPI ROM APIs. More...

Data Structures

struct  xpi_xfer_ctx_t
 XPI Xfer context. More...
 
struct  xpi_instr_seq_t
 XPI instruction sequence. More...
 
struct  xpi_config_t
 XPI configuration structure. More...
 
struct  xpi_device_config_t
 XPI Device Configuration structure. More...
 

Macros

#define XPI_1PAD   (0U)
 XPI pad definitions. More...
 
#define XPI_2PADS   (1U)
 
#define XPI_4PADS   (2U)
 
#define XPI_8PADS   (3U)
 
#define XPI_PHASE_STOP   (0x00U)
 XPI Phase definitions. More...
 
#define XPI_PHASE_CMD_SDR   (0x01U)
 
#define XPI_PHASE_RADDR_SDR   (0x02U)
 
#define XPI_PHASE_CADDR_SDR   (0x03U)
 
#define XPI_PHASE_MODE4_SDR   (0x06U)
 
#define XPI_PHASE_MODE8_SDR   (0x07U)
 
#define XPI_PHASE_WRITE_SDR   (0x08U)
 
#define XPI_PHASE_READ_SDR   (0x09U)
 
#define XPI_PHASE_DUMMY_SDR   (0X0CU)
 
#define XPI_PHASE_DUMMY_RWDS_SDR   (0x0DU)
 
#define XPI_PHASE_CMD_DDR   (0x21U)
 
#define XPI_PHASE_RADDR_DDR   (0x22U)
 
#define XPI_PHASE_CADDR_DDR   (0x23U)
 
#define XPI_PHASE_MODE4_DDR   (0x26U)
 
#define XPI_PHASE_MODE8_DDR   (0x27U)
 
#define XPI_PHASE_WRITE_DDR   (0x28U)
 
#define XPI_PHASE_READ_DDR   (0x29U)
 
#define XPI_PHASE_DUMMY_DDR   (0x2CU)
 
#define XPI_PHASE_DUMMY_RWDS_DDR   (0x2DU)
 
#define SUB_INSTR(phase, pad, op)   ((uint32_t)(((uint16_t)(phase) << 10) | ((uint16_t)(pad) << 8) | ((uint16_t)(op))))
 SUB Instruction. More...
 
#define XPI_INSTR_SEQ(phase0, pad0, op0, phase1, pad1, op1)   (SUB_INSTR(phase0, pad0, op0) | (SUB_INSTR(phase1, pad1, op1)<<16))
 Generate a single word INSTRUCTION sequence word. More...
 

Typedefs

typedef uint32_t XPI_Type
 XPI_Type definitions for. More...
 

Enumerations

enum  xpi_rxclksrc_type_t { xpi_rxclksrc_internal_loopback = 0 , xpi_rxclksrc_dqs_loopback = 1 , xpi_rxclksrc_external_dqs = 3 }
 XPI Read Sample Clock source options. More...
 
enum  xpi_io_group_t { xpi_io_1st_group , xpi_io_2nd_group }
 XPI IO pin group options. More...
 
enum  xpi_xfer_channel_t {
  xpi_xfer_channel_a1 , xpi_xfer_channel_a2 , xpi_xfer_channel_b1 , xpi_xfer_channel_b2 ,
  xpi_xfer_channel_auto
}
 XPI Transfer Channel type definitions. More...
 
enum  xpi_channel_t { xpi_channel_a1 , xpi_channel_a2 , xpi_channel_b1 , xpi_channel_b2 }
 XPI Channel definitions. More...
 
enum  xpi_apb_xfer_type_t { xpi_apb_xfer_type_cmd , xpi_apb_xfer_type_config , xpi_apb_xfer_type_read , xpi_apb_xfer_type_write }
 XPI APB Transfer type. More...
 
enum  xpi_xfer_mode_t { xpi_xfer_mode_polling , xpi_xfer_mode_dma , xpi_xfer_mode_interrupt }
 XPI Xfer Mode. More...
 
enum  {
  status_xpi_apb_jump_on_cs = ((uint32_t)( status_group_xpi )*1000U + (uint32_t)( 1 )) , status_xpi_apb_unknown_inst = ((uint32_t)( status_group_xpi )*1000U + (uint32_t)( 2 )) , status_xpi_apb_dummy_sdr_in_ddr_seq = ((uint32_t)( status_group_xpi )*1000U + (uint32_t)( 3 )) , status_xpi_apb_dummy_ddr_in_sdr_seq = ((uint32_t)( status_group_xpi )*1000U + (uint32_t)( 4 )) ,
  status_xpi_apb_exceed_addr_range = ((uint32_t)( status_group_xpi )*1000U + (uint32_t)( 5 )) , status_xpi_apb_seq_timeout = ((uint32_t)( status_group_xpi )*1000U + (uint32_t)( 6 )) , status_xpi_apb_cross_boundary = ((uint32_t)( status_group_xpi )*1000U + (uint32_t)( 7 ))
}
 XPI API command error codes. More...
 
enum  { xpi_dll_half_cycle = 0xFU , xpi_dll_quarter_cycle = 0x7U , xpi_dll_sdr_default_cycle = xpi_dll_half_cycle , xpi_dll_ddr_default_cycle = xpi_dll_quarter_cycle }
 Delay line definitions. More...
 

Detailed Description

XPI ROM APIs.

Macro Definition Documentation

◆ SUB_INSTR

#define SUB_INSTR (   phase,
  pad,
  op 
)    ((uint32_t)(((uint16_t)(phase) << 10) | ((uint16_t)(pad) << 8) | ((uint16_t)(op))))

#include <drivers/inc/hpm_romapi_xpi_def.h>

SUB Instruction.

Parameters
[in]phasePhase
[in]padPad for Phase
[in]opOperand for Phase

◆ XPI_1PAD

#define XPI_1PAD   (0U)

#include <drivers/inc/hpm_romapi_xpi_def.h>

XPI pad definitions.

Single pad

◆ XPI_2PADS

#define XPI_2PADS   (1U)

#include <drivers/inc/hpm_romapi_xpi_def.h>

Dual pads

◆ XPI_4PADS

#define XPI_4PADS   (2U)

#include <drivers/inc/hpm_romapi_xpi_def.h>

Quad pads

◆ XPI_8PADS

#define XPI_8PADS   (3U)

#include <drivers/inc/hpm_romapi_xpi_def.h>

Octal pads

◆ XPI_INSTR_SEQ

#define XPI_INSTR_SEQ (   phase0,
  pad0,
  op0,
  phase1,
  pad1,
  op1 
)    (SUB_INSTR(phase0, pad0, op0) | (SUB_INSTR(phase1, pad1, op1)<<16))

#include <drivers/inc/hpm_romapi_xpi_def.h>

Generate a single word INSTRUCTION sequence word.

Note
Here intentionally use the MACRO because when the arguments are constant value, the compiler can generate the const entry word during pre-processing

◆ XPI_PHASE_CADDR_DDR

#define XPI_PHASE_CADDR_DDR   (0x23U)

#include <drivers/inc/hpm_romapi_xpi_def.h>

Phase: Send Column address in DDR Mode

◆ XPI_PHASE_CADDR_SDR

#define XPI_PHASE_CADDR_SDR   (0x03U)

#include <drivers/inc/hpm_romapi_xpi_def.h>

Phase: Send Column Address in SDR Mode

◆ XPI_PHASE_CMD_DDR

#define XPI_PHASE_CMD_DDR   (0x21U)

#include <drivers/inc/hpm_romapi_xpi_def.h>

Phase: Send CMD in DDR Mode

◆ XPI_PHASE_CMD_SDR

#define XPI_PHASE_CMD_SDR   (0x01U)

#include <drivers/inc/hpm_romapi_xpi_def.h>

Phase: Send CMD in SDR mode

◆ XPI_PHASE_DUMMY_DDR

#define XPI_PHASE_DUMMY_DDR   (0x2CU)

#include <drivers/inc/hpm_romapi_xpi_def.h>

Phase: Send DUMMY in DDR Mode

◆ XPI_PHASE_DUMMY_RWDS_DDR

#define XPI_PHASE_DUMMY_RWDS_DDR   (0x2DU)

#include <drivers/inc/hpm_romapi_xpi_def.h>

Phase: Send DUMMY RWDS in DDR Mode

◆ XPI_PHASE_DUMMY_RWDS_SDR

#define XPI_PHASE_DUMMY_RWDS_SDR   (0x0DU)

#include <drivers/inc/hpm_romapi_xpi_def.h>

Phase: Send Dummy RWDS in SDR Mode

◆ XPI_PHASE_DUMMY_SDR

#define XPI_PHASE_DUMMY_SDR   (0X0CU)

#include <drivers/inc/hpm_romapi_xpi_def.h>

Phase: Send Dummy in SDR Mode

◆ XPI_PHASE_MODE4_DDR

#define XPI_PHASE_MODE4_DDR   (0x26U)

#include <drivers/inc/hpm_romapi_xpi_def.h>

Phase: Send Mode 4 in DDR Mode

◆ XPI_PHASE_MODE4_SDR

#define XPI_PHASE_MODE4_SDR   (0x06U)

#include <drivers/inc/hpm_romapi_xpi_def.h>

Phase: Send Mode 4 in SDR Mode

◆ XPI_PHASE_MODE8_DDR

#define XPI_PHASE_MODE8_DDR   (0x27U)

#include <drivers/inc/hpm_romapi_xpi_def.h>

Phase: Send Mode 8 in DDR Mode

◆ XPI_PHASE_MODE8_SDR

#define XPI_PHASE_MODE8_SDR   (0x07U)

#include <drivers/inc/hpm_romapi_xpi_def.h>

Phase: Send Mode 8 in SDR Mode

◆ XPI_PHASE_RADDR_DDR

#define XPI_PHASE_RADDR_DDR   (0x22U)

#include <drivers/inc/hpm_romapi_xpi_def.h>

Phase: Send Raw Address in DDR Mode

◆ XPI_PHASE_RADDR_SDR

#define XPI_PHASE_RADDR_SDR   (0x02U)

#include <drivers/inc/hpm_romapi_xpi_def.h>

Phase: Send Row Address in SDR Mode

◆ XPI_PHASE_READ_DDR

#define XPI_PHASE_READ_DDR   (0x29U)

#include <drivers/inc/hpm_romapi_xpi_def.h>

Phase: Read data in SDR Mode

◆ XPI_PHASE_READ_SDR

#define XPI_PHASE_READ_SDR   (0x09U)

#include <drivers/inc/hpm_romapi_xpi_def.h>

Phase: Read data in SDR Mode

◆ XPI_PHASE_STOP

#define XPI_PHASE_STOP   (0x00U)

#include <drivers/inc/hpm_romapi_xpi_def.h>

XPI Phase definitions.

Phase: Stop

◆ XPI_PHASE_WRITE_DDR

#define XPI_PHASE_WRITE_DDR   (0x28U)

#include <drivers/inc/hpm_romapi_xpi_def.h>

Phase: Write data in DDR Mode

◆ XPI_PHASE_WRITE_SDR

#define XPI_PHASE_WRITE_SDR   (0x08U)

#include <drivers/inc/hpm_romapi_xpi_def.h>

Phase: Write data in SDR Mode

Typedef Documentation

◆ XPI_Type

typedef uint32_t XPI_Type

#include <drivers/inc/hpm_romapi_xpi_def.h>

XPI_Type definitions for.

Note
For compatibility

Enumeration Type Documentation

◆ anonymous enum

anonymous enum

#include <drivers/inc/hpm_romapi_xpi_def.h>

XPI API command error codes.

Enumerator
status_xpi_apb_jump_on_cs 
status_xpi_apb_unknown_inst 
status_xpi_apb_dummy_sdr_in_ddr_seq 
status_xpi_apb_dummy_ddr_in_sdr_seq 
status_xpi_apb_exceed_addr_range 
status_xpi_apb_seq_timeout 
status_xpi_apb_cross_boundary 

◆ anonymous enum

anonymous enum

#include <drivers/inc/hpm_romapi_xpi_def.h>

Delay line definitions.

Enumerator
xpi_dll_half_cycle 
xpi_dll_quarter_cycle 
xpi_dll_sdr_default_cycle 
xpi_dll_ddr_default_cycle 

◆ xpi_apb_xfer_type_t

enum xpi_apb_xfer_type_t

#include <drivers/inc/hpm_romapi_xpi_def.h>

XPI APB Transfer type.

Enumerator
xpi_apb_xfer_type_cmd 

APB Command Type: Command only

xpi_apb_xfer_type_config 

APB Command Type: Configuration

xpi_apb_xfer_type_read 

APB Command Type: Read

xpi_apb_xfer_type_write 

APB Command Type: Write

◆ xpi_channel_t

enum xpi_channel_t

#include <drivers/inc/hpm_romapi_xpi_def.h>

XPI Channel definitions.

Enumerator
xpi_channel_a1 

Port: Channel A1

xpi_channel_a2 

Port: Channel A2

xpi_channel_b1 

Port: Channel B1

xpi_channel_b2 

Port: Channel B2

◆ xpi_io_group_t

enum xpi_io_group_t

#include <drivers/inc/hpm_romapi_xpi_def.h>

XPI IO pin group options.

Enumerator
xpi_io_1st_group 

First/Primary group

xpi_io_2nd_group 

Second/Secondary group

◆ xpi_rxclksrc_type_t

enum xpi_rxclksrc_type_t

#include <drivers/inc/hpm_romapi_xpi_def.h>

XPI Read Sample Clock source options.

Enumerator
xpi_rxclksrc_internal_loopback 

Internal loopback

xpi_rxclksrc_dqs_loopback 

Loopback from DQS pad

xpi_rxclksrc_external_dqs 

Read is driven by External DQS pad

◆ xpi_xfer_channel_t

enum xpi_xfer_channel_t

#include <drivers/inc/hpm_romapi_xpi_def.h>

XPI Transfer Channel type definitions.

Enumerator
xpi_xfer_channel_a1 

The address is based on the device connected to Channel A1

xpi_xfer_channel_a2 

The address is based on the device connected to Channel A2

xpi_xfer_channel_b1 

The address is based on the device connected to Channel B1

xpi_xfer_channel_b2 

The address is based on the device connected to Channel B2

xpi_xfer_channel_auto 

The channel is auto determined

◆ xpi_xfer_mode_t

enum xpi_xfer_mode_t

#include <drivers/inc/hpm_romapi_xpi_def.h>

XPI Xfer Mode.

Enumerator
xpi_xfer_mode_polling 

Transfer mode: Polling

xpi_xfer_mode_dma 

Transfer mode: DMA

xpi_xfer_mode_interrupt 

Transfer mode: Interrupt