#include "hpm_soc.h"

Macros
#define	I2C_SOC_FIFO_SIZE (4U)

#define	I2C_SOC_TRANSFER_COUNT_MAX (256U)

#define	PCFG_SOC_LDO1P1_MIN_VOLTAGE_IN_MV (700U)

#define	PCFG_SOC_LDO1P1_MAX_VOLTAGE_IN_MV (1320U)

#define	PCFG_SOC_LDO2P5_MIN_VOLTAGE_IN_MV (2125)

#define	PCFG_SOC_LDO2P5_MAX_VOLTAGE_IN_MV (2900U)

#define	PCFG_SOC_DCDC_MIN_VOLTAGE_IN_MV (600U)

#define	PCFG_SOC_DCDC_MAX_VOLTAGE_IN_MV (1375U)

#define	I2S_SOC_MAX_CHANNEL_NUM (16U)

#define	I2S_SOC_MAX_TX_CHANNEL_NUM (8U)

#define	I2S_SOC_MAX_TX_FIFO_DEPTH (8U)

#define	PDM_I2S HPM_I2S0

#define	DAO_I2S HPM_I2S1

#define	PDM_SOC_SAMPLE_RATE_IN_HZ (16000U)

#define	VAD_SOC_SAMPLE_RATE_IN_HZ (16000U)

#define	DAO_SOC_SAMPLE_RATE_IN_HZ (48000U)

#define	DAO_SOC_PDM_SAMPLE_RATE_RATIO (3U)

#define	DAO_SOC_VAD_SAMPLE_RATE_RATIO (3U)

#define	PLLCTL_SOC_PLL_MAX_COUNT (5U)

#define	PLLCTL_SOC_PLL_REFCLK_FREQ (24U * 1000000UL)

#define	PLLCTL_SOC_PLL_HAS_DIV0(x) ((((x) == 1) \|\| ((x) == 2)) ? 1 : 0)

#define	PLLCTL_SOC_PLL_HAS_DIV1(x) ((((x) == 1) \|\| ((x) == 2)) ? 1 : 0)

#define	PWM_SOC_PWM_MAX_COUNT (8U)

#define	PWM_SOC_CMP_MAX_COUNT (24U)

#define	PWM_SOC_OUTPUT_TO_PWM_MAX_COUNT (8U)

#define	DMA_SOC_TRANSFER_WIDTH_MAX(x) (((x) == HPM_XDMA) ? DMA_TRANSFER_WIDTH_DOUBLE_WORD : DMA_TRANSFER_WIDTH_WORD)

#define	DMA_SOC_TRANSFER_PER_BURST_MAX(x) (((x) == HPM_XDMA) ? DMA_NUM_TRANSFER_PER_BURST_1024T : DMA_NUM_TRANSFER_PER_BURST_128T)

#define	DMA_SOC_CHANNEL_NUM (8U)

#define	DMA_SOC_MAX_COUNT (2U)

#define	DMA_SOC_CHN_TO_DMAMUX_CHN(x, n) (((x) == HPM_XDMA) ? (DMAMUX_MUXCFG_XDMA_MUX0 + n) : (DMAMUX_MUXCFG_HDMA_MUX0 + n))

#define	PDMA_SOC_PS_MAX_COUNT (2U)

#define	PDMA_SOC_SUPPORT_BS16 (1U)

#define	LCDC_SOC_MAX_LAYER_COUNT (8U)

#define	LCDC_SOC_MAX_CSC_LAYER_COUNT (2U)

#define	LCDC_SOC_LAYER_SUPPORTS_CSC(x) ((x) < 2)

#define	LCDC_SOC_LAYER_SUPPORTS_YUV(x) ((x) < 2)

#define	USB_SOC_MAX_COUNT (2U)

#define	USB_SOC_DCD_QTD_NEXT_INVALID (1U)

#define	USB_SOC_DCD_QHD_BUFFER_COUNT (5U)

#define	USB_SOC_DCD_MAX_ENDPOINT_COUNT (8U)

#define	USB_SOC_DCD_QTD_COUNT_EACH_ENDPOINT (8U)

#define	USB_SOC_DCD_MAX_QTD_COUNT (USB_SOC_DCD_MAX_ENDPOINT_COUNT * 2U * USB_SOC_DCD_QTD_COUNT_EACH_ENDPOINT)

#define	USB_SOS_DCD_MAX_QHD_COUNT (USB_SOC_DCD_MAX_ENDPOINT_COUNT * 2U)

#define	USB_SOC_DCD_DATA_RAM_ADDRESS_ALIGNMENT (2048U)

#define	USB_SOC_HCD_FRAMELIST_MAX_ELEMENTS (1024U)

#define	ENET_SOC_DESC_ADDR_ALIGNMENT (32U)

#define	ENET_SOC_BUFF_ADDR_ALIGNMENT (4U)

#define	ENET_SOC_ADDR_MAX_COUNT (5U)

#define	ENET_SOC_ALT_EHD_DES_MIN_LEN (4U)

#define	ENET_SOC_ALT_EHD_DES_MAX_LEN (8U)

#define	ENET_SOC_ALT_EHD_DES_LEN (8U)

#define	ENET_SOC_PPS_MAX_COUNT (4L)

#define	ENET_SOC_DMA_BUS_WIDTH_IN_BYTES (8U)

#define	ACMP_SOC_BANDGAP (1U)

#define	ADC_SOC_IP_VERSION (0U)

#define	ADC_SOC_SEQ_MAX_LEN (16U)

#define	ADC_SOC_MAX_TRIG_CH_LEN (4U)

#define	ADC_SOC_MAX_TRIG_CH_NUM (11U)

#define	ADC_SOC_DMA_ADDR_ALIGNMENT (4U)

#define	ADC_SOC_CONFIG_INTEN_CHAN_BIT_SIZE (8U)

#define	ADC_SOC_PREEMPT_ENABLE_CTRL_SUPPORT (0U)

#define	ADC_SOC_SEQ_MAX_DMA_BUFF_LEN_IN_4BYTES (4096U)

#define	ADC_SOC_PMT_MAX_DMA_BUFF_LEN_IN_4BYTES (48U)

#define	ADC_SOC_OTP_TSNS_REF25_MASK (0xffffUL)

#define	ADC_SOC_OTP_TSNS_REF25_SHIFT (21U)

#define	ADC_SOC_REF_TEMP (25U)

#define	ADC_SOC_REF_SLOPE (1.0f/6)

#define	ADC_SOC_TEMPSENS_REF25_VOL (3300U)

#define	ADC_SOC_VOUT25C_MAX_SAMPLE_VALUE (65535U)

#define	ADC12_SOC_CLOCK_CLK_DIV (2U)

#define	ADC12_SOC_CALIBRATION_WAITING_LOOP_CNT (10)

#define	ADC12_SOC_MAX_CH_NUM (17U)

#define	ADC12_SOC_MAX_SAMPLE_VALUE (4095U)

#define	ADC16_SOC_PARAMS_LEN (34U)

#define	ADC16_SOC_MAX_CH_NUM (7U)

#define	ADC16_SOC_TEMP_CH_NUM (14U)

#define	ADC16_SOC_TEMP_CH_EN (1U)

#define	ADC16_SOC_MAX_SAMPLE_VALUE (65535U)

#define	ADC16_SOC_MAX_CONV_CLK_NUM (21U)

#define	SYSCTL_SOC_CPU_GPR_COUNT (14U)

#define	SYSCTL_SOC_MONITOR_SLICE_COUNT (4U)

#define	PTPC_SOC_TIMER_MAX_COUNT (2U)

#define	CAN_SOC_MAX_COUNT (4U)

#define	CAN_SOC_CANFD_TDC_REQUIRE_STUFF_EXCEPTION_WORKAROUND (1) /* Refer to E00016 in HPM6700/6400 Errata */

#define	UART_SOC_FIFO_SIZE (16U)

#define	SPI_SOC_TRANSFER_COUNT_MAX (512U)

#define	SPI_SOC_FIFO_DEPTH (4U)

#define	SDXC_SOC_MAX_COUNT (2)

#define	ROMAPI_HAS_SW_SM3 (1)

#define	ROMAPI_HAS_SW_SM4 (1)

#define	OTP_SOC_MAC0_IDX (65U)

#define	OTP_SOC_MAC0_LEN (6U) /* in bytes */

#define	OTP_SOC_UUID_IDX (88U)

#define	OTP_SOC_UUID_LEN (16U) /* in bytes */

#define	PWM_SOC_HRPWM_SUPPORT (0U)

#define	PWM_SOC_SHADOW_TRIG_SUPPORT (0U)

#define	PWM_SOC_TIMER_RESET_SUPPORT (0U)

#define	IOC_SOC_PAD_CTRL_SETTING_WORKAROUND (1U) /* Refer to E00029 in HPM6700/HPM6400 Errata */

Macro Definition Documentation

◆ ACMP_SOC_BANDGAP

#define ACMP_SOC_BANDGAP (1U)

◆ ADC12_SOC_CALIBRATION_WAITING_LOOP_CNT

#define ADC12_SOC_CALIBRATION_WAITING_LOOP_CNT (10)

◆ ADC12_SOC_CLOCK_CLK_DIV

#define ADC12_SOC_CLOCK_CLK_DIV (2U)

◆ ADC12_SOC_MAX_CH_NUM

#define ADC12_SOC_MAX_CH_NUM (17U)

◆ ADC12_SOC_MAX_SAMPLE_VALUE

#define ADC12_SOC_MAX_SAMPLE_VALUE (4095U)

◆ ADC16_SOC_MAX_CH_NUM

#define ADC16_SOC_MAX_CH_NUM (7U)

◆ ADC16_SOC_MAX_CONV_CLK_NUM

#define ADC16_SOC_MAX_CONV_CLK_NUM (21U)

◆ ADC16_SOC_MAX_SAMPLE_VALUE

#define ADC16_SOC_MAX_SAMPLE_VALUE (65535U)

◆ ADC16_SOC_PARAMS_LEN

#define ADC16_SOC_PARAMS_LEN (34U)

◆ ADC16_SOC_TEMP_CH_EN

#define ADC16_SOC_TEMP_CH_EN (1U)

◆ ADC16_SOC_TEMP_CH_NUM

#define ADC16_SOC_TEMP_CH_NUM (14U)

◆ ADC_SOC_CONFIG_INTEN_CHAN_BIT_SIZE

#define ADC_SOC_CONFIG_INTEN_CHAN_BIT_SIZE (8U)

◆ ADC_SOC_DMA_ADDR_ALIGNMENT

#define ADC_SOC_DMA_ADDR_ALIGNMENT (4U)

◆ ADC_SOC_IP_VERSION

#define ADC_SOC_IP_VERSION (0U)

◆ ADC_SOC_MAX_TRIG_CH_LEN

#define ADC_SOC_MAX_TRIG_CH_LEN (4U)

◆ ADC_SOC_MAX_TRIG_CH_NUM

#define ADC_SOC_MAX_TRIG_CH_NUM (11U)

◆ ADC_SOC_OTP_TSNS_REF25_MASK

#define ADC_SOC_OTP_TSNS_REF25_MASK (0xffffUL)

◆ ADC_SOC_OTP_TSNS_REF25_SHIFT

#define ADC_SOC_OTP_TSNS_REF25_SHIFT (21U)

◆ ADC_SOC_PMT_MAX_DMA_BUFF_LEN_IN_4BYTES

#define ADC_SOC_PMT_MAX_DMA_BUFF_LEN_IN_4BYTES (48U)

◆ ADC_SOC_PREEMPT_ENABLE_CTRL_SUPPORT

#define ADC_SOC_PREEMPT_ENABLE_CTRL_SUPPORT (0U)

◆ ADC_SOC_REF_SLOPE

#define ADC_SOC_REF_SLOPE (1.0f/6)

◆ ADC_SOC_REF_TEMP

#define ADC_SOC_REF_TEMP (25U)

◆ ADC_SOC_SEQ_MAX_DMA_BUFF_LEN_IN_4BYTES

#define ADC_SOC_SEQ_MAX_DMA_BUFF_LEN_IN_4BYTES (4096U)

◆ ADC_SOC_SEQ_MAX_LEN

#define ADC_SOC_SEQ_MAX_LEN (16U)

◆ ADC_SOC_TEMPSENS_REF25_VOL

#define ADC_SOC_TEMPSENS_REF25_VOL (3300U)

◆ ADC_SOC_VOUT25C_MAX_SAMPLE_VALUE

#define ADC_SOC_VOUT25C_MAX_SAMPLE_VALUE (65535U)

◆ CAN_SOC_CANFD_TDC_REQUIRE_STUFF_EXCEPTION_WORKAROUND

#define CAN_SOC_CANFD_TDC_REQUIRE_STUFF_EXCEPTION_WORKAROUND (1) /* Refer to E00016 in HPM6700/6400 Errata */

◆ CAN_SOC_MAX_COUNT

#define CAN_SOC_MAX_COUNT (4U)

◆ DAO_I2S

#define DAO_I2S HPM_I2S1

◆ DAO_SOC_PDM_SAMPLE_RATE_RATIO

#define DAO_SOC_PDM_SAMPLE_RATE_RATIO (3U)

◆ DAO_SOC_SAMPLE_RATE_IN_HZ

#define DAO_SOC_SAMPLE_RATE_IN_HZ (48000U)

◆ DAO_SOC_VAD_SAMPLE_RATE_RATIO

#define DAO_SOC_VAD_SAMPLE_RATE_RATIO (3U)

◆ DMA_SOC_CHANNEL_NUM

#define DMA_SOC_CHANNEL_NUM (8U)

◆ DMA_SOC_CHN_TO_DMAMUX_CHN

#define DMA_SOC_CHN_TO_DMAMUX_CHN	(	x,
		n
	)	(((x) == HPM_XDMA) ? (DMAMUX_MUXCFG_XDMA_MUX0 + n) : (DMAMUX_MUXCFG_HDMA_MUX0 + n))

◆ DMA_SOC_MAX_COUNT

#define DMA_SOC_MAX_COUNT (2U)

◆ DMA_SOC_TRANSFER_PER_BURST_MAX

#define DMA_SOC_TRANSFER_PER_BURST_MAX ( x ) (((x) == HPM_XDMA) ? DMA_NUM_TRANSFER_PER_BURST_1024T : DMA_NUM_TRANSFER_PER_BURST_128T)

◆ DMA_SOC_TRANSFER_WIDTH_MAX

#define DMA_SOC_TRANSFER_WIDTH_MAX ( x ) (((x) == HPM_XDMA) ? DMA_TRANSFER_WIDTH_DOUBLE_WORD : DMA_TRANSFER_WIDTH_WORD)

◆ ENET_SOC_ADDR_MAX_COUNT

#define ENET_SOC_ADDR_MAX_COUNT (5U)

◆ ENET_SOC_ALT_EHD_DES_LEN

#define ENET_SOC_ALT_EHD_DES_LEN (8U)

◆ ENET_SOC_ALT_EHD_DES_MAX_LEN

#define ENET_SOC_ALT_EHD_DES_MAX_LEN (8U)

◆ ENET_SOC_ALT_EHD_DES_MIN_LEN

#define ENET_SOC_ALT_EHD_DES_MIN_LEN (4U)

◆ ENET_SOC_BUFF_ADDR_ALIGNMENT

#define ENET_SOC_BUFF_ADDR_ALIGNMENT (4U)

◆ ENET_SOC_DESC_ADDR_ALIGNMENT

#define ENET_SOC_DESC_ADDR_ALIGNMENT (32U)

◆ ENET_SOC_DMA_BUS_WIDTH_IN_BYTES

#define ENET_SOC_DMA_BUS_WIDTH_IN_BYTES (8U)

◆ ENET_SOC_PPS_MAX_COUNT

#define ENET_SOC_PPS_MAX_COUNT (4L)

◆ I2C_SOC_FIFO_SIZE

#define I2C_SOC_FIFO_SIZE (4U)

◆ I2C_SOC_TRANSFER_COUNT_MAX

#define I2C_SOC_TRANSFER_COUNT_MAX (256U)

◆ I2S_SOC_MAX_CHANNEL_NUM

#define I2S_SOC_MAX_CHANNEL_NUM (16U)

◆ I2S_SOC_MAX_TX_CHANNEL_NUM

#define I2S_SOC_MAX_TX_CHANNEL_NUM (8U)

◆ I2S_SOC_MAX_TX_FIFO_DEPTH

#define I2S_SOC_MAX_TX_FIFO_DEPTH (8U)

◆ IOC_SOC_PAD_CTRL_SETTING_WORKAROUND

#define IOC_SOC_PAD_CTRL_SETTING_WORKAROUND (1U) /* Refer to E00029 in HPM6700/HPM6400 Errata */

IOC Section

◆ LCDC_SOC_LAYER_SUPPORTS_CSC

#define LCDC_SOC_LAYER_SUPPORTS_CSC ( x ) ((x) < 2)

◆ LCDC_SOC_LAYER_SUPPORTS_YUV

#define LCDC_SOC_LAYER_SUPPORTS_YUV ( x ) ((x) < 2)

◆ LCDC_SOC_MAX_CSC_LAYER_COUNT

#define LCDC_SOC_MAX_CSC_LAYER_COUNT (2U)

◆ LCDC_SOC_MAX_LAYER_COUNT

#define LCDC_SOC_MAX_LAYER_COUNT (8U)

◆ OTP_SOC_MAC0_IDX

#define OTP_SOC_MAC0_IDX (65U)

◆ OTP_SOC_MAC0_LEN

#define OTP_SOC_MAC0_LEN (6U) /* in bytes */

◆ OTP_SOC_UUID_IDX

#define OTP_SOC_UUID_IDX (88U)

◆ OTP_SOC_UUID_LEN

#define OTP_SOC_UUID_LEN (16U) /* in bytes */

◆ PCFG_SOC_DCDC_MAX_VOLTAGE_IN_MV

#define PCFG_SOC_DCDC_MAX_VOLTAGE_IN_MV (1375U)

◆ PCFG_SOC_DCDC_MIN_VOLTAGE_IN_MV

#define PCFG_SOC_DCDC_MIN_VOLTAGE_IN_MV (600U)

◆ PCFG_SOC_LDO1P1_MAX_VOLTAGE_IN_MV

#define PCFG_SOC_LDO1P1_MAX_VOLTAGE_IN_MV (1320U)

◆ PCFG_SOC_LDO1P1_MIN_VOLTAGE_IN_MV

#define PCFG_SOC_LDO1P1_MIN_VOLTAGE_IN_MV (700U)

◆ PCFG_SOC_LDO2P5_MAX_VOLTAGE_IN_MV

#define PCFG_SOC_LDO2P5_MAX_VOLTAGE_IN_MV (2900U)

◆ PCFG_SOC_LDO2P5_MIN_VOLTAGE_IN_MV

#define PCFG_SOC_LDO2P5_MIN_VOLTAGE_IN_MV (2125)

◆ PDM_I2S

#define PDM_I2S HPM_I2S0

◆ PDM_SOC_SAMPLE_RATE_IN_HZ

#define PDM_SOC_SAMPLE_RATE_IN_HZ (16000U)

◆ PDMA_SOC_PS_MAX_COUNT

#define PDMA_SOC_PS_MAX_COUNT (2U)

◆ PDMA_SOC_SUPPORT_BS16

#define PDMA_SOC_SUPPORT_BS16 (1U)

◆ PLLCTL_SOC_PLL_HAS_DIV0

#define PLLCTL_SOC_PLL_HAS_DIV0 ( x ) ((((x) == 1) || ((x) == 2)) ? 1 : 0)

◆ PLLCTL_SOC_PLL_HAS_DIV1

#define PLLCTL_SOC_PLL_HAS_DIV1 ( x ) ((((x) == 1) || ((x) == 2)) ? 1 : 0)

◆ PLLCTL_SOC_PLL_MAX_COUNT

#define PLLCTL_SOC_PLL_MAX_COUNT (5U)

◆ PLLCTL_SOC_PLL_REFCLK_FREQ

#define PLLCTL_SOC_PLL_REFCLK_FREQ (24U * 1000000UL)

◆ PTPC_SOC_TIMER_MAX_COUNT

#define PTPC_SOC_TIMER_MAX_COUNT (2U)

◆ PWM_SOC_CMP_MAX_COUNT

#define PWM_SOC_CMP_MAX_COUNT (24U)

◆ PWM_SOC_HRPWM_SUPPORT

#define PWM_SOC_HRPWM_SUPPORT (0U)

PWM Section

◆ PWM_SOC_OUTPUT_TO_PWM_MAX_COUNT

#define PWM_SOC_OUTPUT_TO_PWM_MAX_COUNT (8U)

◆ PWM_SOC_PWM_MAX_COUNT

#define PWM_SOC_PWM_MAX_COUNT (8U)

◆ PWM_SOC_SHADOW_TRIG_SUPPORT

#define PWM_SOC_SHADOW_TRIG_SUPPORT (0U)

◆ PWM_SOC_TIMER_RESET_SUPPORT

#define PWM_SOC_TIMER_RESET_SUPPORT (0U)

◆ ROMAPI_HAS_SW_SM3

#define ROMAPI_HAS_SW_SM3 (1)

◆ ROMAPI_HAS_SW_SM4

#define ROMAPI_HAS_SW_SM4 (1)

◆ SDXC_SOC_MAX_COUNT

#define SDXC_SOC_MAX_COUNT (2)

◆ SPI_SOC_FIFO_DEPTH

#define SPI_SOC_FIFO_DEPTH (4U)

◆ SPI_SOC_TRANSFER_COUNT_MAX

#define SPI_SOC_TRANSFER_COUNT_MAX (512U)

◆ SYSCTL_SOC_CPU_GPR_COUNT

#define SYSCTL_SOC_CPU_GPR_COUNT (14U)

◆ SYSCTL_SOC_MONITOR_SLICE_COUNT

#define SYSCTL_SOC_MONITOR_SLICE_COUNT (4U)

◆ UART_SOC_FIFO_SIZE

#define UART_SOC_FIFO_SIZE (16U)

◆ USB_SOC_DCD_DATA_RAM_ADDRESS_ALIGNMENT

#define USB_SOC_DCD_DATA_RAM_ADDRESS_ALIGNMENT (2048U)

◆ USB_SOC_DCD_MAX_ENDPOINT_COUNT

#define USB_SOC_DCD_MAX_ENDPOINT_COUNT (8U)

◆ USB_SOC_DCD_MAX_QTD_COUNT

#define USB_SOC_DCD_MAX_QTD_COUNT (USB_SOC_DCD_MAX_ENDPOINT_COUNT * 2U * USB_SOC_DCD_QTD_COUNT_EACH_ENDPOINT)

◆ USB_SOC_DCD_QHD_BUFFER_COUNT

#define USB_SOC_DCD_QHD_BUFFER_COUNT (5U)

◆ USB_SOC_DCD_QTD_COUNT_EACH_ENDPOINT

#define USB_SOC_DCD_QTD_COUNT_EACH_ENDPOINT (8U)

◆ USB_SOC_DCD_QTD_NEXT_INVALID

#define USB_SOC_DCD_QTD_NEXT_INVALID (1U)

◆ USB_SOC_HCD_FRAMELIST_MAX_ELEMENTS

#define USB_SOC_HCD_FRAMELIST_MAX_ELEMENTS (1024U)

◆ USB_SOC_MAX_COUNT

#define USB_SOC_MAX_COUNT (2U)

◆ USB_SOS_DCD_MAX_QHD_COUNT

#define USB_SOS_DCD_MAX_QHD_COUNT (USB_SOC_DCD_MAX_ENDPOINT_COUNT * 2U)

◆ VAD_SOC_SAMPLE_RATE_IN_HZ

#define VAD_SOC_SAMPLE_RATE_IN_HZ (16000U)

Macros