HPM SDK
HPMicro Software Development Kit
Data Structures | Macros
hpm_pdma_regs.h File Reference

Go to the source code of this file.

Data Structures

struct  PDMA_Type
 

Macros

#define PDMA_CTRL_ARQOS_MASK   (0x780000UL)
 
#define PDMA_CTRL_ARQOS_SHIFT   (19U)
 
#define PDMA_CTRL_ARQOS_SET(x)   (((uint32_t)(x) << PDMA_CTRL_ARQOS_SHIFT) & PDMA_CTRL_ARQOS_MASK)
 
#define PDMA_CTRL_ARQOS_GET(x)   (((uint32_t)(x) & PDMA_CTRL_ARQOS_MASK) >> PDMA_CTRL_ARQOS_SHIFT)
 
#define PDMA_CTRL_AWQOS_MASK   (0x78000UL)
 
#define PDMA_CTRL_AWQOS_SHIFT   (15U)
 
#define PDMA_CTRL_AWQOS_SET(x)   (((uint32_t)(x) << PDMA_CTRL_AWQOS_SHIFT) & PDMA_CTRL_AWQOS_MASK)
 
#define PDMA_CTRL_AWQOS_GET(x)   (((uint32_t)(x) & PDMA_CTRL_AWQOS_MASK) >> PDMA_CTRL_AWQOS_SHIFT)
 
#define PDMA_CTRL_PACK_DIR_MASK   (0x6000U)
 
#define PDMA_CTRL_PACK_DIR_SHIFT   (13U)
 
#define PDMA_CTRL_PACK_DIR_SET(x)   (((uint32_t)(x) << PDMA_CTRL_PACK_DIR_SHIFT) & PDMA_CTRL_PACK_DIR_MASK)
 
#define PDMA_CTRL_PACK_DIR_GET(x)   (((uint32_t)(x) & PDMA_CTRL_PACK_DIR_MASK) >> PDMA_CTRL_PACK_DIR_SHIFT)
 
#define PDMA_CTRL_AXIERR_IRQ_EN_MASK   (0x1000U)
 
#define PDMA_CTRL_AXIERR_IRQ_EN_SHIFT   (12U)
 
#define PDMA_CTRL_AXIERR_IRQ_EN_SET(x)   (((uint32_t)(x) << PDMA_CTRL_AXIERR_IRQ_EN_SHIFT) & PDMA_CTRL_AXIERR_IRQ_EN_MASK)
 
#define PDMA_CTRL_AXIERR_IRQ_EN_GET(x)   (((uint32_t)(x) & PDMA_CTRL_AXIERR_IRQ_EN_MASK) >> PDMA_CTRL_AXIERR_IRQ_EN_SHIFT)
 
#define PDMA_CTRL_PDMA_DONE_IRQ_EN_MASK   (0x800U)
 
#define PDMA_CTRL_PDMA_DONE_IRQ_EN_SHIFT   (11U)
 
#define PDMA_CTRL_PDMA_DONE_IRQ_EN_SET(x)   (((uint32_t)(x) << PDMA_CTRL_PDMA_DONE_IRQ_EN_SHIFT) & PDMA_CTRL_PDMA_DONE_IRQ_EN_MASK)
 
#define PDMA_CTRL_PDMA_DONE_IRQ_EN_GET(x)   (((uint32_t)(x) & PDMA_CTRL_PDMA_DONE_IRQ_EN_MASK) >> PDMA_CTRL_PDMA_DONE_IRQ_EN_SHIFT)
 
#define PDMA_CTRL_CLKGATE_MASK   (0x200U)
 
#define PDMA_CTRL_CLKGATE_SHIFT   (9U)
 
#define PDMA_CTRL_CLKGATE_SET(x)   (((uint32_t)(x) << PDMA_CTRL_CLKGATE_SHIFT) & PDMA_CTRL_CLKGATE_MASK)
 
#define PDMA_CTRL_CLKGATE_GET(x)   (((uint32_t)(x) & PDMA_CTRL_CLKGATE_MASK) >> PDMA_CTRL_CLKGATE_SHIFT)
 
#define PDMA_CTRL_IRQ_EN_MASK   (0x40U)
 
#define PDMA_CTRL_IRQ_EN_SHIFT   (6U)
 
#define PDMA_CTRL_IRQ_EN_SET(x)   (((uint32_t)(x) << PDMA_CTRL_IRQ_EN_SHIFT) & PDMA_CTRL_IRQ_EN_MASK)
 
#define PDMA_CTRL_IRQ_EN_GET(x)   (((uint32_t)(x) & PDMA_CTRL_IRQ_EN_MASK) >> PDMA_CTRL_IRQ_EN_SHIFT)
 
#define PDMA_CTRL_BS16_MASK   (0x20U)
 
#define PDMA_CTRL_BS16_SHIFT   (5U)
 
#define PDMA_CTRL_BS16_SET(x)   (((uint32_t)(x) << PDMA_CTRL_BS16_SHIFT) & PDMA_CTRL_BS16_MASK)
 
#define PDMA_CTRL_BS16_GET(x)   (((uint32_t)(x) & PDMA_CTRL_BS16_MASK) >> PDMA_CTRL_BS16_SHIFT)
 
#define PDMA_CTRL_P1_EN_MASK   (0x10U)
 
#define PDMA_CTRL_P1_EN_SHIFT   (4U)
 
#define PDMA_CTRL_P1_EN_SET(x)   (((uint32_t)(x) << PDMA_CTRL_P1_EN_SHIFT) & PDMA_CTRL_P1_EN_MASK)
 
#define PDMA_CTRL_P1_EN_GET(x)   (((uint32_t)(x) & PDMA_CTRL_P1_EN_MASK) >> PDMA_CTRL_P1_EN_SHIFT)
 
#define PDMA_CTRL_P0_EN_MASK   (0x8U)
 
#define PDMA_CTRL_P0_EN_SHIFT   (3U)
 
#define PDMA_CTRL_P0_EN_SET(x)   (((uint32_t)(x) << PDMA_CTRL_P0_EN_SHIFT) & PDMA_CTRL_P0_EN_MASK)
 
#define PDMA_CTRL_P0_EN_GET(x)   (((uint32_t)(x) & PDMA_CTRL_P0_EN_MASK) >> PDMA_CTRL_P0_EN_SHIFT)
 
#define PDMA_CTRL_PDMA_SFTRST_MASK   (0x2U)
 
#define PDMA_CTRL_PDMA_SFTRST_SHIFT   (1U)
 
#define PDMA_CTRL_PDMA_SFTRST_SET(x)   (((uint32_t)(x) << PDMA_CTRL_PDMA_SFTRST_SHIFT) & PDMA_CTRL_PDMA_SFTRST_MASK)
 
#define PDMA_CTRL_PDMA_SFTRST_GET(x)   (((uint32_t)(x) & PDMA_CTRL_PDMA_SFTRST_MASK) >> PDMA_CTRL_PDMA_SFTRST_SHIFT)
 
#define PDMA_CTRL_PDMA_EN_MASK   (0x1U)
 
#define PDMA_CTRL_PDMA_EN_SHIFT   (0U)
 
#define PDMA_CTRL_PDMA_EN_SET(x)   (((uint32_t)(x) << PDMA_CTRL_PDMA_EN_SHIFT) & PDMA_CTRL_PDMA_EN_MASK)
 
#define PDMA_CTRL_PDMA_EN_GET(x)   (((uint32_t)(x) & PDMA_CTRL_PDMA_EN_MASK) >> PDMA_CTRL_PDMA_EN_SHIFT)
 
#define PDMA_STAT_BLOCKY_MASK   (0xFF000000UL)
 
#define PDMA_STAT_BLOCKY_SHIFT   (24U)
 
#define PDMA_STAT_BLOCKY_GET(x)   (((uint32_t)(x) & PDMA_STAT_BLOCKY_MASK) >> PDMA_STAT_BLOCKY_SHIFT)
 
#define PDMA_STAT_BLOCKX_MASK   (0xFF0000UL)
 
#define PDMA_STAT_BLOCKX_SHIFT   (16U)
 
#define PDMA_STAT_BLOCKX_GET(x)   (((uint32_t)(x) & PDMA_STAT_BLOCKX_MASK) >> PDMA_STAT_BLOCKX_SHIFT)
 
#define PDMA_STAT_PDMA_DONE_MASK   (0x200U)
 
#define PDMA_STAT_PDMA_DONE_SHIFT   (9U)
 
#define PDMA_STAT_PDMA_DONE_SET(x)   (((uint32_t)(x) << PDMA_STAT_PDMA_DONE_SHIFT) & PDMA_STAT_PDMA_DONE_MASK)
 
#define PDMA_STAT_PDMA_DONE_GET(x)   (((uint32_t)(x) & PDMA_STAT_PDMA_DONE_MASK) >> PDMA_STAT_PDMA_DONE_SHIFT)
 
#define PDMA_STAT_AXI_ERR_ID_MASK   (0x1E0U)
 
#define PDMA_STAT_AXI_ERR_ID_SHIFT   (5U)
 
#define PDMA_STAT_AXI_ERR_ID_GET(x)   (((uint32_t)(x) & PDMA_STAT_AXI_ERR_ID_MASK) >> PDMA_STAT_AXI_ERR_ID_SHIFT)
 
#define PDMA_STAT_AXI_0_WRITE_ERR_MASK   (0x10U)
 
#define PDMA_STAT_AXI_0_WRITE_ERR_SHIFT   (4U)
 
#define PDMA_STAT_AXI_0_WRITE_ERR_SET(x)   (((uint32_t)(x) << PDMA_STAT_AXI_0_WRITE_ERR_SHIFT) & PDMA_STAT_AXI_0_WRITE_ERR_MASK)
 
#define PDMA_STAT_AXI_0_WRITE_ERR_GET(x)   (((uint32_t)(x) & PDMA_STAT_AXI_0_WRITE_ERR_MASK) >> PDMA_STAT_AXI_0_WRITE_ERR_SHIFT)
 
#define PDMA_STAT_AXI_1_READ_ERR_MASK   (0x8U)
 
#define PDMA_STAT_AXI_1_READ_ERR_SHIFT   (3U)
 
#define PDMA_STAT_AXI_1_READ_ERR_SET(x)   (((uint32_t)(x) << PDMA_STAT_AXI_1_READ_ERR_SHIFT) & PDMA_STAT_AXI_1_READ_ERR_MASK)
 
#define PDMA_STAT_AXI_1_READ_ERR_GET(x)   (((uint32_t)(x) & PDMA_STAT_AXI_1_READ_ERR_MASK) >> PDMA_STAT_AXI_1_READ_ERR_SHIFT)
 
#define PDMA_STAT_AXI_0_READ_ERR_MASK   (0x4U)
 
#define PDMA_STAT_AXI_0_READ_ERR_SHIFT   (2U)
 
#define PDMA_STAT_AXI_0_READ_ERR_SET(x)   (((uint32_t)(x) << PDMA_STAT_AXI_0_READ_ERR_SHIFT) & PDMA_STAT_AXI_0_READ_ERR_MASK)
 
#define PDMA_STAT_AXI_0_READ_ERR_GET(x)   (((uint32_t)(x) & PDMA_STAT_AXI_0_READ_ERR_MASK) >> PDMA_STAT_AXI_0_READ_ERR_SHIFT)
 
#define PDMA_STAT_IRQ_MASK   (0x1U)
 
#define PDMA_STAT_IRQ_SHIFT   (0U)
 
#define PDMA_STAT_IRQ_GET(x)   (((uint32_t)(x) & PDMA_STAT_IRQ_MASK) >> PDMA_STAT_IRQ_SHIFT)
 
#define PDMA_OUT_CTRL_DSTALPHA_MASK   (0xFF000000UL)
 
#define PDMA_OUT_CTRL_DSTALPHA_SHIFT   (24U)
 
#define PDMA_OUT_CTRL_DSTALPHA_SET(x)   (((uint32_t)(x) << PDMA_OUT_CTRL_DSTALPHA_SHIFT) & PDMA_OUT_CTRL_DSTALPHA_MASK)
 
#define PDMA_OUT_CTRL_DSTALPHA_GET(x)   (((uint32_t)(x) & PDMA_OUT_CTRL_DSTALPHA_MASK) >> PDMA_OUT_CTRL_DSTALPHA_SHIFT)
 
#define PDMA_OUT_CTRL_SRCALPHA_MASK   (0xFF0000UL)
 
#define PDMA_OUT_CTRL_SRCALPHA_SHIFT   (16U)
 
#define PDMA_OUT_CTRL_SRCALPHA_SET(x)   (((uint32_t)(x) << PDMA_OUT_CTRL_SRCALPHA_SHIFT) & PDMA_OUT_CTRL_SRCALPHA_MASK)
 
#define PDMA_OUT_CTRL_SRCALPHA_GET(x)   (((uint32_t)(x) & PDMA_OUT_CTRL_SRCALPHA_MASK) >> PDMA_OUT_CTRL_SRCALPHA_SHIFT)
 
#define PDMA_OUT_CTRL_DSTALPHA_OP_MASK   (0xC000U)
 
#define PDMA_OUT_CTRL_DSTALPHA_OP_SHIFT   (14U)
 
#define PDMA_OUT_CTRL_DSTALPHA_OP_SET(x)   (((uint32_t)(x) << PDMA_OUT_CTRL_DSTALPHA_OP_SHIFT) & PDMA_OUT_CTRL_DSTALPHA_OP_MASK)
 
#define PDMA_OUT_CTRL_DSTALPHA_OP_GET(x)   (((uint32_t)(x) & PDMA_OUT_CTRL_DSTALPHA_OP_MASK) >> PDMA_OUT_CTRL_DSTALPHA_OP_SHIFT)
 
#define PDMA_OUT_CTRL_SRCALPHA_OP_MASK   (0x3000U)
 
#define PDMA_OUT_CTRL_SRCALPHA_OP_SHIFT   (12U)
 
#define PDMA_OUT_CTRL_SRCALPHA_OP_SET(x)   (((uint32_t)(x) << PDMA_OUT_CTRL_SRCALPHA_OP_SHIFT) & PDMA_OUT_CTRL_SRCALPHA_OP_MASK)
 
#define PDMA_OUT_CTRL_SRCALPHA_OP_GET(x)   (((uint32_t)(x) & PDMA_OUT_CTRL_SRCALPHA_OP_MASK) >> PDMA_OUT_CTRL_SRCALPHA_OP_SHIFT)
 
#define PDMA_OUT_CTRL_ABLEND_MODE_MASK   (0xF00U)
 
#define PDMA_OUT_CTRL_ABLEND_MODE_SHIFT   (8U)
 
#define PDMA_OUT_CTRL_ABLEND_MODE_SET(x)   (((uint32_t)(x) << PDMA_OUT_CTRL_ABLEND_MODE_SHIFT) & PDMA_OUT_CTRL_ABLEND_MODE_MASK)
 
#define PDMA_OUT_CTRL_ABLEND_MODE_GET(x)   (((uint32_t)(x) & PDMA_OUT_CTRL_ABLEND_MODE_MASK) >> PDMA_OUT_CTRL_ABLEND_MODE_SHIFT)
 
#define PDMA_OUT_CTRL_FORMAT_MASK   (0x3FU)
 
#define PDMA_OUT_CTRL_FORMAT_SHIFT   (0U)
 
#define PDMA_OUT_CTRL_FORMAT_SET(x)   (((uint32_t)(x) << PDMA_OUT_CTRL_FORMAT_SHIFT) & PDMA_OUT_CTRL_FORMAT_MASK)
 
#define PDMA_OUT_CTRL_FORMAT_GET(x)   (((uint32_t)(x) & PDMA_OUT_CTRL_FORMAT_MASK) >> PDMA_OUT_CTRL_FORMAT_SHIFT)
 
#define PDMA_OUT_BUF_ADDR_MASK   (0xFFFFFFFFUL)
 
#define PDMA_OUT_BUF_ADDR_SHIFT   (0U)
 
#define PDMA_OUT_BUF_ADDR_SET(x)   (((uint32_t)(x) << PDMA_OUT_BUF_ADDR_SHIFT) & PDMA_OUT_BUF_ADDR_MASK)
 
#define PDMA_OUT_BUF_ADDR_GET(x)   (((uint32_t)(x) & PDMA_OUT_BUF_ADDR_MASK) >> PDMA_OUT_BUF_ADDR_SHIFT)
 
#define PDMA_OUT_PITCH_BYTELEN_MASK   (0xFFFFU)
 
#define PDMA_OUT_PITCH_BYTELEN_SHIFT   (0U)
 
#define PDMA_OUT_PITCH_BYTELEN_SET(x)   (((uint32_t)(x) << PDMA_OUT_PITCH_BYTELEN_SHIFT) & PDMA_OUT_PITCH_BYTELEN_MASK)
 
#define PDMA_OUT_PITCH_BYTELEN_GET(x)   (((uint32_t)(x) & PDMA_OUT_PITCH_BYTELEN_MASK) >> PDMA_OUT_PITCH_BYTELEN_SHIFT)
 
#define PDMA_OUT_LRC_Y_MASK   (0x3FFF0000UL)
 
#define PDMA_OUT_LRC_Y_SHIFT   (16U)
 
#define PDMA_OUT_LRC_Y_SET(x)   (((uint32_t)(x) << PDMA_OUT_LRC_Y_SHIFT) & PDMA_OUT_LRC_Y_MASK)
 
#define PDMA_OUT_LRC_Y_GET(x)   (((uint32_t)(x) & PDMA_OUT_LRC_Y_MASK) >> PDMA_OUT_LRC_Y_SHIFT)
 
#define PDMA_OUT_LRC_X_MASK   (0x3FFFU)
 
#define PDMA_OUT_LRC_X_SHIFT   (0U)
 
#define PDMA_OUT_LRC_X_SET(x)   (((uint32_t)(x) << PDMA_OUT_LRC_X_SHIFT) & PDMA_OUT_LRC_X_MASK)
 
#define PDMA_OUT_LRC_X_GET(x)   (((uint32_t)(x) & PDMA_OUT_LRC_X_MASK) >> PDMA_OUT_LRC_X_SHIFT)
 
#define PDMA_OUT_PS_ULC_Y_MASK   (0x3FFF0000UL)
 
#define PDMA_OUT_PS_ULC_Y_SHIFT   (16U)
 
#define PDMA_OUT_PS_ULC_Y_SET(x)   (((uint32_t)(x) << PDMA_OUT_PS_ULC_Y_SHIFT) & PDMA_OUT_PS_ULC_Y_MASK)
 
#define PDMA_OUT_PS_ULC_Y_GET(x)   (((uint32_t)(x) & PDMA_OUT_PS_ULC_Y_MASK) >> PDMA_OUT_PS_ULC_Y_SHIFT)
 
#define PDMA_OUT_PS_ULC_X_MASK   (0x3FFFU)
 
#define PDMA_OUT_PS_ULC_X_SHIFT   (0U)
 
#define PDMA_OUT_PS_ULC_X_SET(x)   (((uint32_t)(x) << PDMA_OUT_PS_ULC_X_SHIFT) & PDMA_OUT_PS_ULC_X_MASK)
 
#define PDMA_OUT_PS_ULC_X_GET(x)   (((uint32_t)(x) & PDMA_OUT_PS_ULC_X_MASK) >> PDMA_OUT_PS_ULC_X_SHIFT)
 
#define PDMA_OUT_PS_LRC_Y_MASK   (0x3FFF0000UL)
 
#define PDMA_OUT_PS_LRC_Y_SHIFT   (16U)
 
#define PDMA_OUT_PS_LRC_Y_SET(x)   (((uint32_t)(x) << PDMA_OUT_PS_LRC_Y_SHIFT) & PDMA_OUT_PS_LRC_Y_MASK)
 
#define PDMA_OUT_PS_LRC_Y_GET(x)   (((uint32_t)(x) & PDMA_OUT_PS_LRC_Y_MASK) >> PDMA_OUT_PS_LRC_Y_SHIFT)
 
#define PDMA_OUT_PS_LRC_X_MASK   (0x3FFFU)
 
#define PDMA_OUT_PS_LRC_X_SHIFT   (0U)
 
#define PDMA_OUT_PS_LRC_X_SET(x)   (((uint32_t)(x) << PDMA_OUT_PS_LRC_X_SHIFT) & PDMA_OUT_PS_LRC_X_MASK)
 
#define PDMA_OUT_PS_LRC_X_GET(x)   (((uint32_t)(x) & PDMA_OUT_PS_LRC_X_MASK) >> PDMA_OUT_PS_LRC_X_SHIFT)
 
#define PDMA_PS_CTRL_INB13_SWAP_MASK   (0x100000UL)
 
#define PDMA_PS_CTRL_INB13_SWAP_SHIFT   (20U)
 
#define PDMA_PS_CTRL_INB13_SWAP_SET(x)   (((uint32_t)(x) << PDMA_PS_CTRL_INB13_SWAP_SHIFT) & PDMA_PS_CTRL_INB13_SWAP_MASK)
 
#define PDMA_PS_CTRL_INB13_SWAP_GET(x)   (((uint32_t)(x) & PDMA_PS_CTRL_INB13_SWAP_MASK) >> PDMA_PS_CTRL_INB13_SWAP_SHIFT)
 
#define PDMA_PS_CTRL_PACK_DIR_MASK   (0xC0000UL)
 
#define PDMA_PS_CTRL_PACK_DIR_SHIFT   (18U)
 
#define PDMA_PS_CTRL_PACK_DIR_SET(x)   (((uint32_t)(x) << PDMA_PS_CTRL_PACK_DIR_SHIFT) & PDMA_PS_CTRL_PACK_DIR_MASK)
 
#define PDMA_PS_CTRL_PACK_DIR_GET(x)   (((uint32_t)(x) & PDMA_PS_CTRL_PACK_DIR_MASK) >> PDMA_PS_CTRL_PACK_DIR_SHIFT)
 
#define PDMA_PS_CTRL_BKGCL4CLR_MASK   (0x20000UL)
 
#define PDMA_PS_CTRL_BKGCL4CLR_SHIFT   (17U)
 
#define PDMA_PS_CTRL_BKGCL4CLR_SET(x)   (((uint32_t)(x) << PDMA_PS_CTRL_BKGCL4CLR_SHIFT) & PDMA_PS_CTRL_BKGCL4CLR_MASK)
 
#define PDMA_PS_CTRL_BKGCL4CLR_GET(x)   (((uint32_t)(x) & PDMA_PS_CTRL_BKGCL4CLR_MASK) >> PDMA_PS_CTRL_BKGCL4CLR_SHIFT)
 
#define PDMA_PS_CTRL_YCBCR_MODE_MASK   (0x10000UL)
 
#define PDMA_PS_CTRL_YCBCR_MODE_SHIFT   (16U)
 
#define PDMA_PS_CTRL_YCBCR_MODE_SET(x)   (((uint32_t)(x) << PDMA_PS_CTRL_YCBCR_MODE_SHIFT) & PDMA_PS_CTRL_YCBCR_MODE_MASK)
 
#define PDMA_PS_CTRL_YCBCR_MODE_GET(x)   (((uint32_t)(x) & PDMA_PS_CTRL_YCBCR_MODE_MASK) >> PDMA_PS_CTRL_YCBCR_MODE_SHIFT)
 
#define PDMA_PS_CTRL_BYPASS_MASK   (0x8000U)
 
#define PDMA_PS_CTRL_BYPASS_SHIFT   (15U)
 
#define PDMA_PS_CTRL_BYPASS_SET(x)   (((uint32_t)(x) << PDMA_PS_CTRL_BYPASS_SHIFT) & PDMA_PS_CTRL_BYPASS_MASK)
 
#define PDMA_PS_CTRL_BYPASS_GET(x)   (((uint32_t)(x) & PDMA_PS_CTRL_BYPASS_MASK) >> PDMA_PS_CTRL_BYPASS_SHIFT)
 
#define PDMA_PS_CTRL_VFLIP_MASK   (0x4000U)
 
#define PDMA_PS_CTRL_VFLIP_SHIFT   (14U)
 
#define PDMA_PS_CTRL_VFLIP_SET(x)   (((uint32_t)(x) << PDMA_PS_CTRL_VFLIP_SHIFT) & PDMA_PS_CTRL_VFLIP_MASK)
 
#define PDMA_PS_CTRL_VFLIP_GET(x)   (((uint32_t)(x) & PDMA_PS_CTRL_VFLIP_MASK) >> PDMA_PS_CTRL_VFLIP_SHIFT)
 
#define PDMA_PS_CTRL_HFLIP_MASK   (0x2000U)
 
#define PDMA_PS_CTRL_HFLIP_SHIFT   (13U)
 
#define PDMA_PS_CTRL_HFLIP_SET(x)   (((uint32_t)(x) << PDMA_PS_CTRL_HFLIP_SHIFT) & PDMA_PS_CTRL_HFLIP_MASK)
 
#define PDMA_PS_CTRL_HFLIP_GET(x)   (((uint32_t)(x) & PDMA_PS_CTRL_HFLIP_MASK) >> PDMA_PS_CTRL_HFLIP_SHIFT)
 
#define PDMA_PS_CTRL_ROTATE_MASK   (0x1800U)
 
#define PDMA_PS_CTRL_ROTATE_SHIFT   (11U)
 
#define PDMA_PS_CTRL_ROTATE_SET(x)   (((uint32_t)(x) << PDMA_PS_CTRL_ROTATE_SHIFT) & PDMA_PS_CTRL_ROTATE_MASK)
 
#define PDMA_PS_CTRL_ROTATE_GET(x)   (((uint32_t)(x) & PDMA_PS_CTRL_ROTATE_MASK) >> PDMA_PS_CTRL_ROTATE_SHIFT)
 
#define PDMA_PS_CTRL_DECY_MASK   (0x600U)
 
#define PDMA_PS_CTRL_DECY_SHIFT   (9U)
 
#define PDMA_PS_CTRL_DECY_SET(x)   (((uint32_t)(x) << PDMA_PS_CTRL_DECY_SHIFT) & PDMA_PS_CTRL_DECY_MASK)
 
#define PDMA_PS_CTRL_DECY_GET(x)   (((uint32_t)(x) & PDMA_PS_CTRL_DECY_MASK) >> PDMA_PS_CTRL_DECY_SHIFT)
 
#define PDMA_PS_CTRL_DECX_MASK   (0x180U)
 
#define PDMA_PS_CTRL_DECX_SHIFT   (7U)
 
#define PDMA_PS_CTRL_DECX_SET(x)   (((uint32_t)(x) << PDMA_PS_CTRL_DECX_SHIFT) & PDMA_PS_CTRL_DECX_MASK)
 
#define PDMA_PS_CTRL_DECX_GET(x)   (((uint32_t)(x) & PDMA_PS_CTRL_DECX_MASK) >> PDMA_PS_CTRL_DECX_SHIFT)
 
#define PDMA_PS_CTRL_HW_BYTE_SWAP_MASK   (0x40U)
 
#define PDMA_PS_CTRL_HW_BYTE_SWAP_SHIFT   (6U)
 
#define PDMA_PS_CTRL_HW_BYTE_SWAP_SET(x)   (((uint32_t)(x) << PDMA_PS_CTRL_HW_BYTE_SWAP_SHIFT) & PDMA_PS_CTRL_HW_BYTE_SWAP_MASK)
 
#define PDMA_PS_CTRL_HW_BYTE_SWAP_GET(x)   (((uint32_t)(x) & PDMA_PS_CTRL_HW_BYTE_SWAP_MASK) >> PDMA_PS_CTRL_HW_BYTE_SWAP_SHIFT)
 
#define PDMA_PS_CTRL_FORMAT_MASK   (0x3FU)
 
#define PDMA_PS_CTRL_FORMAT_SHIFT   (0U)
 
#define PDMA_PS_CTRL_FORMAT_SET(x)   (((uint32_t)(x) << PDMA_PS_CTRL_FORMAT_SHIFT) & PDMA_PS_CTRL_FORMAT_MASK)
 
#define PDMA_PS_CTRL_FORMAT_GET(x)   (((uint32_t)(x) & PDMA_PS_CTRL_FORMAT_MASK) >> PDMA_PS_CTRL_FORMAT_SHIFT)
 
#define PDMA_PS_BUF_ADDR_MASK   (0xFFFFFFFFUL)
 
#define PDMA_PS_BUF_ADDR_SHIFT   (0U)
 
#define PDMA_PS_BUF_ADDR_SET(x)   (((uint32_t)(x) << PDMA_PS_BUF_ADDR_SHIFT) & PDMA_PS_BUF_ADDR_MASK)
 
#define PDMA_PS_BUF_ADDR_GET(x)   (((uint32_t)(x) & PDMA_PS_BUF_ADDR_MASK) >> PDMA_PS_BUF_ADDR_SHIFT)
 
#define PDMA_PS_PITCH_BYTELEN_MASK   (0xFFFFU)
 
#define PDMA_PS_PITCH_BYTELEN_SHIFT   (0U)
 
#define PDMA_PS_PITCH_BYTELEN_SET(x)   (((uint32_t)(x) << PDMA_PS_PITCH_BYTELEN_SHIFT) & PDMA_PS_PITCH_BYTELEN_MASK)
 
#define PDMA_PS_PITCH_BYTELEN_GET(x)   (((uint32_t)(x) & PDMA_PS_PITCH_BYTELEN_MASK) >> PDMA_PS_PITCH_BYTELEN_SHIFT)
 
#define PDMA_PS_BKGD_COLOR_MASK   (0xFFFFFFFFUL)
 
#define PDMA_PS_BKGD_COLOR_SHIFT   (0U)
 
#define PDMA_PS_BKGD_COLOR_SET(x)   (((uint32_t)(x) << PDMA_PS_BKGD_COLOR_SHIFT) & PDMA_PS_BKGD_COLOR_MASK)
 
#define PDMA_PS_BKGD_COLOR_GET(x)   (((uint32_t)(x) & PDMA_PS_BKGD_COLOR_MASK) >> PDMA_PS_BKGD_COLOR_SHIFT)
 
#define PDMA_PS_SCALE_Y_MASK   (0x7FFF0000UL)
 
#define PDMA_PS_SCALE_Y_SHIFT   (16U)
 
#define PDMA_PS_SCALE_Y_SET(x)   (((uint32_t)(x) << PDMA_PS_SCALE_Y_SHIFT) & PDMA_PS_SCALE_Y_MASK)
 
#define PDMA_PS_SCALE_Y_GET(x)   (((uint32_t)(x) & PDMA_PS_SCALE_Y_MASK) >> PDMA_PS_SCALE_Y_SHIFT)
 
#define PDMA_PS_SCALE_X_MASK   (0x7FFFU)
 
#define PDMA_PS_SCALE_X_SHIFT   (0U)
 
#define PDMA_PS_SCALE_X_SET(x)   (((uint32_t)(x) << PDMA_PS_SCALE_X_SHIFT) & PDMA_PS_SCALE_X_MASK)
 
#define PDMA_PS_SCALE_X_GET(x)   (((uint32_t)(x) & PDMA_PS_SCALE_X_MASK) >> PDMA_PS_SCALE_X_SHIFT)
 
#define PDMA_PS_OFFSET_Y_MASK   (0xFFF0000UL)
 
#define PDMA_PS_OFFSET_Y_SHIFT   (16U)
 
#define PDMA_PS_OFFSET_Y_SET(x)   (((uint32_t)(x) << PDMA_PS_OFFSET_Y_SHIFT) & PDMA_PS_OFFSET_Y_MASK)
 
#define PDMA_PS_OFFSET_Y_GET(x)   (((uint32_t)(x) & PDMA_PS_OFFSET_Y_MASK) >> PDMA_PS_OFFSET_Y_SHIFT)
 
#define PDMA_PS_OFFSET_X_MASK   (0xFFFU)
 
#define PDMA_PS_OFFSET_X_SHIFT   (0U)
 
#define PDMA_PS_OFFSET_X_SET(x)   (((uint32_t)(x) << PDMA_PS_OFFSET_X_SHIFT) & PDMA_PS_OFFSET_X_MASK)
 
#define PDMA_PS_OFFSET_X_GET(x)   (((uint32_t)(x) & PDMA_PS_OFFSET_X_MASK) >> PDMA_PS_OFFSET_X_SHIFT)
 
#define PDMA_PS_CLRKEY_LOW_LIMIT_MASK   (0xFFFFFFUL)
 
#define PDMA_PS_CLRKEY_LOW_LIMIT_SHIFT   (0U)
 
#define PDMA_PS_CLRKEY_LOW_LIMIT_SET(x)   (((uint32_t)(x) << PDMA_PS_CLRKEY_LOW_LIMIT_SHIFT) & PDMA_PS_CLRKEY_LOW_LIMIT_MASK)
 
#define PDMA_PS_CLRKEY_LOW_LIMIT_GET(x)   (((uint32_t)(x) & PDMA_PS_CLRKEY_LOW_LIMIT_MASK) >> PDMA_PS_CLRKEY_LOW_LIMIT_SHIFT)
 
#define PDMA_PS_CLRKEY_HIGH_LIMIT_MASK   (0xFFFFFFUL)
 
#define PDMA_PS_CLRKEY_HIGH_LIMIT_SHIFT   (0U)
 
#define PDMA_PS_CLRKEY_HIGH_LIMIT_SET(x)   (((uint32_t)(x) << PDMA_PS_CLRKEY_HIGH_LIMIT_SHIFT) & PDMA_PS_CLRKEY_HIGH_LIMIT_MASK)
 
#define PDMA_PS_CLRKEY_HIGH_LIMIT_GET(x)   (((uint32_t)(x) & PDMA_PS_CLRKEY_HIGH_LIMIT_MASK) >> PDMA_PS_CLRKEY_HIGH_LIMIT_SHIFT)
 
#define PDMA_PS_ORG_HIGHT_MASK   (0x3FFF0000UL)
 
#define PDMA_PS_ORG_HIGHT_SHIFT   (16U)
 
#define PDMA_PS_ORG_HIGHT_SET(x)   (((uint32_t)(x) << PDMA_PS_ORG_HIGHT_SHIFT) & PDMA_PS_ORG_HIGHT_MASK)
 
#define PDMA_PS_ORG_HIGHT_GET(x)   (((uint32_t)(x) & PDMA_PS_ORG_HIGHT_MASK) >> PDMA_PS_ORG_HIGHT_SHIFT)
 
#define PDMA_PS_ORG_WIDTH_MASK   (0x3FFFU)
 
#define PDMA_PS_ORG_WIDTH_SHIFT   (0U)
 
#define PDMA_PS_ORG_WIDTH_SET(x)   (((uint32_t)(x) << PDMA_PS_ORG_WIDTH_SHIFT) & PDMA_PS_ORG_WIDTH_MASK)
 
#define PDMA_PS_ORG_WIDTH_GET(x)   (((uint32_t)(x) & PDMA_PS_ORG_WIDTH_MASK) >> PDMA_PS_ORG_WIDTH_SHIFT)
 
#define PDMA_YUV2RGB_COEF0_C0_MASK   (0x1FFC0000UL)
 
#define PDMA_YUV2RGB_COEF0_C0_SHIFT   (18U)
 
#define PDMA_YUV2RGB_COEF0_C0_SET(x)   (((uint32_t)(x) << PDMA_YUV2RGB_COEF0_C0_SHIFT) & PDMA_YUV2RGB_COEF0_C0_MASK)
 
#define PDMA_YUV2RGB_COEF0_C0_GET(x)   (((uint32_t)(x) & PDMA_YUV2RGB_COEF0_C0_MASK) >> PDMA_YUV2RGB_COEF0_C0_SHIFT)
 
#define PDMA_YUV2RGB_COEF0_UV_OFFSET_MASK   (0x3FE00UL)
 
#define PDMA_YUV2RGB_COEF0_UV_OFFSET_SHIFT   (9U)
 
#define PDMA_YUV2RGB_COEF0_UV_OFFSET_SET(x)   (((uint32_t)(x) << PDMA_YUV2RGB_COEF0_UV_OFFSET_SHIFT) & PDMA_YUV2RGB_COEF0_UV_OFFSET_MASK)
 
#define PDMA_YUV2RGB_COEF0_UV_OFFSET_GET(x)   (((uint32_t)(x) & PDMA_YUV2RGB_COEF0_UV_OFFSET_MASK) >> PDMA_YUV2RGB_COEF0_UV_OFFSET_SHIFT)
 
#define PDMA_YUV2RGB_COEF0_Y_OFFSET_MASK   (0x1FFU)
 
#define PDMA_YUV2RGB_COEF0_Y_OFFSET_SHIFT   (0U)
 
#define PDMA_YUV2RGB_COEF0_Y_OFFSET_SET(x)   (((uint32_t)(x) << PDMA_YUV2RGB_COEF0_Y_OFFSET_SHIFT) & PDMA_YUV2RGB_COEF0_Y_OFFSET_MASK)
 
#define PDMA_YUV2RGB_COEF0_Y_OFFSET_GET(x)   (((uint32_t)(x) & PDMA_YUV2RGB_COEF0_Y_OFFSET_MASK) >> PDMA_YUV2RGB_COEF0_Y_OFFSET_SHIFT)
 
#define PDMA_YUV2RGB_COEF1_C1_MASK   (0x7FF0000UL)
 
#define PDMA_YUV2RGB_COEF1_C1_SHIFT   (16U)
 
#define PDMA_YUV2RGB_COEF1_C1_SET(x)   (((uint32_t)(x) << PDMA_YUV2RGB_COEF1_C1_SHIFT) & PDMA_YUV2RGB_COEF1_C1_MASK)
 
#define PDMA_YUV2RGB_COEF1_C1_GET(x)   (((uint32_t)(x) & PDMA_YUV2RGB_COEF1_C1_MASK) >> PDMA_YUV2RGB_COEF1_C1_SHIFT)
 
#define PDMA_YUV2RGB_COEF1_C4_MASK   (0x7FFU)
 
#define PDMA_YUV2RGB_COEF1_C4_SHIFT   (0U)
 
#define PDMA_YUV2RGB_COEF1_C4_SET(x)   (((uint32_t)(x) << PDMA_YUV2RGB_COEF1_C4_SHIFT) & PDMA_YUV2RGB_COEF1_C4_MASK)
 
#define PDMA_YUV2RGB_COEF1_C4_GET(x)   (((uint32_t)(x) & PDMA_YUV2RGB_COEF1_C4_MASK) >> PDMA_YUV2RGB_COEF1_C4_SHIFT)
 
#define PDMA_YUV2RGB_COEF2_C2_MASK   (0x7FF0000UL)
 
#define PDMA_YUV2RGB_COEF2_C2_SHIFT   (16U)
 
#define PDMA_YUV2RGB_COEF2_C2_SET(x)   (((uint32_t)(x) << PDMA_YUV2RGB_COEF2_C2_SHIFT) & PDMA_YUV2RGB_COEF2_C2_MASK)
 
#define PDMA_YUV2RGB_COEF2_C2_GET(x)   (((uint32_t)(x) & PDMA_YUV2RGB_COEF2_C2_MASK) >> PDMA_YUV2RGB_COEF2_C2_SHIFT)
 
#define PDMA_YUV2RGB_COEF2_C3_MASK   (0x7FFU)
 
#define PDMA_YUV2RGB_COEF2_C3_SHIFT   (0U)
 
#define PDMA_YUV2RGB_COEF2_C3_SET(x)   (((uint32_t)(x) << PDMA_YUV2RGB_COEF2_C3_SHIFT) & PDMA_YUV2RGB_COEF2_C3_MASK)
 
#define PDMA_YUV2RGB_COEF2_C3_GET(x)   (((uint32_t)(x) & PDMA_YUV2RGB_COEF2_C3_MASK) >> PDMA_YUV2RGB_COEF2_C3_SHIFT)
 
#define PDMA_RGB2YUV_COEF0_YCBCR_MODE_MASK   (0x80000000UL)
 
#define PDMA_RGB2YUV_COEF0_YCBCR_MODE_SHIFT   (31U)
 
#define PDMA_RGB2YUV_COEF0_YCBCR_MODE_SET(x)   (((uint32_t)(x) << PDMA_RGB2YUV_COEF0_YCBCR_MODE_SHIFT) & PDMA_RGB2YUV_COEF0_YCBCR_MODE_MASK)
 
#define PDMA_RGB2YUV_COEF0_YCBCR_MODE_GET(x)   (((uint32_t)(x) & PDMA_RGB2YUV_COEF0_YCBCR_MODE_MASK) >> PDMA_RGB2YUV_COEF0_YCBCR_MODE_SHIFT)
 
#define PDMA_RGB2YUV_COEF0_ENABLE_MASK   (0x40000000UL)
 
#define PDMA_RGB2YUV_COEF0_ENABLE_SHIFT   (30U)
 
#define PDMA_RGB2YUV_COEF0_ENABLE_SET(x)   (((uint32_t)(x) << PDMA_RGB2YUV_COEF0_ENABLE_SHIFT) & PDMA_RGB2YUV_COEF0_ENABLE_MASK)
 
#define PDMA_RGB2YUV_COEF0_ENABLE_GET(x)   (((uint32_t)(x) & PDMA_RGB2YUV_COEF0_ENABLE_MASK) >> PDMA_RGB2YUV_COEF0_ENABLE_SHIFT)
 
#define PDMA_RGB2YUV_COEF0_C0_MASK   (0x1FFC0000UL)
 
#define PDMA_RGB2YUV_COEF0_C0_SHIFT   (18U)
 
#define PDMA_RGB2YUV_COEF0_C0_SET(x)   (((uint32_t)(x) << PDMA_RGB2YUV_COEF0_C0_SHIFT) & PDMA_RGB2YUV_COEF0_C0_MASK)
 
#define PDMA_RGB2YUV_COEF0_C0_GET(x)   (((uint32_t)(x) & PDMA_RGB2YUV_COEF0_C0_MASK) >> PDMA_RGB2YUV_COEF0_C0_SHIFT)
 
#define PDMA_RGB2YUV_COEF0_UV_OFFSET_MASK   (0x3FE00UL)
 
#define PDMA_RGB2YUV_COEF0_UV_OFFSET_SHIFT   (9U)
 
#define PDMA_RGB2YUV_COEF0_UV_OFFSET_SET(x)   (((uint32_t)(x) << PDMA_RGB2YUV_COEF0_UV_OFFSET_SHIFT) & PDMA_RGB2YUV_COEF0_UV_OFFSET_MASK)
 
#define PDMA_RGB2YUV_COEF0_UV_OFFSET_GET(x)   (((uint32_t)(x) & PDMA_RGB2YUV_COEF0_UV_OFFSET_MASK) >> PDMA_RGB2YUV_COEF0_UV_OFFSET_SHIFT)
 
#define PDMA_RGB2YUV_COEF0_Y_OFFSET_MASK   (0x1FFU)
 
#define PDMA_RGB2YUV_COEF0_Y_OFFSET_SHIFT   (0U)
 
#define PDMA_RGB2YUV_COEF0_Y_OFFSET_SET(x)   (((uint32_t)(x) << PDMA_RGB2YUV_COEF0_Y_OFFSET_SHIFT) & PDMA_RGB2YUV_COEF0_Y_OFFSET_MASK)
 
#define PDMA_RGB2YUV_COEF0_Y_OFFSET_GET(x)   (((uint32_t)(x) & PDMA_RGB2YUV_COEF0_Y_OFFSET_MASK) >> PDMA_RGB2YUV_COEF0_Y_OFFSET_SHIFT)
 
#define PDMA_RGB2YUV_COEF1_C1_MASK   (0x7FF0000UL)
 
#define PDMA_RGB2YUV_COEF1_C1_SHIFT   (16U)
 
#define PDMA_RGB2YUV_COEF1_C1_SET(x)   (((uint32_t)(x) << PDMA_RGB2YUV_COEF1_C1_SHIFT) & PDMA_RGB2YUV_COEF1_C1_MASK)
 
#define PDMA_RGB2YUV_COEF1_C1_GET(x)   (((uint32_t)(x) & PDMA_RGB2YUV_COEF1_C1_MASK) >> PDMA_RGB2YUV_COEF1_C1_SHIFT)
 
#define PDMA_RGB2YUV_COEF1_C4_MASK   (0x7FFU)
 
#define PDMA_RGB2YUV_COEF1_C4_SHIFT   (0U)
 
#define PDMA_RGB2YUV_COEF1_C4_SET(x)   (((uint32_t)(x) << PDMA_RGB2YUV_COEF1_C4_SHIFT) & PDMA_RGB2YUV_COEF1_C4_MASK)
 
#define PDMA_RGB2YUV_COEF1_C4_GET(x)   (((uint32_t)(x) & PDMA_RGB2YUV_COEF1_C4_MASK) >> PDMA_RGB2YUV_COEF1_C4_SHIFT)
 
#define PDMA_RGB2YUV_COEF2_C2_MASK   (0x7FF0000UL)
 
#define PDMA_RGB2YUV_COEF2_C2_SHIFT   (16U)
 
#define PDMA_RGB2YUV_COEF2_C2_SET(x)   (((uint32_t)(x) << PDMA_RGB2YUV_COEF2_C2_SHIFT) & PDMA_RGB2YUV_COEF2_C2_MASK)
 
#define PDMA_RGB2YUV_COEF2_C2_GET(x)   (((uint32_t)(x) & PDMA_RGB2YUV_COEF2_C2_MASK) >> PDMA_RGB2YUV_COEF2_C2_SHIFT)
 
#define PDMA_RGB2YUV_COEF2_C3_MASK   (0x7FFU)
 
#define PDMA_RGB2YUV_COEF2_C3_SHIFT   (0U)
 
#define PDMA_RGB2YUV_COEF2_C3_SET(x)   (((uint32_t)(x) << PDMA_RGB2YUV_COEF2_C3_SHIFT) & PDMA_RGB2YUV_COEF2_C3_MASK)
 
#define PDMA_RGB2YUV_COEF2_C3_GET(x)   (((uint32_t)(x) & PDMA_RGB2YUV_COEF2_C3_MASK) >> PDMA_RGB2YUV_COEF2_C3_SHIFT)
 
#define PDMA_RGB2YUV_COEF3_C6_MASK   (0x7FF0000UL)
 
#define PDMA_RGB2YUV_COEF3_C6_SHIFT   (16U)
 
#define PDMA_RGB2YUV_COEF3_C6_SET(x)   (((uint32_t)(x) << PDMA_RGB2YUV_COEF3_C6_SHIFT) & PDMA_RGB2YUV_COEF3_C6_MASK)
 
#define PDMA_RGB2YUV_COEF3_C6_GET(x)   (((uint32_t)(x) & PDMA_RGB2YUV_COEF3_C6_MASK) >> PDMA_RGB2YUV_COEF3_C6_SHIFT)
 
#define PDMA_RGB2YUV_COEF3_C5_MASK   (0x7FFU)
 
#define PDMA_RGB2YUV_COEF3_C5_SHIFT   (0U)
 
#define PDMA_RGB2YUV_COEF3_C5_SET(x)   (((uint32_t)(x) << PDMA_RGB2YUV_COEF3_C5_SHIFT) & PDMA_RGB2YUV_COEF3_C5_MASK)
 
#define PDMA_RGB2YUV_COEF3_C5_GET(x)   (((uint32_t)(x) & PDMA_RGB2YUV_COEF3_C5_MASK) >> PDMA_RGB2YUV_COEF3_C5_SHIFT)
 
#define PDMA_RGB2YUV_COEF4_C8_MASK   (0x7FF0000UL)
 
#define PDMA_RGB2YUV_COEF4_C8_SHIFT   (16U)
 
#define PDMA_RGB2YUV_COEF4_C8_SET(x)   (((uint32_t)(x) << PDMA_RGB2YUV_COEF4_C8_SHIFT) & PDMA_RGB2YUV_COEF4_C8_MASK)
 
#define PDMA_RGB2YUV_COEF4_C8_GET(x)   (((uint32_t)(x) & PDMA_RGB2YUV_COEF4_C8_MASK) >> PDMA_RGB2YUV_COEF4_C8_SHIFT)
 
#define PDMA_RGB2YUV_COEF4_C7_MASK   (0x7FFU)
 
#define PDMA_RGB2YUV_COEF4_C7_SHIFT   (0U)
 
#define PDMA_RGB2YUV_COEF4_C7_SET(x)   (((uint32_t)(x) << PDMA_RGB2YUV_COEF4_C7_SHIFT) & PDMA_RGB2YUV_COEF4_C7_MASK)
 
#define PDMA_RGB2YUV_COEF4_C7_GET(x)   (((uint32_t)(x) & PDMA_RGB2YUV_COEF4_C7_MASK) >> PDMA_RGB2YUV_COEF4_C7_SHIFT)
 
#define PDMA_OUT_PS_0   (0UL)
 
#define PDMA_OUT_PS_1   (1UL)
 
#define PDMA_PS_0   (0UL)
 
#define PDMA_PS_1   (1UL)
 

Macro Definition Documentation

◆ PDMA_CTRL_ARQOS_GET

#define PDMA_CTRL_ARQOS_GET (   x)    (((uint32_t)(x) & PDMA_CTRL_ARQOS_MASK) >> PDMA_CTRL_ARQOS_SHIFT)

◆ PDMA_CTRL_ARQOS_MASK

#define PDMA_CTRL_ARQOS_MASK   (0x780000UL)

◆ PDMA_CTRL_ARQOS_SET

#define PDMA_CTRL_ARQOS_SET (   x)    (((uint32_t)(x) << PDMA_CTRL_ARQOS_SHIFT) & PDMA_CTRL_ARQOS_MASK)

◆ PDMA_CTRL_ARQOS_SHIFT

#define PDMA_CTRL_ARQOS_SHIFT   (19U)

◆ PDMA_CTRL_AWQOS_GET

#define PDMA_CTRL_AWQOS_GET (   x)    (((uint32_t)(x) & PDMA_CTRL_AWQOS_MASK) >> PDMA_CTRL_AWQOS_SHIFT)

◆ PDMA_CTRL_AWQOS_MASK

#define PDMA_CTRL_AWQOS_MASK   (0x78000UL)

◆ PDMA_CTRL_AWQOS_SET

#define PDMA_CTRL_AWQOS_SET (   x)    (((uint32_t)(x) << PDMA_CTRL_AWQOS_SHIFT) & PDMA_CTRL_AWQOS_MASK)

◆ PDMA_CTRL_AWQOS_SHIFT

#define PDMA_CTRL_AWQOS_SHIFT   (15U)

◆ PDMA_CTRL_AXIERR_IRQ_EN_GET

#define PDMA_CTRL_AXIERR_IRQ_EN_GET (   x)    (((uint32_t)(x) & PDMA_CTRL_AXIERR_IRQ_EN_MASK) >> PDMA_CTRL_AXIERR_IRQ_EN_SHIFT)

◆ PDMA_CTRL_AXIERR_IRQ_EN_MASK

#define PDMA_CTRL_AXIERR_IRQ_EN_MASK   (0x1000U)

◆ PDMA_CTRL_AXIERR_IRQ_EN_SET

#define PDMA_CTRL_AXIERR_IRQ_EN_SET (   x)    (((uint32_t)(x) << PDMA_CTRL_AXIERR_IRQ_EN_SHIFT) & PDMA_CTRL_AXIERR_IRQ_EN_MASK)

◆ PDMA_CTRL_AXIERR_IRQ_EN_SHIFT

#define PDMA_CTRL_AXIERR_IRQ_EN_SHIFT   (12U)

◆ PDMA_CTRL_BS16_GET

#define PDMA_CTRL_BS16_GET (   x)    (((uint32_t)(x) & PDMA_CTRL_BS16_MASK) >> PDMA_CTRL_BS16_SHIFT)

◆ PDMA_CTRL_BS16_MASK

#define PDMA_CTRL_BS16_MASK   (0x20U)

◆ PDMA_CTRL_BS16_SET

#define PDMA_CTRL_BS16_SET (   x)    (((uint32_t)(x) << PDMA_CTRL_BS16_SHIFT) & PDMA_CTRL_BS16_MASK)

◆ PDMA_CTRL_BS16_SHIFT

#define PDMA_CTRL_BS16_SHIFT   (5U)

◆ PDMA_CTRL_CLKGATE_GET

#define PDMA_CTRL_CLKGATE_GET (   x)    (((uint32_t)(x) & PDMA_CTRL_CLKGATE_MASK) >> PDMA_CTRL_CLKGATE_SHIFT)

◆ PDMA_CTRL_CLKGATE_MASK

#define PDMA_CTRL_CLKGATE_MASK   (0x200U)

◆ PDMA_CTRL_CLKGATE_SET

#define PDMA_CTRL_CLKGATE_SET (   x)    (((uint32_t)(x) << PDMA_CTRL_CLKGATE_SHIFT) & PDMA_CTRL_CLKGATE_MASK)

◆ PDMA_CTRL_CLKGATE_SHIFT

#define PDMA_CTRL_CLKGATE_SHIFT   (9U)

◆ PDMA_CTRL_IRQ_EN_GET

#define PDMA_CTRL_IRQ_EN_GET (   x)    (((uint32_t)(x) & PDMA_CTRL_IRQ_EN_MASK) >> PDMA_CTRL_IRQ_EN_SHIFT)

◆ PDMA_CTRL_IRQ_EN_MASK

#define PDMA_CTRL_IRQ_EN_MASK   (0x40U)

◆ PDMA_CTRL_IRQ_EN_SET

#define PDMA_CTRL_IRQ_EN_SET (   x)    (((uint32_t)(x) << PDMA_CTRL_IRQ_EN_SHIFT) & PDMA_CTRL_IRQ_EN_MASK)

◆ PDMA_CTRL_IRQ_EN_SHIFT

#define PDMA_CTRL_IRQ_EN_SHIFT   (6U)

◆ PDMA_CTRL_P0_EN_GET

#define PDMA_CTRL_P0_EN_GET (   x)    (((uint32_t)(x) & PDMA_CTRL_P0_EN_MASK) >> PDMA_CTRL_P0_EN_SHIFT)

◆ PDMA_CTRL_P0_EN_MASK

#define PDMA_CTRL_P0_EN_MASK   (0x8U)

◆ PDMA_CTRL_P0_EN_SET

#define PDMA_CTRL_P0_EN_SET (   x)    (((uint32_t)(x) << PDMA_CTRL_P0_EN_SHIFT) & PDMA_CTRL_P0_EN_MASK)

◆ PDMA_CTRL_P0_EN_SHIFT

#define PDMA_CTRL_P0_EN_SHIFT   (3U)

◆ PDMA_CTRL_P1_EN_GET

#define PDMA_CTRL_P1_EN_GET (   x)    (((uint32_t)(x) & PDMA_CTRL_P1_EN_MASK) >> PDMA_CTRL_P1_EN_SHIFT)

◆ PDMA_CTRL_P1_EN_MASK

#define PDMA_CTRL_P1_EN_MASK   (0x10U)

◆ PDMA_CTRL_P1_EN_SET

#define PDMA_CTRL_P1_EN_SET (   x)    (((uint32_t)(x) << PDMA_CTRL_P1_EN_SHIFT) & PDMA_CTRL_P1_EN_MASK)

◆ PDMA_CTRL_P1_EN_SHIFT

#define PDMA_CTRL_P1_EN_SHIFT   (4U)

◆ PDMA_CTRL_PACK_DIR_GET

#define PDMA_CTRL_PACK_DIR_GET (   x)    (((uint32_t)(x) & PDMA_CTRL_PACK_DIR_MASK) >> PDMA_CTRL_PACK_DIR_SHIFT)

◆ PDMA_CTRL_PACK_DIR_MASK

#define PDMA_CTRL_PACK_DIR_MASK   (0x6000U)

◆ PDMA_CTRL_PACK_DIR_SET

#define PDMA_CTRL_PACK_DIR_SET (   x)    (((uint32_t)(x) << PDMA_CTRL_PACK_DIR_SHIFT) & PDMA_CTRL_PACK_DIR_MASK)

◆ PDMA_CTRL_PACK_DIR_SHIFT

#define PDMA_CTRL_PACK_DIR_SHIFT   (13U)

◆ PDMA_CTRL_PDMA_DONE_IRQ_EN_GET

#define PDMA_CTRL_PDMA_DONE_IRQ_EN_GET (   x)    (((uint32_t)(x) & PDMA_CTRL_PDMA_DONE_IRQ_EN_MASK) >> PDMA_CTRL_PDMA_DONE_IRQ_EN_SHIFT)

◆ PDMA_CTRL_PDMA_DONE_IRQ_EN_MASK

#define PDMA_CTRL_PDMA_DONE_IRQ_EN_MASK   (0x800U)

◆ PDMA_CTRL_PDMA_DONE_IRQ_EN_SET

#define PDMA_CTRL_PDMA_DONE_IRQ_EN_SET (   x)    (((uint32_t)(x) << PDMA_CTRL_PDMA_DONE_IRQ_EN_SHIFT) & PDMA_CTRL_PDMA_DONE_IRQ_EN_MASK)

◆ PDMA_CTRL_PDMA_DONE_IRQ_EN_SHIFT

#define PDMA_CTRL_PDMA_DONE_IRQ_EN_SHIFT   (11U)

◆ PDMA_CTRL_PDMA_EN_GET

#define PDMA_CTRL_PDMA_EN_GET (   x)    (((uint32_t)(x) & PDMA_CTRL_PDMA_EN_MASK) >> PDMA_CTRL_PDMA_EN_SHIFT)

◆ PDMA_CTRL_PDMA_EN_MASK

#define PDMA_CTRL_PDMA_EN_MASK   (0x1U)

◆ PDMA_CTRL_PDMA_EN_SET

#define PDMA_CTRL_PDMA_EN_SET (   x)    (((uint32_t)(x) << PDMA_CTRL_PDMA_EN_SHIFT) & PDMA_CTRL_PDMA_EN_MASK)

◆ PDMA_CTRL_PDMA_EN_SHIFT

#define PDMA_CTRL_PDMA_EN_SHIFT   (0U)

◆ PDMA_CTRL_PDMA_SFTRST_GET

#define PDMA_CTRL_PDMA_SFTRST_GET (   x)    (((uint32_t)(x) & PDMA_CTRL_PDMA_SFTRST_MASK) >> PDMA_CTRL_PDMA_SFTRST_SHIFT)

◆ PDMA_CTRL_PDMA_SFTRST_MASK

#define PDMA_CTRL_PDMA_SFTRST_MASK   (0x2U)

◆ PDMA_CTRL_PDMA_SFTRST_SET

#define PDMA_CTRL_PDMA_SFTRST_SET (   x)    (((uint32_t)(x) << PDMA_CTRL_PDMA_SFTRST_SHIFT) & PDMA_CTRL_PDMA_SFTRST_MASK)

◆ PDMA_CTRL_PDMA_SFTRST_SHIFT

#define PDMA_CTRL_PDMA_SFTRST_SHIFT   (1U)

◆ PDMA_OUT_BUF_ADDR_GET

#define PDMA_OUT_BUF_ADDR_GET (   x)    (((uint32_t)(x) & PDMA_OUT_BUF_ADDR_MASK) >> PDMA_OUT_BUF_ADDR_SHIFT)

◆ PDMA_OUT_BUF_ADDR_MASK

#define PDMA_OUT_BUF_ADDR_MASK   (0xFFFFFFFFUL)

◆ PDMA_OUT_BUF_ADDR_SET

#define PDMA_OUT_BUF_ADDR_SET (   x)    (((uint32_t)(x) << PDMA_OUT_BUF_ADDR_SHIFT) & PDMA_OUT_BUF_ADDR_MASK)

◆ PDMA_OUT_BUF_ADDR_SHIFT

#define PDMA_OUT_BUF_ADDR_SHIFT   (0U)

◆ PDMA_OUT_CTRL_ABLEND_MODE_GET

#define PDMA_OUT_CTRL_ABLEND_MODE_GET (   x)    (((uint32_t)(x) & PDMA_OUT_CTRL_ABLEND_MODE_MASK) >> PDMA_OUT_CTRL_ABLEND_MODE_SHIFT)

◆ PDMA_OUT_CTRL_ABLEND_MODE_MASK

#define PDMA_OUT_CTRL_ABLEND_MODE_MASK   (0xF00U)

◆ PDMA_OUT_CTRL_ABLEND_MODE_SET

#define PDMA_OUT_CTRL_ABLEND_MODE_SET (   x)    (((uint32_t)(x) << PDMA_OUT_CTRL_ABLEND_MODE_SHIFT) & PDMA_OUT_CTRL_ABLEND_MODE_MASK)

◆ PDMA_OUT_CTRL_ABLEND_MODE_SHIFT

#define PDMA_OUT_CTRL_ABLEND_MODE_SHIFT   (8U)

◆ PDMA_OUT_CTRL_DSTALPHA_GET

#define PDMA_OUT_CTRL_DSTALPHA_GET (   x)    (((uint32_t)(x) & PDMA_OUT_CTRL_DSTALPHA_MASK) >> PDMA_OUT_CTRL_DSTALPHA_SHIFT)

◆ PDMA_OUT_CTRL_DSTALPHA_MASK

#define PDMA_OUT_CTRL_DSTALPHA_MASK   (0xFF000000UL)

◆ PDMA_OUT_CTRL_DSTALPHA_OP_GET

#define PDMA_OUT_CTRL_DSTALPHA_OP_GET (   x)    (((uint32_t)(x) & PDMA_OUT_CTRL_DSTALPHA_OP_MASK) >> PDMA_OUT_CTRL_DSTALPHA_OP_SHIFT)

◆ PDMA_OUT_CTRL_DSTALPHA_OP_MASK

#define PDMA_OUT_CTRL_DSTALPHA_OP_MASK   (0xC000U)

◆ PDMA_OUT_CTRL_DSTALPHA_OP_SET

#define PDMA_OUT_CTRL_DSTALPHA_OP_SET (   x)    (((uint32_t)(x) << PDMA_OUT_CTRL_DSTALPHA_OP_SHIFT) & PDMA_OUT_CTRL_DSTALPHA_OP_MASK)

◆ PDMA_OUT_CTRL_DSTALPHA_OP_SHIFT

#define PDMA_OUT_CTRL_DSTALPHA_OP_SHIFT   (14U)

◆ PDMA_OUT_CTRL_DSTALPHA_SET

#define PDMA_OUT_CTRL_DSTALPHA_SET (   x)    (((uint32_t)(x) << PDMA_OUT_CTRL_DSTALPHA_SHIFT) & PDMA_OUT_CTRL_DSTALPHA_MASK)

◆ PDMA_OUT_CTRL_DSTALPHA_SHIFT

#define PDMA_OUT_CTRL_DSTALPHA_SHIFT   (24U)

◆ PDMA_OUT_CTRL_FORMAT_GET

#define PDMA_OUT_CTRL_FORMAT_GET (   x)    (((uint32_t)(x) & PDMA_OUT_CTRL_FORMAT_MASK) >> PDMA_OUT_CTRL_FORMAT_SHIFT)

◆ PDMA_OUT_CTRL_FORMAT_MASK

#define PDMA_OUT_CTRL_FORMAT_MASK   (0x3FU)

◆ PDMA_OUT_CTRL_FORMAT_SET

#define PDMA_OUT_CTRL_FORMAT_SET (   x)    (((uint32_t)(x) << PDMA_OUT_CTRL_FORMAT_SHIFT) & PDMA_OUT_CTRL_FORMAT_MASK)

◆ PDMA_OUT_CTRL_FORMAT_SHIFT

#define PDMA_OUT_CTRL_FORMAT_SHIFT   (0U)

◆ PDMA_OUT_CTRL_SRCALPHA_GET

#define PDMA_OUT_CTRL_SRCALPHA_GET (   x)    (((uint32_t)(x) & PDMA_OUT_CTRL_SRCALPHA_MASK) >> PDMA_OUT_CTRL_SRCALPHA_SHIFT)

◆ PDMA_OUT_CTRL_SRCALPHA_MASK

#define PDMA_OUT_CTRL_SRCALPHA_MASK   (0xFF0000UL)

◆ PDMA_OUT_CTRL_SRCALPHA_OP_GET

#define PDMA_OUT_CTRL_SRCALPHA_OP_GET (   x)    (((uint32_t)(x) & PDMA_OUT_CTRL_SRCALPHA_OP_MASK) >> PDMA_OUT_CTRL_SRCALPHA_OP_SHIFT)

◆ PDMA_OUT_CTRL_SRCALPHA_OP_MASK

#define PDMA_OUT_CTRL_SRCALPHA_OP_MASK   (0x3000U)

◆ PDMA_OUT_CTRL_SRCALPHA_OP_SET

#define PDMA_OUT_CTRL_SRCALPHA_OP_SET (   x)    (((uint32_t)(x) << PDMA_OUT_CTRL_SRCALPHA_OP_SHIFT) & PDMA_OUT_CTRL_SRCALPHA_OP_MASK)

◆ PDMA_OUT_CTRL_SRCALPHA_OP_SHIFT

#define PDMA_OUT_CTRL_SRCALPHA_OP_SHIFT   (12U)

◆ PDMA_OUT_CTRL_SRCALPHA_SET

#define PDMA_OUT_CTRL_SRCALPHA_SET (   x)    (((uint32_t)(x) << PDMA_OUT_CTRL_SRCALPHA_SHIFT) & PDMA_OUT_CTRL_SRCALPHA_MASK)

◆ PDMA_OUT_CTRL_SRCALPHA_SHIFT

#define PDMA_OUT_CTRL_SRCALPHA_SHIFT   (16U)

◆ PDMA_OUT_LRC_X_GET

#define PDMA_OUT_LRC_X_GET (   x)    (((uint32_t)(x) & PDMA_OUT_LRC_X_MASK) >> PDMA_OUT_LRC_X_SHIFT)

◆ PDMA_OUT_LRC_X_MASK

#define PDMA_OUT_LRC_X_MASK   (0x3FFFU)

◆ PDMA_OUT_LRC_X_SET

#define PDMA_OUT_LRC_X_SET (   x)    (((uint32_t)(x) << PDMA_OUT_LRC_X_SHIFT) & PDMA_OUT_LRC_X_MASK)

◆ PDMA_OUT_LRC_X_SHIFT

#define PDMA_OUT_LRC_X_SHIFT   (0U)

◆ PDMA_OUT_LRC_Y_GET

#define PDMA_OUT_LRC_Y_GET (   x)    (((uint32_t)(x) & PDMA_OUT_LRC_Y_MASK) >> PDMA_OUT_LRC_Y_SHIFT)

◆ PDMA_OUT_LRC_Y_MASK

#define PDMA_OUT_LRC_Y_MASK   (0x3FFF0000UL)

◆ PDMA_OUT_LRC_Y_SET

#define PDMA_OUT_LRC_Y_SET (   x)    (((uint32_t)(x) << PDMA_OUT_LRC_Y_SHIFT) & PDMA_OUT_LRC_Y_MASK)

◆ PDMA_OUT_LRC_Y_SHIFT

#define PDMA_OUT_LRC_Y_SHIFT   (16U)

◆ PDMA_OUT_PITCH_BYTELEN_GET

#define PDMA_OUT_PITCH_BYTELEN_GET (   x)    (((uint32_t)(x) & PDMA_OUT_PITCH_BYTELEN_MASK) >> PDMA_OUT_PITCH_BYTELEN_SHIFT)

◆ PDMA_OUT_PITCH_BYTELEN_MASK

#define PDMA_OUT_PITCH_BYTELEN_MASK   (0xFFFFU)

◆ PDMA_OUT_PITCH_BYTELEN_SET

#define PDMA_OUT_PITCH_BYTELEN_SET (   x)    (((uint32_t)(x) << PDMA_OUT_PITCH_BYTELEN_SHIFT) & PDMA_OUT_PITCH_BYTELEN_MASK)

◆ PDMA_OUT_PITCH_BYTELEN_SHIFT

#define PDMA_OUT_PITCH_BYTELEN_SHIFT   (0U)

◆ PDMA_OUT_PS_0

#define PDMA_OUT_PS_0   (0UL)

◆ PDMA_OUT_PS_1

#define PDMA_OUT_PS_1   (1UL)

◆ PDMA_OUT_PS_LRC_X_GET

#define PDMA_OUT_PS_LRC_X_GET (   x)    (((uint32_t)(x) & PDMA_OUT_PS_LRC_X_MASK) >> PDMA_OUT_PS_LRC_X_SHIFT)

◆ PDMA_OUT_PS_LRC_X_MASK

#define PDMA_OUT_PS_LRC_X_MASK   (0x3FFFU)

◆ PDMA_OUT_PS_LRC_X_SET

#define PDMA_OUT_PS_LRC_X_SET (   x)    (((uint32_t)(x) << PDMA_OUT_PS_LRC_X_SHIFT) & PDMA_OUT_PS_LRC_X_MASK)

◆ PDMA_OUT_PS_LRC_X_SHIFT

#define PDMA_OUT_PS_LRC_X_SHIFT   (0U)

◆ PDMA_OUT_PS_LRC_Y_GET

#define PDMA_OUT_PS_LRC_Y_GET (   x)    (((uint32_t)(x) & PDMA_OUT_PS_LRC_Y_MASK) >> PDMA_OUT_PS_LRC_Y_SHIFT)

◆ PDMA_OUT_PS_LRC_Y_MASK

#define PDMA_OUT_PS_LRC_Y_MASK   (0x3FFF0000UL)

◆ PDMA_OUT_PS_LRC_Y_SET

#define PDMA_OUT_PS_LRC_Y_SET (   x)    (((uint32_t)(x) << PDMA_OUT_PS_LRC_Y_SHIFT) & PDMA_OUT_PS_LRC_Y_MASK)

◆ PDMA_OUT_PS_LRC_Y_SHIFT

#define PDMA_OUT_PS_LRC_Y_SHIFT   (16U)

◆ PDMA_OUT_PS_ULC_X_GET

#define PDMA_OUT_PS_ULC_X_GET (   x)    (((uint32_t)(x) & PDMA_OUT_PS_ULC_X_MASK) >> PDMA_OUT_PS_ULC_X_SHIFT)

◆ PDMA_OUT_PS_ULC_X_MASK

#define PDMA_OUT_PS_ULC_X_MASK   (0x3FFFU)

◆ PDMA_OUT_PS_ULC_X_SET

#define PDMA_OUT_PS_ULC_X_SET (   x)    (((uint32_t)(x) << PDMA_OUT_PS_ULC_X_SHIFT) & PDMA_OUT_PS_ULC_X_MASK)

◆ PDMA_OUT_PS_ULC_X_SHIFT

#define PDMA_OUT_PS_ULC_X_SHIFT   (0U)

◆ PDMA_OUT_PS_ULC_Y_GET

#define PDMA_OUT_PS_ULC_Y_GET (   x)    (((uint32_t)(x) & PDMA_OUT_PS_ULC_Y_MASK) >> PDMA_OUT_PS_ULC_Y_SHIFT)

◆ PDMA_OUT_PS_ULC_Y_MASK

#define PDMA_OUT_PS_ULC_Y_MASK   (0x3FFF0000UL)

◆ PDMA_OUT_PS_ULC_Y_SET

#define PDMA_OUT_PS_ULC_Y_SET (   x)    (((uint32_t)(x) << PDMA_OUT_PS_ULC_Y_SHIFT) & PDMA_OUT_PS_ULC_Y_MASK)

◆ PDMA_OUT_PS_ULC_Y_SHIFT

#define PDMA_OUT_PS_ULC_Y_SHIFT   (16U)

◆ PDMA_PS_0

#define PDMA_PS_0   (0UL)

◆ PDMA_PS_1

#define PDMA_PS_1   (1UL)

◆ PDMA_PS_BKGD_COLOR_GET

#define PDMA_PS_BKGD_COLOR_GET (   x)    (((uint32_t)(x) & PDMA_PS_BKGD_COLOR_MASK) >> PDMA_PS_BKGD_COLOR_SHIFT)

◆ PDMA_PS_BKGD_COLOR_MASK

#define PDMA_PS_BKGD_COLOR_MASK   (0xFFFFFFFFUL)

◆ PDMA_PS_BKGD_COLOR_SET

#define PDMA_PS_BKGD_COLOR_SET (   x)    (((uint32_t)(x) << PDMA_PS_BKGD_COLOR_SHIFT) & PDMA_PS_BKGD_COLOR_MASK)

◆ PDMA_PS_BKGD_COLOR_SHIFT

#define PDMA_PS_BKGD_COLOR_SHIFT   (0U)

◆ PDMA_PS_BUF_ADDR_GET

#define PDMA_PS_BUF_ADDR_GET (   x)    (((uint32_t)(x) & PDMA_PS_BUF_ADDR_MASK) >> PDMA_PS_BUF_ADDR_SHIFT)

◆ PDMA_PS_BUF_ADDR_MASK

#define PDMA_PS_BUF_ADDR_MASK   (0xFFFFFFFFUL)

◆ PDMA_PS_BUF_ADDR_SET

#define PDMA_PS_BUF_ADDR_SET (   x)    (((uint32_t)(x) << PDMA_PS_BUF_ADDR_SHIFT) & PDMA_PS_BUF_ADDR_MASK)

◆ PDMA_PS_BUF_ADDR_SHIFT

#define PDMA_PS_BUF_ADDR_SHIFT   (0U)

◆ PDMA_PS_CLRKEY_HIGH_LIMIT_GET

#define PDMA_PS_CLRKEY_HIGH_LIMIT_GET (   x)    (((uint32_t)(x) & PDMA_PS_CLRKEY_HIGH_LIMIT_MASK) >> PDMA_PS_CLRKEY_HIGH_LIMIT_SHIFT)

◆ PDMA_PS_CLRKEY_HIGH_LIMIT_MASK

#define PDMA_PS_CLRKEY_HIGH_LIMIT_MASK   (0xFFFFFFUL)

◆ PDMA_PS_CLRKEY_HIGH_LIMIT_SET

#define PDMA_PS_CLRKEY_HIGH_LIMIT_SET (   x)    (((uint32_t)(x) << PDMA_PS_CLRKEY_HIGH_LIMIT_SHIFT) & PDMA_PS_CLRKEY_HIGH_LIMIT_MASK)

◆ PDMA_PS_CLRKEY_HIGH_LIMIT_SHIFT

#define PDMA_PS_CLRKEY_HIGH_LIMIT_SHIFT   (0U)

◆ PDMA_PS_CLRKEY_LOW_LIMIT_GET

#define PDMA_PS_CLRKEY_LOW_LIMIT_GET (   x)    (((uint32_t)(x) & PDMA_PS_CLRKEY_LOW_LIMIT_MASK) >> PDMA_PS_CLRKEY_LOW_LIMIT_SHIFT)

◆ PDMA_PS_CLRKEY_LOW_LIMIT_MASK

#define PDMA_PS_CLRKEY_LOW_LIMIT_MASK   (0xFFFFFFUL)

◆ PDMA_PS_CLRKEY_LOW_LIMIT_SET

#define PDMA_PS_CLRKEY_LOW_LIMIT_SET (   x)    (((uint32_t)(x) << PDMA_PS_CLRKEY_LOW_LIMIT_SHIFT) & PDMA_PS_CLRKEY_LOW_LIMIT_MASK)

◆ PDMA_PS_CLRKEY_LOW_LIMIT_SHIFT

#define PDMA_PS_CLRKEY_LOW_LIMIT_SHIFT   (0U)

◆ PDMA_PS_CTRL_BKGCL4CLR_GET

#define PDMA_PS_CTRL_BKGCL4CLR_GET (   x)    (((uint32_t)(x) & PDMA_PS_CTRL_BKGCL4CLR_MASK) >> PDMA_PS_CTRL_BKGCL4CLR_SHIFT)

◆ PDMA_PS_CTRL_BKGCL4CLR_MASK

#define PDMA_PS_CTRL_BKGCL4CLR_MASK   (0x20000UL)

◆ PDMA_PS_CTRL_BKGCL4CLR_SET

#define PDMA_PS_CTRL_BKGCL4CLR_SET (   x)    (((uint32_t)(x) << PDMA_PS_CTRL_BKGCL4CLR_SHIFT) & PDMA_PS_CTRL_BKGCL4CLR_MASK)

◆ PDMA_PS_CTRL_BKGCL4CLR_SHIFT

#define PDMA_PS_CTRL_BKGCL4CLR_SHIFT   (17U)

◆ PDMA_PS_CTRL_BYPASS_GET

#define PDMA_PS_CTRL_BYPASS_GET (   x)    (((uint32_t)(x) & PDMA_PS_CTRL_BYPASS_MASK) >> PDMA_PS_CTRL_BYPASS_SHIFT)

◆ PDMA_PS_CTRL_BYPASS_MASK

#define PDMA_PS_CTRL_BYPASS_MASK   (0x8000U)

◆ PDMA_PS_CTRL_BYPASS_SET

#define PDMA_PS_CTRL_BYPASS_SET (   x)    (((uint32_t)(x) << PDMA_PS_CTRL_BYPASS_SHIFT) & PDMA_PS_CTRL_BYPASS_MASK)

◆ PDMA_PS_CTRL_BYPASS_SHIFT

#define PDMA_PS_CTRL_BYPASS_SHIFT   (15U)

◆ PDMA_PS_CTRL_DECX_GET

#define PDMA_PS_CTRL_DECX_GET (   x)    (((uint32_t)(x) & PDMA_PS_CTRL_DECX_MASK) >> PDMA_PS_CTRL_DECX_SHIFT)

◆ PDMA_PS_CTRL_DECX_MASK

#define PDMA_PS_CTRL_DECX_MASK   (0x180U)

◆ PDMA_PS_CTRL_DECX_SET

#define PDMA_PS_CTRL_DECX_SET (   x)    (((uint32_t)(x) << PDMA_PS_CTRL_DECX_SHIFT) & PDMA_PS_CTRL_DECX_MASK)

◆ PDMA_PS_CTRL_DECX_SHIFT

#define PDMA_PS_CTRL_DECX_SHIFT   (7U)

◆ PDMA_PS_CTRL_DECY_GET

#define PDMA_PS_CTRL_DECY_GET (   x)    (((uint32_t)(x) & PDMA_PS_CTRL_DECY_MASK) >> PDMA_PS_CTRL_DECY_SHIFT)

◆ PDMA_PS_CTRL_DECY_MASK

#define PDMA_PS_CTRL_DECY_MASK   (0x600U)

◆ PDMA_PS_CTRL_DECY_SET

#define PDMA_PS_CTRL_DECY_SET (   x)    (((uint32_t)(x) << PDMA_PS_CTRL_DECY_SHIFT) & PDMA_PS_CTRL_DECY_MASK)

◆ PDMA_PS_CTRL_DECY_SHIFT

#define PDMA_PS_CTRL_DECY_SHIFT   (9U)

◆ PDMA_PS_CTRL_FORMAT_GET

#define PDMA_PS_CTRL_FORMAT_GET (   x)    (((uint32_t)(x) & PDMA_PS_CTRL_FORMAT_MASK) >> PDMA_PS_CTRL_FORMAT_SHIFT)

◆ PDMA_PS_CTRL_FORMAT_MASK

#define PDMA_PS_CTRL_FORMAT_MASK   (0x3FU)

◆ PDMA_PS_CTRL_FORMAT_SET

#define PDMA_PS_CTRL_FORMAT_SET (   x)    (((uint32_t)(x) << PDMA_PS_CTRL_FORMAT_SHIFT) & PDMA_PS_CTRL_FORMAT_MASK)

◆ PDMA_PS_CTRL_FORMAT_SHIFT

#define PDMA_PS_CTRL_FORMAT_SHIFT   (0U)

◆ PDMA_PS_CTRL_HFLIP_GET

#define PDMA_PS_CTRL_HFLIP_GET (   x)    (((uint32_t)(x) & PDMA_PS_CTRL_HFLIP_MASK) >> PDMA_PS_CTRL_HFLIP_SHIFT)

◆ PDMA_PS_CTRL_HFLIP_MASK

#define PDMA_PS_CTRL_HFLIP_MASK   (0x2000U)

◆ PDMA_PS_CTRL_HFLIP_SET

#define PDMA_PS_CTRL_HFLIP_SET (   x)    (((uint32_t)(x) << PDMA_PS_CTRL_HFLIP_SHIFT) & PDMA_PS_CTRL_HFLIP_MASK)

◆ PDMA_PS_CTRL_HFLIP_SHIFT

#define PDMA_PS_CTRL_HFLIP_SHIFT   (13U)

◆ PDMA_PS_CTRL_HW_BYTE_SWAP_GET

#define PDMA_PS_CTRL_HW_BYTE_SWAP_GET (   x)    (((uint32_t)(x) & PDMA_PS_CTRL_HW_BYTE_SWAP_MASK) >> PDMA_PS_CTRL_HW_BYTE_SWAP_SHIFT)

◆ PDMA_PS_CTRL_HW_BYTE_SWAP_MASK

#define PDMA_PS_CTRL_HW_BYTE_SWAP_MASK   (0x40U)

◆ PDMA_PS_CTRL_HW_BYTE_SWAP_SET

#define PDMA_PS_CTRL_HW_BYTE_SWAP_SET (   x)    (((uint32_t)(x) << PDMA_PS_CTRL_HW_BYTE_SWAP_SHIFT) & PDMA_PS_CTRL_HW_BYTE_SWAP_MASK)

◆ PDMA_PS_CTRL_HW_BYTE_SWAP_SHIFT

#define PDMA_PS_CTRL_HW_BYTE_SWAP_SHIFT   (6U)

◆ PDMA_PS_CTRL_INB13_SWAP_GET

#define PDMA_PS_CTRL_INB13_SWAP_GET (   x)    (((uint32_t)(x) & PDMA_PS_CTRL_INB13_SWAP_MASK) >> PDMA_PS_CTRL_INB13_SWAP_SHIFT)

◆ PDMA_PS_CTRL_INB13_SWAP_MASK

#define PDMA_PS_CTRL_INB13_SWAP_MASK   (0x100000UL)

◆ PDMA_PS_CTRL_INB13_SWAP_SET

#define PDMA_PS_CTRL_INB13_SWAP_SET (   x)    (((uint32_t)(x) << PDMA_PS_CTRL_INB13_SWAP_SHIFT) & PDMA_PS_CTRL_INB13_SWAP_MASK)

◆ PDMA_PS_CTRL_INB13_SWAP_SHIFT

#define PDMA_PS_CTRL_INB13_SWAP_SHIFT   (20U)

◆ PDMA_PS_CTRL_PACK_DIR_GET

#define PDMA_PS_CTRL_PACK_DIR_GET (   x)    (((uint32_t)(x) & PDMA_PS_CTRL_PACK_DIR_MASK) >> PDMA_PS_CTRL_PACK_DIR_SHIFT)

◆ PDMA_PS_CTRL_PACK_DIR_MASK

#define PDMA_PS_CTRL_PACK_DIR_MASK   (0xC0000UL)

◆ PDMA_PS_CTRL_PACK_DIR_SET

#define PDMA_PS_CTRL_PACK_DIR_SET (   x)    (((uint32_t)(x) << PDMA_PS_CTRL_PACK_DIR_SHIFT) & PDMA_PS_CTRL_PACK_DIR_MASK)

◆ PDMA_PS_CTRL_PACK_DIR_SHIFT

#define PDMA_PS_CTRL_PACK_DIR_SHIFT   (18U)

◆ PDMA_PS_CTRL_ROTATE_GET

#define PDMA_PS_CTRL_ROTATE_GET (   x)    (((uint32_t)(x) & PDMA_PS_CTRL_ROTATE_MASK) >> PDMA_PS_CTRL_ROTATE_SHIFT)

◆ PDMA_PS_CTRL_ROTATE_MASK

#define PDMA_PS_CTRL_ROTATE_MASK   (0x1800U)

◆ PDMA_PS_CTRL_ROTATE_SET

#define PDMA_PS_CTRL_ROTATE_SET (   x)    (((uint32_t)(x) << PDMA_PS_CTRL_ROTATE_SHIFT) & PDMA_PS_CTRL_ROTATE_MASK)

◆ PDMA_PS_CTRL_ROTATE_SHIFT

#define PDMA_PS_CTRL_ROTATE_SHIFT   (11U)

◆ PDMA_PS_CTRL_VFLIP_GET

#define PDMA_PS_CTRL_VFLIP_GET (   x)    (((uint32_t)(x) & PDMA_PS_CTRL_VFLIP_MASK) >> PDMA_PS_CTRL_VFLIP_SHIFT)

◆ PDMA_PS_CTRL_VFLIP_MASK

#define PDMA_PS_CTRL_VFLIP_MASK   (0x4000U)

◆ PDMA_PS_CTRL_VFLIP_SET

#define PDMA_PS_CTRL_VFLIP_SET (   x)    (((uint32_t)(x) << PDMA_PS_CTRL_VFLIP_SHIFT) & PDMA_PS_CTRL_VFLIP_MASK)

◆ PDMA_PS_CTRL_VFLIP_SHIFT

#define PDMA_PS_CTRL_VFLIP_SHIFT   (14U)

◆ PDMA_PS_CTRL_YCBCR_MODE_GET

#define PDMA_PS_CTRL_YCBCR_MODE_GET (   x)    (((uint32_t)(x) & PDMA_PS_CTRL_YCBCR_MODE_MASK) >> PDMA_PS_CTRL_YCBCR_MODE_SHIFT)

◆ PDMA_PS_CTRL_YCBCR_MODE_MASK

#define PDMA_PS_CTRL_YCBCR_MODE_MASK   (0x10000UL)

◆ PDMA_PS_CTRL_YCBCR_MODE_SET

#define PDMA_PS_CTRL_YCBCR_MODE_SET (   x)    (((uint32_t)(x) << PDMA_PS_CTRL_YCBCR_MODE_SHIFT) & PDMA_PS_CTRL_YCBCR_MODE_MASK)

◆ PDMA_PS_CTRL_YCBCR_MODE_SHIFT

#define PDMA_PS_CTRL_YCBCR_MODE_SHIFT   (16U)

◆ PDMA_PS_OFFSET_X_GET

#define PDMA_PS_OFFSET_X_GET (   x)    (((uint32_t)(x) & PDMA_PS_OFFSET_X_MASK) >> PDMA_PS_OFFSET_X_SHIFT)

◆ PDMA_PS_OFFSET_X_MASK

#define PDMA_PS_OFFSET_X_MASK   (0xFFFU)

◆ PDMA_PS_OFFSET_X_SET

#define PDMA_PS_OFFSET_X_SET (   x)    (((uint32_t)(x) << PDMA_PS_OFFSET_X_SHIFT) & PDMA_PS_OFFSET_X_MASK)

◆ PDMA_PS_OFFSET_X_SHIFT

#define PDMA_PS_OFFSET_X_SHIFT   (0U)

◆ PDMA_PS_OFFSET_Y_GET

#define PDMA_PS_OFFSET_Y_GET (   x)    (((uint32_t)(x) & PDMA_PS_OFFSET_Y_MASK) >> PDMA_PS_OFFSET_Y_SHIFT)

◆ PDMA_PS_OFFSET_Y_MASK

#define PDMA_PS_OFFSET_Y_MASK   (0xFFF0000UL)

◆ PDMA_PS_OFFSET_Y_SET

#define PDMA_PS_OFFSET_Y_SET (   x)    (((uint32_t)(x) << PDMA_PS_OFFSET_Y_SHIFT) & PDMA_PS_OFFSET_Y_MASK)

◆ PDMA_PS_OFFSET_Y_SHIFT

#define PDMA_PS_OFFSET_Y_SHIFT   (16U)

◆ PDMA_PS_ORG_HIGHT_GET

#define PDMA_PS_ORG_HIGHT_GET (   x)    (((uint32_t)(x) & PDMA_PS_ORG_HIGHT_MASK) >> PDMA_PS_ORG_HIGHT_SHIFT)

◆ PDMA_PS_ORG_HIGHT_MASK

#define PDMA_PS_ORG_HIGHT_MASK   (0x3FFF0000UL)

◆ PDMA_PS_ORG_HIGHT_SET

#define PDMA_PS_ORG_HIGHT_SET (   x)    (((uint32_t)(x) << PDMA_PS_ORG_HIGHT_SHIFT) & PDMA_PS_ORG_HIGHT_MASK)

◆ PDMA_PS_ORG_HIGHT_SHIFT

#define PDMA_PS_ORG_HIGHT_SHIFT   (16U)

◆ PDMA_PS_ORG_WIDTH_GET

#define PDMA_PS_ORG_WIDTH_GET (   x)    (((uint32_t)(x) & PDMA_PS_ORG_WIDTH_MASK) >> PDMA_PS_ORG_WIDTH_SHIFT)

◆ PDMA_PS_ORG_WIDTH_MASK

#define PDMA_PS_ORG_WIDTH_MASK   (0x3FFFU)

◆ PDMA_PS_ORG_WIDTH_SET

#define PDMA_PS_ORG_WIDTH_SET (   x)    (((uint32_t)(x) << PDMA_PS_ORG_WIDTH_SHIFT) & PDMA_PS_ORG_WIDTH_MASK)

◆ PDMA_PS_ORG_WIDTH_SHIFT

#define PDMA_PS_ORG_WIDTH_SHIFT   (0U)

◆ PDMA_PS_PITCH_BYTELEN_GET

#define PDMA_PS_PITCH_BYTELEN_GET (   x)    (((uint32_t)(x) & PDMA_PS_PITCH_BYTELEN_MASK) >> PDMA_PS_PITCH_BYTELEN_SHIFT)

◆ PDMA_PS_PITCH_BYTELEN_MASK

#define PDMA_PS_PITCH_BYTELEN_MASK   (0xFFFFU)

◆ PDMA_PS_PITCH_BYTELEN_SET

#define PDMA_PS_PITCH_BYTELEN_SET (   x)    (((uint32_t)(x) << PDMA_PS_PITCH_BYTELEN_SHIFT) & PDMA_PS_PITCH_BYTELEN_MASK)

◆ PDMA_PS_PITCH_BYTELEN_SHIFT

#define PDMA_PS_PITCH_BYTELEN_SHIFT   (0U)

◆ PDMA_PS_SCALE_X_GET

#define PDMA_PS_SCALE_X_GET (   x)    (((uint32_t)(x) & PDMA_PS_SCALE_X_MASK) >> PDMA_PS_SCALE_X_SHIFT)

◆ PDMA_PS_SCALE_X_MASK

#define PDMA_PS_SCALE_X_MASK   (0x7FFFU)

◆ PDMA_PS_SCALE_X_SET

#define PDMA_PS_SCALE_X_SET (   x)    (((uint32_t)(x) << PDMA_PS_SCALE_X_SHIFT) & PDMA_PS_SCALE_X_MASK)

◆ PDMA_PS_SCALE_X_SHIFT

#define PDMA_PS_SCALE_X_SHIFT   (0U)

◆ PDMA_PS_SCALE_Y_GET

#define PDMA_PS_SCALE_Y_GET (   x)    (((uint32_t)(x) & PDMA_PS_SCALE_Y_MASK) >> PDMA_PS_SCALE_Y_SHIFT)

◆ PDMA_PS_SCALE_Y_MASK

#define PDMA_PS_SCALE_Y_MASK   (0x7FFF0000UL)

◆ PDMA_PS_SCALE_Y_SET

#define PDMA_PS_SCALE_Y_SET (   x)    (((uint32_t)(x) << PDMA_PS_SCALE_Y_SHIFT) & PDMA_PS_SCALE_Y_MASK)

◆ PDMA_PS_SCALE_Y_SHIFT

#define PDMA_PS_SCALE_Y_SHIFT   (16U)

◆ PDMA_RGB2YUV_COEF0_C0_GET

#define PDMA_RGB2YUV_COEF0_C0_GET (   x)    (((uint32_t)(x) & PDMA_RGB2YUV_COEF0_C0_MASK) >> PDMA_RGB2YUV_COEF0_C0_SHIFT)

◆ PDMA_RGB2YUV_COEF0_C0_MASK

#define PDMA_RGB2YUV_COEF0_C0_MASK   (0x1FFC0000UL)

◆ PDMA_RGB2YUV_COEF0_C0_SET

#define PDMA_RGB2YUV_COEF0_C0_SET (   x)    (((uint32_t)(x) << PDMA_RGB2YUV_COEF0_C0_SHIFT) & PDMA_RGB2YUV_COEF0_C0_MASK)

◆ PDMA_RGB2YUV_COEF0_C0_SHIFT

#define PDMA_RGB2YUV_COEF0_C0_SHIFT   (18U)

◆ PDMA_RGB2YUV_COEF0_ENABLE_GET

#define PDMA_RGB2YUV_COEF0_ENABLE_GET (   x)    (((uint32_t)(x) & PDMA_RGB2YUV_COEF0_ENABLE_MASK) >> PDMA_RGB2YUV_COEF0_ENABLE_SHIFT)

◆ PDMA_RGB2YUV_COEF0_ENABLE_MASK

#define PDMA_RGB2YUV_COEF0_ENABLE_MASK   (0x40000000UL)

◆ PDMA_RGB2YUV_COEF0_ENABLE_SET

#define PDMA_RGB2YUV_COEF0_ENABLE_SET (   x)    (((uint32_t)(x) << PDMA_RGB2YUV_COEF0_ENABLE_SHIFT) & PDMA_RGB2YUV_COEF0_ENABLE_MASK)

◆ PDMA_RGB2YUV_COEF0_ENABLE_SHIFT

#define PDMA_RGB2YUV_COEF0_ENABLE_SHIFT   (30U)

◆ PDMA_RGB2YUV_COEF0_UV_OFFSET_GET

#define PDMA_RGB2YUV_COEF0_UV_OFFSET_GET (   x)    (((uint32_t)(x) & PDMA_RGB2YUV_COEF0_UV_OFFSET_MASK) >> PDMA_RGB2YUV_COEF0_UV_OFFSET_SHIFT)

◆ PDMA_RGB2YUV_COEF0_UV_OFFSET_MASK

#define PDMA_RGB2YUV_COEF0_UV_OFFSET_MASK   (0x3FE00UL)

◆ PDMA_RGB2YUV_COEF0_UV_OFFSET_SET

#define PDMA_RGB2YUV_COEF0_UV_OFFSET_SET (   x)    (((uint32_t)(x) << PDMA_RGB2YUV_COEF0_UV_OFFSET_SHIFT) & PDMA_RGB2YUV_COEF0_UV_OFFSET_MASK)

◆ PDMA_RGB2YUV_COEF0_UV_OFFSET_SHIFT

#define PDMA_RGB2YUV_COEF0_UV_OFFSET_SHIFT   (9U)

◆ PDMA_RGB2YUV_COEF0_Y_OFFSET_GET

#define PDMA_RGB2YUV_COEF0_Y_OFFSET_GET (   x)    (((uint32_t)(x) & PDMA_RGB2YUV_COEF0_Y_OFFSET_MASK) >> PDMA_RGB2YUV_COEF0_Y_OFFSET_SHIFT)

◆ PDMA_RGB2YUV_COEF0_Y_OFFSET_MASK

#define PDMA_RGB2YUV_COEF0_Y_OFFSET_MASK   (0x1FFU)

◆ PDMA_RGB2YUV_COEF0_Y_OFFSET_SET

#define PDMA_RGB2YUV_COEF0_Y_OFFSET_SET (   x)    (((uint32_t)(x) << PDMA_RGB2YUV_COEF0_Y_OFFSET_SHIFT) & PDMA_RGB2YUV_COEF0_Y_OFFSET_MASK)

◆ PDMA_RGB2YUV_COEF0_Y_OFFSET_SHIFT

#define PDMA_RGB2YUV_COEF0_Y_OFFSET_SHIFT   (0U)

◆ PDMA_RGB2YUV_COEF0_YCBCR_MODE_GET

#define PDMA_RGB2YUV_COEF0_YCBCR_MODE_GET (   x)    (((uint32_t)(x) & PDMA_RGB2YUV_COEF0_YCBCR_MODE_MASK) >> PDMA_RGB2YUV_COEF0_YCBCR_MODE_SHIFT)

◆ PDMA_RGB2YUV_COEF0_YCBCR_MODE_MASK

#define PDMA_RGB2YUV_COEF0_YCBCR_MODE_MASK   (0x80000000UL)

◆ PDMA_RGB2YUV_COEF0_YCBCR_MODE_SET

#define PDMA_RGB2YUV_COEF0_YCBCR_MODE_SET (   x)    (((uint32_t)(x) << PDMA_RGB2YUV_COEF0_YCBCR_MODE_SHIFT) & PDMA_RGB2YUV_COEF0_YCBCR_MODE_MASK)

◆ PDMA_RGB2YUV_COEF0_YCBCR_MODE_SHIFT

#define PDMA_RGB2YUV_COEF0_YCBCR_MODE_SHIFT   (31U)

◆ PDMA_RGB2YUV_COEF1_C1_GET

#define PDMA_RGB2YUV_COEF1_C1_GET (   x)    (((uint32_t)(x) & PDMA_RGB2YUV_COEF1_C1_MASK) >> PDMA_RGB2YUV_COEF1_C1_SHIFT)

◆ PDMA_RGB2YUV_COEF1_C1_MASK

#define PDMA_RGB2YUV_COEF1_C1_MASK   (0x7FF0000UL)

◆ PDMA_RGB2YUV_COEF1_C1_SET

#define PDMA_RGB2YUV_COEF1_C1_SET (   x)    (((uint32_t)(x) << PDMA_RGB2YUV_COEF1_C1_SHIFT) & PDMA_RGB2YUV_COEF1_C1_MASK)

◆ PDMA_RGB2YUV_COEF1_C1_SHIFT

#define PDMA_RGB2YUV_COEF1_C1_SHIFT   (16U)

◆ PDMA_RGB2YUV_COEF1_C4_GET

#define PDMA_RGB2YUV_COEF1_C4_GET (   x)    (((uint32_t)(x) & PDMA_RGB2YUV_COEF1_C4_MASK) >> PDMA_RGB2YUV_COEF1_C4_SHIFT)

◆ PDMA_RGB2YUV_COEF1_C4_MASK

#define PDMA_RGB2YUV_COEF1_C4_MASK   (0x7FFU)

◆ PDMA_RGB2YUV_COEF1_C4_SET

#define PDMA_RGB2YUV_COEF1_C4_SET (   x)    (((uint32_t)(x) << PDMA_RGB2YUV_COEF1_C4_SHIFT) & PDMA_RGB2YUV_COEF1_C4_MASK)

◆ PDMA_RGB2YUV_COEF1_C4_SHIFT

#define PDMA_RGB2YUV_COEF1_C4_SHIFT   (0U)

◆ PDMA_RGB2YUV_COEF2_C2_GET

#define PDMA_RGB2YUV_COEF2_C2_GET (   x)    (((uint32_t)(x) & PDMA_RGB2YUV_COEF2_C2_MASK) >> PDMA_RGB2YUV_COEF2_C2_SHIFT)

◆ PDMA_RGB2YUV_COEF2_C2_MASK

#define PDMA_RGB2YUV_COEF2_C2_MASK   (0x7FF0000UL)

◆ PDMA_RGB2YUV_COEF2_C2_SET

#define PDMA_RGB2YUV_COEF2_C2_SET (   x)    (((uint32_t)(x) << PDMA_RGB2YUV_COEF2_C2_SHIFT) & PDMA_RGB2YUV_COEF2_C2_MASK)

◆ PDMA_RGB2YUV_COEF2_C2_SHIFT

#define PDMA_RGB2YUV_COEF2_C2_SHIFT   (16U)

◆ PDMA_RGB2YUV_COEF2_C3_GET

#define PDMA_RGB2YUV_COEF2_C3_GET (   x)    (((uint32_t)(x) & PDMA_RGB2YUV_COEF2_C3_MASK) >> PDMA_RGB2YUV_COEF2_C3_SHIFT)

◆ PDMA_RGB2YUV_COEF2_C3_MASK

#define PDMA_RGB2YUV_COEF2_C3_MASK   (0x7FFU)

◆ PDMA_RGB2YUV_COEF2_C3_SET

#define PDMA_RGB2YUV_COEF2_C3_SET (   x)    (((uint32_t)(x) << PDMA_RGB2YUV_COEF2_C3_SHIFT) & PDMA_RGB2YUV_COEF2_C3_MASK)

◆ PDMA_RGB2YUV_COEF2_C3_SHIFT

#define PDMA_RGB2YUV_COEF2_C3_SHIFT   (0U)

◆ PDMA_RGB2YUV_COEF3_C5_GET

#define PDMA_RGB2YUV_COEF3_C5_GET (   x)    (((uint32_t)(x) & PDMA_RGB2YUV_COEF3_C5_MASK) >> PDMA_RGB2YUV_COEF3_C5_SHIFT)

◆ PDMA_RGB2YUV_COEF3_C5_MASK

#define PDMA_RGB2YUV_COEF3_C5_MASK   (0x7FFU)

◆ PDMA_RGB2YUV_COEF3_C5_SET

#define PDMA_RGB2YUV_COEF3_C5_SET (   x)    (((uint32_t)(x) << PDMA_RGB2YUV_COEF3_C5_SHIFT) & PDMA_RGB2YUV_COEF3_C5_MASK)

◆ PDMA_RGB2YUV_COEF3_C5_SHIFT

#define PDMA_RGB2YUV_COEF3_C5_SHIFT   (0U)

◆ PDMA_RGB2YUV_COEF3_C6_GET

#define PDMA_RGB2YUV_COEF3_C6_GET (   x)    (((uint32_t)(x) & PDMA_RGB2YUV_COEF3_C6_MASK) >> PDMA_RGB2YUV_COEF3_C6_SHIFT)

◆ PDMA_RGB2YUV_COEF3_C6_MASK

#define PDMA_RGB2YUV_COEF3_C6_MASK   (0x7FF0000UL)

◆ PDMA_RGB2YUV_COEF3_C6_SET

#define PDMA_RGB2YUV_COEF3_C6_SET (   x)    (((uint32_t)(x) << PDMA_RGB2YUV_COEF3_C6_SHIFT) & PDMA_RGB2YUV_COEF3_C6_MASK)

◆ PDMA_RGB2YUV_COEF3_C6_SHIFT

#define PDMA_RGB2YUV_COEF3_C6_SHIFT   (16U)

◆ PDMA_RGB2YUV_COEF4_C7_GET

#define PDMA_RGB2YUV_COEF4_C7_GET (   x)    (((uint32_t)(x) & PDMA_RGB2YUV_COEF4_C7_MASK) >> PDMA_RGB2YUV_COEF4_C7_SHIFT)

◆ PDMA_RGB2YUV_COEF4_C7_MASK

#define PDMA_RGB2YUV_COEF4_C7_MASK   (0x7FFU)

◆ PDMA_RGB2YUV_COEF4_C7_SET

#define PDMA_RGB2YUV_COEF4_C7_SET (   x)    (((uint32_t)(x) << PDMA_RGB2YUV_COEF4_C7_SHIFT) & PDMA_RGB2YUV_COEF4_C7_MASK)

◆ PDMA_RGB2YUV_COEF4_C7_SHIFT

#define PDMA_RGB2YUV_COEF4_C7_SHIFT   (0U)

◆ PDMA_RGB2YUV_COEF4_C8_GET

#define PDMA_RGB2YUV_COEF4_C8_GET (   x)    (((uint32_t)(x) & PDMA_RGB2YUV_COEF4_C8_MASK) >> PDMA_RGB2YUV_COEF4_C8_SHIFT)

◆ PDMA_RGB2YUV_COEF4_C8_MASK

#define PDMA_RGB2YUV_COEF4_C8_MASK   (0x7FF0000UL)

◆ PDMA_RGB2YUV_COEF4_C8_SET

#define PDMA_RGB2YUV_COEF4_C8_SET (   x)    (((uint32_t)(x) << PDMA_RGB2YUV_COEF4_C8_SHIFT) & PDMA_RGB2YUV_COEF4_C8_MASK)

◆ PDMA_RGB2YUV_COEF4_C8_SHIFT

#define PDMA_RGB2YUV_COEF4_C8_SHIFT   (16U)

◆ PDMA_STAT_AXI_0_READ_ERR_GET

#define PDMA_STAT_AXI_0_READ_ERR_GET (   x)    (((uint32_t)(x) & PDMA_STAT_AXI_0_READ_ERR_MASK) >> PDMA_STAT_AXI_0_READ_ERR_SHIFT)

◆ PDMA_STAT_AXI_0_READ_ERR_MASK

#define PDMA_STAT_AXI_0_READ_ERR_MASK   (0x4U)

◆ PDMA_STAT_AXI_0_READ_ERR_SET

#define PDMA_STAT_AXI_0_READ_ERR_SET (   x)    (((uint32_t)(x) << PDMA_STAT_AXI_0_READ_ERR_SHIFT) & PDMA_STAT_AXI_0_READ_ERR_MASK)

◆ PDMA_STAT_AXI_0_READ_ERR_SHIFT

#define PDMA_STAT_AXI_0_READ_ERR_SHIFT   (2U)

◆ PDMA_STAT_AXI_0_WRITE_ERR_GET

#define PDMA_STAT_AXI_0_WRITE_ERR_GET (   x)    (((uint32_t)(x) & PDMA_STAT_AXI_0_WRITE_ERR_MASK) >> PDMA_STAT_AXI_0_WRITE_ERR_SHIFT)

◆ PDMA_STAT_AXI_0_WRITE_ERR_MASK

#define PDMA_STAT_AXI_0_WRITE_ERR_MASK   (0x10U)

◆ PDMA_STAT_AXI_0_WRITE_ERR_SET

#define PDMA_STAT_AXI_0_WRITE_ERR_SET (   x)    (((uint32_t)(x) << PDMA_STAT_AXI_0_WRITE_ERR_SHIFT) & PDMA_STAT_AXI_0_WRITE_ERR_MASK)

◆ PDMA_STAT_AXI_0_WRITE_ERR_SHIFT

#define PDMA_STAT_AXI_0_WRITE_ERR_SHIFT   (4U)

◆ PDMA_STAT_AXI_1_READ_ERR_GET

#define PDMA_STAT_AXI_1_READ_ERR_GET (   x)    (((uint32_t)(x) & PDMA_STAT_AXI_1_READ_ERR_MASK) >> PDMA_STAT_AXI_1_READ_ERR_SHIFT)

◆ PDMA_STAT_AXI_1_READ_ERR_MASK

#define PDMA_STAT_AXI_1_READ_ERR_MASK   (0x8U)

◆ PDMA_STAT_AXI_1_READ_ERR_SET

#define PDMA_STAT_AXI_1_READ_ERR_SET (   x)    (((uint32_t)(x) << PDMA_STAT_AXI_1_READ_ERR_SHIFT) & PDMA_STAT_AXI_1_READ_ERR_MASK)

◆ PDMA_STAT_AXI_1_READ_ERR_SHIFT

#define PDMA_STAT_AXI_1_READ_ERR_SHIFT   (3U)

◆ PDMA_STAT_AXI_ERR_ID_GET

#define PDMA_STAT_AXI_ERR_ID_GET (   x)    (((uint32_t)(x) & PDMA_STAT_AXI_ERR_ID_MASK) >> PDMA_STAT_AXI_ERR_ID_SHIFT)

◆ PDMA_STAT_AXI_ERR_ID_MASK

#define PDMA_STAT_AXI_ERR_ID_MASK   (0x1E0U)

◆ PDMA_STAT_AXI_ERR_ID_SHIFT

#define PDMA_STAT_AXI_ERR_ID_SHIFT   (5U)

◆ PDMA_STAT_BLOCKX_GET

#define PDMA_STAT_BLOCKX_GET (   x)    (((uint32_t)(x) & PDMA_STAT_BLOCKX_MASK) >> PDMA_STAT_BLOCKX_SHIFT)

◆ PDMA_STAT_BLOCKX_MASK

#define PDMA_STAT_BLOCKX_MASK   (0xFF0000UL)

◆ PDMA_STAT_BLOCKX_SHIFT

#define PDMA_STAT_BLOCKX_SHIFT   (16U)

◆ PDMA_STAT_BLOCKY_GET

#define PDMA_STAT_BLOCKY_GET (   x)    (((uint32_t)(x) & PDMA_STAT_BLOCKY_MASK) >> PDMA_STAT_BLOCKY_SHIFT)

◆ PDMA_STAT_BLOCKY_MASK

#define PDMA_STAT_BLOCKY_MASK   (0xFF000000UL)

◆ PDMA_STAT_BLOCKY_SHIFT

#define PDMA_STAT_BLOCKY_SHIFT   (24U)

◆ PDMA_STAT_IRQ_GET

#define PDMA_STAT_IRQ_GET (   x)    (((uint32_t)(x) & PDMA_STAT_IRQ_MASK) >> PDMA_STAT_IRQ_SHIFT)

◆ PDMA_STAT_IRQ_MASK

#define PDMA_STAT_IRQ_MASK   (0x1U)

◆ PDMA_STAT_IRQ_SHIFT

#define PDMA_STAT_IRQ_SHIFT   (0U)

◆ PDMA_STAT_PDMA_DONE_GET

#define PDMA_STAT_PDMA_DONE_GET (   x)    (((uint32_t)(x) & PDMA_STAT_PDMA_DONE_MASK) >> PDMA_STAT_PDMA_DONE_SHIFT)

◆ PDMA_STAT_PDMA_DONE_MASK

#define PDMA_STAT_PDMA_DONE_MASK   (0x200U)

◆ PDMA_STAT_PDMA_DONE_SET

#define PDMA_STAT_PDMA_DONE_SET (   x)    (((uint32_t)(x) << PDMA_STAT_PDMA_DONE_SHIFT) & PDMA_STAT_PDMA_DONE_MASK)

◆ PDMA_STAT_PDMA_DONE_SHIFT

#define PDMA_STAT_PDMA_DONE_SHIFT   (9U)

◆ PDMA_YUV2RGB_COEF0_C0_GET

#define PDMA_YUV2RGB_COEF0_C0_GET (   x)    (((uint32_t)(x) & PDMA_YUV2RGB_COEF0_C0_MASK) >> PDMA_YUV2RGB_COEF0_C0_SHIFT)

◆ PDMA_YUV2RGB_COEF0_C0_MASK

#define PDMA_YUV2RGB_COEF0_C0_MASK   (0x1FFC0000UL)

◆ PDMA_YUV2RGB_COEF0_C0_SET

#define PDMA_YUV2RGB_COEF0_C0_SET (   x)    (((uint32_t)(x) << PDMA_YUV2RGB_COEF0_C0_SHIFT) & PDMA_YUV2RGB_COEF0_C0_MASK)

◆ PDMA_YUV2RGB_COEF0_C0_SHIFT

#define PDMA_YUV2RGB_COEF0_C0_SHIFT   (18U)

◆ PDMA_YUV2RGB_COEF0_UV_OFFSET_GET

#define PDMA_YUV2RGB_COEF0_UV_OFFSET_GET (   x)    (((uint32_t)(x) & PDMA_YUV2RGB_COEF0_UV_OFFSET_MASK) >> PDMA_YUV2RGB_COEF0_UV_OFFSET_SHIFT)

◆ PDMA_YUV2RGB_COEF0_UV_OFFSET_MASK

#define PDMA_YUV2RGB_COEF0_UV_OFFSET_MASK   (0x3FE00UL)

◆ PDMA_YUV2RGB_COEF0_UV_OFFSET_SET

#define PDMA_YUV2RGB_COEF0_UV_OFFSET_SET (   x)    (((uint32_t)(x) << PDMA_YUV2RGB_COEF0_UV_OFFSET_SHIFT) & PDMA_YUV2RGB_COEF0_UV_OFFSET_MASK)

◆ PDMA_YUV2RGB_COEF0_UV_OFFSET_SHIFT

#define PDMA_YUV2RGB_COEF0_UV_OFFSET_SHIFT   (9U)

◆ PDMA_YUV2RGB_COEF0_Y_OFFSET_GET

#define PDMA_YUV2RGB_COEF0_Y_OFFSET_GET (   x)    (((uint32_t)(x) & PDMA_YUV2RGB_COEF0_Y_OFFSET_MASK) >> PDMA_YUV2RGB_COEF0_Y_OFFSET_SHIFT)

◆ PDMA_YUV2RGB_COEF0_Y_OFFSET_MASK

#define PDMA_YUV2RGB_COEF0_Y_OFFSET_MASK   (0x1FFU)

◆ PDMA_YUV2RGB_COEF0_Y_OFFSET_SET

#define PDMA_YUV2RGB_COEF0_Y_OFFSET_SET (   x)    (((uint32_t)(x) << PDMA_YUV2RGB_COEF0_Y_OFFSET_SHIFT) & PDMA_YUV2RGB_COEF0_Y_OFFSET_MASK)

◆ PDMA_YUV2RGB_COEF0_Y_OFFSET_SHIFT

#define PDMA_YUV2RGB_COEF0_Y_OFFSET_SHIFT   (0U)

◆ PDMA_YUV2RGB_COEF1_C1_GET

#define PDMA_YUV2RGB_COEF1_C1_GET (   x)    (((uint32_t)(x) & PDMA_YUV2RGB_COEF1_C1_MASK) >> PDMA_YUV2RGB_COEF1_C1_SHIFT)

◆ PDMA_YUV2RGB_COEF1_C1_MASK

#define PDMA_YUV2RGB_COEF1_C1_MASK   (0x7FF0000UL)

◆ PDMA_YUV2RGB_COEF1_C1_SET

#define PDMA_YUV2RGB_COEF1_C1_SET (   x)    (((uint32_t)(x) << PDMA_YUV2RGB_COEF1_C1_SHIFT) & PDMA_YUV2RGB_COEF1_C1_MASK)

◆ PDMA_YUV2RGB_COEF1_C1_SHIFT

#define PDMA_YUV2RGB_COEF1_C1_SHIFT   (16U)

◆ PDMA_YUV2RGB_COEF1_C4_GET

#define PDMA_YUV2RGB_COEF1_C4_GET (   x)    (((uint32_t)(x) & PDMA_YUV2RGB_COEF1_C4_MASK) >> PDMA_YUV2RGB_COEF1_C4_SHIFT)

◆ PDMA_YUV2RGB_COEF1_C4_MASK

#define PDMA_YUV2RGB_COEF1_C4_MASK   (0x7FFU)

◆ PDMA_YUV2RGB_COEF1_C4_SET

#define PDMA_YUV2RGB_COEF1_C4_SET (   x)    (((uint32_t)(x) << PDMA_YUV2RGB_COEF1_C4_SHIFT) & PDMA_YUV2RGB_COEF1_C4_MASK)

◆ PDMA_YUV2RGB_COEF1_C4_SHIFT

#define PDMA_YUV2RGB_COEF1_C4_SHIFT   (0U)

◆ PDMA_YUV2RGB_COEF2_C2_GET

#define PDMA_YUV2RGB_COEF2_C2_GET (   x)    (((uint32_t)(x) & PDMA_YUV2RGB_COEF2_C2_MASK) >> PDMA_YUV2RGB_COEF2_C2_SHIFT)

◆ PDMA_YUV2RGB_COEF2_C2_MASK

#define PDMA_YUV2RGB_COEF2_C2_MASK   (0x7FF0000UL)

◆ PDMA_YUV2RGB_COEF2_C2_SET

#define PDMA_YUV2RGB_COEF2_C2_SET (   x)    (((uint32_t)(x) << PDMA_YUV2RGB_COEF2_C2_SHIFT) & PDMA_YUV2RGB_COEF2_C2_MASK)

◆ PDMA_YUV2RGB_COEF2_C2_SHIFT

#define PDMA_YUV2RGB_COEF2_C2_SHIFT   (16U)

◆ PDMA_YUV2RGB_COEF2_C3_GET

#define PDMA_YUV2RGB_COEF2_C3_GET (   x)    (((uint32_t)(x) & PDMA_YUV2RGB_COEF2_C3_MASK) >> PDMA_YUV2RGB_COEF2_C3_SHIFT)

◆ PDMA_YUV2RGB_COEF2_C3_MASK

#define PDMA_YUV2RGB_COEF2_C3_MASK   (0x7FFU)

◆ PDMA_YUV2RGB_COEF2_C3_SET

#define PDMA_YUV2RGB_COEF2_C3_SET (   x)    (((uint32_t)(x) << PDMA_YUV2RGB_COEF2_C3_SHIFT) & PDMA_YUV2RGB_COEF2_C3_MASK)

◆ PDMA_YUV2RGB_COEF2_C3_SHIFT

#define PDMA_YUV2RGB_COEF2_C3_SHIFT   (0U)