HPM SDK
HPMicro Software Development Kit
hpm_romapi.h
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1 /*
2  * Copyright (c) 2023-2024 HPMicro
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  *
6  */
7 
8 #ifndef HPM_ROMAPI_H
9 #define HPM_ROMAPI_H
10 
17 #include "hpm_common.h"
18 #include "hpm_otp_drv.h"
19 #include "hpm_romapi_xpi_def.h"
20 #include "hpm_romapi_xpi_soc_def.h"
21 #include "hpm_romapi_xpi_nor_def.h"
22 #include "hpm_romapi_xpi_ram_def.h"
23 #include "hpm_sdp_drv.h"
24 
25 /* XPI0 base address */
26 #define HPM_XPI0_BASE (0xF3000000UL)
27 /* XPI0 base pointer */
28 #define HPM_XPI0 ((XPI_Type *) HPM_XPI0_BASE)
31 /***********************************************************************************************************************
32  *
33  *
34  * Definitions
35  *
36  *
37  **********************************************************************************************************************/
41 typedef union {
42  uint32_t U;
43  struct {
44  uint32_t index: 8;
45  uint32_t peripheral: 8;
46  uint32_t src: 8;
47  uint32_t tag: 8;
48  };
50 
51 /*EXiP Region Parameter */
52 typedef struct {
53  uint32_t start;
54  uint32_t len;
55  uint8_t key[16];
56  uint8_t ctr[8];
58 
59 typedef struct {
60  uint32_t region_start;
61  uint32_t region_end;
62  uint8_t aes_key[16];
63  uint8_t nonce[8];
64  uint8_t index;
65  bool enable;
66  bool valid;
67  bool lock;
69 
70 #define API_BOOT_TAG (0xEBU)
71 #define API_BOOT_SRC_OTP (0U)
72 #define API_BOOT_SRC_PRIMARY (1U)
73 #define API_BOOT_SRC_SERIAL_BOOT (2U)
74 #define API_BOOT_SRC_ISP (3U)
75 #define API_BOOT_PERIPH_AUTO (0U)
76 #define API_BOOT_PERIPH_UART (1U)
77 #define API_BOOT_PERIPH_USBHID (2U)
82 typedef struct {
84  uint32_t version;
86  void (*init)(void);
88  void (*deinit)(void);
90  uint32_t (*read_from_shadow)(uint32_t addr);
92  uint32_t (*read_from_ip)(uint32_t addr);
94  hpm_stat_t (*program)(uint32_t addr, const uint32_t *src, uint32_t num_of_words);
96  hpm_stat_t (*reload)(otp_region_t region);
98  hpm_stat_t (*lock)(uint32_t addr, otp_lock_option_t lock_option);
100  hpm_stat_t (*lock_shadow)(uint32_t addr, otp_lock_option_t lock_option);
102  hpm_stat_t (*set_configurable_region)(uint32_t start, uint32_t num_of_words);
104  hpm_stat_t (*write_shadow_register)(uint32_t addr, uint32_t data);
106 
110 typedef struct {
112  uint32_t version;
114  hpm_stat_t (*get_default_config)(xpi_config_t *xpi_config);
116  hpm_stat_t (*get_default_device_config)(xpi_device_config_t *dev_config);
118  hpm_stat_t (*init)(XPI_Type *base, xpi_config_t *xpi_config);
120  hpm_stat_t (*config_ahb_buffer)(XPI_Type *base, xpi_ahb_buffer_cfg_t *ahb_buf_cfg);
122  hpm_stat_t (*config_device)(XPI_Type *base, xpi_device_config_t *dev_cfg, xpi_channel_t channel);
124  hpm_stat_t (*update_instr_table)(XPI_Type *base, const uint32_t *inst_base, uint32_t seq_idx, uint32_t num);
126  hpm_stat_t (*transfer_blocking)(XPI_Type *base, xpi_xfer_ctx_t *xfer);
128  void (*software_reset)(XPI_Type *base);
130  bool (*is_idle)(XPI_Type *base);
132  void (*update_dllcr)(XPI_Type *base,
133  uint32_t serial_root_clk_freq,
134  uint32_t data_valid_time,
135  xpi_channel_t channel,
136  uint32_t dly_target);
138  hpm_stat_t
139  (*get_abs_apb_xfer_addr)(XPI_Type *base, xpi_xfer_channel_t channel, uint32_t in_addr, uint32_t *out_addr);
141 
145 typedef struct {
147  uint32_t version;
148 
150  hpm_stat_t (*get_config)(XPI_Type *base, xpi_ram_config_t *ram_cfg, xpi_ram_config_option_t *cfg_option);
151 
153  hpm_stat_t (*init)(XPI_Type *base, xpi_ram_config_t *ram_cfg);
155 
156 
160 typedef struct {
162  uint32_t version;
164  hpm_stat_t (*get_config)(XPI_Type *base, xpi_nor_config_t *nor_cfg, xpi_nor_config_option_t *cfg_option);
166  hpm_stat_t (*init)(XPI_Type *base, xpi_nor_config_t *nor_config);
168  hpm_stat_t
169  (*enable_write)(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t addr);
171  hpm_stat_t (*get_status)(XPI_Type *base,
172  xpi_xfer_channel_t channel,
173  const xpi_nor_config_t *nor_config,
174  uint32_t addr,
175  uint16_t *out_status);
177  hpm_stat_t
178  (*wait_busy)(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t addr);
180  hpm_stat_t (*erase)(XPI_Type *base,
181  xpi_xfer_channel_t channel,
182  const xpi_nor_config_t *nor_config,
183  uint32_t start,
184  uint32_t length);
186  hpm_stat_t (*erase_chip)(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config);
188  hpm_stat_t
189  (*erase_sector)(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t addr);
191  hpm_stat_t
192  (*erase_block)(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t addr);
194  hpm_stat_t (*program)(XPI_Type *base,
195  xpi_xfer_channel_t channel,
196  const xpi_nor_config_t *nor_config,
197  const uint32_t *src,
198  uint32_t dst_addr,
199  uint32_t length);
201  hpm_stat_t (*read)(XPI_Type *base,
202  xpi_xfer_channel_t channel,
203  const xpi_nor_config_t *nor_config,
204  uint32_t *dst,
205  uint32_t start,
206  uint32_t length);
208  hpm_stat_t (*page_program_nonblocking)(XPI_Type *base,
209  xpi_xfer_channel_t channel,
210  const xpi_nor_config_t *nor_config,
211  const uint32_t *src,
212  uint32_t dst_addr,
213  uint32_t length);
215  hpm_stat_t (*erase_sector_nonblocking)(XPI_Type *base,
216  xpi_xfer_channel_t channel,
217  const xpi_nor_config_t *nor_config,
218  uint32_t addr);
220  hpm_stat_t (*erase_block_nonblocking)(XPI_Type *base,
221  xpi_xfer_channel_t channel,
222  const xpi_nor_config_t *nor_config,
223  uint32_t addr);
225  hpm_stat_t
226  (*erase_chip_nonblocking)(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config);
227 
228  uint32_t reserved0[3];
229 
231  hpm_stat_t (*auto_config)(XPI_Type *base, xpi_nor_config_t *nor_cfg, xpi_nor_config_option_t *cfg_option);
232 
234  hpm_stat_t (*get_property)(XPI_Type *base, xpi_nor_config_t *nor_cfg, uint32_t property_id, uint32_t *value);
235 
237 
241 typedef struct {
242  uint32_t version;
243  hpm_stat_t (*enable)(XPI_Type *base);
244  hpm_stat_t (*disable)(XPI_Type *base);
245  hpm_stat_t (*lock_reg_access)(XPI_Type *base);
246  hpm_stat_t (*configure_region)(XPI_Type *base, const exip_region_context_t *ctx);
247 
248  bool (*remap_config)(XPI_Type *base, uint32_t start, uint32_t len, uint32_t offset);
249  bool (*remap_enabled)(XPI_Type *base);
250  void (*remap_disable)(XPI_Type *base);
251  bool (*exip_region_config)(XPI_Type *base, uint32_t index, exip_region_param_t *param);
252  void (*exip_region_disable)(XPI_Type *base, uint32_t index);
254 
258 typedef struct {
260  uint32_t version;
262  hpm_stat_t (*sdp_ip_init)(void);
264  hpm_stat_t (*sdp_ip_deinit)(void);
266  hpm_stat_t (*aes_set_key)(sdp_aes_ctx_t *aes_ctx, const uint8_t *key, sdp_aes_key_bits_t keybits, uint32_t key_idx);
268  hpm_stat_t (*aes_crypt_ecb)(sdp_aes_ctx_t *aes_ctx, sdp_aes_op_t op, uint32_t len, const uint8_t *in, uint8_t *out);
270  hpm_stat_t (*aes_crypt_cbc)(sdp_aes_ctx_t *aes_ctx,
271  sdp_aes_op_t op,
272  uint32_t length,
273  uint8_t iv[16],
274  const uint8_t *input,
275  uint8_t *output);
277  hpm_stat_t
278  (*aes_crypt_ctr)(sdp_aes_ctx_t *aes_ctx, uint8_t *nonce_ctr, uint8_t *input, uint8_t *output, uint32_t length);
280  hpm_stat_t (*aes_ccm_gen_enc)(sdp_aes_ctx_t *aes_ctx,
281  uint32_t input_len,
282  const uint8_t *nonce,
283  uint32_t nonce_len,
284  const uint8_t *aad,
285  uint32_t aad_len,
286  const uint8_t *input,
287  uint8_t *output,
288  uint8_t *tag,
289  uint32_t tag_len);
291  hpm_stat_t (*aes_ccm_dec_verify)(sdp_aes_ctx_t *aes_ctx,
292  uint32_t input_len,
293  const uint8_t *nonce,
294  uint32_t nonce_len,
295  const uint8_t *aad,
296  uint32_t aad_len,
297  const uint8_t *input,
298  uint8_t *output,
299  const uint8_t *tag,
300  uint32_t tag_len);
302  hpm_stat_t (*memcpy)(sdp_dma_ctx_t *dma_ctx, void *dst, const void *src, uint32_t length);
304  hpm_stat_t (*memset)(sdp_dma_ctx_t *dma_ctx, void *dst, uint8_t pattern, uint32_t length);
306  hpm_stat_t (*hash_init)(sdp_hash_ctx_t *hash_ctx, sdp_hash_alg_t alg);
308  hpm_stat_t (*hash_update)(sdp_hash_ctx_t *hash_ctx, const uint8_t *data, uint32_t length);
310  hpm_stat_t (*hash_finish)(sdp_hash_ctx_t *hash_ctx, uint8_t *digest);
312  hpm_stat_t (*sm4_set_key)(sdp_sm4_ctx_t *sm4_ctx, const uint8_t *key, sdp_sm4_key_bits_t keybits, uint32_t key_idx);
314  hpm_stat_t (*sm4_crypt_ecb)(sdp_sm4_ctx_t *sm4_ctx, sdp_sm4_op_t op, uint32_t len, const uint8_t *in, uint8_t *out);
316  hpm_stat_t (*sm4_crypt_cbc)(sdp_sm4_ctx_t *sm4_ctx,
317  sdp_sm4_op_t op,
318  uint32_t length,
319  uint8_t iv[16],
320  const uint8_t *input,
321  uint8_t *output);
323  hpm_stat_t
324  (*sm4_crypt_ctr)(sdp_sm4_ctx_t *sm4_ctx, uint8_t *nonce_ctr, uint8_t *input, uint8_t *output, uint32_t length);
326  hpm_stat_t (*sm4_ccm_gen_enc)(sdp_sm4_ctx_t *sm4_ctx,
327  uint32_t input_len,
328  const uint8_t *nonce,
329  uint32_t nonce_len,
330  const uint8_t *aad,
331  uint32_t aad_len,
332  const uint8_t *input,
333  uint8_t *output,
334  uint8_t *tag,
335  uint32_t tag_len);
337  hpm_stat_t (*sm4_ccm_dec_verify)(sdp_sm4_ctx_t *sm4_ctx,
338  uint32_t input_len,
339  const uint8_t *nonce,
340  uint32_t nonce_len,
341  const uint8_t *aad,
342  uint32_t aad_len,
343  const uint8_t *input,
344  uint8_t *output,
345  const uint8_t *tag,
346  uint32_t tag_len);
348 
352 typedef struct {
354  const uint32_t version;
356  const char *copyright;
358  hpm_stat_t (*run_bootloader)(void *arg);
360  const otp_driver_interface_t *otp_driver_if;
362  const xpi_driver_interface_t *xpi_driver_if;
364  const xpi_nor_driver_interface_t *xpi_nor_driver_if;
366  const xpi_ram_driver_interface_t *xpi_ram_driver_if;
368  const sdp_driver_interface_t *sdp_driver_if;
369  const uint32_t reserved1[3];
370  const exip_driver_interface_t *exip_api_if;
371  const uint32_t family_id;
373 
375 #define ROM_API_TABLE_ROOT ((const bootloader_api_table_t *)0x2001FF00U)
376 
377 
378 #ifdef __cplusplus
379 extern "C" {
380 #endif
381 
382 /***********************************************************************************************************************
383  *
384  *
385  * Enter bootloader Wrapper
386  *
387  *
388  **********************************************************************************************************************/
389 
395 static inline hpm_stat_t rom_enter_bootloader(void *ctx)
396 {
397  return ROM_API_TABLE_ROOT->run_bootloader(ctx);
398 }
399 
400 /***********************************************************************************************************************
401  *
402  *
403  * XPI NOR Driver Wrapper
404  *
405  *
406  **********************************************************************************************************************/
407 
415 ATTR_RAMFUNC
417  xpi_nor_config_t *nor_cfg,
418  xpi_nor_config_option_t *cfg_option)
419 {
420  hpm_stat_t status;
421  status = ROM_API_TABLE_ROOT->xpi_nor_driver_if->get_config(base, nor_cfg, cfg_option);
422  fencei();
423  return status;
424 }
425 
432 ATTR_RAMFUNC
433 static inline hpm_stat_t rom_xpi_nor_init(XPI_Type *base, xpi_nor_config_t *nor_config)
434 {
435  hpm_stat_t status;
436  status = ROM_API_TABLE_ROOT->xpi_nor_driver_if->init(base, nor_config);
437  fencei();
438  return status;
439 }
440 
450 ATTR_RAMFUNC
452  xpi_xfer_channel_t channel,
453  const xpi_nor_config_t *nor_config,
454  uint32_t start,
455  uint32_t length)
456 {
457  hpm_stat_t status = ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase(base, channel, nor_config, start, length);
458  fencei();
459  return status;
460 }
461 
470 ATTR_RAMFUNC
472  xpi_xfer_channel_t channel,
473  const xpi_nor_config_t *nor_config,
474  uint32_t start)
475 {
476  hpm_stat_t status = ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase_sector(base, channel, nor_config, start);
477  fencei();
478  return status;
479 }
480 
489 ATTR_RAMFUNC
491  xpi_xfer_channel_t channel,
492  const xpi_nor_config_t *nor_config,
493  uint32_t start)
494 {
495  return ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase_sector_nonblocking(base, channel, nor_config, start);
496 }
497 
506 ATTR_RAMFUNC
508  xpi_xfer_channel_t channel,
509  const xpi_nor_config_t *nor_config,
510  uint32_t start)
511 {
512  hpm_stat_t status = ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase_block(base, channel, nor_config, start);
513  fencei();
514  return status;
515 }
516 
525 ATTR_RAMFUNC
527  xpi_xfer_channel_t channel,
528  const xpi_nor_config_t *nor_config,
529  uint32_t start)
530 {
531  return ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase_block_nonblocking(base, channel, nor_config, start);
532 }
533 
541 ATTR_RAMFUNC
543  xpi_xfer_channel_t channel,
544  const xpi_nor_config_t *nor_config)
545 {
546  hpm_stat_t status = ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase_chip(base, channel, nor_config);
547  fencei();
548  return status;
549 }
550 
558 ATTR_RAMFUNC
560  xpi_xfer_channel_t channel,
561  const xpi_nor_config_t *nor_config)
562 {
563  hpm_stat_t status = ROM_API_TABLE_ROOT->xpi_nor_driver_if->erase_chip_nonblocking(base, channel, nor_config);
564  fencei();
565  return status;
566 }
567 
578 ATTR_RAMFUNC
580  xpi_xfer_channel_t channel,
581  const xpi_nor_config_t *nor_config,
582  const uint32_t *src,
583  uint32_t dst_addr,
584  uint32_t length)
585 {
586  hpm_stat_t status = ROM_API_TABLE_ROOT->xpi_nor_driver_if->program(base, channel, nor_config, src, dst_addr, length);
587  fencei();
588  return status;
589 }
590 
601 ATTR_RAMFUNC
603  xpi_xfer_channel_t channel,
604  const xpi_nor_config_t *nor_config,
605  const uint32_t *src,
606  uint32_t dst_addr,
607  uint32_t length)
608 {
609  return ROM_API_TABLE_ROOT->xpi_nor_driver_if
610  ->page_program_nonblocking(base, channel, nor_config, src, dst_addr, length);
611 }
612 
624  xpi_xfer_channel_t channel,
625  const xpi_nor_config_t *nor_config,
626  uint32_t *dst,
627  uint32_t start,
628  uint32_t length)
629 {
630  return ROM_API_TABLE_ROOT->xpi_nor_driver_if->read(base, channel, nor_config, dst, start, length);
631 }
632 
640 ATTR_RAMFUNC
642  xpi_nor_config_t *config,
643  xpi_nor_config_option_t *cfg_option)
644 {
645  hpm_stat_t status;
646  status = ROM_API_TABLE_ROOT->xpi_nor_driver_if->auto_config(base, config, cfg_option);
647  fencei();
648  return status;
649 }
650 
660  xpi_nor_config_t *nor_cfg,
661  uint32_t property_id,
662  uint32_t *value)
663 {
664  return ROM_API_TABLE_ROOT->xpi_nor_driver_if->get_property(base, nor_cfg, property_id, value);
665 }
666 
678  xpi_xfer_channel_t channel,
679  const xpi_nor_config_t *nor_config,
680  uint32_t addr,
681  uint16_t *out_status)
682 {
683  return ROM_API_TABLE_ROOT->xpi_nor_driver_if->get_status(base, channel, nor_config, addr, out_status);
684 }
685 
695 ATTR_RAMFUNC
696 static inline bool rom_xpi_nor_remap_config(XPI_Type *base, uint32_t start, uint32_t len, uint32_t offset)
697 {
698  return ROM_API_TABLE_ROOT->exip_api_if->remap_config(base, start, len, offset);
699 }
700 
705 ATTR_RAMFUNC
706 static inline void rom_xpi_nor_remap_disable(XPI_Type *base)
707 {
708  ROM_API_TABLE_ROOT->exip_api_if->remap_disable(base);
709  fencei();
710 }
711 
719 ATTR_RAMFUNC
720 static inline bool rom_xpi_nor_is_remap_enabled(XPI_Type *base)
721 {
722  return ROM_API_TABLE_ROOT->exip_api_if->remap_enabled(base);
723 }
724 
733 ATTR_RAMFUNC
734 static inline bool rom_xpi_nor_exip_region_config(XPI_Type *base, uint32_t index, exip_region_param_t *param)
735 {
736  bool result = ROM_API_TABLE_ROOT->exip_api_if->exip_region_config(base, index, param);
737  ROM_API_TABLE_ROOT->xpi_driver_if->software_reset(base);
738  fencei();
739  return result;
740 }
741 
747 ATTR_RAMFUNC
748 static inline void rom_xpi_nor_exip_region_disable(XPI_Type *base, uint32_t index)
749 {
750  ROM_API_TABLE_ROOT->exip_api_if->exip_region_disable(base, index);
751  fencei();
752 }
753 
758 ATTR_RAMFUNC
759 static inline void rom_xpi_nor_exip_enable(XPI_Type *base)
760 {
761  ROM_API_TABLE_ROOT->exip_api_if->enable(base);
762  fencei();
763 }
764 
769 ATTR_RAMFUNC
770 static inline void rom_xpi_nor_exip_disable(XPI_Type *base)
771 {
772  ROM_API_TABLE_ROOT->exip_api_if->disable(base);
773  fencei();
774 }
775 
776 /***********************************************************************************************************************
777  *
778  *
779  * XPI RAM Driver Wrapper
780  *
781  *
782  **********************************************************************************************************************/
791  xpi_ram_config_t *ram_cfg,
792  xpi_ram_config_option_t *cfg_option)
793 {
794  return ROM_API_TABLE_ROOT->xpi_ram_driver_if->get_config(base, ram_cfg, cfg_option);
795 }
796 
803 static inline hpm_stat_t rom_xpi_ram_init(XPI_Type *base, xpi_ram_config_t *ram_cfg)
804 {
805  return ROM_API_TABLE_ROOT->xpi_ram_driver_if->init(base, ram_cfg);
806 }
807 
808 /***********************************************************************************************************************
809  *
810  *
811  * SDP Driver Wrapper
812  *
813  *
814  **********************************************************************************************************************/
818 static inline void rom_sdp_init(void)
819 {
820  ROM_API_TABLE_ROOT->sdp_driver_if->sdp_ip_init();
821 }
822 
826 static inline void rom_sdp_deinit(void)
827 {
828  ROM_API_TABLE_ROOT->sdp_driver_if->sdp_ip_deinit();
829 }
830 
840  const uint8_t *key,
841  sdp_aes_key_bits_t key_bits,
842  uint32_t key_idx)
843 {
844  return ROM_API_TABLE_ROOT->sdp_driver_if->aes_set_key(aes_ctx, key, key_bits, key_idx);
845 }
846 
857  sdp_aes_op_t op,
858  uint32_t len,
859  const uint8_t *in,
860  uint8_t *out)
861 {
862  return ROM_API_TABLE_ROOT->sdp_driver_if->aes_crypt_ecb(aes_ctx, op, len, in, out);
863 }
864 
876  sdp_aes_op_t op,
877  uint32_t length,
878  uint8_t iv[16],
879  const uint8_t *in,
880  uint8_t *out)
881 {
882  return ROM_API_TABLE_ROOT->sdp_driver_if->aes_crypt_cbc(aes_ctx, op, length, iv, in, out);
883 }
884 
893 static inline hpm_stat_t rom_sdp_sm4_set_key(sdp_sm4_ctx_t *sm4_ctx,
894  const uint8_t *key,
895  sdp_sm4_key_bits_t key_bits,
896  uint32_t key_idx)
897 {
898  return ROM_API_TABLE_ROOT->sdp_driver_if->sm4_set_key(sm4_ctx, key, key_bits, key_idx);
899 }
900 
910 static inline hpm_stat_t rom_sdp_sm4_crypt_ecb(sdp_sm4_ctx_t *sm4_ctx,
911  sdp_sm4_op_t op,
912  uint32_t len,
913  const uint8_t *in,
914  uint8_t *out)
915 {
916  return ROM_API_TABLE_ROOT->sdp_driver_if->sm4_crypt_ecb(sm4_ctx, op, len, in, out);
917 }
918 
929 static inline hpm_stat_t rom_sdp_sm4_crypt_cbc(sdp_sm4_ctx_t *sm4_ctx,
930  sdp_sm4_op_t op,
931  uint32_t length,
932  uint8_t iv[16],
933  const uint8_t *in,
934  uint8_t *out)
935 {
936  return ROM_API_TABLE_ROOT->sdp_driver_if->sm4_crypt_cbc(sm4_ctx, op, length, iv, in, out);
937 }
938 
946 {
947  return ROM_API_TABLE_ROOT->sdp_driver_if->hash_init(hash_ctx, alg);
948 }
949 
957 static inline hpm_stat_t rom_sdp_hash_update(sdp_hash_ctx_t *hash_ctx, const uint8_t *data, uint32_t length)
958 {
959  return ROM_API_TABLE_ROOT->sdp_driver_if->hash_update(hash_ctx, data, length);
960 }
961 
968 static inline hpm_stat_t rom_sdp_hash_finish(sdp_hash_ctx_t *hash_ctx, uint8_t *digest)
969 {
970  return ROM_API_TABLE_ROOT->sdp_driver_if->hash_finish(hash_ctx, digest);
971 }
972 
981 static inline hpm_stat_t rom_sdp_memcpy(sdp_dma_ctx_t *dma_ctx, void *dst, const void *src, uint32_t length)
982 {
983  return ROM_API_TABLE_ROOT->sdp_driver_if->memcpy(dma_ctx, dst, src, length);
984 }
985 
994 static inline hpm_stat_t rom_sdp_memset(sdp_dma_ctx_t *dma_ctx, void *dst, uint8_t pattern, uint32_t length)
995 {
996  return ROM_API_TABLE_ROOT->sdp_driver_if->memset(dma_ctx, dst, pattern, length);
997 }
998 
999 #ifdef __cplusplus
1000 }
1001 #endif
1002 
1008 #endif /* HPM_ROMAPI_H */
static hpm_stat_t rom_sdp_memset(sdp_dma_ctx_t *dma_ctx, void *dst, uint8_t pattern, uint32_t length)
SDP memset operation.
Definition: hpm_romapi.h:994
static hpm_stat_t rom_sdp_aes_crypt_cbc(sdp_aes_ctx_t *aes_ctx, sdp_aes_op_t op, uint32_t length, uint8_t iv[16], const uint8_t *in, uint8_t *out)
SDP AES CBC crypto operation(Encrypt or Decrypt)
Definition: hpm_romapi.h:875
static ATTR_RAMFUNC hpm_stat_t rom_xpi_nor_auto_config(XPI_Type *base, xpi_nor_config_t *config, xpi_nor_config_option_t *cfg_option)
Automatically configure XPI NOR based on cfg_option.
Definition: hpm_romapi.h:641
static ATTR_RAMFUNC hpm_stat_t rom_xpi_nor_init(XPI_Type *base, xpi_nor_config_t *nor_config)
Initialize XPI NOR based on nor_config.
Definition: hpm_romapi.h:433
static hpm_stat_t rom_xpi_nor_read(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t *dst, uint32_t start, uint32_t length)
Read data from specified FLASH address.
Definition: hpm_romapi.h:623
static hpm_stat_t rom_sdp_sm4_crypt_cbc(sdp_sm4_ctx_t *sm4_ctx, sdp_sm4_op_t op, uint32_t length, uint8_t iv[16], const uint8_t *in, uint8_t *out)
SDP SM4 CBC crypto operation(Encrypt or Decrypt)
Definition: hpm_romapi.h:929
static ATTR_RAMFUNC hpm_stat_t rom_xpi_nor_erase_chip_nonblocking(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config)
Erase the whole FLASH in non-blocking way.
Definition: hpm_romapi.h:559
static ATTR_RAMFUNC hpm_stat_t rom_xpi_nor_erase_chip(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config)
Erase the whole FLASH in blocking way.
Definition: hpm_romapi.h:542
static hpm_stat_t rom_sdp_memcpy(sdp_dma_ctx_t *dma_ctx, void *dst, const void *src, uint32_t length)
SDP memcpy operation.
Definition: hpm_romapi.h:981
static ATTR_RAMFUNC hpm_stat_t rom_xpi_nor_erase_block(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t start)
Erase specified FLASH blcok in blocking way.
Definition: hpm_romapi.h:507
static ATTR_RAMFUNC bool rom_xpi_nor_remap_config(XPI_Type *base, uint32_t start, uint32_t len, uint32_t offset)
Configure the XPI Address Remapping Logic.
Definition: hpm_romapi.h:696
static hpm_stat_t rom_sdp_sm4_crypt_ecb(sdp_sm4_ctx_t *sm4_ctx, sdp_sm4_op_t op, uint32_t len, const uint8_t *in, uint8_t *out)
SDP SM4 ECB crypto operation(Encrypt or Decrypt)
Definition: hpm_romapi.h:910
static ATTR_RAMFUNC bool rom_xpi_nor_exip_region_config(XPI_Type *base, uint32_t index, exip_region_param_t *param)
Configure Specified EXiP Region.
Definition: hpm_romapi.h:734
static ATTR_RAMFUNC void rom_xpi_nor_exip_enable(XPI_Type *base)
Enable global EXiP logic.
Definition: hpm_romapi.h:759
static hpm_stat_t rom_sdp_sm4_set_key(sdp_sm4_ctx_t *sm4_ctx, const uint8_t *key, sdp_sm4_key_bits_t key_bits, uint32_t key_idx)
Set SM4 key to SDP.
Definition: hpm_romapi.h:893
static void rom_sdp_init(void)
Initialize SDP IP.
Definition: hpm_romapi.h:818
static ATTR_RAMFUNC hpm_stat_t rom_xpi_nor_page_program_nonblocking(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, const uint32_t *src, uint32_t dst_addr, uint32_t length)
Page-Program data to specified FLASH address in non-blocking way.
Definition: hpm_romapi.h:602
static ATTR_RAMFUNC void rom_xpi_nor_exip_region_disable(XPI_Type *base, uint32_t index)
Disable EXiP Feature on specified EXiP Region.
Definition: hpm_romapi.h:748
static ATTR_RAMFUNC hpm_stat_t rom_xpi_nor_erase_sector_nonblocking(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t start)
Erase specified FLASH sector in non-blocking way.
Definition: hpm_romapi.h:490
static ATTR_RAMFUNC hpm_stat_t rom_xpi_nor_erase(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t start, uint32_t length)
Erase specified FLASH region.
Definition: hpm_romapi.h:451
static hpm_stat_t rom_enter_bootloader(void *ctx)
Eneter specified Boot mode.
Definition: hpm_romapi.h:395
static ATTR_RAMFUNC void rom_xpi_nor_remap_disable(XPI_Type *base)
Disable XPI Remapping logic.
Definition: hpm_romapi.h:706
static hpm_stat_t rom_sdp_aes_set_key(sdp_aes_ctx_t *aes_ctx, const uint8_t *key, sdp_aes_key_bits_t key_bits, uint32_t key_idx)
Set AES key to SDP.
Definition: hpm_romapi.h:839
static void rom_sdp_deinit(void)
De-initialize SDP IP.
Definition: hpm_romapi.h:826
static hpm_stat_t rom_xpi_ram_get_config(XPI_Type *base, xpi_ram_config_t *ram_cfg, xpi_ram_config_option_t *cfg_option)
Get XPI RAM configuration based on cfg_option.
Definition: hpm_romapi.h:790
static hpm_stat_t rom_xpi_ram_init(XPI_Type *base, xpi_ram_config_t *ram_cfg)
Initialize XPI RAM.
Definition: hpm_romapi.h:803
static hpm_stat_t rom_xpi_nor_get_status(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t addr, uint16_t *out_status)
Return the status register value on XPI NOR FLASH.
Definition: hpm_romapi.h:677
static ATTR_RAMFUNC hpm_stat_t rom_xpi_nor_erase_block_nonblocking(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t start)
Erase specified FLASH blcok in non-blocking way.
Definition: hpm_romapi.h:526
static ATTR_RAMFUNC void rom_xpi_nor_exip_disable(XPI_Type *base)
Disable global EXiP logic.
Definition: hpm_romapi.h:770
static ATTR_RAMFUNC hpm_stat_t rom_xpi_nor_program(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, const uint32_t *src, uint32_t dst_addr, uint32_t length)
Program data to specified FLASH address in blocking way.
Definition: hpm_romapi.h:579
static ATTR_RAMFUNC bool rom_xpi_nor_is_remap_enabled(XPI_Type *base)
Check whether XPI Remapping is enabled.
Definition: hpm_romapi.h:720
static hpm_stat_t rom_sdp_hash_finish(sdp_hash_ctx_t *hash_ctx, uint8_t *digest)
HASH finialize.
Definition: hpm_romapi.h:968
static hpm_stat_t rom_sdp_hash_update(sdp_hash_ctx_t *hash_ctx, const uint8_t *data, uint32_t length)
HASH Update.
Definition: hpm_romapi.h:957
static hpm_stat_t rom_sdp_aes_crypt_ecb(sdp_aes_ctx_t *aes_ctx, sdp_aes_op_t op, uint32_t len, const uint8_t *in, uint8_t *out)
SDP AES ECB crypto operation(Encrypt or Decrypt)
Definition: hpm_romapi.h:856
static hpm_stat_t rom_xpi_nor_get_property(XPI_Type *base, xpi_nor_config_t *nor_cfg, uint32_t property_id, uint32_t *value)
Get XPI NOR properties.
Definition: hpm_romapi.h:659
static ATTR_RAMFUNC hpm_stat_t rom_xpi_nor_get_config(XPI_Type *base, xpi_nor_config_t *nor_cfg, xpi_nor_config_option_t *cfg_option)
Get XPI NOR configuration via cfg_option.
Definition: hpm_romapi.h:416
static hpm_stat_t rom_sdp_hash_init(sdp_hash_ctx_t *hash_ctx, sdp_hash_alg_t alg)
HASH initialization.
Definition: hpm_romapi.h:945
static ATTR_RAMFUNC hpm_stat_t rom_xpi_nor_erase_sector(XPI_Type *base, xpi_xfer_channel_t channel, const xpi_nor_config_t *nor_config, uint32_t start)
Erase specified FLASH sector in blocking way.
Definition: hpm_romapi.h:471
static void init(hpm_panel_t *panel)
Definition: cc10128007.c:86
uint32_t hpm_stat_t
Definition: hpm_common.h:123
otp_region_t
OTP region definitions.
Definition: hpm_otp_drv.h:24
otp_lock_option_t
OTP lock options.
Definition: hpm_otp_drv.h:34
#define ROM_API_TABLE_ROOT
Definition: hpm_romapi.h:375
sdp_crypto_op_t
Crypto operation option.
Definition: hpm_sdp_drv.h:44
sdp_crypto_key_bits_t
SDP AES key bit options.
Definition: hpm_sdp_drv.h:29
sdp_hash_alg_t
SDP HASH algorithm definitions.
Definition: hpm_sdp_drv.h:102
xpi_xfer_channel_t
XPI Transfer Channel type definitions.
Definition: hpm_romapi_xpi_def.h:53
uint32_t XPI_Type
XPI_Type definitions for.
Definition: hpm_romapi_xpi_def.h:22
xpi_channel_t
XPI Channel definitions.
Definition: hpm_romapi_xpi_def.h:64
static hpm_stat_t read(void *ops, hpm_serial_nor_transfer_seq_t *cmd_seq)
Definition: hpm_serial_nor_host_spi.c:309
#define fencei()
execute fence.i
Definition: riscv_core.h:88
Bootloader API table.
Definition: hpm_romapi.h:243
EXIP driver interface.
Definition: hpm_romapi.h:226
Definition: hpm_romapi.h:59
Definition: hpm_romapi.h:52
OTP driver interface.
Definition: hpm_romapi.h:82
SDP AES context structure.
Definition: hpm_sdp_drv.h:159
SDP DMA context.
Definition: hpm_sdp_drv.h:179
SDP API interface.
Definition: hpm_romapi.h:243
SDP HASH context.
Definition: hpm_sdp_drv.h:186
Definition: hpm_romapi_xpi_soc_def.h:28
XPI configuration structure.
Definition: hpm_romapi_xpi_def.h:160
XPI Device Configuration structure.
Definition: hpm_romapi_xpi_def.h:173
XPI driver interface.
Definition: hpm_romapi.h:110
XPI NOR configuration option The ROM SW can detect the FLASH configuration based on the following str...
Definition: hpm_romapi_xpi_nor_def.h:136
XPI NOR configuration structure.
Definition: hpm_romapi_xpi_nor_def.h:261
XPI NOR driver interface.
Definition: hpm_romapi.h:145
XPI RAM configuration option The ROM SW can detect the FLASH configuration based on the following str...
Definition: hpm_romapi_xpi_ram_def.h:39
XPI RAM configuration structure.
Definition: hpm_romapi_xpi_ram_def.h:152
XPI RAM driver interface.
Definition: hpm_romapi.h:215
XPI Xfer context.
Definition: hpm_romapi_xpi_def.h:93
Enter Bootloader API argument.
Definition: hpm_romapi.h:41