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Data Structures | |
| struct | FFA_Type |
| #define FFA_CTRL_EN_GET | ( | x | ) | (((uint32_t)(x) & FFA_CTRL_EN_MASK) >> FFA_CTRL_EN_SHIFT) |
| #define FFA_CTRL_EN_MASK (0x1U) |
| #define FFA_CTRL_EN_SET | ( | x | ) | (((uint32_t)(x) << FFA_CTRL_EN_SHIFT) & FFA_CTRL_EN_MASK) |
| #define FFA_CTRL_EN_SHIFT (0U) |
| #define FFA_CTRL_SFTRST_GET | ( | x | ) | (((uint32_t)(x) & FFA_CTRL_SFTRST_MASK) >> FFA_CTRL_SFTRST_SHIFT) |
| #define FFA_CTRL_SFTRST_MASK (0x80000000UL) |
| #define FFA_CTRL_SFTRST_SET | ( | x | ) | (((uint32_t)(x) << FFA_CTRL_SFTRST_SHIFT) & FFA_CTRL_SFTRST_MASK) |
| #define FFA_CTRL_SFTRST_SHIFT (31U) |
| #define FFA_FP_CTRL_COEF_MAX_GET | ( | x | ) | (((uint32_t)(x) & FFA_FP_CTRL_COEF_MAX_MASK) >> FFA_FP_CTRL_COEF_MAX_SHIFT) |
| #define FFA_FP_CTRL_COEF_MAX_MASK (0xFF0000UL) |
| #define FFA_FP_CTRL_COEF_MAX_SET | ( | x | ) | (((uint32_t)(x) << FFA_FP_CTRL_COEF_MAX_SHIFT) & FFA_FP_CTRL_COEF_MAX_MASK) |
| #define FFA_FP_CTRL_COEF_MAX_SHIFT (16U) |
| #define FFA_FP_CTRL_COEF_NAN_IE_GET | ( | x | ) | (((uint32_t)(x) & FFA_FP_CTRL_COEF_NAN_IE_MASK) >> FFA_FP_CTRL_COEF_NAN_IE_SHIFT) |
| #define FFA_FP_CTRL_COEF_NAN_IE_MASK (0x8000000UL) |
| #define FFA_FP_CTRL_COEF_NAN_IE_SET | ( | x | ) | (((uint32_t)(x) << FFA_FP_CTRL_COEF_NAN_IE_SHIFT) & FFA_FP_CTRL_COEF_NAN_IE_MASK) |
| #define FFA_FP_CTRL_COEF_NAN_IE_SHIFT (27U) |
| #define FFA_FP_CTRL_COEF_SAT_IE_GET | ( | x | ) | (((uint32_t)(x) & FFA_FP_CTRL_COEF_SAT_IE_MASK) >> FFA_FP_CTRL_COEF_SAT_IE_SHIFT) |
| #define FFA_FP_CTRL_COEF_SAT_IE_MASK (0x20000000UL) |
| #define FFA_FP_CTRL_COEF_SAT_IE_SET | ( | x | ) | (((uint32_t)(x) << FFA_FP_CTRL_COEF_SAT_IE_SHIFT) & FFA_FP_CTRL_COEF_SAT_IE_MASK) |
| #define FFA_FP_CTRL_COEF_SAT_IE_SHIFT (29U) |
| #define FFA_FP_CTRL_EXP_ST_SEL_GET | ( | x | ) | (((uint32_t)(x) & FFA_FP_CTRL_EXP_ST_SEL_MASK) >> FFA_FP_CTRL_EXP_ST_SEL_SHIFT) |
| #define FFA_FP_CTRL_EXP_ST_SEL_MASK (0x6000000UL) |
| #define FFA_FP_CTRL_EXP_ST_SEL_SET | ( | x | ) | (((uint32_t)(x) << FFA_FP_CTRL_EXP_ST_SEL_SHIFT) & FFA_FP_CTRL_EXP_ST_SEL_MASK) |
| #define FFA_FP_CTRL_EXP_ST_SEL_SHIFT (25U) |
| #define FFA_FP_CTRL_IN_MAX_GET | ( | x | ) | (((uint32_t)(x) & FFA_FP_CTRL_IN_MAX_MASK) >> FFA_FP_CTRL_IN_MAX_SHIFT) |
| #define FFA_FP_CTRL_IN_MAX_MASK (0xFFU) |
| #define FFA_FP_CTRL_IN_MAX_SET | ( | x | ) | (((uint32_t)(x) << FFA_FP_CTRL_IN_MAX_SHIFT) & FFA_FP_CTRL_IN_MAX_MASK) |
| #define FFA_FP_CTRL_IN_MAX_SHIFT (0U) |
| #define FFA_FP_CTRL_IN_NAN_IE_GET | ( | x | ) | (((uint32_t)(x) & FFA_FP_CTRL_IN_NAN_IE_MASK) >> FFA_FP_CTRL_IN_NAN_IE_SHIFT) |
| #define FFA_FP_CTRL_IN_NAN_IE_MASK (0x10000000UL) |
| #define FFA_FP_CTRL_IN_NAN_IE_SET | ( | x | ) | (((uint32_t)(x) << FFA_FP_CTRL_IN_NAN_IE_SHIFT) & FFA_FP_CTRL_IN_NAN_IE_MASK) |
| #define FFA_FP_CTRL_IN_NAN_IE_SHIFT (28U) |
| #define FFA_FP_CTRL_IN_SAT_IE_GET | ( | x | ) | (((uint32_t)(x) & FFA_FP_CTRL_IN_SAT_IE_MASK) >> FFA_FP_CTRL_IN_SAT_IE_SHIFT) |
| #define FFA_FP_CTRL_IN_SAT_IE_MASK (0x80000000UL) |
| #define FFA_FP_CTRL_IN_SAT_IE_SET | ( | x | ) | (((uint32_t)(x) << FFA_FP_CTRL_IN_SAT_IE_SHIFT) & FFA_FP_CTRL_IN_SAT_IE_MASK) |
| #define FFA_FP_CTRL_IN_SAT_IE_SHIFT (31U) |
| #define FFA_FP_CTRL_OPT_BIAS_EXP_GET | ( | x | ) | (((uint32_t)(x) & FFA_FP_CTRL_OPT_BIAS_EXP_MASK) >> FFA_FP_CTRL_OPT_BIAS_EXP_SHIFT) |
| #define FFA_FP_CTRL_OPT_BIAS_EXP_MASK (0x1000000UL) |
| #define FFA_FP_CTRL_OPT_BIAS_EXP_SET | ( | x | ) | (((uint32_t)(x) << FFA_FP_CTRL_OPT_BIAS_EXP_SHIFT) & FFA_FP_CTRL_OPT_BIAS_EXP_MASK) |
| #define FFA_FP_CTRL_OPT_BIAS_EXP_SHIFT (24U) |
| #define FFA_FP_CTRL_OUT_MAX_GET | ( | x | ) | (((uint32_t)(x) & FFA_FP_CTRL_OUT_MAX_MASK) >> FFA_FP_CTRL_OUT_MAX_SHIFT) |
| #define FFA_FP_CTRL_OUT_MAX_MASK (0xFF00U) |
| #define FFA_FP_CTRL_OUT_MAX_SET | ( | x | ) | (((uint32_t)(x) << FFA_FP_CTRL_OUT_MAX_SHIFT) & FFA_FP_CTRL_OUT_MAX_MASK) |
| #define FFA_FP_CTRL_OUT_MAX_SHIFT (8U) |
| #define FFA_FP_ST_COEF_NAN_GET | ( | x | ) | (((uint32_t)(x) & FFA_FP_ST_COEF_NAN_MASK) >> FFA_FP_ST_COEF_NAN_SHIFT) |
| #define FFA_FP_ST_COEF_NAN_MASK (0x8000000UL) |
| #define FFA_FP_ST_COEF_NAN_SET | ( | x | ) | (((uint32_t)(x) << FFA_FP_ST_COEF_NAN_SHIFT) & FFA_FP_ST_COEF_NAN_MASK) |
| #define FFA_FP_ST_COEF_NAN_SHIFT (27U) |
| #define FFA_FP_ST_COEF_SAT_GET | ( | x | ) | (((uint32_t)(x) & FFA_FP_ST_COEF_SAT_MASK) >> FFA_FP_ST_COEF_SAT_SHIFT) |
| #define FFA_FP_ST_COEF_SAT_MASK (0x20000000UL) |
| #define FFA_FP_ST_COEF_SAT_SET | ( | x | ) | (((uint32_t)(x) << FFA_FP_ST_COEF_SAT_SHIFT) & FFA_FP_ST_COEF_SAT_MASK) |
| #define FFA_FP_ST_COEF_SAT_SHIFT (29U) |
| #define FFA_FP_ST_EXP_MAX_GET | ( | x | ) | (((uint32_t)(x) & FFA_FP_ST_EXP_MAX_MASK) >> FFA_FP_ST_EXP_MAX_SHIFT) |
| #define FFA_FP_ST_EXP_MAX_MASK (0xFF00U) |
| #define FFA_FP_ST_EXP_MAX_SHIFT (8U) |
| #define FFA_FP_ST_EXP_MIN_GET | ( | x | ) | (((uint32_t)(x) & FFA_FP_ST_EXP_MIN_MASK) >> FFA_FP_ST_EXP_MIN_SHIFT) |
| #define FFA_FP_ST_EXP_MIN_MASK (0xFFU) |
| #define FFA_FP_ST_EXP_MIN_SHIFT (0U) |
| #define FFA_FP_ST_IN_NAN_GET | ( | x | ) | (((uint32_t)(x) & FFA_FP_ST_IN_NAN_MASK) >> FFA_FP_ST_IN_NAN_SHIFT) |
| #define FFA_FP_ST_IN_NAN_MASK (0x10000000UL) |
| #define FFA_FP_ST_IN_NAN_SET | ( | x | ) | (((uint32_t)(x) << FFA_FP_ST_IN_NAN_SHIFT) & FFA_FP_ST_IN_NAN_MASK) |
| #define FFA_FP_ST_IN_NAN_SHIFT (28U) |
| #define FFA_FP_ST_IN_SAT_GET | ( | x | ) | (((uint32_t)(x) & FFA_FP_ST_IN_SAT_MASK) >> FFA_FP_ST_IN_SAT_SHIFT) |
| #define FFA_FP_ST_IN_SAT_MASK (0x80000000UL) |
| #define FFA_FP_ST_IN_SAT_SET | ( | x | ) | (((uint32_t)(x) << FFA_FP_ST_IN_SAT_SHIFT) & FFA_FP_ST_IN_SAT_MASK) |
| #define FFA_FP_ST_IN_SAT_SHIFT (31U) |
| #define FFA_INT_EN_FFT_OV_GET | ( | x | ) | (((uint32_t)(x) & FFA_INT_EN_FFT_OV_MASK) >> FFA_INT_EN_FFT_OV_SHIFT) |
| #define FFA_INT_EN_FFT_OV_MASK (0x40U) |
| #define FFA_INT_EN_FFT_OV_SET | ( | x | ) | (((uint32_t)(x) << FFA_INT_EN_FFT_OV_SHIFT) & FFA_INT_EN_FFT_OV_MASK) |
| #define FFA_INT_EN_FFT_OV_SHIFT (6U) |
| #define FFA_INT_EN_FIR_OV_GET | ( | x | ) | (((uint32_t)(x) & FFA_INT_EN_FIR_OV_MASK) >> FFA_INT_EN_FIR_OV_SHIFT) |
| #define FFA_INT_EN_FIR_OV_MASK (0x80U) |
| #define FFA_INT_EN_FIR_OV_SET | ( | x | ) | (((uint32_t)(x) << FFA_INT_EN_FIR_OV_SHIFT) & FFA_INT_EN_FIR_OV_MASK) |
| #define FFA_INT_EN_FIR_OV_SHIFT (7U) |
| #define FFA_INT_EN_NXT_CMD_RD_DONE_GET | ( | x | ) | (((uint32_t)(x) & FFA_INT_EN_NXT_CMD_RD_DONE_MASK) >> FFA_INT_EN_NXT_CMD_RD_DONE_SHIFT) |
| #define FFA_INT_EN_NXT_CMD_RD_DONE_MASK (0x2U) |
| #define FFA_INT_EN_NXT_CMD_RD_DONE_SET | ( | x | ) | (((uint32_t)(x) << FFA_INT_EN_NXT_CMD_RD_DONE_SHIFT) & FFA_INT_EN_NXT_CMD_RD_DONE_MASK) |
| #define FFA_INT_EN_NXT_CMD_RD_DONE_SHIFT (1U) |
| #define FFA_INT_EN_OP_CMD_DONE_GET | ( | x | ) | (((uint32_t)(x) & FFA_INT_EN_OP_CMD_DONE_MASK) >> FFA_INT_EN_OP_CMD_DONE_SHIFT) |
| #define FFA_INT_EN_OP_CMD_DONE_MASK (0x1U) |
| #define FFA_INT_EN_OP_CMD_DONE_SET | ( | x | ) | (((uint32_t)(x) << FFA_INT_EN_OP_CMD_DONE_SHIFT) & FFA_INT_EN_OP_CMD_DONE_MASK) |
| #define FFA_INT_EN_OP_CMD_DONE_SHIFT (0U) |
| #define FFA_INT_EN_RD_ERR_GET | ( | x | ) | (((uint32_t)(x) & FFA_INT_EN_RD_ERR_MASK) >> FFA_INT_EN_RD_ERR_SHIFT) |
| #define FFA_INT_EN_RD_ERR_MASK (0x8U) |
| #define FFA_INT_EN_RD_ERR_SET | ( | x | ) | (((uint32_t)(x) << FFA_INT_EN_RD_ERR_SHIFT) & FFA_INT_EN_RD_ERR_MASK) |
| #define FFA_INT_EN_RD_ERR_SHIFT (3U) |
| #define FFA_INT_EN_RD_NXT_ERR_GET | ( | x | ) | (((uint32_t)(x) & FFA_INT_EN_RD_NXT_ERR_MASK) >> FFA_INT_EN_RD_NXT_ERR_SHIFT) |
| #define FFA_INT_EN_RD_NXT_ERR_MASK (0x10U) |
| #define FFA_INT_EN_RD_NXT_ERR_SET | ( | x | ) | (((uint32_t)(x) << FFA_INT_EN_RD_NXT_ERR_SHIFT) & FFA_INT_EN_RD_NXT_ERR_MASK) |
| #define FFA_INT_EN_RD_NXT_ERR_SHIFT (4U) |
| #define FFA_INT_EN_WR_ERR_GET | ( | x | ) | (((uint32_t)(x) & FFA_INT_EN_WR_ERR_MASK) >> FFA_INT_EN_WR_ERR_SHIFT) |
| #define FFA_INT_EN_WR_ERR_MASK (0x20U) |
| #define FFA_INT_EN_WR_ERR_SET | ( | x | ) | (((uint32_t)(x) << FFA_INT_EN_WR_ERR_SHIFT) & FFA_INT_EN_WR_ERR_MASK) |
| #define FFA_INT_EN_WR_ERR_SHIFT (5U) |
| #define FFA_INT_EN_WRSV1_GET | ( | x | ) | (((uint32_t)(x) & FFA_INT_EN_WRSV1_MASK) >> FFA_INT_EN_WRSV1_SHIFT) |
| #define FFA_INT_EN_WRSV1_MASK (0xFFFFFF00UL) |
| #define FFA_INT_EN_WRSV1_SET | ( | x | ) | (((uint32_t)(x) << FFA_INT_EN_WRSV1_SHIFT) & FFA_INT_EN_WRSV1_MASK) |
| #define FFA_INT_EN_WRSV1_SHIFT (8U) |
| #define FFA_OP_CMD_CMD_GET | ( | x | ) | (((uint32_t)(x) & FFA_OP_CMD_CMD_MASK) >> FFA_OP_CMD_CMD_SHIFT) |
| #define FFA_OP_CMD_CMD_MASK (0xFC0000UL) |
| #define FFA_OP_CMD_CMD_SET | ( | x | ) | (((uint32_t)(x) << FFA_OP_CMD_CMD_SHIFT) & FFA_OP_CMD_CMD_MASK) |
| #define FFA_OP_CMD_CMD_SHIFT (18U) |
| #define FFA_OP_CMD_COEF_TYPE_GET | ( | x | ) | (((uint32_t)(x) & FFA_OP_CMD_COEF_TYPE_MASK) >> FFA_OP_CMD_COEF_TYPE_SHIFT) |
| #define FFA_OP_CMD_COEF_TYPE_MASK (0x7000U) |
| #define FFA_OP_CMD_COEF_TYPE_SET | ( | x | ) | (((uint32_t)(x) << FFA_OP_CMD_COEF_TYPE_SHIFT) & FFA_OP_CMD_COEF_TYPE_MASK) |
| #define FFA_OP_CMD_COEF_TYPE_SHIFT (12U) |
| #define FFA_OP_CMD_CONJ_C_GET | ( | x | ) | (((uint32_t)(x) & FFA_OP_CMD_CONJ_C_MASK) >> FFA_OP_CMD_CONJ_C_SHIFT) |
| #define FFA_OP_CMD_CONJ_C_MASK (0x1000000UL) |
| #define FFA_OP_CMD_CONJ_C_SET | ( | x | ) | (((uint32_t)(x) << FFA_OP_CMD_CONJ_C_SHIFT) & FFA_OP_CMD_CONJ_C_MASK) |
| #define FFA_OP_CMD_CONJ_C_SHIFT (24U) |
| #define FFA_OP_CMD_IND_TYPE_GET | ( | x | ) | (((uint32_t)(x) & FFA_OP_CMD_IND_TYPE_MASK) >> FFA_OP_CMD_IND_TYPE_SHIFT) |
| #define FFA_OP_CMD_IND_TYPE_MASK (0xE00U) |
| #define FFA_OP_CMD_IND_TYPE_SET | ( | x | ) | (((uint32_t)(x) << FFA_OP_CMD_IND_TYPE_SHIFT) & FFA_OP_CMD_IND_TYPE_MASK) |
| #define FFA_OP_CMD_IND_TYPE_SHIFT (9U) |
| #define FFA_OP_CMD_NXT_CMD_LEN_GET | ( | x | ) | (((uint32_t)(x) & FFA_OP_CMD_NXT_CMD_LEN_MASK) >> FFA_OP_CMD_NXT_CMD_LEN_SHIFT) |
| #define FFA_OP_CMD_NXT_CMD_LEN_MASK (0xFFU) |
| #define FFA_OP_CMD_NXT_CMD_LEN_SET | ( | x | ) | (((uint32_t)(x) << FFA_OP_CMD_NXT_CMD_LEN_SHIFT) & FFA_OP_CMD_NXT_CMD_LEN_MASK) |
| #define FFA_OP_CMD_NXT_CMD_LEN_SHIFT (0U) |
| #define FFA_OP_CMD_OUTD_TYPE_GET | ( | x | ) | (((uint32_t)(x) & FFA_OP_CMD_OUTD_TYPE_MASK) >> FFA_OP_CMD_OUTD_TYPE_SHIFT) |
| #define FFA_OP_CMD_OUTD_TYPE_MASK (0x38000UL) |
| #define FFA_OP_CMD_OUTD_TYPE_SET | ( | x | ) | (((uint32_t)(x) << FFA_OP_CMD_OUTD_TYPE_SHIFT) & FFA_OP_CMD_OUTD_TYPE_MASK) |
| #define FFA_OP_CMD_OUTD_TYPE_SHIFT (15U) |
| #define FFA_OP_CTRL_EN_GET | ( | x | ) | (((uint32_t)(x) & FFA_OP_CTRL_EN_MASK) >> FFA_OP_CTRL_EN_SHIFT) |
| #define FFA_OP_CTRL_EN_MASK (0x1U) |
| #define FFA_OP_CTRL_EN_SET | ( | x | ) | (((uint32_t)(x) << FFA_OP_CTRL_EN_SHIFT) & FFA_OP_CTRL_EN_MASK) |
| #define FFA_OP_CTRL_EN_SHIFT (0U) |
| #define FFA_OP_CTRL_NXT_ADDR_GET | ( | x | ) | (((uint32_t)(x) & FFA_OP_CTRL_NXT_ADDR_MASK) >> FFA_OP_CTRL_NXT_ADDR_SHIFT) |
| #define FFA_OP_CTRL_NXT_ADDR_MASK (0xFFFFFFFCUL) |
| #define FFA_OP_CTRL_NXT_ADDR_SET | ( | x | ) | (((uint32_t)(x) << FFA_OP_CTRL_NXT_ADDR_SHIFT) & FFA_OP_CTRL_NXT_ADDR_MASK) |
| #define FFA_OP_CTRL_NXT_ADDR_SHIFT (2U) |
| #define FFA_OP_CTRL_NXT_EN_GET | ( | x | ) | (((uint32_t)(x) & FFA_OP_CTRL_NXT_EN_MASK) >> FFA_OP_CTRL_NXT_EN_SHIFT) |
| #define FFA_OP_CTRL_NXT_EN_MASK (0x2U) |
| #define FFA_OP_CTRL_NXT_EN_SET | ( | x | ) | (((uint32_t)(x) << FFA_OP_CTRL_NXT_EN_SHIFT) & FFA_OP_CTRL_NXT_EN_MASK) |
| #define FFA_OP_CTRL_NXT_EN_SHIFT (1U) |
| #define FFA_OP_FFT_INRBUF_LOC_GET | ( | x | ) | (((uint32_t)(x) & FFA_OP_FFT_INRBUF_LOC_MASK) >> FFA_OP_FFT_INRBUF_LOC_SHIFT) |
| #define FFA_OP_FFT_INRBUF_LOC_MASK (0xFFFFFFFFUL) |
| #define FFA_OP_FFT_INRBUF_LOC_SET | ( | x | ) | (((uint32_t)(x) << FFA_OP_FFT_INRBUF_LOC_SHIFT) & FFA_OP_FFT_INRBUF_LOC_MASK) |
| #define FFA_OP_FFT_INRBUF_LOC_SHIFT (0U) |
| #define FFA_OP_FFT_MISC_FFT_LEN_GET | ( | x | ) | (((uint32_t)(x) & FFA_OP_FFT_MISC_FFT_LEN_MASK) >> FFA_OP_FFT_MISC_FFT_LEN_SHIFT) |
| #define FFA_OP_FFT_MISC_FFT_LEN_MASK (0x780U) |
| #define FFA_OP_FFT_MISC_FFT_LEN_SET | ( | x | ) | (((uint32_t)(x) << FFA_OP_FFT_MISC_FFT_LEN_SHIFT) & FFA_OP_FFT_MISC_FFT_LEN_MASK) |
| #define FFA_OP_FFT_MISC_FFT_LEN_SHIFT (7U) |
| #define FFA_OP_FFT_MISC_IFFT_GET | ( | x | ) | (((uint32_t)(x) & FFA_OP_FFT_MISC_IFFT_MASK) >> FFA_OP_FFT_MISC_IFFT_SHIFT) |
| #define FFA_OP_FFT_MISC_IFFT_MASK (0x40U) |
| #define FFA_OP_FFT_MISC_IFFT_SET | ( | x | ) | (((uint32_t)(x) << FFA_OP_FFT_MISC_IFFT_SHIFT) & FFA_OP_FFT_MISC_IFFT_MASK) |
| #define FFA_OP_FFT_MISC_IFFT_SHIFT (6U) |
| #define FFA_OP_FFT_MISC_IND_BLK_GET | ( | x | ) | (((uint32_t)(x) & FFA_OP_FFT_MISC_IND_BLK_MASK) >> FFA_OP_FFT_MISC_IND_BLK_SHIFT) |
| #define FFA_OP_FFT_MISC_IND_BLK_MASK (0x3U) |
| #define FFA_OP_FFT_MISC_IND_BLK_SET | ( | x | ) | (((uint32_t)(x) << FFA_OP_FFT_MISC_IND_BLK_SHIFT) & FFA_OP_FFT_MISC_IND_BLK_MASK) |
| #define FFA_OP_FFT_MISC_IND_BLK_SHIFT (0U) |
| #define FFA_OP_FFT_MISC_TMP_BLK_GET | ( | x | ) | (((uint32_t)(x) & FFA_OP_FFT_MISC_TMP_BLK_MASK) >> FFA_OP_FFT_MISC_TMP_BLK_SHIFT) |
| #define FFA_OP_FFT_MISC_TMP_BLK_MASK (0xCU) |
| #define FFA_OP_FFT_MISC_TMP_BLK_SET | ( | x | ) | (((uint32_t)(x) << FFA_OP_FFT_MISC_TMP_BLK_SHIFT) & FFA_OP_FFT_MISC_TMP_BLK_MASK) |
| #define FFA_OP_FFT_MISC_TMP_BLK_SHIFT (2U) |
| #define FFA_OP_FFT_OUTRBUF_LOC_GET | ( | x | ) | (((uint32_t)(x) & FFA_OP_FFT_OUTRBUF_LOC_MASK) >> FFA_OP_FFT_OUTRBUF_LOC_SHIFT) |
| #define FFA_OP_FFT_OUTRBUF_LOC_MASK (0xFFFFFFFFUL) |
| #define FFA_OP_FFT_OUTRBUF_LOC_SET | ( | x | ) | (((uint32_t)(x) << FFA_OP_FFT_OUTRBUF_LOC_SHIFT) & FFA_OP_FFT_OUTRBUF_LOC_MASK) |
| #define FFA_OP_FFT_OUTRBUF_LOC_SHIFT (0U) |
| #define FFA_OP_FIR_COEFBUF_LOC_GET | ( | x | ) | (((uint32_t)(x) & FFA_OP_FIR_COEFBUF_LOC_MASK) >> FFA_OP_FIR_COEFBUF_LOC_SHIFT) |
| #define FFA_OP_FIR_COEFBUF_LOC_MASK (0xFFFFFFFFUL) |
| #define FFA_OP_FIR_COEFBUF_LOC_SET | ( | x | ) | (((uint32_t)(x) << FFA_OP_FIR_COEFBUF_LOC_SHIFT) & FFA_OP_FIR_COEFBUF_LOC_MASK) |
| #define FFA_OP_FIR_COEFBUF_LOC_SHIFT (0U) |
| #define FFA_OP_FIR_INBUF_LOC_GET | ( | x | ) | (((uint32_t)(x) & FFA_OP_FIR_INBUF_LOC_MASK) >> FFA_OP_FIR_INBUF_LOC_SHIFT) |
| #define FFA_OP_FIR_INBUF_LOC_MASK (0xFFFFFFFFUL) |
| #define FFA_OP_FIR_INBUF_LOC_SET | ( | x | ) | (((uint32_t)(x) << FFA_OP_FIR_INBUF_LOC_SHIFT) & FFA_OP_FIR_INBUF_LOC_MASK) |
| #define FFA_OP_FIR_INBUF_LOC_SHIFT (0U) |
| #define FFA_OP_FIR_MISC1_COEF_MEM_BLK_GET | ( | x | ) | (((uint32_t)(x) & FFA_OP_FIR_MISC1_COEF_MEM_BLK_MASK) >> FFA_OP_FIR_MISC1_COEF_MEM_BLK_SHIFT) |
| #define FFA_OP_FIR_MISC1_COEF_MEM_BLK_MASK (0xC0000UL) |
| #define FFA_OP_FIR_MISC1_COEF_MEM_BLK_SET | ( | x | ) | (((uint32_t)(x) << FFA_OP_FIR_MISC1_COEF_MEM_BLK_SHIFT) & FFA_OP_FIR_MISC1_COEF_MEM_BLK_MASK) |
| #define FFA_OP_FIR_MISC1_COEF_MEM_BLK_SHIFT (18U) |
| #define FFA_OP_FIR_MISC1_FIR_DATA_TAPS_GET | ( | x | ) | (((uint32_t)(x) & FFA_OP_FIR_MISC1_FIR_DATA_TAPS_MASK) >> FFA_OP_FIR_MISC1_FIR_DATA_TAPS_SHIFT) |
| #define FFA_OP_FIR_MISC1_FIR_DATA_TAPS_MASK (0xFFFFU) |
| #define FFA_OP_FIR_MISC1_FIR_DATA_TAPS_SET | ( | x | ) | (((uint32_t)(x) << FFA_OP_FIR_MISC1_FIR_DATA_TAPS_SHIFT) & FFA_OP_FIR_MISC1_FIR_DATA_TAPS_MASK) |
| #define FFA_OP_FIR_MISC1_FIR_DATA_TAPS_SHIFT (0U) |
| #define FFA_OP_FIR_MISC1_IND_MEM_BLK_GET | ( | x | ) | (((uint32_t)(x) & FFA_OP_FIR_MISC1_IND_MEM_BLK_MASK) >> FFA_OP_FIR_MISC1_IND_MEM_BLK_SHIFT) |
| #define FFA_OP_FIR_MISC1_IND_MEM_BLK_MASK (0x30000UL) |
| #define FFA_OP_FIR_MISC1_IND_MEM_BLK_SET | ( | x | ) | (((uint32_t)(x) << FFA_OP_FIR_MISC1_IND_MEM_BLK_SHIFT) & FFA_OP_FIR_MISC1_IND_MEM_BLK_MASK) |
| #define FFA_OP_FIR_MISC1_IND_MEM_BLK_SHIFT (16U) |
| #define FFA_OP_FIR_MISC1_OUTD_MEM_BLK_GET | ( | x | ) | (((uint32_t)(x) & FFA_OP_FIR_MISC1_OUTD_MEM_BLK_MASK) >> FFA_OP_FIR_MISC1_OUTD_MEM_BLK_SHIFT) |
| #define FFA_OP_FIR_MISC1_OUTD_MEM_BLK_MASK (0x300000UL) |
| #define FFA_OP_FIR_MISC1_OUTD_MEM_BLK_SET | ( | x | ) | (((uint32_t)(x) << FFA_OP_FIR_MISC1_OUTD_MEM_BLK_SHIFT) & FFA_OP_FIR_MISC1_OUTD_MEM_BLK_MASK) |
| #define FFA_OP_FIR_MISC1_OUTD_MEM_BLK_SHIFT (20U) |
| #define FFA_OP_FIR_MISC_FIR_COEF_TAPS_GET | ( | x | ) | (((uint32_t)(x) & FFA_OP_FIR_MISC_FIR_COEF_TAPS_MASK) >> FFA_OP_FIR_MISC_FIR_COEF_TAPS_SHIFT) |
| #define FFA_OP_FIR_MISC_FIR_COEF_TAPS_MASK (0x3FFFU) |
| #define FFA_OP_FIR_MISC_FIR_COEF_TAPS_SET | ( | x | ) | (((uint32_t)(x) << FFA_OP_FIR_MISC_FIR_COEF_TAPS_SHIFT) & FFA_OP_FIR_MISC_FIR_COEF_TAPS_MASK) |
| #define FFA_OP_FIR_MISC_FIR_COEF_TAPS_SHIFT (0U) |
| #define FFA_OP_FIR_OUTBUF_LOC_GET | ( | x | ) | (((uint32_t)(x) & FFA_OP_FIR_OUTBUF_LOC_MASK) >> FFA_OP_FIR_OUTBUF_LOC_SHIFT) |
| #define FFA_OP_FIR_OUTBUF_LOC_MASK (0xFFFFFFFFUL) |
| #define FFA_OP_FIR_OUTBUF_LOC_SET | ( | x | ) | (((uint32_t)(x) << FFA_OP_FIR_OUTBUF_LOC_SHIFT) & FFA_OP_FIR_OUTBUF_LOC_MASK) |
| #define FFA_OP_FIR_OUTBUF_LOC_SHIFT (0U) |
| #define FFA_OP_REG0_CT_GET | ( | x | ) | (((uint32_t)(x) & FFA_OP_REG0_CT_MASK) >> FFA_OP_REG0_CT_SHIFT) |
| #define FFA_OP_REG0_CT_MASK (0xFFFFFFFFUL) |
| #define FFA_OP_REG0_CT_SET | ( | x | ) | (((uint32_t)(x) << FFA_OP_REG0_CT_SHIFT) & FFA_OP_REG0_CT_MASK) |
| #define FFA_OP_REG0_CT_SHIFT (0U) |
| #define FFA_OP_REG1_CT_GET | ( | x | ) | (((uint32_t)(x) & FFA_OP_REG1_CT_MASK) >> FFA_OP_REG1_CT_SHIFT) |
| #define FFA_OP_REG1_CT_MASK (0xFFFFFFFFUL) |
| #define FFA_OP_REG1_CT_SET | ( | x | ) | (((uint32_t)(x) << FFA_OP_REG1_CT_SHIFT) & FFA_OP_REG1_CT_MASK) |
| #define FFA_OP_REG1_CT_SHIFT (0U) |
| #define FFA_OP_REG2_CT_GET | ( | x | ) | (((uint32_t)(x) & FFA_OP_REG2_CT_MASK) >> FFA_OP_REG2_CT_SHIFT) |
| #define FFA_OP_REG2_CT_MASK (0xFFFFFFFFUL) |
| #define FFA_OP_REG2_CT_SET | ( | x | ) | (((uint32_t)(x) << FFA_OP_REG2_CT_SHIFT) & FFA_OP_REG2_CT_MASK) |
| #define FFA_OP_REG2_CT_SHIFT (0U) |
| #define FFA_OP_REG3_CT_GET | ( | x | ) | (((uint32_t)(x) & FFA_OP_REG3_CT_MASK) >> FFA_OP_REG3_CT_SHIFT) |
| #define FFA_OP_REG3_CT_MASK (0xFFFFFFFFUL) |
| #define FFA_OP_REG3_CT_SET | ( | x | ) | (((uint32_t)(x) << FFA_OP_REG3_CT_SHIFT) & FFA_OP_REG3_CT_MASK) |
| #define FFA_OP_REG3_CT_SHIFT (0U) |
| #define FFA_OP_REG4_CT_GET | ( | x | ) | (((uint32_t)(x) & FFA_OP_REG4_CT_MASK) >> FFA_OP_REG4_CT_SHIFT) |
| #define FFA_OP_REG4_CT_MASK (0xFFFFFFFFUL) |
| #define FFA_OP_REG4_CT_SET | ( | x | ) | (((uint32_t)(x) << FFA_OP_REG4_CT_SHIFT) & FFA_OP_REG4_CT_MASK) |
| #define FFA_OP_REG4_CT_SHIFT (0U) |
| #define FFA_OP_REG5_CT_GET | ( | x | ) | (((uint32_t)(x) & FFA_OP_REG5_CT_MASK) >> FFA_OP_REG5_CT_SHIFT) |
| #define FFA_OP_REG5_CT_MASK (0xFFFFFFFFUL) |
| #define FFA_OP_REG5_CT_SET | ( | x | ) | (((uint32_t)(x) << FFA_OP_REG5_CT_SHIFT) & FFA_OP_REG5_CT_MASK) |
| #define FFA_OP_REG5_CT_SHIFT (0U) |
| #define FFA_OP_REG6_CT_GET | ( | x | ) | (((uint32_t)(x) & FFA_OP_REG6_CT_MASK) >> FFA_OP_REG6_CT_SHIFT) |
| #define FFA_OP_REG6_CT_MASK (0xFFFFFFFFUL) |
| #define FFA_OP_REG6_CT_SET | ( | x | ) | (((uint32_t)(x) << FFA_OP_REG6_CT_SHIFT) & FFA_OP_REG6_CT_MASK) |
| #define FFA_OP_REG6_CT_SHIFT (0U) |
| #define FFA_OP_REG7_CT_GET | ( | x | ) | (((uint32_t)(x) & FFA_OP_REG7_CT_MASK) >> FFA_OP_REG7_CT_SHIFT) |
| #define FFA_OP_REG7_CT_MASK (0xFFFFFFFFUL) |
| #define FFA_OP_REG7_CT_SET | ( | x | ) | (((uint32_t)(x) << FFA_OP_REG7_CT_SHIFT) & FFA_OP_REG7_CT_MASK) |
| #define FFA_OP_REG7_CT_SHIFT (0U) |
| #define FFA_STATUS_FFT_OV_GET | ( | x | ) | (((uint32_t)(x) & FFA_STATUS_FFT_OV_MASK) >> FFA_STATUS_FFT_OV_SHIFT) |
| #define FFA_STATUS_FFT_OV_MASK (0x40U) |
| #define FFA_STATUS_FFT_OV_SET | ( | x | ) | (((uint32_t)(x) << FFA_STATUS_FFT_OV_SHIFT) & FFA_STATUS_FFT_OV_MASK) |
| #define FFA_STATUS_FFT_OV_SHIFT (6U) |
| #define FFA_STATUS_FIR_OV_GET | ( | x | ) | (((uint32_t)(x) & FFA_STATUS_FIR_OV_MASK) >> FFA_STATUS_FIR_OV_SHIFT) |
| #define FFA_STATUS_FIR_OV_MASK (0x80U) |
| #define FFA_STATUS_FIR_OV_SET | ( | x | ) | (((uint32_t)(x) << FFA_STATUS_FIR_OV_SHIFT) & FFA_STATUS_FIR_OV_MASK) |
| #define FFA_STATUS_FIR_OV_SHIFT (7U) |
| #define FFA_STATUS_FP_NAN_GET | ( | x | ) | (((uint32_t)(x) & FFA_STATUS_FP_NAN_MASK) >> FFA_STATUS_FP_NAN_SHIFT) |
| #define FFA_STATUS_FP_NAN_MASK (0x200U) |
| #define FFA_STATUS_FP_NAN_SHIFT (9U) |
| #define FFA_STATUS_FP_SAT_GET | ( | x | ) | (((uint32_t)(x) & FFA_STATUS_FP_SAT_MASK) >> FFA_STATUS_FP_SAT_SHIFT) |
| #define FFA_STATUS_FP_SAT_MASK (0x100U) |
| #define FFA_STATUS_FP_SAT_SHIFT (8U) |
| #define FFA_STATUS_NXT_CMD_RD_DONE_GET | ( | x | ) | (((uint32_t)(x) & FFA_STATUS_NXT_CMD_RD_DONE_MASK) >> FFA_STATUS_NXT_CMD_RD_DONE_SHIFT) |
| #define FFA_STATUS_NXT_CMD_RD_DONE_MASK (0x2U) |
| #define FFA_STATUS_NXT_CMD_RD_DONE_SET | ( | x | ) | (((uint32_t)(x) << FFA_STATUS_NXT_CMD_RD_DONE_SHIFT) & FFA_STATUS_NXT_CMD_RD_DONE_MASK) |
| #define FFA_STATUS_NXT_CMD_RD_DONE_SHIFT (1U) |
| #define FFA_STATUS_OP_CMD_DONE_GET | ( | x | ) | (((uint32_t)(x) & FFA_STATUS_OP_CMD_DONE_MASK) >> FFA_STATUS_OP_CMD_DONE_SHIFT) |
| #define FFA_STATUS_OP_CMD_DONE_MASK (0x1U) |
| #define FFA_STATUS_OP_CMD_DONE_SET | ( | x | ) | (((uint32_t)(x) << FFA_STATUS_OP_CMD_DONE_SHIFT) & FFA_STATUS_OP_CMD_DONE_MASK) |
| #define FFA_STATUS_OP_CMD_DONE_SHIFT (0U) |
| #define FFA_STATUS_RD_ERR_GET | ( | x | ) | (((uint32_t)(x) & FFA_STATUS_RD_ERR_MASK) >> FFA_STATUS_RD_ERR_SHIFT) |
| #define FFA_STATUS_RD_ERR_MASK (0x8U) |
| #define FFA_STATUS_RD_ERR_SET | ( | x | ) | (((uint32_t)(x) << FFA_STATUS_RD_ERR_SHIFT) & FFA_STATUS_RD_ERR_MASK) |
| #define FFA_STATUS_RD_ERR_SHIFT (3U) |
| #define FFA_STATUS_RD_NXT_ERR_GET | ( | x | ) | (((uint32_t)(x) & FFA_STATUS_RD_NXT_ERR_MASK) >> FFA_STATUS_RD_NXT_ERR_SHIFT) |
| #define FFA_STATUS_RD_NXT_ERR_MASK (0x10U) |
| #define FFA_STATUS_RD_NXT_ERR_SET | ( | x | ) | (((uint32_t)(x) << FFA_STATUS_RD_NXT_ERR_SHIFT) & FFA_STATUS_RD_NXT_ERR_MASK) |
| #define FFA_STATUS_RD_NXT_ERR_SHIFT (4U) |
| #define FFA_STATUS_WR_ERR_GET | ( | x | ) | (((uint32_t)(x) & FFA_STATUS_WR_ERR_MASK) >> FFA_STATUS_WR_ERR_SHIFT) |
| #define FFA_STATUS_WR_ERR_MASK (0x20U) |
| #define FFA_STATUS_WR_ERR_SET | ( | x | ) | (((uint32_t)(x) << FFA_STATUS_WR_ERR_SHIFT) & FFA_STATUS_WR_ERR_MASK) |
| #define FFA_STATUS_WR_ERR_SHIFT (5U) |