PLLCTLV2 driver APIs. More...

Functions
static bool	pllctlv2_xtal_is_stable (PLLCTLV2_Type *ptr)
	Check if external crystal is stable. More...

static bool	pllctlv2_xtal_is_enabled (PLLCTLV2_Type *ptr)
	Check if external crystal is enabled. More...

static void	pllctlv2_xtal_set_rampup_time (PLLCTLV2_Type *ptr, uint32_t rc24m_cycles)
	Set external crystal ramp-up time. More...

static bool	pllctlv2_pll_is_stable (PLLCTLV2_Type *ptr, uint8_t pll)
	Check is PLL is stable. More...

static bool	pllctlv2_pll_is_enabled (PLLCTLV2_Type *ptr, uint8_t pll)
	Check if PLL is enabled. More...

static void	pllctlv2_select_reference_clock (PLLCTLV2_Type *ptr, uint8_t pll, uint8_t src)
	Select the PLL reference clock. More...

void	pllctlv2_enable_spread_spectrum (PLLCTLV2_Type *ptr, uint8_t pll, uint32_t step, uint32_t stop)
	Enable PLL Spread Spectrum feature. More...

static void	pllctlv2_disable_spread_spectrum (PLLCTLV2_Type *ptr, uint8_t pll)
	Disable PLL Spread spectrum. More...

static void	pllctlv2_set_pll_lock_time (PLLCTLV2_Type *ptr, uint8_t pll, uint32_t xtal_cycles)
	Set PLL lock time. More...

static void	pllctlv2_set_pll_step_time (PLLCTLV2_Type *ptr, uint8_t pll, uint32_t xtal_cycles)
	Set PLL step time. More...

void	pllctlv2_set_postdiv (PLLCTLV2_Type *ptr, uint8_t pll, uint8_t div_index, uint8_t div_value)
	Set PLL Post divider. More...

hpm_stat_t	pllctlv2_set_pll_with_mfi_mfn (PLLCTLV2_Type *ptr, uint8_t pll, uint32_t mfi, uint32_t mfn)
	Set the PLL via the low-level MFI, MFD and MFN PLL frequency = REF CLOCK * (mfi + 1.0 * mfn / mfd) More...

hpm_stat_t	pllctlv2_init_pll_with_freq (PLLCTLV2_Type *ptr, uint8_t pll, uint32_t freq_in_hz)
	Initialize PLL to specified frequency Note: the specified PLL clock needs to be enabled before being configured. More...

uint32_t	pllctlv2_get_pll_freq_in_hz (PLLCTLV2_Type *ptr, uint8_t pll)
	Get the specified PLl clock frequency. More...

uint32_t	pllctlv2_get_pll_postdiv_freq_in_hz (PLLCTLV2_Type *ptr, uint8_t pll, uint8_t div_index)
	Get the selected PLL post divider frequency. More...

Detailed Description

PLLCTLV2 driver APIs.

Function Documentation

◆ pllctlv2_disable_spread_spectrum()

static void pllctlv2_disable_spread_spectrum	(	PLLCTLV2_Type *	ptr,
		uint8_t	pll
	)

inlinestatic

#include <drivers/inc/hpm_pllctlv2_drv.h>

Disable PLL Spread spectrum.

Parameters

[in]	ptr	PLLCTLV2 base address
[in]	pll	PLL index

◆ pllctlv2_enable_spread_spectrum()

void pllctlv2_enable_spread_spectrum	(	PLLCTLV2_Type *	ptr,
		uint8_t	pll,
		uint32_t	step,
		uint32_t	stop
	)

#include <drivers/inc/hpm_pllctlv2_drv.h>

Enable PLL Spread Spectrum feature.

Parameters

[in]	ptr	PLLCTLV2 base address
[in]	pll	PLL index
[in]	step	Step of spread spectrum modulator
[in]	stop	Stop point of spread spectrum modulator

◆ pllctlv2_get_pll_freq_in_hz()

uint32_t pllctlv2_get_pll_freq_in_hz	(	PLLCTLV2_Type *	ptr,
		uint8_t	pll
	)

#include <drivers/inc/hpm_pllctlv2_drv.h>

Get the specified PLl clock frequency.

Parameters

[in]	ptr	PLLCTLV2 base
[in]	pll	PLL index

Returns: PLL frequency in Hz

◆ pllctlv2_get_pll_postdiv_freq_in_hz()

uint32_t pllctlv2_get_pll_postdiv_freq_in_hz	(	PLLCTLV2_Type *	ptr,
		uint8_t	pll,
		uint8_t	div_index
	)

#include <drivers/inc/hpm_pllctlv2_drv.h>

Get the selected PLL post divider frequency.

Parameters

[in]	ptr	PLLCTLV2 base
[in]	pll	PLL index
[in]	div_index	Post divider index

Returns: PLL frequency in Hz

◆ pllctlv2_init_pll_with_freq()

hpm_stat_t pllctlv2_init_pll_with_freq	(	PLLCTLV2_Type *	ptr,
		uint8_t	pll,
		uint32_t	freq_in_hz
	)

#include <drivers/inc/hpm_pllctlv2_drv.h>

Initialize PLL to specified frequency Note: the specified PLL clock needs to be enabled before being configured.

Parameters

[in]	ptr	PLLCTLV2 base
[in]	pll	PLL index
[in]	freq_in_hz	expected PLL frequency

Return values

status_invalid_argument	some parameters are invalid
status_success	operation is successful

< PLLCTLV2 PLL MFN Factor

◆ pllctlv2_pll_is_enabled()

static bool pllctlv2_pll_is_enabled	(	PLLCTLV2_Type *	ptr,
		uint8_t	pll
	)

inlinestatic

#include <drivers/inc/hpm_pllctlv2_drv.h>

Check if PLL is enabled.

Parameters

[in]	ptr	PLLCTLV2 base address
[in]	pll	PLL index

Returns: true if PLL is enabled

◆ pllctlv2_pll_is_stable()

static bool pllctlv2_pll_is_stable	(	PLLCTLV2_Type *	ptr,
		uint8_t	pll
	)

inlinestatic

#include <drivers/inc/hpm_pllctlv2_drv.h>

Check is PLL is stable.

Parameters

[in]	ptr	PLLCTLv2 base address
[in]	pll	PLL index

Returns: true if PLL is stable

◆ pllctlv2_select_reference_clock()

static void pllctlv2_select_reference_clock	(	PLLCTLV2_Type *	ptr,
		uint8_t	pll,
		uint8_t	src
	)

inlinestatic

#include <drivers/inc/hpm_pllctlv2_drv.h>

Select the PLL reference clock.

Parameters

[in]	ptr	PLLCTLV2 base address
[in]	pll	PLL index
[in]	src	PLL reference lcock source 0 - XTAL24M 1 - IRC24M

◆ pllctlv2_set_pll_lock_time()

static void pllctlv2_set_pll_lock_time	(	PLLCTLV2_Type *	ptr,
		uint8_t	pll,
		uint32_t	xtal_cycles
	)

inlinestatic

#include <drivers/inc/hpm_pllctlv2_drv.h>

Set PLL lock time.

Parameters

[in]	ptr	PLLCTLV2 base address
[in]	pll	PLL index
[in]	xtal_cycles	external Crystal cycles

◆ pllctlv2_set_pll_step_time()

static void pllctlv2_set_pll_step_time	(	PLLCTLV2_Type *	ptr,
		uint8_t	pll,
		uint32_t	xtal_cycles
	)

inlinestatic

#include <drivers/inc/hpm_pllctlv2_drv.h>

Set PLL step time.

Parameters

[in]	ptr	PLLCTLV2 base address
[in]	pll	PLL index
[in]	xtal_cycles	external Crystal cycles

◆ pllctlv2_set_pll_with_mfi_mfn()

hpm_stat_t pllctlv2_set_pll_with_mfi_mfn	(	PLLCTLV2_Type *	ptr,
		uint8_t	pll,
		uint32_t	mfi,
		uint32_t	mfn
	)

#include <drivers/inc/hpm_pllctlv2_drv.h>

Set the PLL via the low-level MFI, MFD and MFN PLL frequency = REF CLOCK * (mfi + 1.0 * mfn / mfd)

Parameters

[in]	ptr	PLLCTLV2 base
[in]	pll	PLL index
[in]	mfi	MFI value
[in]	mfn	MFN value

Return values

status_invalid_argument	some parameters are invalid
status_success	operation is successful

◆ pllctlv2_set_postdiv()

void pllctlv2_set_postdiv	(	PLLCTLV2_Type *	ptr,
		uint8_t	pll,
		uint8_t	div_index,
		uint8_t	div_value
	)

#include <drivers/inc/hpm_pllctlv2_drv.h>

Set PLL Post divider.

Parameters

[in]	ptr	PLLCTLV2 base
[in]	pll	PLL index
[in]	div_index	Divider index
[in]	div_value	divider value, divider factor is 1 + div_value / 5

◆ pllctlv2_xtal_is_enabled()

static bool pllctlv2_xtal_is_enabled ( PLLCTLV2_Type * ptr )

inlinestatic

#include <drivers/inc/hpm_pllctlv2_drv.h>

Check if external crystal is enabled.

Parameters

[in] ptr PLLCTLV2 base address

Returns: true if external crystal is enabled

◆ pllctlv2_xtal_is_stable()

static bool pllctlv2_xtal_is_stable ( PLLCTLV2_Type * ptr )

inlinestatic

#include <drivers/inc/hpm_pllctlv2_drv.h>

Check if external crystal is stable.

Parameters

[in] ptr PLLCTLV2 base address

Returns: true if external crystal is stable

◆ pllctlv2_xtal_set_rampup_time()

static void pllctlv2_xtal_set_rampup_time	(	PLLCTLV2_Type *	ptr,
		uint32_t	rc24m_cycles
	)

inlinestatic

#include <drivers/inc/hpm_pllctlv2_drv.h>

Set external crystal ramp-up time.

Parameters

[in]	ptr	PLLCTLV2 base address
[in]	rc24m_cycles	Cycles of RC24M clock

Functions

Detailed Description

Function Documentation

◆ pllctlv2_disable_spread_spectrum()

◆ pllctlv2_enable_spread_spectrum()

◆ pllctlv2_get_pll_freq_in_hz()

◆ pllctlv2_get_pll_postdiv_freq_in_hz()

◆ pllctlv2_init_pll_with_freq()

◆ pllctlv2_pll_is_enabled()

◆ pllctlv2_pll_is_stable()

◆ pllctlv2_select_reference_clock()

◆ pllctlv2_set_pll_lock_time()

◆ pllctlv2_set_pll_step_time()

◆ pllctlv2_set_pll_with_mfi_mfn()

◆ pllctlv2_set_postdiv()

◆ pllctlv2_xtal_is_enabled()

◆ pllctlv2_xtal_is_stable()

◆ pllctlv2_xtal_set_rampup_time()