QEIV2 driver APIs. More...

Data Structures
struct	qeiv2_phcnt_cmp_match_config_t
	phase counter compare match config structure More...

struct	qeiv2_pos_cmp_match_config_t
	position compare match config structure More...

struct	qeiv2_uvw_config_t
	uvw config structure More...

struct	qeiv2_adc_config_t
	adc config structure More...

Macros
#define	QEIV2_EVENT_WDOG_FLAG_MASK (1U << 31U)

#define	QEIV2_EVENT_HOME_FLAG_MASK (1U << 30U)

#define	QEIV2_EVENT_POSITION_COMPARE_FLAG_MASK (1U << 29U)

#define	QEIV2_EVENT_Z_PHASE_FLAG_MASK (1U << 28U)

#define	QEIV2_EVENT_Z_MISS_FLAG_MASK (1U << 27U)

#define	QEIV2_EVENT_WIDTH_TIME_FLAG_MASK (1U << 26U)

#define	QEIV2_EVENT_POSITION2_COMPARE_FLAG_MASK (1U << 25U)

#define	QEIV2_EVENT_DIR_CHG_FLAG_MASK (1U << 24U)

#define	QEIV2_EVENT_CYCLE0_FLAG_MASK (1U << 23U)

#define	QEIV2_EVENT_CYCLE1_FLAG_MASK (1U << 22U)

#define	QEIV2_EVENT_PULSE0_FLAG_MASK (1U << 21U)

#define	QEIV2_EVENT_PULSE1_FLAG_MASK (1U << 20U)

#define	QEIV2_EVENT_HOME2_FLAG_MASK (1U << 19U)

#define	QEIV2_EVENT_FAULT_FLAG_MASK (1U << 18U)

#define	QEIV2_UVW_POS_OPT_CUR_SEL_LOW 0u
	qeiv2 uvw position selection More...

#define	QEIV2_UVW_POS_OPT_CUR_SEL_HIGH 1u

#define	QEIV2_UVW_POS_OPT_CUR_SEL_EDGE 2u

#define	QEIV2_UVW_POS_OPT_NEX_SEL_LOW 0u

#define	QEIV2_UVW_POS_OPT_NEX_SEL_HIGH 3u

Typedefs
typedef enum qeiv2_work_mode	qeiv2_work_mode_t
	qeiv2 work mode More...

typedef enum qeiv2_spd_tmr_content	qeiv2_spd_tmr_content_t
	spd and tmr read selection More...

typedef enum qeiv2_rotate_dir	qeiv2_rotate_dir_t
	compare match rotate direction More...

typedef enum qeiv2_position_dir	qeiv2_position_dir_t
	compare match position direction More...

typedef enum qeiv2_z_count_work_mode	qeiv2_z_count_work_mode_t
	counting mode of Z-phase counter More...

typedef enum qeiv2_counter_type	qeiv2_counter_type_t
	counter type More...

typedef enum qeiv2_filter_mode	qeiv2_filter_mode_t
	filter mode More...

typedef enum qeiv2_filter_phase	qeiv2_filter_phase_t
	filter type More...

typedef enum qeiv2_uvw_pos_opt	qeiv2_uvw_pos_opt_t
	uvw position option More...

typedef enum qeiv2_uvw_pos_sel	qeiv2_uvw_pos_sel_t

typedef enum qeiv2_uvw_pos_idx	qeiv2_uvw_pos_idx_t

Enumerations
enum	qeiv2_work_mode { qeiv2_work_mode_abz = 0 , qeiv2_work_mode_pd = 1 , qeiv2_work_mode_ud = 2 , qeiv2_work_mode_uvw = 3 , qeiv2_work_mode_single = 4 , qeiv2_work_mode_sin = 5 , qeiv2_work_mode_sincos = 6 }
	qeiv2 work mode More...

enum	qeiv2_spd_tmr_content { qeiv2_spd_tmr_as_spd_tm = 0 , qeiv2_spd_tmr_as_pos_angle = 1 }
	spd and tmr read selection More...

enum	qeiv2_rotate_dir { qeiv2_rotate_dir_forward = 0 , qeiv2_rotate_dir_reverse = 1 }
	compare match rotate direction More...

enum	qeiv2_position_dir { qeiv2_pos_dir_decrease = 0 , qeiv2_pos_dir_increase = 1 }
	compare match position direction More...

enum	qeiv2_z_count_work_mode { qeiv2_z_count_inc_on_z_input_assert = 0 , qeiv2_z_count_inc_on_phase_count_max = 1 }
	counting mode of Z-phase counter More...

enum	qeiv2_counter_type { qeiv2_counter_type_z = 0 , qeiv2_counter_type_phase = 1 , qeiv2_counter_type_speed = 2 , qeiv2_counter_type_timer = 3 }
	counter type More...

enum	qeiv2_filter_mode { qeiv2_filter_mode_bypass = 0 , qeiv2_filter_mode_burr = 4 , qeiv2_filter_mode_delay , qeiv2_filter_mode_peak , qeiv2_filter_mode_valley }
	filter mode More...

enum	qeiv2_filter_phase { qeiv2_filter_phase_a = 0 , qeiv2_filter_phase_b , qeiv2_filter_phase_z , qeiv2_filter_phase_h , qeiv2_filter_phase_h2 , qeiv2_filter_phase_f }
	filter type More...

enum	qeiv2_uvw_pos_opt { qeiv2_uvw_pos_opt_current = 0 , qeiv2_uvw_pos_opt_next }
	uvw position option More...

enum	qeiv2_uvw_pos_sel { qeiv2_uvw_pos_sel_low = 0 , qeiv2_uvw_pos_sel_high , qeiv2_uvw_pos_sel_edge }

enum	qeiv2_uvw_pos_idx { qeiv2_uvw_pos0 = 0 , qeiv2_uvw_pos1 , qeiv2_uvw_pos2 , qeiv2_uvw_pos3 , qeiv2_uvw_pos4 , qeiv2_uvw_pos5 }

Functions
static void	qeiv2_load_counter_to_read_registers (QEIV2_Type *qeiv2_x)
	load phcnt, zcnt, spdcnt and tmrcnt into their read registers More...

static void	qeiv2_config_z_phase_counter_mode (QEIV2_Type *qeiv2_x, qeiv2_z_count_work_mode_t mode)
	config z phase counter increment and decrement mode More...

static void	qeiv2_config_phmax_phparam (QEIV2_Type *qeiv2_x, uint32_t phmax)
	config phase max value and phase param(for position calculation). It is recommended used without z-phase. If it has z-phase, you can only config phase param by used qeiv2_config_phparam() API. More...

static void	qeiv2_config_phmax (QEIV2_Type *qeiv2_x, uint32_t phmax)
	config phase max value More...

static void	qeiv2_config_phparam (QEIV2_Type *qeiv2_x, uint32_t phmax)
	config phase param for position calculation. More...

static void	qeiv2_config_z_phase_calibration (QEIV2_Type *qeiv2_x, uint32_t phidx, bool enable, qeiv2_work_mode_t mode)
	config phase calibration value trigged by z phase More...

static void	qeiv2_pause_counter (QEIV2_Type *qeiv2_x, uint32_t counter_mask, bool enable)
	pause counter when pause assert More...

static void	qeiv2_pause_pos_counter_on_fault (QEIV2_Type *qeiv2_x, bool enable)
	pause pos counter when fault assert More...

static void	qeiv2_enable_snap (QEIV2_Type *qeiv2_x)
	enable load phcnt, zcnt, spdcnt and tmrcnt into their snap registers More...

static void	qeiv2_disable_snap (QEIV2_Type *qeiv2_x)
	disable snap More...

static void	qeiv2_reset_counter (QEIV2_Type *qeiv2_x)
	reset zcnt, spdcnt and tmrcnt to 0, reset phcnt to phidx. More...

static void	qeiv2_release_counter (QEIV2_Type *qeiv2_x)
	release counter. More...

static void	qeiv2_select_spd_tmr_register_content (QEIV2_Type *qeiv2_x, qeiv2_spd_tmr_content_t content)
	select spd and tmr register content More...

static bool	qeiv2_check_spd_tmr_as_pos_angle (QEIV2_Type *qeiv2_x)
	check spd and tmr register content as pos and angle More...

static void	qeiv2_set_work_mode (QEIV2_Type *qeiv2_x, qeiv2_work_mode_t mode)
	set qeiv2 work mode More...

static void	qeiv2_config_wdog (QEIV2_Type *qeiv2_x, uint32_t timeout, uint8_t clr_phcnt, bool enable)
	config watchdog More...

static void	qeiv2_enable_trig_out_trigger_event (QEIV2_Type *qeiv2_x, uint32_t event_mask)
	enable trig out trigger event More...

static void	qeiv2_disable_trig_out_trigger_event (QEIV2_Type *qeiv2_x, uint32_t event_mask)
	disable trig out trigger event More...

static void	qeiv2_enable_load_read_trigger_event (QEIV2_Type *qeiv2_x, uint32_t event_mask)
	enable load read trigger event More...

static void	qeiv2_disable_load_read_trigger_event (QEIV2_Type *qeiv2_x, uint32_t event_mask)
	disable load read trigger event More...

static void	qeiv2_enable_dma_request (QEIV2_Type *qeiv2_x, uint32_t mask)
	enable dma request More...

static void	qeiv2_disable_dma_request (QEIV2_Type *qeiv2_x, uint32_t mask)
	disable qeiv2 dma More...

static void	qeiv2_clear_status (QEIV2_Type *qeiv2_x, uint32_t mask)
	clear qeiv2 status register More...

static uint32_t	qeiv2_get_status (QEIV2_Type *qeiv2_x)
	get qeiv2 status More...

static bool	qeiv2_get_bit_status (QEIV2_Type *qeiv2_x, uint32_t mask)
	get qeiv2 bit status More...

static void	qeiv2_enable_irq (QEIV2_Type *qeiv2_x, uint32_t mask)
	enable qeiv2 irq More...

static void	qeiv2_disable_irq (QEIV2_Type *qeiv2_x, uint32_t mask)
	disable qeiv2 irq More...

static uint32_t	qeiv2_get_current_count (QEIV2_Type *qeiv2_x, qeiv2_counter_type_t type)
	get current counter value More...

static uint32_t	qeiv2_get_current_phase_phcnt (QEIV2_Type *qeiv2_x)
	get current phcnt value More...

static bool	qeiv2_get_current_phase_a_level (QEIV2_Type *qeiv2_x)
	get current a phase level More...

static bool	qeiv2_get_current_phase_b_level (QEIV2_Type *qeiv2_x)
	get current b phase level More...

static bool	qeiv2_get_current_phase_dir (QEIV2_Type *qeiv2_x)
	get current phase dir More...

static uint32_t	qeiv2_get_count_on_read_event (QEIV2_Type *qeiv2_x, qeiv2_counter_type_t type)
	get read event count value More...

static uint32_t	qeiv2_get_count_on_snap0_event (QEIV2_Type *qeiv2_x, qeiv2_counter_type_t type)
	read the value of each phase snapshot 0 counter More...

static uint32_t	qeiv2_get_count_on_snap1_event (QEIV2_Type *qeiv2_x, qeiv2_counter_type_t type)
	read the value of each phase snapshot 1 counter More...

static void	qeiv2_set_z_cmp_value (QEIV2_Type *qeiv2_x, uint32_t cmp)
	set zcnt compare value More...

static void	qeiv2_set_phcnt_cmp_value (QEIV2_Type *qeiv2_x, uint32_t cmp)
	set phcnt compare value More...

static void	qeiv2_set_spd_pos_cmp_value (QEIV2_Type *qeiv2_x, uint32_t cmp)
	set spdcnt or position compare value. It's selected by CR register rd_sel bit. More...

static void	qeiv2_set_cmp_match_option (QEIV2_Type *qeiv2_x, bool ignore_zcmp, bool ignore_phcmp, bool ignore_spdposcmp, bool ignore_rotate_dir, qeiv2_rotate_dir_t rotate_dir, bool ignore_pos_dir, qeiv2_position_dir_t pos_dir)
	set compare match options More...

static void	qeiv2_set_z_cmp2_value (QEIV2_Type *qeiv2_x, uint32_t cmp)
	set zcnt compare2 value More...

static void	qeiv2_set_phcnt_cmp2_value (QEIV2_Type *qeiv2_x, uint32_t cmp)
	set phcnt compare2 value More...

static void	qeiv2_set_spd_pos_cmp2_value (QEIV2_Type *qeiv2_x, uint32_t cmp)
	set spdcnt or position compare2 value. It's selected by CR register rd_sel bit. More...

static void	qeiv2_set_cmp2_match_option (QEIV2_Type *qeiv2_x, bool ignore_zcmp, bool ignore_phcmp, bool ignore_spdposcmp, bool ignore_rotate_dir, qeiv2_rotate_dir_t rotate_dir, bool ignore_pos_dir, qeiv2_position_dir_t pos_dir)
	set compare2 match options More...

static void	qeiv2_config_abz_uvw_signal_edge (QEIV2_Type *qeiv2_x, bool siga_en, bool sigb_en, bool sigz_en, bool posedge_en, bool negedge_en)
	config signal enablement and edge More...

static void	qeiv2_set_pulse0_num (QEIV2_Type *qeiv2_x, uint32_t pulse_num)
	set pulse0 value More...

static uint32_t	qeiv2_get_pulse0_cycle_snap0 (QEIV2_Type *qeiv2_x)
	get cycle0 snap0 value More...

static uint32_t	qeiv2_get_pulse0_cycle_snap1 (QEIV2_Type *qeiv2_x)
	get cycle0 snap1 value More...

static void	qeiv2_set_pulse1_num (QEIV2_Type *qeiv2_x, uint32_t pulse_num)
	set pulse1 value More...

static uint32_t	qeiv2_get_pulse1_cycle_snap0 (QEIV2_Type *qeiv2_x)
	get cycle1 snap0 value More...

static uint32_t	qeiv2_get_pulse1_cycle_snap1 (QEIV2_Type *qeiv2_x)
	get cycle1 snap1 value More...

static void	qeiv2_set_cycle0_num (QEIV2_Type *qeiv2_x, uint32_t cycle_num)
	set cycle0 value More...

static uint32_t	qeiv2_get_cycle0_pulse_snap0 (QEIV2_Type *qeiv2_x)
	get pulse0 snap0 value More...

static uint32_t	qeiv2_get_cycle0_pulse_snap1 (QEIV2_Type *qeiv2_x)
	get pulse0 snap1 value More...

static uint32_t	qeiv2_get_cycle0_pulse0cycle_snap0 (QEIV2_Type *qeiv2_x)
	get pulse0cycle snap0 value More...

static uint32_t	qeiv2_get_cycle0_pulse0cycle_snap1 (QEIV2_Type *qeiv2_x)
	get pulse0cycle snap1 value More...

static void	qeiv2_set_cycle1_num (QEIV2_Type *qeiv2_x, uint32_t cycle_num)
	set cycle1 value More...

static uint32_t	qeiv2_get_cycle1_pulse_snap0 (QEIV2_Type *qeiv2_x)
	get pulse1 snap0 value More...

static uint32_t	qeiv2_get_cycle1_pulse_snap1 (QEIV2_Type *qeiv2_x)
	get pulse1 snap1 value More...

static uint32_t	qeiv2_get_cycle1_pulse1cycle_snap0 (QEIV2_Type *qeiv2_x)
	get pulse1cycle snap0 value More...

static uint32_t	qeiv2_get_cycle1_pulse1cycle_snap1 (QEIV2_Type *qeiv2_x)
	get pulse1cycle snap1 value More...

static void	qeiv2_clear_counter_when_dir_chg (QEIV2_Type *qeiv2_x, bool enable)
	enable or disable clear counter if detect direction change More...

static void	qeiv2_config_adcx (QEIV2_Type qeiv2_x, qeiv2_adc_config_t config, bool enable)
	adcx config More...

static void	qeiv2_config_adcy (QEIV2_Type qeiv2_x, qeiv2_adc_config_t config, bool enable)
	adcy config More...

void	qeiv2_config_adcx_adcy_param (QEIV2_Type *qeiv2_x, float tan_delta, float cos_delta, float x_magnification, float y_magnification)
	Configures the orthogonal delta and magnification for ADCX and ADCY. More...

static void	qeiv2_set_adc_xy_delay (QEIV2_Type *qeiv2_x, uint32_t delay)
	set adcx and adcy delay More...

static void	qeiv2_set_position_threshold (QEIV2_Type *qeiv2_x, uint32_t threshold)
	set position threshold More...

static void	qeiv2_set_uvw_position_opt (QEIV2_Type *qeiv2_x, qeiv2_uvw_pos_opt_t opt)
	set uvw position option More...

static void	qeiv2_set_uvw_position_sel (QEIV2_Type *qeiv2_x, qeiv2_uvw_pos_idx_t idx, uint8_t u_pos_sel, uint8_t v_pos_sel, uint8_t w_pos_sel, bool enable)
	set config uvw position More...

static void	qeiv2_set_uvw_position (QEIV2_Type *qeiv2_x, qeiv2_uvw_pos_idx_t idx, uint32_t pos)
	set uvw position More...

static void	qeiv2_set_z_phase (QEIV2_Type *qeiv2_x, uint32_t cnt)
	set z phase counter value More...

static uint32_t	qeiv2_get_z_phase (QEIV2_Type *qeiv2_x)
	get z phase counter value More...

static void	qeiv2_set_phase_cnt (QEIV2_Type *qeiv2_x, uint32_t cnt)
	set phase counter value More...

static uint32_t	qeiv2_get_phase_cnt (QEIV2_Type *qeiv2_x)
	get phase counter value More...

static void	qeiv2_update_phase_cnt (QEIV2_Type *qeiv2_x, bool inc, bool dec, uint32_t value)
	update phase counter value More...

static void	qeiv2_set_position (QEIV2_Type *qeiv2_x, uint32_t pos)
	set position value More...

static uint32_t	qeiv2_get_postion (QEIV2_Type *qeiv2_x)
	get position value More...

static void	qeiv2_update_position (QEIV2_Type *qeiv2_x, bool inc, bool dec, uint32_t value)
	update position value More...

static uint32_t	qeiv2_get_angle (QEIV2_Type *qeiv2_x)
	get angle value More...

static void	qeiv2_config_position_timeout (QEIV2_Type *qeiv2_x, uint32_t tm, bool enable)
	config position timeout for mmc module More...

hpm_stat_t	qeiv2_config_phcnt_cmp_match_condition (QEIV2_Type qeiv2_x, qeiv2_phcnt_cmp_match_config_t config)
	config phcnt compare match condition More...

hpm_stat_t	qeiv2_config_position_cmp_match_condition (QEIV2_Type qeiv2_x, qeiv2_pos_cmp_match_config_t config)
	config position compare match condition More...

hpm_stat_t	qeiv2_config_phcnt_cmp2_match_condition (QEIV2_Type qeiv2_x, qeiv2_phcnt_cmp_match_config_t config)
	config phcnt compare2 match condition More...

hpm_stat_t	qeiv2_config_position_cmp2_match_condition (QEIV2_Type qeiv2_x, qeiv2_pos_cmp_match_config_t config)
	config position compare2 match condition More...

void	qeiv2_get_uvw_position_defconfig (qeiv2_uvw_config_t *config)
	get uvw position default config More...

hpm_stat_t	qeiv2_config_uvw_position (QEIV2_Type qeiv2_x, qeiv2_uvw_config_t config)
	config uvw position More...

void	qeiv2_config_filter (QEIV2_Type *qeiv2_x, qeiv2_filter_phase_t phase, bool outinv, qeiv2_filter_mode_t mode, bool sync, uint32_t filtlen)
	config signal filter More...

Detailed Description

QEIV2 driver APIs.

Macro Definition Documentation

◆ QEIV2_EVENT_CYCLE0_FLAG_MASK

#define QEIV2_EVENT_CYCLE0_FLAG_MASK (1U << 23U)

#include <drivers/inc/hpm_qeiv2_drv.h>

cycle0 flag

◆ QEIV2_EVENT_CYCLE1_FLAG_MASK

#define QEIV2_EVENT_CYCLE1_FLAG_MASK (1U << 22U)

#include <drivers/inc/hpm_qeiv2_drv.h>

cycle1 flag

◆ QEIV2_EVENT_DIR_CHG_FLAG_MASK

#define QEIV2_EVENT_DIR_CHG_FLAG_MASK (1U << 24U)

#include <drivers/inc/hpm_qeiv2_drv.h>

direction change flag

◆ QEIV2_EVENT_FAULT_FLAG_MASK

#define QEIV2_EVENT_FAULT_FLAG_MASK (1U << 18U)

#include <drivers/inc/hpm_qeiv2_drv.h>

fault flag

◆ QEIV2_EVENT_HOME2_FLAG_MASK

#define QEIV2_EVENT_HOME2_FLAG_MASK (1U << 19U)

#include <drivers/inc/hpm_qeiv2_drv.h>

home2 flag

◆ QEIV2_EVENT_HOME_FLAG_MASK

#define QEIV2_EVENT_HOME_FLAG_MASK (1U << 30U)

#include <drivers/inc/hpm_qeiv2_drv.h>

home flag

◆ QEIV2_EVENT_POSITION2_COMPARE_FLAG_MASK

#define QEIV2_EVENT_POSITION2_COMPARE_FLAG_MASK (1U << 25U)

#include <drivers/inc/hpm_qeiv2_drv.h>

postion2 compare match flag

◆ QEIV2_EVENT_POSITION_COMPARE_FLAG_MASK

#define QEIV2_EVENT_POSITION_COMPARE_FLAG_MASK (1U << 29U)

#include <drivers/inc/hpm_qeiv2_drv.h>

postion compare match flag

◆ QEIV2_EVENT_PULSE0_FLAG_MASK

#define QEIV2_EVENT_PULSE0_FLAG_MASK (1U << 21U)

#include <drivers/inc/hpm_qeiv2_drv.h>

pulse0 flag

◆ QEIV2_EVENT_PULSE1_FLAG_MASK

#define QEIV2_EVENT_PULSE1_FLAG_MASK (1U << 20U)

#include <drivers/inc/hpm_qeiv2_drv.h>

pulse1 flag

◆ QEIV2_EVENT_WDOG_FLAG_MASK

#define QEIV2_EVENT_WDOG_FLAG_MASK (1U << 31U)

#include <drivers/inc/hpm_qeiv2_drv.h>

watchdog flag

◆ QEIV2_EVENT_WIDTH_TIME_FLAG_MASK

#define QEIV2_EVENT_WIDTH_TIME_FLAG_MASK (1U << 26U)

#include <drivers/inc/hpm_qeiv2_drv.h>

width time flag

◆ QEIV2_EVENT_Z_MISS_FLAG_MASK

#define QEIV2_EVENT_Z_MISS_FLAG_MASK (1U << 27U)

#include <drivers/inc/hpm_qeiv2_drv.h>

z miss flag

◆ QEIV2_EVENT_Z_PHASE_FLAG_MASK

#define QEIV2_EVENT_Z_PHASE_FLAG_MASK (1U << 28U)

#include <drivers/inc/hpm_qeiv2_drv.h>

z input flag

◆ QEIV2_UVW_POS_OPT_CUR_SEL_EDGE

#define QEIV2_UVW_POS_OPT_CUR_SEL_EDGE 2u

#include <drivers/inc/hpm_qeiv2_drv.h>

◆ QEIV2_UVW_POS_OPT_CUR_SEL_HIGH

#define QEIV2_UVW_POS_OPT_CUR_SEL_HIGH 1u

#include <drivers/inc/hpm_qeiv2_drv.h>

◆ QEIV2_UVW_POS_OPT_CUR_SEL_LOW

#define QEIV2_UVW_POS_OPT_CUR_SEL_LOW 0u

#include <drivers/inc/hpm_qeiv2_drv.h>

qeiv2 uvw position selection

◆ QEIV2_UVW_POS_OPT_NEX_SEL_HIGH

#define QEIV2_UVW_POS_OPT_NEX_SEL_HIGH 3u

#include <drivers/inc/hpm_qeiv2_drv.h>

◆ QEIV2_UVW_POS_OPT_NEX_SEL_LOW

#define QEIV2_UVW_POS_OPT_NEX_SEL_LOW 0u

#include <drivers/inc/hpm_qeiv2_drv.h>

Typedef Documentation

◆ qeiv2_counter_type_t

typedef enum qeiv2_counter_type qeiv2_counter_type_t

#include <drivers/inc/hpm_qeiv2_drv.h>

counter type

◆ qeiv2_filter_mode_t

typedef enum qeiv2_filter_mode qeiv2_filter_mode_t

#include <drivers/inc/hpm_qeiv2_drv.h>

filter mode

◆ qeiv2_filter_phase_t

typedef enum qeiv2_filter_phase qeiv2_filter_phase_t

#include <drivers/inc/hpm_qeiv2_drv.h>

filter type

qeiv2_filter_phase_t

◆ qeiv2_position_dir_t

typedef enum qeiv2_position_dir qeiv2_position_dir_t

#include <drivers/inc/hpm_qeiv2_drv.h>

compare match position direction

◆ qeiv2_rotate_dir_t

typedef enum qeiv2_rotate_dir qeiv2_rotate_dir_t

#include <drivers/inc/hpm_qeiv2_drv.h>

compare match rotate direction

◆ qeiv2_spd_tmr_content_t

typedef enum qeiv2_spd_tmr_content qeiv2_spd_tmr_content_t

#include <drivers/inc/hpm_qeiv2_drv.h>

spd and tmr read selection

◆ qeiv2_uvw_pos_idx_t

typedef enum qeiv2_uvw_pos_idx qeiv2_uvw_pos_idx_t

#include <drivers/inc/hpm_qeiv2_drv.h>

qeiv2_uvw_pos_idx_t

◆ qeiv2_uvw_pos_opt_t

typedef enum qeiv2_uvw_pos_opt qeiv2_uvw_pos_opt_t

#include <drivers/inc/hpm_qeiv2_drv.h>

uvw position option

◆ qeiv2_uvw_pos_sel_t

typedef enum qeiv2_uvw_pos_sel qeiv2_uvw_pos_sel_t

#include <drivers/inc/hpm_qeiv2_drv.h>

qeiv2_uvw_pos_sel_t

◆ qeiv2_work_mode_t

typedef enum qeiv2_work_mode qeiv2_work_mode_t

#include <drivers/inc/hpm_qeiv2_drv.h>

qeiv2 work mode

◆ qeiv2_z_count_work_mode_t

typedef enum qeiv2_z_count_work_mode qeiv2_z_count_work_mode_t

#include <drivers/inc/hpm_qeiv2_drv.h>

counting mode of Z-phase counter

Enumeration Type Documentation

◆ qeiv2_counter_type

enum qeiv2_counter_type

#include <drivers/inc/hpm_qeiv2_drv.h>

counter type

Enumerator
qeiv2_counter_type_z	Z counter
qeiv2_counter_type_phase	Phase counter
qeiv2_counter_type_speed	Speed counter
qeiv2_counter_type_timer	Timer counter

◆ qeiv2_filter_mode

enum qeiv2_filter_mode

#include <drivers/inc/hpm_qeiv2_drv.h>

filter mode

Enumerator
qeiv2_filter_mode_bypass	bypass
qeiv2_filter_mode_burr	rapid change mode
qeiv2_filter_mode_delay	delay filter mode
qeiv2_filter_mode_peak	stable low mode
qeiv2_filter_mode_valley	stable high mode

◆ qeiv2_filter_phase

enum qeiv2_filter_phase

#include <drivers/inc/hpm_qeiv2_drv.h>

filter type

Enumerator
qeiv2_filter_phase_a	filter phase a
qeiv2_filter_phase_b	filter phase b
qeiv2_filter_phase_z	filter phase z
qeiv2_filter_phase_h	filter phase h
qeiv2_filter_phase_h2	filter phase h2
qeiv2_filter_phase_f	filter phase f

◆ qeiv2_position_dir

enum qeiv2_position_dir

#include <drivers/inc/hpm_qeiv2_drv.h>

compare match position direction

Enumerator
qeiv2_pos_dir_decrease
qeiv2_pos_dir_increase

◆ qeiv2_rotate_dir

enum qeiv2_rotate_dir

#include <drivers/inc/hpm_qeiv2_drv.h>

compare match rotate direction

Enumerator
qeiv2_rotate_dir_forward
qeiv2_rotate_dir_reverse

◆ qeiv2_spd_tmr_content

enum qeiv2_spd_tmr_content

#include <drivers/inc/hpm_qeiv2_drv.h>

spd and tmr read selection

Enumerator
qeiv2_spd_tmr_as_spd_tm	spd and timer register as spd and time
qeiv2_spd_tmr_as_pos_angle	spd and timer register as position and angle

◆ qeiv2_uvw_pos_idx

enum qeiv2_uvw_pos_idx

#include <drivers/inc/hpm_qeiv2_drv.h>

Enumerator
qeiv2_uvw_pos0
qeiv2_uvw_pos1
qeiv2_uvw_pos2
qeiv2_uvw_pos3
qeiv2_uvw_pos4
qeiv2_uvw_pos5

◆ qeiv2_uvw_pos_opt

enum qeiv2_uvw_pos_opt

#include <drivers/inc/hpm_qeiv2_drv.h>

uvw position option

Enumerator
qeiv2_uvw_pos_opt_current	output exact point position, MMC use this
qeiv2_uvw_pos_opt_next	output next area position, QEO use this

◆ qeiv2_uvw_pos_sel

enum qeiv2_uvw_pos_sel

#include <drivers/inc/hpm_qeiv2_drv.h>

Enumerator
qeiv2_uvw_pos_sel_low
qeiv2_uvw_pos_sel_high
qeiv2_uvw_pos_sel_edge

◆ qeiv2_work_mode

enum qeiv2_work_mode

#include <drivers/inc/hpm_qeiv2_drv.h>

qeiv2 work mode

Enumerator
qeiv2_work_mode_abz	Orthogonal decoder mode
qeiv2_work_mode_pd	Directional (PD) mode
qeiv2_work_mode_ud	Up and Down (UD) mode
qeiv2_work_mode_uvw	UVW mode
qeiv2_work_mode_single	Single-phase mode
qeiv2_work_mode_sin	Single sinewave mode
qeiv2_work_mode_sincos	Orthogonal sinewave mode

◆ qeiv2_z_count_work_mode

enum qeiv2_z_count_work_mode

#include <drivers/inc/hpm_qeiv2_drv.h>

counting mode of Z-phase counter

Enumerator
qeiv2_z_count_inc_on_z_input_assert	zcnt will increment or decrement when Z input assert
qeiv2_z_count_inc_on_phase_count_max	zcnt will increment when phcnt upcount to phmax, decrement when phcnt downcount to 0

Function Documentation

◆ qeiv2_check_spd_tmr_as_pos_angle()

static bool qeiv2_check_spd_tmr_as_pos_angle ( QEIV2_Type * qeiv2_x )

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

check spd and tmr register content as pos and angle

Parameters

[in] qeiv2_x QEIV2 base address, HPM_QEIV2x(x=0...n)

Returns: true if spd and timer register as pos and angle register

◆ qeiv2_clear_counter_when_dir_chg()

static void qeiv2_clear_counter_when_dir_chg	(	QEIV2_Type *	qeiv2_x,
		bool	enable
	)

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

enable or disable clear counter if detect direction change

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	enable	enable or disable clear counter if detect direction change

◆ qeiv2_clear_status()

static void qeiv2_clear_status	(	QEIV2_Type *	qeiv2_x,
		uint32_t	mask
	)

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

clear qeiv2 status register

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	mask	QEIV2_EVENT_WDOG_FLAG_MASK QEIV2_EVENT_HOME_FLAG_MASK QEIV2_EVENT_POSITION_COMPARE_FLAG_MASK QEIV2_EVENT_Z_PHASE_FLAG_MASK QEIV2_EVENT_Z_MISS_FLAG_MASK QEIV2_EVENT_WIDTH_TIME_FLAG_MASK QEIV2_EVENT_POSITION2_COMPARE_FLAG_MASK QEIV2_EVENT_DIR_CHG_FLAG_MASK QEIV2_EVENT_CYCLE0_FLAG_MASK QEIV2_EVENT_CYCLE1_FLAG_MASK QEIV2_EVENT_PULSE0_FLAG_MASK QEIV2_EVENT_PULSE1_FLAG_MASK QEIV2_EVENT_HOME2_FLAG_MASK QEIV2_EVENT_FAULT_FLAG_MASK

◆ qeiv2_config_abz_uvw_signal_edge()

static void qeiv2_config_abz_uvw_signal_edge	(	QEIV2_Type *	qeiv2_x,
		bool	siga_en,
		bool	sigb_en,
		bool	sigz_en,
		bool	posedge_en,
		bool	negedge_en
	)

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

config signal enablement and edge

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	siga_en	enable signal A/U
[in]	sigb_en	enable signal B/V
[in]	sigz_en	enable signal Z/W
[in]	posedge_en	enable rise edge
[in]	negedge_en	enable fall edge

◆ qeiv2_config_adcx()

static void qeiv2_config_adcx	(	QEIV2_Type *	qeiv2_x,
		qeiv2_adc_config_t *	config,
		bool	enable
	)

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

adcx config

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	config	qeiv2_adc_config_t
[in]	enable	enable or disable adcx

◆ qeiv2_config_adcx_adcy_param()

void qeiv2_config_adcx_adcy_param	(	QEIV2_Type *	qeiv2_x,
		float	tan_delta,
		float	cos_delta,
		float	x_magnification,
		float	y_magnification
	)

#include <drivers/inc/hpm_qeiv2_drv.h>

Configures the orthogonal delta and magnification for ADCX and ADCY.

Configures the orthogonal delta and magnification parameters for ADCX and ADCY of the QEIV2 device.

Parameters

[in]	qeiv2_x	Pointer to the QEIV2 device
[in]	tan_delta	TAN value of orthogonal delta angle in radians
[in]	cos_delta	COS value of orthogonal delta angle in radians
[in]	x_magnification	ADCX magnification factor. If no magnify, please set it to 1.0.
[in]	y_magnification	ADCY magnification factor. If no magnify, please set it to 1.0.

◆ qeiv2_config_adcy()

static void qeiv2_config_adcy	(	QEIV2_Type *	qeiv2_x,
		qeiv2_adc_config_t *	config,
		bool	enable
	)

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

adcy config

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	config	qeiv2_adc_config_t
[in]	enable	enable or disable adcy

◆ qeiv2_config_filter()

void qeiv2_config_filter	(	QEIV2_Type *	qeiv2_x,
		qeiv2_filter_phase_t	phase,
		bool	outinv,
		qeiv2_filter_mode_t	mode,
		bool	sync,
		uint32_t	filtlen
	)

#include <drivers/inc/hpm_qeiv2_drv.h>

config signal filter

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	phase	filter phase qeiv2_filter_phase_t
[in]	outinv	Filter will invert the output
[in]	mode	qeiv2_filter_mode_t
[in]	sync	set to enable sychronization input signal with TRGM clock
[in]	filtlen	defines the filter counter length.

◆ qeiv2_config_phcnt_cmp2_match_condition()

hpm_stat_t qeiv2_config_phcnt_cmp2_match_condition	(	QEIV2_Type *	qeiv2_x,
		qeiv2_phcnt_cmp_match_config_t *	config
	)

#include <drivers/inc/hpm_qeiv2_drv.h>

config phcnt compare2 match condition

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	config	qeiv2_phcnt_cmp_match_config_t

Returns: status_invalid_argument or status_success

◆ qeiv2_config_phcnt_cmp_match_condition()

hpm_stat_t qeiv2_config_phcnt_cmp_match_condition	(	QEIV2_Type *	qeiv2_x,
		qeiv2_phcnt_cmp_match_config_t *	config
	)

#include <drivers/inc/hpm_qeiv2_drv.h>

config phcnt compare match condition

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	config	qeiv2_phcnt_cmp_match_config_t

Returns: status_invalid_argument or status_success

◆ qeiv2_config_phmax()

static void qeiv2_config_phmax	(	QEIV2_Type *	qeiv2_x,
		uint32_t	phmax
	)

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

config phase max value

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	phmax	maximum phcnt number, phcnt will rollover to 0 when it upcount to (phmax-1)

◆ qeiv2_config_phmax_phparam()

static void qeiv2_config_phmax_phparam	(	QEIV2_Type *	qeiv2_x,
		uint32_t	phmax
	)

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

config phase max value and phase param(for position calculation). It is recommended used without z-phase. If it has z-phase, you can only config phase param by used qeiv2_config_phparam() API.

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	phmax	maximum phcnt number, phcnt will rollover to 0 when it upcount to (phmax-1)

◆ qeiv2_config_phparam()

static void qeiv2_config_phparam	(	QEIV2_Type *	qeiv2_x,
		uint32_t	phmax
	)

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

config phase param for position calculation.

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	phmax	maximum phcnt number, phase param will be calculated by phmax.

◆ qeiv2_config_position_cmp2_match_condition()

hpm_stat_t qeiv2_config_position_cmp2_match_condition	(	QEIV2_Type *	qeiv2_x,
		qeiv2_pos_cmp_match_config_t *	config
	)

#include <drivers/inc/hpm_qeiv2_drv.h>

config position compare2 match condition

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	config	qeiv2_pos_cmp_match_config_t

Returns: status_invalid_argument or status_success

◆ qeiv2_config_position_cmp_match_condition()

hpm_stat_t qeiv2_config_position_cmp_match_condition	(	QEIV2_Type *	qeiv2_x,
		qeiv2_pos_cmp_match_config_t *	config
	)

#include <drivers/inc/hpm_qeiv2_drv.h>

config position compare match condition

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	config	qeiv2_pos_cmp_match_config_t

Returns: status_invalid_argument or status_success

◆ qeiv2_config_position_timeout()

static void qeiv2_config_position_timeout	(	QEIV2_Type *	qeiv2_x,
		uint32_t	tm,
		bool	enable
	)

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

config position timeout for mmc module

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	tm	postion timeout value
[in]	enable	enable position timeout feature. If timeout, send valid again.

◆ qeiv2_config_uvw_position()

hpm_stat_t qeiv2_config_uvw_position	(	QEIV2_Type *	qeiv2_x,
		qeiv2_uvw_config_t *	config
	)

#include <drivers/inc/hpm_qeiv2_drv.h>

config uvw position

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	config	uvw position config structure pointer

Returns: status_invalid_argument or status_success

◆ qeiv2_config_wdog()

static void qeiv2_config_wdog	(	QEIV2_Type *	qeiv2_x,
		uint32_t	timeout,
		uint8_t	clr_phcnt,
		bool	enable
	)

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

config watchdog

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	timeout	watchdog timeout time
[in]	clr_phcnt	the phase_cnt time passed, then clear wdog counter
[in]	enable	1 - enable watchdog 0 - disable watchdog

◆ qeiv2_config_z_phase_calibration()

static void qeiv2_config_z_phase_calibration	(	QEIV2_Type *	qeiv2_x,
		uint32_t	phidx,
		bool	enable,
		qeiv2_work_mode_t	mode
	)

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

config phase calibration value trigged by z phase

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	enable	phcnt will set to phidx when Z input assert
[in]	phidx	phcnt reset value
[in]	mode	qeiv2_work_mode_t

◆ qeiv2_config_z_phase_counter_mode()

static void qeiv2_config_z_phase_counter_mode	(	QEIV2_Type *	qeiv2_x,
		qeiv2_z_count_work_mode_t	mode
	)

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

config z phase counter increment and decrement mode

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	mode	1 zcnt will increment when phcnt upcount to PHCFG.phmax, decrement when phcnt downcount to 0 0 zcnt will increment or decrement when Z input assert

◆ qeiv2_disable_dma_request()

static void qeiv2_disable_dma_request	(	QEIV2_Type *	qeiv2_x,
		uint32_t	mask
	)

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

disable qeiv2 dma

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	mask	QEIV2_EVENT_WDOG_FLAG_MASK QEIV2_EVENT_HOME_FLAG_MASK QEIV2_EVENT_POSITION_COMPARE_FLAG_MASK QEIV2_EVENT_Z_PHASE_FLAG_MASK QEIV2_EVENT_Z_MISS_FLAG_MASK QEIV2_EVENT_WIDTH_TIME_FLAG_MASK QEIV2_EVENT_POSITION2_COMPARE_FLAG_MASK QEIV2_EVENT_DIR_CHG_FLAG_MASK QEIV2_EVENT_CYCLE0_FLAG_MASK QEIV2_EVENT_CYCLE1_FLAG_MASK QEIV2_EVENT_PULSE0_FLAG_MASK QEIV2_EVENT_PULSE1_FLAG_MASK QEIV2_EVENT_HOME2_FLAG_MASK QEIV2_EVENT_FAULT_FLAG_MASK

◆ qeiv2_disable_irq()

static void qeiv2_disable_irq	(	QEIV2_Type *	qeiv2_x,
		uint32_t	mask
	)

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

disable qeiv2 irq

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	mask	QEIV2_EVENT_WDOG_FLAG_MASK QEIV2_EVENT_HOME_FLAG_MASK QEIV2_EVENT_POSITION_COMPARE_FLAG_MASK QEIV2_EVENT_Z_PHASE_FLAG_MASK QEIV2_EVENT_Z_MISS_FLAG_MASK QEIV2_EVENT_WIDTH_TIME_FLAG_MASK QEIV2_EVENT_POSITION2_COMPARE_FLAG_MASK QEIV2_EVENT_DIR_CHG_FLAG_MASK QEIV2_EVENT_CYCLE0_FLAG_MASK QEIV2_EVENT_CYCLE1_FLAG_MASK QEIV2_EVENT_PULSE0_FLAG_MASK QEIV2_EVENT_PULSE1_FLAG_MASK QEIV2_EVENT_HOME2_FLAG_MASK QEIV2_EVENT_FAULT_FLAG_MASK

◆ qeiv2_disable_load_read_trigger_event()

static void qeiv2_disable_load_read_trigger_event	(	QEIV2_Type *	qeiv2_x,
		uint32_t	event_mask
	)

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

disable load read trigger event

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	event_mask	QEIV2_EVENT_WDOG_FLAG_MASK QEIV2_EVENT_HOME_FLAG_MASK QEIV2_EVENT_POSITION_COMPARE_FLAG_MASK QEIV2_EVENT_Z_PHASE_FLAG_MASK QEIV2_EVENT_Z_MISS_FLAG_MASK QEIV2_EVENT_WIDTH_TIME_FLAG_MASK QEIV2_EVENT_POSITION2_COMPARE_FLAG_MASK QEIV2_EVENT_DIR_CHG_FLAG_MASK QEIV2_EVENT_CYCLE0_FLAG_MASK QEIV2_EVENT_CYCLE1_FLAG_MASK QEIV2_EVENT_PULSE0_FLAG_MASK QEIV2_EVENT_PULSE1_FLAG_MASK QEIV2_EVENT_HOME2_FLAG_MASK QEIV2_EVENT_FAULT_FLAG_MASK

◆ qeiv2_disable_snap()

static void qeiv2_disable_snap ( QEIV2_Type * qeiv2_x )

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

disable snap

Parameters

[in] qeiv2_x QEIV2 base address, HPM_QEIV2x(x=0...n)

◆ qeiv2_disable_trig_out_trigger_event()

static void qeiv2_disable_trig_out_trigger_event	(	QEIV2_Type *	qeiv2_x,
		uint32_t	event_mask
	)

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

disable trig out trigger event

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	event_mask	QEIV2_EVENT_WDOG_FLAG_MASK QEIV2_EVENT_HOME_FLAG_MASK QEIV2_EVENT_POSITION_COMPARE_FLAG_MASK QEIV2_EVENT_Z_PHASE_FLAG_MASK QEIV2_EVENT_Z_MISS_FLAG_MASK QEIV2_EVENT_WIDTH_TIME_FLAG_MASK QEIV2_EVENT_POSITION2_COMPARE_FLAG_MASK QEIV2_EVENT_DIR_CHG_FLAG_MASK QEIV2_EVENT_CYCLE0_FLAG_MASK QEIV2_EVENT_CYCLE1_FLAG_MASK QEIV2_EVENT_PULSE0_FLAG_MASK QEIV2_EVENT_PULSE1_FLAG_MASK QEIV2_EVENT_HOME2_FLAG_MASK QEIV2_EVENT_FAULT_FLAG_MASK

◆ qeiv2_enable_dma_request()

static void qeiv2_enable_dma_request	(	QEIV2_Type *	qeiv2_x,
		uint32_t	mask
	)

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

enable dma request

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	mask	QEIV2_EVENT_WDOG_FLAG_MASK QEIV2_EVENT_HOME_FLAG_MASK QEIV2_EVENT_POSITION_COMPARE_FLAG_MASK QEIV2_EVENT_Z_PHASE_FLAG_MASK QEIV2_EVENT_Z_MISS_FLAG_MASK QEIV2_EVENT_WIDTH_TIME_FLAG_MASK QEIV2_EVENT_POSITION2_COMPARE_FLAG_MASK QEIV2_EVENT_DIR_CHG_FLAG_MASK QEIV2_EVENT_CYCLE0_FLAG_MASK QEIV2_EVENT_CYCLE1_FLAG_MASK QEIV2_EVENT_PULSE0_FLAG_MASK QEIV2_EVENT_PULSE1_FLAG_MASK QEIV2_EVENT_HOME2_FLAG_MASK QEIV2_EVENT_FAULT_FLAG_MASK

◆ qeiv2_enable_irq()

static void qeiv2_enable_irq	(	QEIV2_Type *	qeiv2_x,
		uint32_t	mask
	)

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

enable qeiv2 irq

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	mask	QEIV2_EVENT_WDOG_FLAG_MASK QEIV2_EVENT_HOME_FLAG_MASK QEIV2_EVENT_POSITION_COMPARE_FLAG_MASK QEIV2_EVENT_Z_PHASE_FLAG_MASK QEIV2_EVENT_Z_MISS_FLAG_MASK QEIV2_EVENT_WIDTH_TIME_FLAG_MASK QEIV2_EVENT_POSITION2_COMPARE_FLAG_MASK QEIV2_EVENT_DIR_CHG_FLAG_MASK QEIV2_EVENT_CYCLE0_FLAG_MASK QEIV2_EVENT_CYCLE1_FLAG_MASK QEIV2_EVENT_PULSE0_FLAG_MASK QEIV2_EVENT_PULSE1_FLAG_MASK QEIV2_EVENT_HOME2_FLAG_MASK QEIV2_EVENT_FAULT_FLAG_MASK

◆ qeiv2_enable_load_read_trigger_event()

static void qeiv2_enable_load_read_trigger_event	(	QEIV2_Type *	qeiv2_x,
		uint32_t	event_mask
	)

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

enable load read trigger event

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	event_mask	QEIV2_EVENT_WDOG_FLAG_MASK QEIV2_EVENT_HOME_FLAG_MASK QEIV2_EVENT_POSITION_COMPARE_FLAG_MASK QEIV2_EVENT_Z_PHASE_FLAG_MASK QEIV2_EVENT_Z_MISS_FLAG_MASK QEIV2_EVENT_WIDTH_TIME_FLAG_MASK QEIV2_EVENT_POSITION2_COMPARE_FLAG_MASK QEIV2_EVENT_DIR_CHG_FLAG_MASK QEIV2_EVENT_CYCLE0_FLAG_MASK QEIV2_EVENT_CYCLE1_FLAG_MASK QEIV2_EVENT_PULSE0_FLAG_MASK QEIV2_EVENT_PULSE1_FLAG_MASK QEIV2_EVENT_HOME2_FLAG_MASK QEIV2_EVENT_FAULT_FLAG_MASK

◆ qeiv2_enable_snap()

static void qeiv2_enable_snap ( QEIV2_Type * qeiv2_x )

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

enable load phcnt, zcnt, spdcnt and tmrcnt into their snap registers

Parameters

[in] qeiv2_x QEIV2 base address, HPM_QEIV2x(x=0...n)

◆ qeiv2_enable_trig_out_trigger_event()

static void qeiv2_enable_trig_out_trigger_event	(	QEIV2_Type *	qeiv2_x,
		uint32_t	event_mask
	)

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

enable trig out trigger event

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	event_mask	QEIV2_EVENT_WDOG_FLAG_MASK QEIV2_EVENT_HOME_FLAG_MASK QEIV2_EVENT_POSITION_COMPARE_FLAG_MASK QEIV2_EVENT_Z_PHASE_FLAG_MASK QEIV2_EVENT_Z_MISS_FLAG_MASK QEIV2_EVENT_WIDTH_TIME_FLAG_MASK QEIV2_EVENT_POSITION2_COMPARE_FLAG_MASK QEIV2_EVENT_DIR_CHG_FLAG_MASK QEIV2_EVENT_CYCLE0_FLAG_MASK QEIV2_EVENT_CYCLE1_FLAG_MASK QEIV2_EVENT_PULSE0_FLAG_MASK QEIV2_EVENT_PULSE1_FLAG_MASK QEIV2_EVENT_HOME2_FLAG_MASK QEIV2_EVENT_FAULT_FLAG_MASK

◆ qeiv2_get_angle()

static uint32_t qeiv2_get_angle ( QEIV2_Type * qeiv2_x )

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

get angle value

Parameters

[in] qeiv2_x QEIV2 base address, HPM_QEIV2x(x=0...n)

Return values

angle value

◆ qeiv2_get_bit_status()

static bool qeiv2_get_bit_status	(	QEIV2_Type *	qeiv2_x,
		uint32_t	mask
	)

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

get qeiv2 bit status

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	mask	QEIV2_EVENT_WDOG_FLAG_MASK QEIV2_EVENT_HOME_FLAG_MASK QEIV2_EVENT_POSITION_COMPARE_FLAG_MASK QEIV2_EVENT_Z_PHASE_FLAG_MASK QEIV2_EVENT_Z_MISS_FLAG_MASK QEIV2_EVENT_WIDTH_TIME_FLAG_MASK QEIV2_EVENT_POSITION2_COMPARE_FLAG_MASK QEIV2_EVENT_DIR_CHG_FLAG_MASK QEIV2_EVENT_CYCLE0_FLAG_MASK QEIV2_EVENT_CYCLE1_FLAG_MASK QEIV2_EVENT_PULSE0_FLAG_MASK QEIV2_EVENT_PULSE1_FLAG_MASK QEIV2_EVENT_HOME2_FLAG_MASK QEIV2_EVENT_FAULT_FLAG_MASK

Return values

true or false

◆ qeiv2_get_count_on_read_event()

static uint32_t qeiv2_get_count_on_read_event	(	QEIV2_Type *	qeiv2_x,
		qeiv2_counter_type_t	type
	)

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

get read event count value

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	type	qeiv2_counter_type_t

Return values

counter value

◆ qeiv2_get_count_on_snap0_event()

static uint32_t qeiv2_get_count_on_snap0_event	(	QEIV2_Type *	qeiv2_x,
		qeiv2_counter_type_t	type
	)

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

read the value of each phase snapshot 0 counter

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	type	qeiv2_counter_type_t

Return values

counter value

◆ qeiv2_get_count_on_snap1_event()

static uint32_t qeiv2_get_count_on_snap1_event	(	QEIV2_Type *	qeiv2_x,
		qeiv2_counter_type_t	type
	)

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

read the value of each phase snapshot 1 counter

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	type	qeiv2_counter_type_t

Return values

counter value

◆ qeiv2_get_current_count()

static uint32_t qeiv2_get_current_count	(	QEIV2_Type *	qeiv2_x,
		qeiv2_counter_type_t	type
	)

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

get current counter value

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	type	qeiv2_counter_type_t

Return values

counter value

◆ qeiv2_get_current_phase_a_level()

static bool qeiv2_get_current_phase_a_level ( QEIV2_Type * qeiv2_x )

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

get current a phase level

Parameters

qeiv2_x QEI base address, HPM_QEIx(x=0...n)

Returns: a phase level

◆ qeiv2_get_current_phase_b_level()

static bool qeiv2_get_current_phase_b_level ( QEIV2_Type * qeiv2_x )

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

get current b phase level

Parameters

qeiv2_x QEI base address, HPM_QEIx(x=0...n)

Returns: b phase level

◆ qeiv2_get_current_phase_dir()

static bool qeiv2_get_current_phase_dir ( QEIV2_Type * qeiv2_x )

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

get current phase dir

Parameters

qeiv2_x QEI base address, HPM_QEIx(x=0...n)

Returns: dir

◆ qeiv2_get_current_phase_phcnt()

static uint32_t qeiv2_get_current_phase_phcnt ( QEIV2_Type * qeiv2_x )

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

get current phcnt value

Parameters

qeiv2_x QEI base address, HPM_QEIx(x=0...n)

Returns: phcnt value

◆ qeiv2_get_cycle0_pulse0cycle_snap0()

static uint32_t qeiv2_get_cycle0_pulse0cycle_snap0 ( QEIV2_Type * qeiv2_x )

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

get pulse0cycle snap0 value

Parameters

[in] qeiv2_x QEIV2 base address, HPM_QEIV2x(x=0...n)

Return values

pulse0cycle snap0 value

◆ qeiv2_get_cycle0_pulse0cycle_snap1()

static uint32_t qeiv2_get_cycle0_pulse0cycle_snap1 ( QEIV2_Type * qeiv2_x )

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

get pulse0cycle snap1 value

Parameters

[in] qeiv2_x QEIV2 base address, HPM_QEIV2x(x=0...n)

Return values

pulse0cycle snap1 value

◆ qeiv2_get_cycle0_pulse_snap0()

static uint32_t qeiv2_get_cycle0_pulse_snap0 ( QEIV2_Type * qeiv2_x )

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

get pulse0 snap0 value

Parameters

[in] qeiv2_x QEIV2 base address, HPM_QEIV2x(x=0...n)

Return values

pulse0 snap0 value

◆ qeiv2_get_cycle0_pulse_snap1()

static uint32_t qeiv2_get_cycle0_pulse_snap1 ( QEIV2_Type * qeiv2_x )

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

get pulse0 snap1 value

Parameters

[in] qeiv2_x QEIV2 base address, HPM_QEIV2x(x=0...n)

Return values

pulse0 snap1 value

◆ qeiv2_get_cycle1_pulse1cycle_snap0()

static uint32_t qeiv2_get_cycle1_pulse1cycle_snap0 ( QEIV2_Type * qeiv2_x )

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

get pulse1cycle snap0 value

Parameters

[in] qeiv2_x QEIV2 base address, HPM_QEIV2x(x=0...n)

Return values

pulse1cycle snap0 value

◆ qeiv2_get_cycle1_pulse1cycle_snap1()

static uint32_t qeiv2_get_cycle1_pulse1cycle_snap1 ( QEIV2_Type * qeiv2_x )

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

get pulse1cycle snap1 value

Parameters

[in] qeiv2_x QEIV2 base address, HPM_QEIV2x(x=0...n)

Return values

pulse01cycle snap1 value

◆ qeiv2_get_cycle1_pulse_snap0()

static uint32_t qeiv2_get_cycle1_pulse_snap0 ( QEIV2_Type * qeiv2_x )

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

get pulse1 snap0 value

Parameters

[in] qeiv2_x QEIV2 base address, HPM_QEIV2x(x=0...n)

Return values

pulse1 snap0 value

◆ qeiv2_get_cycle1_pulse_snap1()

static uint32_t qeiv2_get_cycle1_pulse_snap1 ( QEIV2_Type * qeiv2_x )

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

get pulse1 snap1 value

Parameters

[in] qeiv2_x QEIV2 base address, HPM_QEIV2x(x=0...n)

Return values

pulse1 snap1 value

◆ qeiv2_get_phase_cnt()

static uint32_t qeiv2_get_phase_cnt ( QEIV2_Type * qeiv2_x )

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

get phase counter value

Parameters

[in] qeiv2_x QEIV2 base address, HPM_QEIV2x(x=0...n)

Return values

phase counter value

◆ qeiv2_get_postion()

static uint32_t qeiv2_get_postion ( QEIV2_Type * qeiv2_x )

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

get position value

Parameters

[in] qeiv2_x QEIV2 base address, HPM_QEIV2x(x=0...n)

Return values

position value

◆ qeiv2_get_pulse0_cycle_snap0()

static uint32_t qeiv2_get_pulse0_cycle_snap0 ( QEIV2_Type * qeiv2_x )

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

get cycle0 snap0 value

Parameters

[in] qeiv2_x QEIV2 base address, HPM_QEIV2x(x=0...n)

Return values

cycle0 snap0 value

◆ qeiv2_get_pulse0_cycle_snap1()

static uint32_t qeiv2_get_pulse0_cycle_snap1 ( QEIV2_Type * qeiv2_x )

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

get cycle0 snap1 value

Parameters

[in] qeiv2_x QEIV2 base address, HPM_QEIV2x(x=0...n)

Return values

cycle0 snap1 value

◆ qeiv2_get_pulse1_cycle_snap0()

static uint32_t qeiv2_get_pulse1_cycle_snap0 ( QEIV2_Type * qeiv2_x )

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

get cycle1 snap0 value

Parameters

[in] qeiv2_x QEIV2 base address, HPM_QEIV2x(x=0...n)

Return values

cycle1 snap0 value

◆ qeiv2_get_pulse1_cycle_snap1()

static uint32_t qeiv2_get_pulse1_cycle_snap1 ( QEIV2_Type * qeiv2_x )

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

get cycle1 snap1 value

Parameters

[in] qeiv2_x QEIV2 base address, HPM_QEIV2x(x=0...n)

Return values

cycle1 snap1 value

◆ qeiv2_get_status()

static uint32_t qeiv2_get_status ( QEIV2_Type * qeiv2_x )

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

get qeiv2 status

Parameters

[in] qeiv2_x QEIV2 base address, HPM_QEIV2x(x=0...n)

Return values

qeiv2

status:

◆ qeiv2_get_uvw_position_defconfig()

void qeiv2_get_uvw_position_defconfig ( qeiv2_uvw_config_t * config )

#include <drivers/inc/hpm_qeiv2_drv.h>

get uvw position default config

Parameters

[out] config uvw position default config structure pointer

◆ qeiv2_get_z_phase()

static uint32_t qeiv2_get_z_phase ( QEIV2_Type * qeiv2_x )

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

get z phase counter value

Parameters

[in] qeiv2_x QEIV2 base address, HPM_QEIV2x(x=0...n)

Return values

z	phase counter value

◆ qeiv2_load_counter_to_read_registers()

static void qeiv2_load_counter_to_read_registers ( QEIV2_Type * qeiv2_x )

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

load phcnt, zcnt, spdcnt and tmrcnt into their read registers

Parameters

[in] qeiv2_x QEIV2 base address, HPM_QEIV2x(x=0...n)

◆ qeiv2_pause_counter()

static void qeiv2_pause_counter	(	QEIV2_Type *	qeiv2_x,
		uint32_t	counter_mask,
		bool	enable
	)

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

pause counter when pause assert

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	counter_mask	QEIV2_CR_PAUSEPOS_MASK QEIV2_CR_PAUSESPD_MASK QEIV2_CR_PAUSEPH_MASK QEIV2_CR_PAUSEZ_MASK
[in]	enable	enable or disable pause

◆ qeiv2_pause_pos_counter_on_fault()

static void qeiv2_pause_pos_counter_on_fault	(	QEIV2_Type *	qeiv2_x,
		bool	enable
	)

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

pause pos counter when fault assert

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	enable	enable or disable pause

◆ qeiv2_release_counter()

static void qeiv2_release_counter ( QEIV2_Type * qeiv2_x )

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

release counter.

Parameters

[in] qeiv2_x QEIV2 base address, HPM_QEIV2x(x=0...n)

◆ qeiv2_reset_counter()

static void qeiv2_reset_counter ( QEIV2_Type * qeiv2_x )

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

reset zcnt, spdcnt and tmrcnt to 0, reset phcnt to phidx.

Parameters

[in] qeiv2_x QEIV2 base address, HPM_QEIV2x(x=0...n)

◆ qeiv2_select_spd_tmr_register_content()

static void qeiv2_select_spd_tmr_register_content	(	QEIV2_Type *	qeiv2_x,
		qeiv2_spd_tmr_content_t	content
	)

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

select spd and tmr register content

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	content	qeiv2_spd_tmr_content_t

◆ qeiv2_set_adc_xy_delay()

static void qeiv2_set_adc_xy_delay	(	QEIV2_Type *	qeiv2_x,
		uint32_t	delay
	)

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

set adcx and adcy delay

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	delay	x/y delay, default 1.25us@200MHz, max 80ms

◆ qeiv2_set_cmp2_match_option()

static void qeiv2_set_cmp2_match_option	(	QEIV2_Type *	qeiv2_x,
		bool	ignore_zcmp,
		bool	ignore_phcmp,
		bool	ignore_spdposcmp,
		bool	ignore_rotate_dir,
		qeiv2_rotate_dir_t	rotate_dir,
		bool	ignore_pos_dir,
		qeiv2_position_dir_t	pos_dir
	)

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

set compare2 match options

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	ignore_zcmp	ignore zcmp
[in]	ignore_phcmp	ignore phcmp
[in]	ignore_spdposcmp	ignore spdposcmp. when set qeiv2_spd_tmr_as_spd_tm, this is spdcmp value. (ABZ encoder) when set qeiv2_spd_tmr_as_pos_angle, this is poscmp value. (sin or sincos encoder)
[in]	ignore_rotate_dir	ignore encoder rotation direction. (ABZ encoder)
[in]	rotate_dir	when don't ignore rotation direction, match rotation direction. qeiv2_rotate_dir_t. (ABZ encoder)
[in]	ignore_pos_dir	ignore position increase or decrease direction. (sin or sincos encoder)
[in]	pos_dir	when don't ignore position direction, match position direction. qeiv2_position_dir_t. (sin or sincos encoder)

◆ qeiv2_set_cmp_match_option()

static void qeiv2_set_cmp_match_option	(	QEIV2_Type *	qeiv2_x,
		bool	ignore_zcmp,
		bool	ignore_phcmp,
		bool	ignore_spdposcmp,
		bool	ignore_rotate_dir,
		qeiv2_rotate_dir_t	rotate_dir,
		bool	ignore_pos_dir,
		qeiv2_position_dir_t	pos_dir
	)

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

set compare match options

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	ignore_zcmp	ignore zcmp
[in]	ignore_phcmp	ignore phcmp
[in]	ignore_spdposcmp	ignore spdposcmp when set qeiv2_spd_tmr_as_spd_tm, this is spdcmp value. (ABZ encoder) when set qeiv2_spd_tmr_as_pos_angle, this is poscmp value. (sin or sincos encoder)
[in]	ignore_rotate_dir	ignore encoder rotation direction. (ABZ encoder)
[in]	rotate_dir	when don't ignore rotation direction, match rotation direction. qeiv2_rotate_dir_t. (ABZ encoder)
[in]	ignore_pos_dir	ignore position increase or decrease direction. (sin or sincos encoder)
[in]	pos_dir	when don't ignore position direction, match position direction. qeiv2_position_dir_t. (sin or sincos encoder)

◆ qeiv2_set_cycle0_num()

static void qeiv2_set_cycle0_num	(	QEIV2_Type *	qeiv2_x,
		uint32_t	cycle_num
	)

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

set cycle0 value

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	cycle_num	for speed detection, will count the pulse number for configed cycle_num

◆ qeiv2_set_cycle1_num()

static void qeiv2_set_cycle1_num	(	QEIV2_Type *	qeiv2_x,
		uint32_t	cycle_num
	)

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

set cycle1 value

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	cycle_num	for speed detection, will count the pulse number for configed cycle_num

◆ qeiv2_set_phase_cnt()

static void qeiv2_set_phase_cnt	(	QEIV2_Type *	qeiv2_x,
		uint32_t	cnt
	)

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

set phase counter value

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	cnt	phase counter value

◆ qeiv2_set_phcnt_cmp2_value()

static void qeiv2_set_phcnt_cmp2_value	(	QEIV2_Type *	qeiv2_x,
		uint32_t	cmp
	)

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

set phcnt compare2 value

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	cmp	phcnt compare2 value

◆ qeiv2_set_phcnt_cmp_value()

static void qeiv2_set_phcnt_cmp_value	(	QEIV2_Type *	qeiv2_x,
		uint32_t	cmp
	)

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

set phcnt compare value

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	cmp	phcnt compare value

◆ qeiv2_set_position()

static void qeiv2_set_position	(	QEIV2_Type *	qeiv2_x,
		uint32_t	pos
	)

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

set position value

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	pos	position

◆ qeiv2_set_position_threshold()

static void qeiv2_set_position_threshold	(	QEIV2_Type *	qeiv2_x,
		uint32_t	threshold
	)

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

set position threshold

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	threshold	Position change threshold. When two position changes exceed this value, it will be considered as an invalid position and no valid signal will be output.

◆ qeiv2_set_pulse0_num()

static void qeiv2_set_pulse0_num	(	QEIV2_Type *	qeiv2_x,
		uint32_t	pulse_num
	)

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

set pulse0 value

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	pulse_num	for speed detection, will count the cycle number for configed pulse_num

◆ qeiv2_set_pulse1_num()

static void qeiv2_set_pulse1_num	(	QEIV2_Type *	qeiv2_x,
		uint32_t	pulse_num
	)

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

set pulse1 value

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	pulse_num	for speed detection, will count the cycle number for configed pulse_num

◆ qeiv2_set_spd_pos_cmp2_value()

static void qeiv2_set_spd_pos_cmp2_value	(	QEIV2_Type *	qeiv2_x,
		uint32_t	cmp
	)

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

set spdcnt or position compare2 value. It's selected by CR register rd_sel bit.

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	cmp	spdcnt or position compare2 value

◆ qeiv2_set_spd_pos_cmp_value()

static void qeiv2_set_spd_pos_cmp_value	(	QEIV2_Type *	qeiv2_x,
		uint32_t	cmp
	)

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

set spdcnt or position compare value. It's selected by CR register rd_sel bit.

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	cmp	spdcnt or position compare value when set qeiv2_spd_tmr_as_spd_tm, this is spdcmp value. (ABZ encoder) when set qeiv2_spd_tmr_as_pos_angle, this is poscmp value. (sin or sincos encoder)

◆ qeiv2_set_uvw_position()

static void qeiv2_set_uvw_position	(	QEIV2_Type *	qeiv2_x,
		qeiv2_uvw_pos_idx_t	idx,
		uint32_t	pos
	)

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

set uvw position

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	idx	uvw position config index qeiv2_uvw_pos_idx_t
[in]	pos	angle corresponding to UVW signal position

◆ qeiv2_set_uvw_position_opt()

static void qeiv2_set_uvw_position_opt	(	QEIV2_Type *	qeiv2_x,
		qeiv2_uvw_pos_opt_t	opt
	)

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

set uvw position option

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	opt	qeiv2_uvw_pos_opt_t

◆ qeiv2_set_uvw_position_sel()

static void qeiv2_set_uvw_position_sel	(	QEIV2_Type *	qeiv2_x,
		qeiv2_uvw_pos_idx_t	idx,
		uint8_t	u_pos_sel,
		uint8_t	v_pos_sel,
		uint8_t	w_pos_sel,
		bool	enable
	)

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

set config uvw position

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	idx	uvw position config index qeiv2_uvw_pos_idx_t
[in]	u_pos_sel	U position selection based by uvw position option QEIV2_UVW_POS_OPT_CUR_SEL_LOW QEIV2_UVW_POS_OPT_CUR_SEL_HIGH QEIV2_UVW_POS_OPT_CUR_SEL_EDGE QEIV2_UVW_POS_OPT_NEX_SEL_LOW QEIV2_UVW_POS_OPT_NEX_SEL_HIGH
[in]	v_pos_sel	V position selection based by uvw position option QEIV2_UVW_POS_OPT_CUR_SEL_LOW QEIV2_UVW_POS_OPT_CUR_SEL_HIGH QEIV2_UVW_POS_OPT_CUR_SEL_EDGE QEIV2_UVW_POS_OPT_NEX_SEL_LOW QEIV2_UVW_POS_OPT_NEX_SEL_HIGH
[in]	w_pos_sel	W position selection based by uvw position option QEIV2_UVW_POS_OPT_CUR_SEL_LOW QEIV2_UVW_POS_OPT_CUR_SEL_HIGH QEIV2_UVW_POS_OPT_CUR_SEL_EDGE QEIV2_UVW_POS_OPT_NEX_SEL_LOW QEIV2_UVW_POS_OPT_NEX_SEL_HIGH
[in]	enable	enable this uvw config

◆ qeiv2_set_work_mode()

static void qeiv2_set_work_mode	(	QEIV2_Type *	qeiv2_x,
		qeiv2_work_mode_t	mode
	)

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

set qeiv2 work mode

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	mode	qeiv2_work_mode_t

◆ qeiv2_set_z_cmp2_value()

static void qeiv2_set_z_cmp2_value	(	QEIV2_Type *	qeiv2_x,
		uint32_t	cmp
	)

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

set zcnt compare2 value

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	cmp	zcnt compare2 value

◆ qeiv2_set_z_cmp_value()

static void qeiv2_set_z_cmp_value	(	QEIV2_Type *	qeiv2_x,
		uint32_t	cmp
	)

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

set zcnt compare value

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	cmp	zcnt compare value

◆ qeiv2_set_z_phase()

static void qeiv2_set_z_phase	(	QEIV2_Type *	qeiv2_x,
		uint32_t	cnt
	)

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

set z phase counter value

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	cnt	z phase counter value

◆ qeiv2_update_phase_cnt()

static void qeiv2_update_phase_cnt	(	QEIV2_Type *	qeiv2_x,
		bool	inc,
		bool	dec,
		uint32_t	value
	)

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

update phase counter value

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	inc	set to add value to phase_cnt
[in]	dec	set to minus value to phase_cnt (set inc and dec same time willl act inc)
[in]	value	value to be added or minus from phase_cnt. only valid when inc or dec is set in one 32bit write operation.

◆ qeiv2_update_position()

static void qeiv2_update_position	(	QEIV2_Type *	qeiv2_x,
		bool	inc,
		bool	dec,
		uint32_t	value
	)

inlinestatic

#include <drivers/inc/hpm_qeiv2_drv.h>

update position value

Parameters

[in]	qeiv2_x	QEIV2 base address, HPM_QEIV2x(x=0...n)
[in]	inc	set to add value to position
[in]	dec	set to minus cnt value to position (set inc and dec same time willl act inc)
[in]	value	value to be added or minus from position. only valid when inc or dec is set in one 32bit write operation.

Data Structures

Macros

Typedefs

Enumerations

Functions

Detailed Description

Macro Definition Documentation

◆ QEIV2_EVENT_CYCLE0_FLAG_MASK

◆ QEIV2_EVENT_CYCLE1_FLAG_MASK

◆ QEIV2_EVENT_DIR_CHG_FLAG_MASK

◆ QEIV2_EVENT_FAULT_FLAG_MASK

◆ QEIV2_EVENT_HOME2_FLAG_MASK

◆ QEIV2_EVENT_HOME_FLAG_MASK

◆ QEIV2_EVENT_POSITION2_COMPARE_FLAG_MASK

◆ QEIV2_EVENT_POSITION_COMPARE_FLAG_MASK

◆ QEIV2_EVENT_PULSE0_FLAG_MASK

◆ QEIV2_EVENT_PULSE1_FLAG_MASK

◆ QEIV2_EVENT_WDOG_FLAG_MASK

◆ QEIV2_EVENT_WIDTH_TIME_FLAG_MASK

◆ QEIV2_EVENT_Z_MISS_FLAG_MASK

◆ QEIV2_EVENT_Z_PHASE_FLAG_MASK

◆ QEIV2_UVW_POS_OPT_CUR_SEL_EDGE

◆ QEIV2_UVW_POS_OPT_CUR_SEL_HIGH

◆ QEIV2_UVW_POS_OPT_CUR_SEL_LOW

◆ QEIV2_UVW_POS_OPT_NEX_SEL_HIGH

◆ QEIV2_UVW_POS_OPT_NEX_SEL_LOW

Typedef Documentation

◆ qeiv2_counter_type_t

◆ qeiv2_filter_mode_t

◆ qeiv2_filter_phase_t

◆ qeiv2_position_dir_t

◆ qeiv2_rotate_dir_t

◆ qeiv2_spd_tmr_content_t

◆ qeiv2_uvw_pos_idx_t

◆ qeiv2_uvw_pos_opt_t

◆ qeiv2_uvw_pos_sel_t

◆ qeiv2_work_mode_t

◆ qeiv2_z_count_work_mode_t

Enumeration Type Documentation

◆ qeiv2_counter_type

◆ qeiv2_filter_mode

◆ qeiv2_filter_phase

◆ qeiv2_position_dir

◆ qeiv2_rotate_dir

◆ qeiv2_spd_tmr_content

◆ qeiv2_uvw_pos_idx

◆ qeiv2_uvw_pos_opt

◆ qeiv2_uvw_pos_sel

◆ qeiv2_work_mode

◆ qeiv2_z_count_work_mode

Function Documentation

◆ qeiv2_check_spd_tmr_as_pos_angle()

◆ qeiv2_clear_counter_when_dir_chg()

◆ qeiv2_clear_status()

◆ qeiv2_config_abz_uvw_signal_edge()

◆ qeiv2_config_adcx()

◆ qeiv2_config_adcx_adcy_param()

◆ qeiv2_config_adcy()

◆ qeiv2_config_filter()

◆ qeiv2_config_phcnt_cmp2_match_condition()

◆ qeiv2_config_phcnt_cmp_match_condition()

◆ qeiv2_config_phmax()

◆ qeiv2_config_phmax_phparam()

◆ qeiv2_config_phparam()

◆ qeiv2_config_position_cmp2_match_condition()

◆ qeiv2_config_position_cmp_match_condition()

◆ qeiv2_config_position_timeout()

◆ qeiv2_config_uvw_position()

◆ qeiv2_config_wdog()

◆ qeiv2_config_z_phase_calibration()

◆ qeiv2_config_z_phase_counter_mode()

◆ qeiv2_disable_dma_request()

◆ qeiv2_disable_irq()

◆ qeiv2_disable_load_read_trigger_event()

◆ qeiv2_disable_snap()

◆ qeiv2_disable_trig_out_trigger_event()

◆ qeiv2_enable_dma_request()

◆ qeiv2_enable_irq()

◆ qeiv2_enable_load_read_trigger_event()

◆ qeiv2_enable_snap()