HPM SDK
HPMicro Software Development Kit
Sgtl5000

Data Structures

struct  sgtl_context_t
 

Macros

#define CHIP_ID   0x0000U
 Define the register address of sgtl5000. More...
 
#define CHIP_DIG_POWER   0x0002U
 
#define CHIP_CLK_CTRL   0x0004U
 
#define CHIP_I2S_CTRL   0x0006U
 
#define CHIP_SSS_CTRL   0x000AU
 
#define CHIP_ADCDAC_CTRL   0x000EU
 
#define CHIP_DAC_VOL   0x0010U
 
#define CHIP_PAD_STRENGTH   0x0014U
 
#define CHIP_ANA_ADC_CTRL   0x0020U
 
#define CHIP_ANA_HP_CTRL   0x0022U
 
#define CHIP_ANA_CTRL   0x0024U
 
#define CHIP_LINREG_CTRL   0x0026U
 
#define CHIP_REF_CTRL   0x0028U
 
#define CHIP_MIC_CTRL   0x002AU
 
#define CHIP_LINE_OUT_CTRL   0x002CU
 
#define CHIP_LINE_OUT_VOL   0x002EU
 
#define CHIP_ANA_POWER   0x0030U
 
#define CHIP_PLL_CTRL   0x0032U
 
#define CHIP_CLK_TOP_CTRL   0x0034U
 
#define CHIP_ANA_STATUS   0x0036U
 
#define CHIP_ANA_TEST2   0x003AU
 
#define CHIP_SHORT_CTRL   0x003CU
 
#define SGTL5000_DAP_CONTROL   0x0100U
 
#define SGTL5000_DAP_PEQ   0x0102U
 
#define SGTL5000_DAP_BASS_ENHANCE   0x0104U
 
#define SGTL5000_DAP_BASS_ENHANCE_CTRL   0x0106U
 
#define SGTL5000_DAP_AUDIO_EQ   0x0108U
 
#define SGTL5000_DAP_SGTL_SURROUND   0x010AU
 
#define SGTL5000_DAP_FILTER_COEF_ACCESS   0x010CU
 
#define SGTL5000_DAP_COEF_WR_B0_MSB   0x010EU
 
#define SGTL5000_DAP_COEF_WR_B0_LSB   0x0110U
 
#define SGTL5000_DAP_AUDIO_EQ_BASS_BAND0   0x0116U
 
#define SGTL5000_DAP_AUDIO_EQ_BAND1   0x0118U
 
#define SGTL5000_DAP_AUDIO_EQ_BAND2   0x011AU
 
#define SGTL5000_DAP_AUDIO_EQ_BAND3   0x011CU
 
#define SGTL5000_DAP_AUDIO_EQ_TREBLE_BAND4   0x011EU
 
#define SGTL5000_DAP_MAIN_CHAN   0x0120U
 
#define SGTL5000_DAP_MIX_CHAN   0x0122U
 
#define SGTL5000_DAP_AVC_CTRL   0x0124U
 
#define SGTL5000_DAP_AVC_THRESHOLD   0x0126U
 
#define SGTL5000_DAP_AVC_ATTACK   0x0128U
 
#define SGTL5000_DAP_AVC_DECAY   0x012AU
 
#define SGTL5000_DAP_COEF_WR_B1_MSB   0x012CU
 
#define SGTL5000_DAP_COEF_WR_B1_LSB   0x012EU
 
#define SGTL5000_DAP_COEF_WR_B2_MSB   0x0130U
 
#define SGTL5000_DAP_COEF_WR_B2_LSB   0x0132U
 
#define SGTL5000_DAP_COEF_WR_A1_MSB   0x0134U
 
#define SGTL5000_DAP_COEF_WR_A1_LSB   0x0136U
 
#define SGTL5000_DAP_COEF_WR_A2_MSB   0x0138U
 
#define SGTL5000_DAP_COEF_WR_A2_LSB   0x013AU
 
#define SGTL5000_ADC_ENABLE_CLR_MASK   0xFFBFU
 
#define SGTL5000_ADC_ENABLE_GET_MASK   0x0040U
 
#define SGTL5000_ADC_ENABLE_SHIFT   0x6U
 
#define SGTL5000_DAC_ENABLE_CLR_MASK   0xFFDFU
 
#define SGTL5000_DAC_ENABLE_GET_MASK   0x0020U
 
#define SGTL5000_DAC_ENABLE_SHIFT   0x5U
 
#define SGTL5000_DAP_ENABLE_CLR_MASK   0xFFEFU
 
#define SGTL5000_DAP_ENABLE_GET_MASK   0x0010U
 
#define SGTL5000_DAP_ENABLE_SHIFT   0x4U
 
#define SGTL5000_I2S_OUT_ENABLE_CLR_MASK   0xFFFDU
 
#define SGTL5000_I2S_OUT_ENABLE_GET_MASK   0x0002U
 
#define SGTL5000_I2S_OUT_ENABLE_SHIFT   0x1U
 
#define SGTL5000_I2S_IN_ENABLE_CLR_MASK   0xFFFEU
 
#define SGTL5000_I2S_IN_ENABLE_GET_MASK   0x0001U
 
#define SGTL5000_I2S_IN_ENABLE_SHIFT   0x0U
 
#define SGTL5000_RATE_MODE_CLR_MASK   0xFFCFU
 
#define SGTL5000_RATE_MODE_GET_MASK   0x0030U
 
#define SGTL5000_RATE_MODE_SHIFT   0x4U
 
#define SGTL5000_RATE_MODE_DIV_1   0x0000U
 
#define SGTL5000_RATE_MODE_DIV_2   0x0010U
 
#define SGTL5000_RATE_MODE_DIV_4   0x0020U
 
#define SGTL5000_RATE_MODE_DIV_6   0x0030U
 
#define SGTL5000_SYS_FS_CLR_MASK   0xFFF3U
 
#define SGTL5000_SYS_FS_GET_MASK   0x000CU
 
#define SGTL5000_SYS_FS_SHIFT   0x2U
 
#define SGTL5000_SYS_FS_32k   0x0000U
 
#define SGTL5000_SYS_FS_44_1k   0x0004U
 
#define SGTL5000_SYS_FS_48k   0x0008U
 
#define SGTL5000_SYS_FS_96k   0x000CU
 
#define SGTL5000_MCLK_FREQ_CLR_MASK   0xFFFCU
 
#define SGTL5000_MCLK_FREQ_GET_MASK   0x0003U
 
#define SGTL5000_MCLK_FREQ_SHIFT   0x0U
 
#define SGTL5000_MCLK_FREQ_256FS   0x0000U
 
#define SGTL5000_MCLK_FREQ_384FS   0x0001U
 
#define SGTL5000_MCLK_FREQ_512FS   0x0002U
 
#define SGTL5000_MCLK_FREQ_PLL   0x0003U
 
#define SGTL5000_I2S_SLCKFREQ_CLR_MASK   0xFEFFU
 
#define SGTL5000_I2S_SCLKFREQ_GET_MASK   0x0100U
 
#define SGTL5000_I2S_SCLKFREQ_SHIFT   0x8U
 
#define SGTL5000_I2S_SCLKFREQ_64FS   0x0000U
 
#define SGTL5000_I2S_SCLKFREQ_32FS   0x0100U /* Not for RJ mode */
 
#define SGTL5000_I2S_MS_CLR_MASK   0xFF7FU
 
#define SGTL5000_I2S_MS_GET_MASK   0x0080U
 
#define SGTL5000_I2S_MS_SHIFT   0x7U
 
#define SGTL5000_I2S_MASTER   0x0080U
 
#define SGTL5000_I2S_SLAVE   0x0000U
 
#define SGTL5000_I2S_SCLK_INV_CLR_MASK   0xFFBFU
 
#define SGTL5000_I2S_SCLK_INV_GET_MASK   0x0040U
 
#define SGTL5000_I2S_SCLK_INV_SHIFT   0x6U
 
#define SGTL5000_I2S_VAILD_FALLING_EDGE   0x0040U
 
#define SGTL5000_I2S_VAILD_RISING_EDGE   0x0000U
 
#define SGTL5000_I2S_DLEN_CLR_MASK   0xFFCFU
 
#define SGTL5000_I2S_DLEN_GET_MASK   0x0030U
 
#define SGTL5000_I2S_DLEN_SHIFT   0x4U
 
#define SGTL5000_I2S_DLEN_32   0x0000U
 
#define SGTL5000_I2S_DLEN_24   0x0010U
 
#define SGTL5000_I2S_DLEN_20   0x0020U
 
#define SGTL5000_I2S_DLEN_16   0x0030U
 
#define SGTL5000_I2S_MODE_CLR_MASK   0xFFF3U
 
#define SGTL5000_I2S_MODE_GET_MASK   0x000CU
 
#define SGTL5000_I2S_MODE_SHIFT   0x2U
 
#define SGTL5000_I2S_MODE_I2S_LJ   0x0000U
 
#define SGTL5000_I2S_MODE_RJ   0x0004U
 
#define SGTL5000_I2S_MODE_PCM   0x0008U
 
#define SGTL5000_I2S_LRALIGN_CLR_MASK   0xFFFDU
 
#define SGTL5000_I2S_LRALIGN_GET_MASK   0x0002U
 
#define SGTL5000_I2S_LRALIGN_SHIFT   0x1U
 
#define SGTL5000_I2S_ONE_BIT_DELAY   0x0000U
 
#define SGTL5000_I2S_NO_DELAY   0x0002U
 
#define SGTL5000_I2S_LRPOL_CLR_MASK   0xFFFEU
 
#define SGTL5000_I2S_LRPOL_GET_MASK   0x0001U
 
#define SGTL5000_I2S_LRPOL_SHIFT   0x0U
 
#define SGTL5000_I2S_LEFT_FIRST   0x0000U
 
#define SGTL5000_I2S_RIGHT_FIRST   0x0001U
 
#define SGTL5000_DAP_MIX_LRSWAP_CLR_MASK   0xBFFFU
 
#define SGTL5000_DAP_MIX_LRSWAP_GET_MASK   0x4000U
 
#define SGTL5000_DAP_MIX_LRSWAP_SHIFT   0xEU
 
#define SGTL5000_DAP_LRSWAP_CLR_MASK   0xDFFFU
 
#define SGTL5000_DAP_LRSWAP_GET_MASK   0x2000U
 
#define SGTL5000_DAP_LRSWAP_SHIFT   0xDU
 
#define SGTL5000_DAC_LRSWAP_CLR_MASK   0xEFFFU
 
#define SGTL5000_DAC_LRSWAP_GET_MASK   0x1000U
 
#define SGTL5000_DAC_LRSWAP_SHIFT   0xCU
 
#define SGTL5000_I2S_LRSWAP_CLR_MASK   0xFBFFU
 
#define SGTL5000_I2S_LRSWAP_GET_MASK   0x0400U
 
#define SGTL5000_I2S_LRSWAP_SHIFT   0xAU
 
#define SGTL5000_DAP_MIX_SEL_CLR_MASK   0xFCFFU
 
#define SGTL5000_DAP_MIX_SEL_GET_MASK   0x0300U
 
#define SGTL5000_DAP_MIX_SEL_SHIFT   0x8U
 
#define SGTL5000_DAP_MIX_SEL_ADC   0x0000U
 
#define SGTL5000_DAP_MIX_SEL_I2S_IN   0x0100U
 
#define SGTL5000_DAP_SEL_CLR_MASK   0xFF3FU
 
#define SGTL5000_DAP_SEL_GET_MASK   0x00C0U
 
#define SGTL5000_DAP_SEL_SHIFT   0x6U
 
#define SGTL5000_DAP_SEL_ADC   0x0000U
 
#define SGTL5000_DAP_SEL_I2S_IN   0x0040U
 
#define SGTL5000_DAC_SEL_CLR_MASK   0xFFCFU
 
#define SGTL5000_DAC_SEL_GET_MASK   0x0030U
 
#define SGTL5000_DAC_SEL_SHIFT   0x4U
 
#define SGTL5000_DAC_SEL_ADC   0x0000U
 
#define SGTL5000_DAC_SEL_I2S_IN   0x0010U
 
#define SGTL5000_DAC_SEL_DAP   0x0030U
 
#define SGTL5000_I2S_OUT_SEL_CLR_MASK   0xFFFCU
 
#define SGTL5000_I2S_OUT_SEL_GET_MASK   0x0003U
 
#define SGTL5000_I2S_OUT_SEL_SHIFT   0x0U
 
#define SGTL5000_I2S_OUT_SEL_ADC   0x0000U
 
#define SGTL5000_I2S_OUT_SEL_I2S_IN   0x0001U
 
#define SGTL5000_I2S_OUT_SEL_DAP   0x0003U
 
#define SGTL5000_VOL_BUSY_DAC_RIGHT   0x2000U
 
#define SGTL5000_VOL_BUSY_DAC_LEFT   0x1000U
 
#define SGTL5000_DAC_VOL_RAMP_EN_CLR_MASK   0xFDFFU
 
#define SGTL5000_DAC_VOL_RAMP_EN_GET_MASK   0x0200U
 
#define SGTL5000_DAC_VOL_RAMP_EN_SHIFT   0x9U
 
#define SGTL5000_DAC_VOL_RAMP_EXPO_CLR_MASK   0xFEFFU
 
#define SGTL5000_DAC_VOL_RAMP_EXPO_GET_MASK   0x0100U
 
#define SGTL5000_DAC_VOL_RAMP_EXPO_SHIFT   0x8U
 
#define SGTL5000_DAC_MUTE_RIGHT_CLR_MASK   0xFFF7U
 
#define SGTL5000_DAC_MUTE_RIGHT_GET_MASK   0x0008U
 
#define SGTL5000_DAC_MUTE_RIGHT_SHIFT   0x3U
 
#define SGTL5000_DAC_MUTE_LEFT_CLR_MASK   0xFFFBU
 
#define SGTL5000_DAC_MUTE_LEFT_GET_MASK   0x0004U
 
#define SGTL5000_DAC_MUTE_LEFT_SHIFT   0x2U
 
#define SGTL5000_ADC_HPF_FREEZE_CLR_MASK   0xFFFDU
 
#define SGTL5000_ADC_HPF_FREEZE_GET_MASK   0x0002U
 
#define SGTL5000_ADC_HPF_FREEZE_SHIFT   0x1U
 
#define SGTL5000_ADC_HPF_BYPASS_CLR_MASK   0xFFFEU
 
#define SGTL5000_ADC_HPF_BYPASS_GET_MASK   0x0001U
 
#define SGTL5000_ADC_HPF_BYPASS_SHIFT   0x0U
 
#define SGTL5000_DAC_VOL_RIGHT_CLR_MASK   0x00FFU
 
#define SGTL5000_DAC_VOL_RIGHT_GET_MASK   0xFF00U
 
#define SGTL5000_DAC_VOL_RIGHT_SHIFT   0x8U
 
#define SGTL5000_DAC_VOL_LEFT_CLR_MASK   0xFF00U
 
#define SGTL5000_DAC_VOL_LEFT_GET_MASK   0x00FFU
 
#define SGTL5000_DAC_VOL_LEFT_SHIFT   0x0U
 
#define SGTL5000_PAD_I2S_LRCLK_CLR_MASK   0xFCFFU
 
#define SGTL5000_PAD_I2S_LRCLK_GET_MASK   0x0300U
 
#define SGTL5000_PAD_I2S_LRCLK_SHIFT   0x8U
 
#define SGTL5000_PAD_I2S_SCLK_CLR_MASK   0xFF3FU
 
#define SGTL5000_PAD_I2S_SCLK_GET_MASK   0x00C0U
 
#define SGTL5000_PAD_I2S_SCLK_SHIFT   0x6U
 
#define SGTL5000_PAD_I2S_DOUT_CLR_MASK   0xFFCFU
 
#define SGTL5000_PAD_I2S_DOUT_GET_MASK   0x0030U
 
#define SGTL5000_PAD_I2S_DOUT_SHIFT   0x4U
 
#define SGTL5000_PAD_I2C_SDA_CLR_MASK   0xFFF3U
 
#define SGTL5000_PAD_I2C_SDA_GET_MASK   0x000CU
 
#define SGTL5000_PAD_I2C_SDA_SHIFT   0x2U
 
#define SGTL5000_PAD_I2C_SCL_CLR_MASK   0xFFFCU
 
#define SGTL5000_PAD_I2C_SCL_GET_MASK   0x0003U
 
#define SGTL5000_PAD_I2C_SCL_SHIFT   0x0U
 
#define SGTL5000_ADC_VOL_M6DB_CLR_MASK   0xFEFFU
 
#define SGTL5000_ADC_VOL_M6DB_GET_MASK   0x0100U
 
#define SGTL5000_ADC_VOL_M6DB_SHIFT   0x8U
 
#define SGTL5000_ADC_VOL_RIGHT_CLR_MASK   0xFF0FU
 
#define SGTL5000_ADC_VOL_RIGHT_GET_MASK   0x00F0U
 
#define SGTL5000_ADC_VOL_RIGHT_SHIFT   0x4U
 
#define SGTL5000_ADC_VOL_LEFT_CLR_MASK   0xFFF0U
 
#define SGTL5000_ADC_VOL_LEFT_GET_MASK   0x000FU
 
#define SGTL5000_ADC_VOL_LEFT_SHIFT   0x0U
 
#define SGTL5000_HP_VOL_RIGHT_CLR_MASK   0x80FFU
 
#define SGTL5000_HP_VOL_RIGHT_GET_MASK   0x7F00U
 
#define SGTL5000_HP_VOL_RIGHT_SHIFT   0x8U
 
#define SGTL5000_HP_VOL_LEFT_CLR_MASK   0xFF80U
 
#define SGTL5000_HP_VOL_LEFT_GET_MASK   0x007FU
 
#define SGTL5000_HP_VOL_LEFT_SHIFT   0x0U
 
#define SGTL5000_MUTE_LO_GET_MASK   0x0100U
 
#define SGTL5000_MUTE_LO_CLR_MASK   0xFEFFU
 
#define SGTL5000_MUTE_LO_SHIFT   0x8U
 
#define SGTL5000_SEL_HP_GET_MASK   0x0040U
 
#define SGTL5000_SEL_HP_CLR_MASK   0xFFBFU
 
#define SGTL5000_SEL_HP_SHIFT   0x6U
 
#define SGTL5000_SEL_HP_DAC   0x0000U
 
#define SGTL5000_SEL_HP_LINEIN   0x0040U
 
#define SGTL5000_EN_ZCD_HP_GET_MASK   0x0020U
 
#define SGTL5000_EN_ZCD_HP_CLR_MASK   0xFFDFU
 
#define SGTL5000_EN_ZCD_HP_SHIFT   0x5U
 
#define SGTL5000_MUTE_HP_GET_MASK   0x0010U
 
#define SGTL5000_MUTE_HP_CLR_MASK   0xFFEFU
 
#define SGTL5000_MUTE_HP_SHIFT   0x4U
 
#define SGTL5000_SEL_ADC_GET_MASK   0x0004U
 
#define SGTL5000_SEL_ADC_CLR_MASK   0xFFFBU
 
#define SGTL5000_SEL_ADC_SHIFT   0x2U
 
#define SGTL5000_SEL_ADC_MIC   0x0000U
 
#define SGTL5000_SEL_ADC_LINEIN   0x0004U
 
#define SGTL5000_EN_ZCD_ADC_GET_MASK   0x0002U
 
#define SGTL5000_EN_ZCD_ADC_CLR_MASK   0xFFFDU
 
#define SGTL5000_EN_ZCD_ADC_SHIFT   0x1U
 
#define SGTL5000_MUTE_ADC_GET_MASK   0x0001U
 
#define SGTL5000_MUTE_ADC_CLR_MASK   0xFFFEU
 
#define SGTL5000_MUTE_ADC_SHIFT   0x0U
 
#define SGTL5000_VDDC_MAN_ASSN_CLR_MASK   0xFFBFU
 
#define SGTL5000_VDDC_MAN_ASSN_GET_MASK   0x0040U
 
#define SGTL5000_VDDC_MAN_ASSN_SHIFT   0x6U
 
#define SGTL5000_VDDC_MAN_ASSN_VDDA   0x0000U
 
#define SGTL5000_VDDC_MAN_ASSN_VDDIO   0x0040U
 
#define SGTL5000_VDDC_ASSN_OVRD   0x0020U
 
#define SGTL5000_LINREG_VDDD_CLR_MASK   0xFFF0U
 
#define SGTL5000_LINREG_VDDD_GET_MASK   0x000FU
 
#define SGTL5000_LINREG_VDDD_SHIFT   0x0U
 
#define SGTL5000_ANA_GND_MASK   0x01f0U
 
#define SGTL5000_ANA_GND_SHIFT   0x4U
 
#define SGTL5000_ANA_GND_WIDTH   0x5U
 
#define SGTL5000_ANA_GND_BASE   0x320U /* mv */
 
#define SGTL5000_ANA_GND_STP   0x19U /*mv */
 
#define SGTL5000_BIAS_CTRL_MASK   0x000eU
 
#define SGTL5000_BIAS_CTRL_SHIFT   0x1U
 
#define SGTL5000_BIAS_CTRL_WIDTH   0x3U
 
#define SGTL5000_SMALL_POP   0x0001U
 
#define SGTL5000_BIAS_R__CLR_MASK   0xFCFFU
 
#define SGTL5000_BIAS_R_GET_MASK   0x0300U
 
#define SGTL5000_BIAS_R_SHIFT   0x8U
 
#define SGTL5000_BIAS_R_off   0x0000U
 
#define SGTL5000_BIAS_R_2K   0x0100U
 
#define SGTL5000_BIAS_R_4k   0x0200U
 
#define SGTL5000_BIAS_R_8k   0x0300U
 
#define SGTL5000_BIAS_VOLT_CLR_MASK   0xFF8FU
 
#define SGTL5000_BIAS_VOLT_GET_MASK   0x0070U
 
#define SGTL5000_BIAS_VOLT_SHIFT   0x4U
 
#define SGTL5000_MIC_GAIN_CLR_MASK   0xFFFCU
 
#define SGTL5000_MIC_GAIN_GET_MASK   0x0003U
 
#define SGTL5000_MIC_GAIN_SHIFT   0x0U
 
#define SGTL5000_LINE_OUT_CURRENT_CLR_MASK   0xF0FFU
 
#define SGTL5000_LINE_OUT_CURRENT_GET_MASK   0x0F00U
 
#define SGTL5000_LINE_OUT_CURRENT_SHIFT   0x8U
 
#define SGTL5000_LINE_OUT_CURRENT_180u   0x0000U
 
#define SGTL5000_LINE_OUT_CURRENT_270u   0x0100U
 
#define SGTL5000_LINE_OUT_CURRENT_360u   0x0300U
 
#define SGTL5000_LINE_OUT_CURRENT_450u   0x0700U
 
#define SGTL5000_LINE_OUT_CURRENT_540u   0x0F00U
 
#define SGTL5000_LINE_OUT_GND_CLR_MASK   0xFFC0U
 
#define SGTL5000_LINE_OUT_GND_GET_MASK   0x003FU
 
#define SGTL5000_LINE_OUT_GND_SHIFT   0x0U
 
#define SGTL5000_LINE_OUT_GND_BASE   0x320U /* mv */
 
#define SGTL5000_LINE_OUT_GND_STP   0x19U
 
#define SGTL5000_LINE_OUT_GND_MAX   0x23U
 
#define SGTL5000_LINE_OUT_VOL_RIGHT_CLR_MASK   0xE0FFU
 
#define SGTL5000_LINE_OUT_VOL_RIGHT_GET_MASK   0x1F00U
 
#define SGTL5000_LINE_OUT_VOL_RIGHT_SHIFT   0x8U
 
#define SGTL5000_LINE_OUT_VOL_LEFT_CLR_MASK   0xFFE0U
 
#define SGTL5000_LINE_OUT_VOL_LEFT_GET_MASK   0x001FU
 
#define SGTL5000_LINE_OUT_VOL_LEFT_SHIFT   0x0U
 
#define SGTL5000_RIGHT_DAC_POWERUP_GET_MASK   0x4000U
 
#define SGTL5000_RIGHT_DAC_POWERUP_CLR_MASK   0xBFFFU
 
#define SGTL5000_RIGHT_DAC_POWERUP_SHIFT   0xEU
 
#define SGTL5000_LINREG_SIMPLE_POWERUP_GET_MASK   0x2000U
 
#define SGTL5000_LINREG_SIMPLE_POWERUP_CLR_MASK   0xDFFFU
 
#define SGTL5000_LINREG_SIMPLE_POWERUP_SHIFT   0xDU
 
#define SGTL5000_STARTUP_POWERUP_GET_MASK   0x1000U
 
#define SGTL5000_STARTUP_POWERUP_CLR_MASK   0xEFFFU
 
#define SGTL5000_STARTUP_POWERUP_SHIFT   0xCU
 
#define SGTL5000_VDDC_CHRGPMP_POWERUP_GET_MASK   0x0800U
 
#define SGTL5000_VDDC_CHRGPMP_POWERUP_CLR_MASK   0xF7FFU
 
#define SGTL5000_VDDC_CHRGPMP_POWERUP_SHIFT   0xBU
 
#define SGTL5000_PLL_POWERUP_GET_MASK   0x0400U
 
#define SGTL5000_PLL_POWERUP_CLR_MASK   0xFBFFU
 
#define SGTL5000_PLL_POWERUP_SHIFT   0xAU
 
#define SGTL5000_LINREG_D_POWERUP_GET_MASK   0x0200U
 
#define SGTL5000_LINREG_D_POWERUP_CLR_MASK   0xFDFFU
 
#define SGTL5000_LINREG_D_POWERUP_SHIFT   0x9U
 
#define SGTL5000_VCOAMP_POWERUP_GET_MASK   0x0100U
 
#define SGTL5000_VCOAMP_POWERUP_CLR_MASK   0xFEFFU
 
#define SGTL5000_VCOAMP_POWERUP_SHIFT   0x8U
 
#define SGTL5000_VAG_POWERUP_GET_MASK   0x0080U
 
#define SGTL5000_VAG_POWERUP_CLR_MASK   0xFF7FU
 
#define SGTL5000_VAG_POWERUP_SHIFT   0x7U
 
#define SGTL5000_RIGHT_ADC_POWERUP_GET_MASK   0x0040U
 
#define SGTL5000_RIGHT_ADC_POWERUP_CLR_MASK   0xFFBFU
 
#define SGTL5000_RIGHT_ADC_POWERUP_SHIFT   0x6U
 
#define SGTL5000_REFTOP_POWERUP_GET_MASK   0x0020U
 
#define SGTL5000_REFTOP_POWERUP_CLR_MASK   0xFFDFU
 
#define SGTL5000_REFTOP_POWERUP_SHIFT   0x5U
 
#define SGTL5000_HEADPHONE_POWERUP_GET_MASK   0x0010U
 
#define SGTL5000_HEADPHONE_POWERUP_CLR_MASK   0xFFEFU
 
#define SGTL5000_HEADPHONE_POWERUP_SHIFT   0x4U
 
#define SGTL5000_DAC_POWERUP_GET_MASK   0x0008U
 
#define SGTL5000_DAC_POWERUP_CLR_MASK   0xFFF7U
 
#define SGTL5000_DAC_POWERUP_SHIFT   0x3U
 
#define SGTL5000_CAPLESS_HEADPHONE_POWERUP_GET_MASK   0x0004U
 
#define SGTL5000_CAPLESS_HEADPHONE_POWERUP_CLR_MASK   0xFFFBU
 
#define SGTL5000_CAPLESS_HEADPHONE_POWERUP_SHIFT   0x2U
 
#define SGTL5000_ADC_POWERUP_GET_MASK   0x0002U
 
#define SGTL5000_ADC_POWERUP_CLR_MASK   0xFFFDU
 
#define SGTL5000_ADC_POWERUP_SHIFT   0x1U
 
#define SGTL5000_LINEOUT_POWERUP_GET_MASK   0x0001U
 
#define SGTL5000_LINEOUT_POWERUP_CLR_MASK   0xFFFEU
 
#define SGTL5000_LINEOUT_POWERUP_SHIFT   0x0U
 
#define SGTL5000_PLL_INT_DIV_CLR_MASK   0x07FFU
 
#define SGTL5000_PLL_INT_DIV_GET_MASK   0xF800U
 
#define SGTL5000_PLL_INT_DIV_SHIFT   0xBU
 
#define SGTL5000_PLL_FRAC_DIV_CLR_MASK   0xF8FFU
 
#define SGTL5000_PLL_FRAC_DIV_GET_MASK   0x0700U
 
#define SGTL5000_PLL_FRAC_DIV_SHIFT   0x0U
 
#define SGTL5000_ENABLE_INT_OSC_GET_MASK   0x0800U
 
#define SGTL5000_ENABLE_INT_OSC_CLR_MASK   0xF7FFU
 
#define SGTL5000_ENABLE_INT_OSC_SHIFT   0xBU
 
#define SGTL5000_INPUT_FREQ_DIV2_GET_MASK   0x0008U
 
#define SGTL5000_INPUT_FREQ_DIV2_CLR_MASK   0xFFF7U
 
#define SGTL5000_INPUT_FREQ_DIV2_SHIFT   0x3U
 
#define SGTL5000_HP_LRSHORT   0x0200U
 
#define SGTL5000_CAPLESS_SHORT   0x0100U
 
#define SGTL5000_PLL_LOCKED   0x0010U
 
#define SGTL5000_LVLADJR_CLR_MASK   0x8FFFU
 
#define SGTL5000_LVLADJR_GET_MASK   0x7000U
 
#define SGTL5000_LVLADJR_SHIFT   0xCU
 
#define SGTL5000_LVLADJL_CLR_MASK   0xF8FFU
 
#define SGTL5000_LVLADJL_GET_MASK   0x0700U
 
#define SGTL5000_LVLADJL_SHIFT   0x8U
 
#define SGTL5000_LVLADJC_CLR_MASK   0xFF8FU
 
#define SGTL5000_LVLADJC_GET_MASK   0x0070U
 
#define SGTL5000_LVLADJC_SHIFT   0x4U
 
#define SGTL5000_LR_SHORT_MOD_CLR_MASK   0xFFF3U
 
#define SGTL5000_LR_SHORT_MOD_GET_MASK   0x000CU
 
#define SGTL5000_LR_SHORT_MOD_SHIFT   0x2U
 
#define SGTL5000_CM_SHORT_MOD_CLR_MASK   0xFFFCU
 
#define SGTL5000_CM_SHORT_MOD_GET_MASK   0x0003U
 
#define SGTL5000_CM_SHORT_MOD_SHIFT   0x0U
 
#define SGTL5000_DAP_CONTROL_MIX_EN_GET_MASK   0x0010U
 
#define SGTL5000_DAP_CONTROL_MIX_EN_CLR_MASK   0xFFEFU
 
#define SGTL5000_DAP_CONTROL_MIX_EN_SHIFT   0x4U
 
#define SGTL5000_DAP_CONTROL_DAP_EN_GET_MASK   0x0001U
 
#define SGTL5000_DAP_CONTROL_DAP_EN_CLR_MASK   0xFFFEU
 
#define SGTL5000_DAP_CONTROL_DAP_EN_SHIFT   0x0U
 
#define SGTL5000_DAP_PEQ_EN_GET_MASK   0x0007U
 
#define SGTL5000_DAP_PEQ_EN_CLR_MASK   0xFFF8U
 
#define SGTL5000_DAP_PEQ_EN_SHIFT   0x0U
 
#define SGTL5000_DAP_BASS_ENHANCE_MULT_GET_MASK   0xC000U
 
#define SGTL5000_DAP_BASS_ENHANCE_MULT_CLR_MASK   0x3FFFU
 
#define SGTL5000_DAP_BASS_ENHANCE_MULT_SHIFT   0xEU
 
#define SGTL5000_DAP_BASS_ENHANCE_CUTOFF_HPF_GET_MASK   0x0E00U
 
#define SGTL5000_DAP_BASS_ENHANCE_CUTOFF_HPF_CLR_MASK   0xF1FFU
 
#define SGTL5000_DAP_BASS_ENHANCE_CUTOFF_HPF_SHIFT   0x9U
 
#define SGTL5000_DAP_BASS_ENHANCE_BYPASS_HPF_GET_MASK   0x0100U
 
#define SGTL5000_DAP_BASS_ENHANCE_BYPASS_HPF_CLR_MASK   0xFEFFU
 
#define SGTL5000_DAP_BASS_ENHANCE_BYPASS_HPF_SHIFT   0x8U
 
#define SGTL5000_DAP_BASS_ENHANCE_CUTOFF_GET_MASK   0x0070U
 
#define SGTL5000_DAP_BASS_ENHANCE_CUTOFF_CLR_MASK   0xFF8FU
 
#define SGTL5000_DAP_BASS_ENHANCE_CUTOFF_SHIFT   0x4U
 
#define SGTL5000_DAP_BASS_ENHANCE_EN_GET_MASK   0x0001U
 
#define SGTL5000_DAP_BASS_ENHANCE_EN_CLR_MASK   0xFFFEU
 
#define SGTL5000_DAP_BASS_ENHANCE_EN_SHIFT   0x0U
 
#define SGTL5000_DAP_BASS_ENHANCE_CTRL_LR_LEVEL_GET_MASK   0x3F00U
 
#define SGTL5000_DAP_BASS_ENHANCE_CTRL_LR_LEVEL_CLR_MASK   0xC0FFU
 
#define SGTL5000_DAP_BASS_ENHANCE_CTRL_LR_LEVEL_SHIFT   0x8U
 
#define SGTL5000_DAP_BASS_ENHANCE_CTRL_BASS_LEVEL_GET_MASK   0x007FU
 
#define SGTL5000_DAP_BASS_ENHANCE_CTRL_BASS_LEVEL_CLR_MASK   0xFF80U
 
#define SGTL5000_DAP_BASS_ENHANCE_CTRL_BASS_LEVEL_SHIFT   0x0U
 
#define SGTL5000_DAP_AUDIO_EQ_EN_GET_MASK   0x0003U
 
#define SGTL5000_DAP_AUDIO_EQ_EN_CLR_MASK   0xFFFCU
 
#define SGTL5000_DAP_AUDIO_EQ_EN_SHIFT   0x0U
 
#define SGTL5000_DAP_SGTL_SURROUND_WIDTH_CONTROL_GET_MASK   0x0070U
 
#define SGTL5000_DAP_SGTL_SURROUND_WIDTH_CONTROL_CLR_MASK   0xFF8FU
 
#define SGTL5000_DAP_SGTL_SURROUND_WIDTH_CONTROL_SHIFT   0x4U
 
#define SGTL5000_DAP_SGTL_SURROUND_SEL_GET_MASK   0x0003U
 
#define SGTL5000_DAP_SGTL_SURROUND_SEL_CLR_MASK   0xFFFCU
 
#define SGTL5000_DAP_SGTL_SURROUND_SEL_SHIFT   0x0U
 
#define SGTL5000_DAP_FILTER_COEF_ACCESS_DEBUG_GET_MASK   0x1000U
 
#define SGTL5000_DAP_FILTER_COEF_ACCESS_DEBUG_CLR_MASK   0xEFFFU
 
#define SGTL5000_DAP_FILTER_COEF_ACCESS_DEBUG_SHIFT   0xCU
 
#define SGTL5000_DAP_FILTER_COEF_ACCESS_RD_GET_MASK   0x0200U
 
#define SGTL5000_DAP_FILTER_COEF_ACCESS_RD_CLR_MASK   0xFDFFU
 
#define SGTL5000_DAP_FILTER_COEF_ACCESS_RD_SHIFT   0x9U
 
#define SGTL5000_DAP_FILTER_COEF_ACCESS_WR_GET_MASK   0x0100U
 
#define SGTL5000_DAP_FILTER_COEF_ACCESS_WR_CLR_MASK   0xFEFFU
 
#define SGTL5000_DAP_FILTER_COEF_ACCESS_WR_SHIFT   0x8U
 
#define SGTL5000_DAP_FILTER_COEF_ACCESS_INDEX_GET_MASK   0x00FFU
 
#define SGTL5000_DAP_FILTER_COEF_ACCESS_INDEX_CLR_MASK   0xFF00U
 
#define SGTL5000_DAP_FILTER_COEF_ACCESS_INDEX_SHIFT   0x0U
 
#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_19_GET_MASK   0x8000U
 
#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_19_CLR_MASK   0x7FFFU
 
#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_19_SHIFT   0xFU
 
#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_18_GET_MASK   0x4000U
 
#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_18_CLR_MASK   0xBFFFU
 
#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_18_SHIFT   0xEU
 
#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_17_GET_MASK   0x2000U
 
#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_17_CLR_MASK   0xDFFFU
 
#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_17_SHIFT   0xDU
 
#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_16_GET_MASK   0x1000U
 
#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_16_CLR_MASK   0xEFFFU
 
#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_16_SHIFT   0xCU
 
#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_15_GET_MASK   0x0800U
 
#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_15_CLR_MASK   0xF7FFU
 
#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_15_SHIFT   0xBU
 
#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_14_GET_MASK   0x0400U
 
#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_14_CLR_MASK   0xFBFFU
 
#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_14_SHIFT   0xAU
 
#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_13_GET_MASK   0x0200U
 
#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_13_CLR_MASK   0xFDFFU
 
#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_13_SHIFT   0x9U
 
#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_12_GET_MASK   0x0100U
 
#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_12_CLR_MASK   0xFEFFU
 
#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_12_SHIFT   0x8U
 
#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_11_GET_MASK   0x0080U
 
#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_11_CLR_MASK   0xFF7FU
 
#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_11_SHIFT   0x7U
 
#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_10_GET_MASK   0x0040U
 
#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_10_CLR_MASK   0xFFBFU
 
#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_10_SHIFT   0x6U
 
#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_9_GET_MASK   0x0020U
 
#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_9_CLR_MASK   0xFFDFU
 
#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_9_SHIFT   0x5U
 
#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_8_GET_MASK   0x0010U
 
#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_8_CLR_MASK   0xFFEFU
 
#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_8_SHIFT   0x4U
 
#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_7_GET_MASK   0x0008U
 
#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_7_CLR_MASK   0xFFF7U
 
#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_7_SHIFT   0x3U
 
#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_6_GET_MASK   0x0004U
 
#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_6_CLR_MASK   0xFFFBU
 
#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_6_SHIFT   0x2U
 
#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_5_GET_MASK   0x0002U
 
#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_5_CLR_MASK   0xFFFDU
 
#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_5_SHIFT   0x1U
 
#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_4_GET_MASK   0x0001U
 
#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_4_CLR_MASK   0xFFFEU
 
#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_4_SHIFT   0x0U
 
#define SGTL5000_DAP_COEF_WR_B0_LSB_BIT_3_GET_MASK   0x0008U
 
#define SGTL5000_DAP_COEF_WR_B0_LSB_BIT_3_CLR_MASK   0xFFF7U
 
#define SGTL5000_DAP_COEF_WR_B0_LSB_BIT_3_SHIFT   0x3U
 
#define SGTL5000_DAP_COEF_WR_B0_LSB_BIT_2_GET_MASK   0x0004U
 
#define SGTL5000_DAP_COEF_WR_B0_LSB_BIT_2_CLR_MASK   0xFFFBU
 
#define SGTL5000_DAP_COEF_WR_B0_LSB_BIT_2_SHIFT   0x2U
 
#define SGTL5000_DAP_COEF_WR_B0_LSB_BIT_1_GET_MASK   0x0002U
 
#define SGTL5000_DAP_COEF_WR_B0_LSB_BIT_1_CLR_MASK   0xFFFDU
 
#define SGTL5000_DAP_COEF_WR_B0_LSB_BIT_1_SHIFT   0x1U
 
#define SGTL5000_DAP_COEF_WR_B0_LSB_BIT_0_GET_MASK   0x0001U
 
#define SGTL5000_DAP_COEF_WR_B0_LSB_BIT_0_CLR_MASK   0xFFFEU
 
#define SGTL5000_DAP_COEF_WR_B0_LSB_BIT_0_SHIFT   0x0U
 
#define SGTL5000_DAP_AUDIO_EQ_BASS_BAND0_VOLUME_GET_MASK   0x007FU
 
#define SGTL5000_DAP_AUDIO_EQ_BASS_BAND0_VOLUME_CLR_MASK   0xFF80U
 
#define SGTL5000_DAP_AUDIO_EQ_BASS_BAND0_VOLUME_SHIFT   0x0U
 
#define SGTL5000_DAP_AUDIO_EQ_BAND1_VOLUME_GET_MASK   0x007FU
 
#define SGTL5000_DAP_AUDIO_EQ_BAND1_VOLUME_CLR_MASK   0xFF80U
 
#define SGTL5000_DAP_AUDIO_EQ_BAND1_VOLUME_SHIFT   0x0U
 
#define SGTL5000_DAP_AUDIO_EQ_BAND2_VOLUME_GET_MASK   0x007FU
 
#define SGTL5000_DAP_AUDIO_EQ_BAND2_VOLUME_CLR_MASK   0xFF80U
 
#define SGTL5000_DAP_AUDIO_EQ_BAND2_VOLUME_SHIFT   0x0U
 
#define SGTL5000_DAP_AUDIO_EQ_BAND3_VOLUME_GET_MASK   0x007FU
 
#define SGTL5000_DAP_AUDIO_EQ_BAND3_VOLUME_CLR_MASK   0xFF80U
 
#define SGTL5000_DAP_AUDIO_EQ_BAND3_VOLUME_SHIFT   0x0U
 
#define SGTL5000_DAP_AUDIO_EQ_TREBLE_BAND4_VOLUME_GET_MASK   0x007FU
 
#define SGTL5000_DAP_AUDIO_EQ_TREBLE_BAND4_VOLUME_CLR_MASK   0xFF80U
 
#define SGTL5000_DAP_AUDIO_EQ_TREBLE_BAND4_VOLUME_SHIFT   0x0U
 
#define SGTL5000_DAP_MAIN_CHAN_VOL_GET_MASK   0xFFFFU
 
#define SGTL5000_DAP_MAIN_CHAN_VOL_CLR_MASK   0x0000U
 
#define SGTL5000_DAP_MAIN_CHAN_VOL_SHIFT   0x0U
 
#define SGTL5000_DAP_MIX_CHAN_VOL_GET_MASK   0xFFFFU
 
#define SGTL5000_DAP_MIX_CHAN_VOL_CLR_MASK   0x0000U
 
#define SGTL5000_DAP_MIX_CHAN_VOL_SHIFT   0x0U
 
#define SGTL5000_DAP_AVC_CTRL_APOP_ENABLE_GET_MASK   0x4000U
 
#define SGTL5000_DAP_AVC_CTRL_APOP_ENABLE_CLR_MASK   0xBFFFU
 
#define SGTL5000_DAP_AVC_CTRL_APOP_ENABLE_SHIFT   0xEU
 
#define SGTL5000_DAP_AVC_CTRL_MAX_GAIN_GET_MASK   0x3000U
 
#define SGTL5000_DAP_AVC_CTRL_MAX_GAIN_CLR_MASK   0xCFFFU
 
#define SGTL5000_DAP_AVC_CTRL_MAX_GAIN_SHIFT   0xCU
 
#define SGTL5000_DAP_AVC_CTRL_LBI_RESPONSE_GET_MASK   0x0300U
 
#define SGTL5000_DAP_AVC_CTRL_LBI_RESPONSE_CLR_MASK   0xFCFFU
 
#define SGTL5000_DAP_AVC_CTRL_LBI_RESPONSE_SHIFT   0x8U
 
#define SGTL5000_DAP_AVC_CTRL_HARD_LIMIT_EN_GET_MASK   0x0020U
 
#define SGTL5000_DAP_AVC_CTRL_HARD_LIMIT_EN_CLR_MASK   0xFFDFU
 
#define SGTL5000_DAP_AVC_CTRL_HARD_LIMIT_EN_SHIFT   0x5U
 
#define SGTL5000_DAP_AVC_CTRL_STOP_GET_MASK   0x0004U
 
#define SGTL5000_DAP_AVC_CTRL_STOP_SHIFT   0x2U
 
#define SGTL5000_DAP_AVC_CTRL_RUNNING_GET_MASK   0x0002U
 
#define SGTL5000_DAP_AVC_CTRL_RUNNING_SHIFT   0x1U
 
#define SGTL5000_DAP_AVC_CTRL_EN_GET_MASK   0x0001U
 
#define SGTL5000_DAP_AVC_CTRL_EN_CLR_MASK   0xFFFEU
 
#define SGTL5000_DAP_AVC_CTRL_EN_SHIFT   0x0U
 
#define SGTL5000_DAP_AVC_ATTACK_RATE_GET_MASK   0x0FFFU
 
#define SGTL5000_DAP_AVC_ATTACK_RATE_CLR_MASK   0xF000U
 
#define SGTL5000_DAP_AVC_ATTACK_RATE_SHIFT   0x0U
 
#define SGTL5000_DAP_AVC_DECAY_RATE_GET_MASK   0x0FFFU
 
#define SGTL5000_DAP_AVC_DECAY_RATE_CLR_MASK   0xF000U
 
#define SGTL5000_DAP_AVC_DECAY_RATE_SHIFT   0x0U
 
#define SGTL5000_DAP_COEF_WR_B1_LSB_LSB_GET_MASK   0x000FU
 
#define SGTL5000_DAP_COEF_WR_B1_LSB_LSB_CLR_MASK   0xFFF0U
 
#define SGTL5000_DAP_COEF_WR_B1_LSB_LSB_SHIFT   0x0U
 
#define SGTL5000_DAP_COEF_WR_B2_LSB_LSB_GET_MASK   0x000FU
 
#define SGTL5000_DAP_COEF_WR_B2_LSB_LSB_CLR_MASK   0xFFF0U
 
#define SGTL5000_DAP_COEF_WR_B2_LSB_LSB_SHIFT   0x0U
 
#define SGTL5000_DAP_COEF_WR_A1_LSB_LSB_GET_MASK   0x000FU
 
#define SGTL5000_DAP_COEF_WR_A1_LSB_LSB_CLR_MASK   0xFFF0U
 
#define SGTL5000_DAP_COEF_WR_A1_LSB_LSB_SHIFT   0x0U
 
#define SGTL5000_DAP_COEF_WR_A2_LSB_LSB_GET_MASK   0x000FU
 
#define SGTL5000_DAP_COEF_WR_A2_LSB_LSB_CLR_MASK   0xFFF0U
 
#define SGTL5000_DAP_COEF_WR_A2_LSB_LSB_SHIFT   0x0U
 
#define SGTL5000_HEADPHONE_MAX_VOLUME_VALUE   0x7FU
 SGTL5000 volume setting range. More...
 
#define SGTL5000_HEADPHONE_MIN_VOLUME_VALUE   0U
 
#define SGTL5000_LINE_OUT_MAX_VOLUME_VALUE   0x1FU
 
#define SGTL5000_LINE_OUT_MIN_VOLUME_VALUE   0U
 
#define SGTL5000_ADC_MAX_VOLUME_VALUE   0xFU
 
#define SGTL5000_ADC_MIN_VOLUME_VALUE   0U
 
#define SGTL5000_DAC_MAX_VOLUME_VALUE   0xF0U
 
#define SGTL5000_DAC_MIN_VOLUME_VALUE   0x3CU
 
#define SGTL5000_I2C_ADDR   0x0A
 SGTL5000 I2C address. More...
 
#define SGTL_I2C_BITRATE   100000U
 sgtl i2c baudrate More...
 

Typedefs

typedef enum _sgtl5000_module sgtl_module_t
 Modules in Sgtl5000 board. More...
 
typedef enum _sgtl_route sgtl_route_t
 Sgtl5000 data route. More...
 
typedef enum _sgtl_protocol sgtl_protocol_t
 The audio data transfer protocol choice. Sgtl5000 only supports I2S format and PCM format. More...
 
typedef enum _sgtl_sclk_edge sgtl_sclk_edge_t
 SGTL SCLK valid edge. More...
 
typedef struct _sgtl_audio_format sgtl_audio_format_t
 Audio format configuration. More...
 
typedef struct _sgtl_config sgtl_config_t
 Initailize structure of sgtl5000. More...
 

Enumerations

enum  { sgtl_headphone_left = 0 , sgtl_headphone_right = 1 , sgtl_lineout_left = 2 , sgtl_lineout_right = 3 }
 sgtl play channel More...
 
enum  { sgtl_record_source_linein = 0U , sgtl_record_source_mic = 1U }
 sgtl record source _sgtl_record_source More...
 
enum  { sgtl_play_source_linein = 0U , sgtl_play_source_dac = 1U }
 sgtl play source _stgl_play_source More...
 

Functions

hpm_stat_t sgtl_init (sgtl_context_t *context, sgtl_config_t *config)
 sgtl5000 initialize function. More...
 
hpm_stat_t sgtl_set_data_route (sgtl_context_t *context, sgtl_route_t route)
 Set audio data route in sgtl5000. More...
 
hpm_stat_t sgtl_set_protocol (sgtl_context_t *context, sgtl_protocol_t protocol)
 Set the audio transfer protocol. More...
 
void sgtl_set_master_mode (sgtl_context_t *context, bool master)
 Set sgtl5000 as master or slave. More...
 
hpm_stat_t sgtl_set_volume (sgtl_context_t *context, sgtl_module_t module, uint32_t volume)
 Set the volume of different modules in sgtl5000. More...
 
uint32_t sgtl_get_volume (sgtl_context_t *context, sgtl_module_t module)
 Get the volume of different modules in sgtl5000. More...
 
hpm_stat_t sgtl_set_mute (sgtl_context_t *context, sgtl_module_t module, bool mute)
 Mute/unmute modules in sgtl5000. More...
 
hpm_stat_t sgtl_enable_module (sgtl_context_t *context, sgtl_module_t module)
 Enable expected devices. More...
 
hpm_stat_t sgtl_disable_module (sgtl_context_t *context, sgtl_module_t module)
 Disable expected devices. More...
 
hpm_stat_t sgtl_deint (sgtl_context_t *context)
 Deinit the sgtl5000 codec. Shut down Sgtl5000 modules. More...
 
hpm_stat_t sgtl_config_data_format (sgtl_context_t *context, uint32_t mclk, uint32_t sample_rate, uint32_t bits)
 Configure the data format of audio data. More...
 
hpm_stat_t sgtl_set_play (sgtl_context_t *context, uint32_t playSource)
 select SGTL codec play source. More...
 
hpm_stat_t sgtl_set_record (sgtl_context_t *context, uint32_t recordSource)
 select SGTL codec record source. More...
 
hpm_stat_t sgtl_write_reg (sgtl_context_t *context, uint16_t reg, uint16_t val)
 Write register to sgtl using I2C. More...
 
hpm_stat_t sgtl_read_reg (sgtl_context_t *context, uint16_t reg, uint16_t *val)
 Read register from sgtl using I2C. More...
 
hpm_stat_t sgtl_modify_reg (sgtl_context_t *context, uint16_t reg, uint16_t clr_mask, uint16_t val)
 Modify some bits in the register using I2C. More...
 

Detailed Description

Macro Definition Documentation

◆ CHIP_ADCDAC_CTRL

#define CHIP_ADCDAC_CTRL   0x000EU

◆ CHIP_ANA_ADC_CTRL

#define CHIP_ANA_ADC_CTRL   0x0020U

◆ CHIP_ANA_CTRL

#define CHIP_ANA_CTRL   0x0024U

◆ CHIP_ANA_HP_CTRL

#define CHIP_ANA_HP_CTRL   0x0022U

◆ CHIP_ANA_POWER

#define CHIP_ANA_POWER   0x0030U

◆ CHIP_ANA_STATUS

#define CHIP_ANA_STATUS   0x0036U

◆ CHIP_ANA_TEST2

#define CHIP_ANA_TEST2   0x003AU

◆ CHIP_CLK_CTRL

#define CHIP_CLK_CTRL   0x0004U

◆ CHIP_CLK_TOP_CTRL

#define CHIP_CLK_TOP_CTRL   0x0034U

◆ CHIP_DAC_VOL

#define CHIP_DAC_VOL   0x0010U

◆ CHIP_DIG_POWER

#define CHIP_DIG_POWER   0x0002U

◆ CHIP_I2S_CTRL

#define CHIP_I2S_CTRL   0x0006U

◆ CHIP_ID

#define CHIP_ID   0x0000U

#include <components/codec/sgtl5000/hpm_sgtl5000.h>

Define the register address of sgtl5000.

◆ CHIP_LINE_OUT_CTRL

#define CHIP_LINE_OUT_CTRL   0x002CU

◆ CHIP_LINE_OUT_VOL

#define CHIP_LINE_OUT_VOL   0x002EU

◆ CHIP_LINREG_CTRL

#define CHIP_LINREG_CTRL   0x0026U

◆ CHIP_MIC_CTRL

#define CHIP_MIC_CTRL   0x002AU

◆ CHIP_PAD_STRENGTH

#define CHIP_PAD_STRENGTH   0x0014U

◆ CHIP_PLL_CTRL

#define CHIP_PLL_CTRL   0x0032U

◆ CHIP_REF_CTRL

#define CHIP_REF_CTRL   0x0028U

◆ CHIP_SHORT_CTRL

#define CHIP_SHORT_CTRL   0x003CU

◆ CHIP_SSS_CTRL

#define CHIP_SSS_CTRL   0x000AU

◆ SGTL5000_ADC_ENABLE_CLR_MASK

#define SGTL5000_ADC_ENABLE_CLR_MASK   0xFFBFU

◆ SGTL5000_ADC_ENABLE_GET_MASK

#define SGTL5000_ADC_ENABLE_GET_MASK   0x0040U

◆ SGTL5000_ADC_ENABLE_SHIFT

#define SGTL5000_ADC_ENABLE_SHIFT   0x6U

◆ SGTL5000_ADC_HPF_BYPASS_CLR_MASK

#define SGTL5000_ADC_HPF_BYPASS_CLR_MASK   0xFFFEU

◆ SGTL5000_ADC_HPF_BYPASS_GET_MASK

#define SGTL5000_ADC_HPF_BYPASS_GET_MASK   0x0001U

◆ SGTL5000_ADC_HPF_BYPASS_SHIFT

#define SGTL5000_ADC_HPF_BYPASS_SHIFT   0x0U

◆ SGTL5000_ADC_HPF_FREEZE_CLR_MASK

#define SGTL5000_ADC_HPF_FREEZE_CLR_MASK   0xFFFDU

◆ SGTL5000_ADC_HPF_FREEZE_GET_MASK

#define SGTL5000_ADC_HPF_FREEZE_GET_MASK   0x0002U

◆ SGTL5000_ADC_HPF_FREEZE_SHIFT

#define SGTL5000_ADC_HPF_FREEZE_SHIFT   0x1U

◆ SGTL5000_ADC_MAX_VOLUME_VALUE

#define SGTL5000_ADC_MAX_VOLUME_VALUE   0xFU

◆ SGTL5000_ADC_MIN_VOLUME_VALUE

#define SGTL5000_ADC_MIN_VOLUME_VALUE   0U

◆ SGTL5000_ADC_POWERUP_CLR_MASK

#define SGTL5000_ADC_POWERUP_CLR_MASK   0xFFFDU

◆ SGTL5000_ADC_POWERUP_GET_MASK

#define SGTL5000_ADC_POWERUP_GET_MASK   0x0002U

◆ SGTL5000_ADC_POWERUP_SHIFT

#define SGTL5000_ADC_POWERUP_SHIFT   0x1U

◆ SGTL5000_ADC_VOL_LEFT_CLR_MASK

#define SGTL5000_ADC_VOL_LEFT_CLR_MASK   0xFFF0U

◆ SGTL5000_ADC_VOL_LEFT_GET_MASK

#define SGTL5000_ADC_VOL_LEFT_GET_MASK   0x000FU

◆ SGTL5000_ADC_VOL_LEFT_SHIFT

#define SGTL5000_ADC_VOL_LEFT_SHIFT   0x0U

◆ SGTL5000_ADC_VOL_M6DB_CLR_MASK

#define SGTL5000_ADC_VOL_M6DB_CLR_MASK   0xFEFFU

◆ SGTL5000_ADC_VOL_M6DB_GET_MASK

#define SGTL5000_ADC_VOL_M6DB_GET_MASK   0x0100U

◆ SGTL5000_ADC_VOL_M6DB_SHIFT

#define SGTL5000_ADC_VOL_M6DB_SHIFT   0x8U

◆ SGTL5000_ADC_VOL_RIGHT_CLR_MASK

#define SGTL5000_ADC_VOL_RIGHT_CLR_MASK   0xFF0FU

◆ SGTL5000_ADC_VOL_RIGHT_GET_MASK

#define SGTL5000_ADC_VOL_RIGHT_GET_MASK   0x00F0U

◆ SGTL5000_ADC_VOL_RIGHT_SHIFT

#define SGTL5000_ADC_VOL_RIGHT_SHIFT   0x4U

◆ SGTL5000_ANA_GND_BASE

#define SGTL5000_ANA_GND_BASE   0x320U /* mv */

◆ SGTL5000_ANA_GND_MASK

#define SGTL5000_ANA_GND_MASK   0x01f0U

◆ SGTL5000_ANA_GND_SHIFT

#define SGTL5000_ANA_GND_SHIFT   0x4U

◆ SGTL5000_ANA_GND_STP

#define SGTL5000_ANA_GND_STP   0x19U /*mv */

◆ SGTL5000_ANA_GND_WIDTH

#define SGTL5000_ANA_GND_WIDTH   0x5U

◆ SGTL5000_BIAS_CTRL_MASK

#define SGTL5000_BIAS_CTRL_MASK   0x000eU

◆ SGTL5000_BIAS_CTRL_SHIFT

#define SGTL5000_BIAS_CTRL_SHIFT   0x1U

◆ SGTL5000_BIAS_CTRL_WIDTH

#define SGTL5000_BIAS_CTRL_WIDTH   0x3U

◆ SGTL5000_BIAS_R_2K

#define SGTL5000_BIAS_R_2K   0x0100U

◆ SGTL5000_BIAS_R_4k

#define SGTL5000_BIAS_R_4k   0x0200U

◆ SGTL5000_BIAS_R_8k

#define SGTL5000_BIAS_R_8k   0x0300U

◆ SGTL5000_BIAS_R__CLR_MASK

#define SGTL5000_BIAS_R__CLR_MASK   0xFCFFU

◆ SGTL5000_BIAS_R_GET_MASK

#define SGTL5000_BIAS_R_GET_MASK   0x0300U

◆ SGTL5000_BIAS_R_off

#define SGTL5000_BIAS_R_off   0x0000U

◆ SGTL5000_BIAS_R_SHIFT

#define SGTL5000_BIAS_R_SHIFT   0x8U

◆ SGTL5000_BIAS_VOLT_CLR_MASK

#define SGTL5000_BIAS_VOLT_CLR_MASK   0xFF8FU

◆ SGTL5000_BIAS_VOLT_GET_MASK

#define SGTL5000_BIAS_VOLT_GET_MASK   0x0070U

◆ SGTL5000_BIAS_VOLT_SHIFT

#define SGTL5000_BIAS_VOLT_SHIFT   0x4U

◆ SGTL5000_CAPLESS_HEADPHONE_POWERUP_CLR_MASK

#define SGTL5000_CAPLESS_HEADPHONE_POWERUP_CLR_MASK   0xFFFBU

◆ SGTL5000_CAPLESS_HEADPHONE_POWERUP_GET_MASK

#define SGTL5000_CAPLESS_HEADPHONE_POWERUP_GET_MASK   0x0004U

◆ SGTL5000_CAPLESS_HEADPHONE_POWERUP_SHIFT

#define SGTL5000_CAPLESS_HEADPHONE_POWERUP_SHIFT   0x2U

◆ SGTL5000_CAPLESS_SHORT

#define SGTL5000_CAPLESS_SHORT   0x0100U

◆ SGTL5000_CM_SHORT_MOD_CLR_MASK

#define SGTL5000_CM_SHORT_MOD_CLR_MASK   0xFFFCU

◆ SGTL5000_CM_SHORT_MOD_GET_MASK

#define SGTL5000_CM_SHORT_MOD_GET_MASK   0x0003U

◆ SGTL5000_CM_SHORT_MOD_SHIFT

#define SGTL5000_CM_SHORT_MOD_SHIFT   0x0U

◆ SGTL5000_DAC_ENABLE_CLR_MASK

#define SGTL5000_DAC_ENABLE_CLR_MASK   0xFFDFU

◆ SGTL5000_DAC_ENABLE_GET_MASK

#define SGTL5000_DAC_ENABLE_GET_MASK   0x0020U

◆ SGTL5000_DAC_ENABLE_SHIFT

#define SGTL5000_DAC_ENABLE_SHIFT   0x5U

◆ SGTL5000_DAC_LRSWAP_CLR_MASK

#define SGTL5000_DAC_LRSWAP_CLR_MASK   0xEFFFU

◆ SGTL5000_DAC_LRSWAP_GET_MASK

#define SGTL5000_DAC_LRSWAP_GET_MASK   0x1000U

◆ SGTL5000_DAC_LRSWAP_SHIFT

#define SGTL5000_DAC_LRSWAP_SHIFT   0xCU

◆ SGTL5000_DAC_MAX_VOLUME_VALUE

#define SGTL5000_DAC_MAX_VOLUME_VALUE   0xF0U

◆ SGTL5000_DAC_MIN_VOLUME_VALUE

#define SGTL5000_DAC_MIN_VOLUME_VALUE   0x3CU

◆ SGTL5000_DAC_MUTE_LEFT_CLR_MASK

#define SGTL5000_DAC_MUTE_LEFT_CLR_MASK   0xFFFBU

◆ SGTL5000_DAC_MUTE_LEFT_GET_MASK

#define SGTL5000_DAC_MUTE_LEFT_GET_MASK   0x0004U

◆ SGTL5000_DAC_MUTE_LEFT_SHIFT

#define SGTL5000_DAC_MUTE_LEFT_SHIFT   0x2U

◆ SGTL5000_DAC_MUTE_RIGHT_CLR_MASK

#define SGTL5000_DAC_MUTE_RIGHT_CLR_MASK   0xFFF7U

◆ SGTL5000_DAC_MUTE_RIGHT_GET_MASK

#define SGTL5000_DAC_MUTE_RIGHT_GET_MASK   0x0008U

◆ SGTL5000_DAC_MUTE_RIGHT_SHIFT

#define SGTL5000_DAC_MUTE_RIGHT_SHIFT   0x3U

◆ SGTL5000_DAC_POWERUP_CLR_MASK

#define SGTL5000_DAC_POWERUP_CLR_MASK   0xFFF7U

◆ SGTL5000_DAC_POWERUP_GET_MASK

#define SGTL5000_DAC_POWERUP_GET_MASK   0x0008U

◆ SGTL5000_DAC_POWERUP_SHIFT

#define SGTL5000_DAC_POWERUP_SHIFT   0x3U

◆ SGTL5000_DAC_SEL_ADC

#define SGTL5000_DAC_SEL_ADC   0x0000U

◆ SGTL5000_DAC_SEL_CLR_MASK

#define SGTL5000_DAC_SEL_CLR_MASK   0xFFCFU

◆ SGTL5000_DAC_SEL_DAP

#define SGTL5000_DAC_SEL_DAP   0x0030U

◆ SGTL5000_DAC_SEL_GET_MASK

#define SGTL5000_DAC_SEL_GET_MASK   0x0030U

◆ SGTL5000_DAC_SEL_I2S_IN

#define SGTL5000_DAC_SEL_I2S_IN   0x0010U

◆ SGTL5000_DAC_SEL_SHIFT

#define SGTL5000_DAC_SEL_SHIFT   0x4U

◆ SGTL5000_DAC_VOL_LEFT_CLR_MASK

#define SGTL5000_DAC_VOL_LEFT_CLR_MASK   0xFF00U

◆ SGTL5000_DAC_VOL_LEFT_GET_MASK

#define SGTL5000_DAC_VOL_LEFT_GET_MASK   0x00FFU

◆ SGTL5000_DAC_VOL_LEFT_SHIFT

#define SGTL5000_DAC_VOL_LEFT_SHIFT   0x0U

◆ SGTL5000_DAC_VOL_RAMP_EN_CLR_MASK

#define SGTL5000_DAC_VOL_RAMP_EN_CLR_MASK   0xFDFFU

◆ SGTL5000_DAC_VOL_RAMP_EN_GET_MASK

#define SGTL5000_DAC_VOL_RAMP_EN_GET_MASK   0x0200U

◆ SGTL5000_DAC_VOL_RAMP_EN_SHIFT

#define SGTL5000_DAC_VOL_RAMP_EN_SHIFT   0x9U

◆ SGTL5000_DAC_VOL_RAMP_EXPO_CLR_MASK

#define SGTL5000_DAC_VOL_RAMP_EXPO_CLR_MASK   0xFEFFU

◆ SGTL5000_DAC_VOL_RAMP_EXPO_GET_MASK

#define SGTL5000_DAC_VOL_RAMP_EXPO_GET_MASK   0x0100U

◆ SGTL5000_DAC_VOL_RAMP_EXPO_SHIFT

#define SGTL5000_DAC_VOL_RAMP_EXPO_SHIFT   0x8U

◆ SGTL5000_DAC_VOL_RIGHT_CLR_MASK

#define SGTL5000_DAC_VOL_RIGHT_CLR_MASK   0x00FFU

◆ SGTL5000_DAC_VOL_RIGHT_GET_MASK

#define SGTL5000_DAC_VOL_RIGHT_GET_MASK   0xFF00U

◆ SGTL5000_DAC_VOL_RIGHT_SHIFT

#define SGTL5000_DAC_VOL_RIGHT_SHIFT   0x8U

◆ SGTL5000_DAP_AUDIO_EQ

#define SGTL5000_DAP_AUDIO_EQ   0x0108U

◆ SGTL5000_DAP_AUDIO_EQ_BAND1

#define SGTL5000_DAP_AUDIO_EQ_BAND1   0x0118U

◆ SGTL5000_DAP_AUDIO_EQ_BAND1_VOLUME_CLR_MASK

#define SGTL5000_DAP_AUDIO_EQ_BAND1_VOLUME_CLR_MASK   0xFF80U

◆ SGTL5000_DAP_AUDIO_EQ_BAND1_VOLUME_GET_MASK

#define SGTL5000_DAP_AUDIO_EQ_BAND1_VOLUME_GET_MASK   0x007FU

◆ SGTL5000_DAP_AUDIO_EQ_BAND1_VOLUME_SHIFT

#define SGTL5000_DAP_AUDIO_EQ_BAND1_VOLUME_SHIFT   0x0U

◆ SGTL5000_DAP_AUDIO_EQ_BAND2

#define SGTL5000_DAP_AUDIO_EQ_BAND2   0x011AU

◆ SGTL5000_DAP_AUDIO_EQ_BAND2_VOLUME_CLR_MASK

#define SGTL5000_DAP_AUDIO_EQ_BAND2_VOLUME_CLR_MASK   0xFF80U

◆ SGTL5000_DAP_AUDIO_EQ_BAND2_VOLUME_GET_MASK

#define SGTL5000_DAP_AUDIO_EQ_BAND2_VOLUME_GET_MASK   0x007FU

◆ SGTL5000_DAP_AUDIO_EQ_BAND2_VOLUME_SHIFT

#define SGTL5000_DAP_AUDIO_EQ_BAND2_VOLUME_SHIFT   0x0U

◆ SGTL5000_DAP_AUDIO_EQ_BAND3

#define SGTL5000_DAP_AUDIO_EQ_BAND3   0x011CU

◆ SGTL5000_DAP_AUDIO_EQ_BAND3_VOLUME_CLR_MASK

#define SGTL5000_DAP_AUDIO_EQ_BAND3_VOLUME_CLR_MASK   0xFF80U

◆ SGTL5000_DAP_AUDIO_EQ_BAND3_VOLUME_GET_MASK

#define SGTL5000_DAP_AUDIO_EQ_BAND3_VOLUME_GET_MASK   0x007FU

◆ SGTL5000_DAP_AUDIO_EQ_BAND3_VOLUME_SHIFT

#define SGTL5000_DAP_AUDIO_EQ_BAND3_VOLUME_SHIFT   0x0U

◆ SGTL5000_DAP_AUDIO_EQ_BASS_BAND0

#define SGTL5000_DAP_AUDIO_EQ_BASS_BAND0   0x0116U

◆ SGTL5000_DAP_AUDIO_EQ_BASS_BAND0_VOLUME_CLR_MASK

#define SGTL5000_DAP_AUDIO_EQ_BASS_BAND0_VOLUME_CLR_MASK   0xFF80U

◆ SGTL5000_DAP_AUDIO_EQ_BASS_BAND0_VOLUME_GET_MASK

#define SGTL5000_DAP_AUDIO_EQ_BASS_BAND0_VOLUME_GET_MASK   0x007FU

◆ SGTL5000_DAP_AUDIO_EQ_BASS_BAND0_VOLUME_SHIFT

#define SGTL5000_DAP_AUDIO_EQ_BASS_BAND0_VOLUME_SHIFT   0x0U

◆ SGTL5000_DAP_AUDIO_EQ_EN_CLR_MASK

#define SGTL5000_DAP_AUDIO_EQ_EN_CLR_MASK   0xFFFCU

◆ SGTL5000_DAP_AUDIO_EQ_EN_GET_MASK

#define SGTL5000_DAP_AUDIO_EQ_EN_GET_MASK   0x0003U

◆ SGTL5000_DAP_AUDIO_EQ_EN_SHIFT

#define SGTL5000_DAP_AUDIO_EQ_EN_SHIFT   0x0U

◆ SGTL5000_DAP_AUDIO_EQ_TREBLE_BAND4

#define SGTL5000_DAP_AUDIO_EQ_TREBLE_BAND4   0x011EU

◆ SGTL5000_DAP_AUDIO_EQ_TREBLE_BAND4_VOLUME_CLR_MASK

#define SGTL5000_DAP_AUDIO_EQ_TREBLE_BAND4_VOLUME_CLR_MASK   0xFF80U

◆ SGTL5000_DAP_AUDIO_EQ_TREBLE_BAND4_VOLUME_GET_MASK

#define SGTL5000_DAP_AUDIO_EQ_TREBLE_BAND4_VOLUME_GET_MASK   0x007FU

◆ SGTL5000_DAP_AUDIO_EQ_TREBLE_BAND4_VOLUME_SHIFT

#define SGTL5000_DAP_AUDIO_EQ_TREBLE_BAND4_VOLUME_SHIFT   0x0U

◆ SGTL5000_DAP_AVC_ATTACK

#define SGTL5000_DAP_AVC_ATTACK   0x0128U

◆ SGTL5000_DAP_AVC_ATTACK_RATE_CLR_MASK

#define SGTL5000_DAP_AVC_ATTACK_RATE_CLR_MASK   0xF000U

◆ SGTL5000_DAP_AVC_ATTACK_RATE_GET_MASK

#define SGTL5000_DAP_AVC_ATTACK_RATE_GET_MASK   0x0FFFU

◆ SGTL5000_DAP_AVC_ATTACK_RATE_SHIFT

#define SGTL5000_DAP_AVC_ATTACK_RATE_SHIFT   0x0U

◆ SGTL5000_DAP_AVC_CTRL

#define SGTL5000_DAP_AVC_CTRL   0x0124U

◆ SGTL5000_DAP_AVC_CTRL_APOP_ENABLE_CLR_MASK

#define SGTL5000_DAP_AVC_CTRL_APOP_ENABLE_CLR_MASK   0xBFFFU

◆ SGTL5000_DAP_AVC_CTRL_APOP_ENABLE_GET_MASK

#define SGTL5000_DAP_AVC_CTRL_APOP_ENABLE_GET_MASK   0x4000U

◆ SGTL5000_DAP_AVC_CTRL_APOP_ENABLE_SHIFT

#define SGTL5000_DAP_AVC_CTRL_APOP_ENABLE_SHIFT   0xEU

◆ SGTL5000_DAP_AVC_CTRL_EN_CLR_MASK

#define SGTL5000_DAP_AVC_CTRL_EN_CLR_MASK   0xFFFEU

◆ SGTL5000_DAP_AVC_CTRL_EN_GET_MASK

#define SGTL5000_DAP_AVC_CTRL_EN_GET_MASK   0x0001U

◆ SGTL5000_DAP_AVC_CTRL_EN_SHIFT

#define SGTL5000_DAP_AVC_CTRL_EN_SHIFT   0x0U

◆ SGTL5000_DAP_AVC_CTRL_HARD_LIMIT_EN_CLR_MASK

#define SGTL5000_DAP_AVC_CTRL_HARD_LIMIT_EN_CLR_MASK   0xFFDFU

◆ SGTL5000_DAP_AVC_CTRL_HARD_LIMIT_EN_GET_MASK

#define SGTL5000_DAP_AVC_CTRL_HARD_LIMIT_EN_GET_MASK   0x0020U

◆ SGTL5000_DAP_AVC_CTRL_HARD_LIMIT_EN_SHIFT

#define SGTL5000_DAP_AVC_CTRL_HARD_LIMIT_EN_SHIFT   0x5U

◆ SGTL5000_DAP_AVC_CTRL_LBI_RESPONSE_CLR_MASK

#define SGTL5000_DAP_AVC_CTRL_LBI_RESPONSE_CLR_MASK   0xFCFFU

◆ SGTL5000_DAP_AVC_CTRL_LBI_RESPONSE_GET_MASK

#define SGTL5000_DAP_AVC_CTRL_LBI_RESPONSE_GET_MASK   0x0300U

◆ SGTL5000_DAP_AVC_CTRL_LBI_RESPONSE_SHIFT

#define SGTL5000_DAP_AVC_CTRL_LBI_RESPONSE_SHIFT   0x8U

◆ SGTL5000_DAP_AVC_CTRL_MAX_GAIN_CLR_MASK

#define SGTL5000_DAP_AVC_CTRL_MAX_GAIN_CLR_MASK   0xCFFFU

◆ SGTL5000_DAP_AVC_CTRL_MAX_GAIN_GET_MASK

#define SGTL5000_DAP_AVC_CTRL_MAX_GAIN_GET_MASK   0x3000U

◆ SGTL5000_DAP_AVC_CTRL_MAX_GAIN_SHIFT

#define SGTL5000_DAP_AVC_CTRL_MAX_GAIN_SHIFT   0xCU

◆ SGTL5000_DAP_AVC_CTRL_RUNNING_GET_MASK

#define SGTL5000_DAP_AVC_CTRL_RUNNING_GET_MASK   0x0002U

◆ SGTL5000_DAP_AVC_CTRL_RUNNING_SHIFT

#define SGTL5000_DAP_AVC_CTRL_RUNNING_SHIFT   0x1U

◆ SGTL5000_DAP_AVC_CTRL_STOP_GET_MASK

#define SGTL5000_DAP_AVC_CTRL_STOP_GET_MASK   0x0004U

◆ SGTL5000_DAP_AVC_CTRL_STOP_SHIFT

#define SGTL5000_DAP_AVC_CTRL_STOP_SHIFT   0x2U

◆ SGTL5000_DAP_AVC_DECAY

#define SGTL5000_DAP_AVC_DECAY   0x012AU

◆ SGTL5000_DAP_AVC_DECAY_RATE_CLR_MASK

#define SGTL5000_DAP_AVC_DECAY_RATE_CLR_MASK   0xF000U

◆ SGTL5000_DAP_AVC_DECAY_RATE_GET_MASK

#define SGTL5000_DAP_AVC_DECAY_RATE_GET_MASK   0x0FFFU

◆ SGTL5000_DAP_AVC_DECAY_RATE_SHIFT

#define SGTL5000_DAP_AVC_DECAY_RATE_SHIFT   0x0U

◆ SGTL5000_DAP_AVC_THRESHOLD

#define SGTL5000_DAP_AVC_THRESHOLD   0x0126U

◆ SGTL5000_DAP_BASS_ENHANCE

#define SGTL5000_DAP_BASS_ENHANCE   0x0104U

◆ SGTL5000_DAP_BASS_ENHANCE_BYPASS_HPF_CLR_MASK

#define SGTL5000_DAP_BASS_ENHANCE_BYPASS_HPF_CLR_MASK   0xFEFFU

◆ SGTL5000_DAP_BASS_ENHANCE_BYPASS_HPF_GET_MASK

#define SGTL5000_DAP_BASS_ENHANCE_BYPASS_HPF_GET_MASK   0x0100U

◆ SGTL5000_DAP_BASS_ENHANCE_BYPASS_HPF_SHIFT

#define SGTL5000_DAP_BASS_ENHANCE_BYPASS_HPF_SHIFT   0x8U

◆ SGTL5000_DAP_BASS_ENHANCE_CTRL

#define SGTL5000_DAP_BASS_ENHANCE_CTRL   0x0106U

◆ SGTL5000_DAP_BASS_ENHANCE_CTRL_BASS_LEVEL_CLR_MASK

#define SGTL5000_DAP_BASS_ENHANCE_CTRL_BASS_LEVEL_CLR_MASK   0xFF80U

◆ SGTL5000_DAP_BASS_ENHANCE_CTRL_BASS_LEVEL_GET_MASK

#define SGTL5000_DAP_BASS_ENHANCE_CTRL_BASS_LEVEL_GET_MASK   0x007FU

◆ SGTL5000_DAP_BASS_ENHANCE_CTRL_BASS_LEVEL_SHIFT

#define SGTL5000_DAP_BASS_ENHANCE_CTRL_BASS_LEVEL_SHIFT   0x0U

◆ SGTL5000_DAP_BASS_ENHANCE_CTRL_LR_LEVEL_CLR_MASK

#define SGTL5000_DAP_BASS_ENHANCE_CTRL_LR_LEVEL_CLR_MASK   0xC0FFU

◆ SGTL5000_DAP_BASS_ENHANCE_CTRL_LR_LEVEL_GET_MASK

#define SGTL5000_DAP_BASS_ENHANCE_CTRL_LR_LEVEL_GET_MASK   0x3F00U

◆ SGTL5000_DAP_BASS_ENHANCE_CTRL_LR_LEVEL_SHIFT

#define SGTL5000_DAP_BASS_ENHANCE_CTRL_LR_LEVEL_SHIFT   0x8U

◆ SGTL5000_DAP_BASS_ENHANCE_CUTOFF_CLR_MASK

#define SGTL5000_DAP_BASS_ENHANCE_CUTOFF_CLR_MASK   0xFF8FU

◆ SGTL5000_DAP_BASS_ENHANCE_CUTOFF_GET_MASK

#define SGTL5000_DAP_BASS_ENHANCE_CUTOFF_GET_MASK   0x0070U

◆ SGTL5000_DAP_BASS_ENHANCE_CUTOFF_HPF_CLR_MASK

#define SGTL5000_DAP_BASS_ENHANCE_CUTOFF_HPF_CLR_MASK   0xF1FFU

◆ SGTL5000_DAP_BASS_ENHANCE_CUTOFF_HPF_GET_MASK

#define SGTL5000_DAP_BASS_ENHANCE_CUTOFF_HPF_GET_MASK   0x0E00U

◆ SGTL5000_DAP_BASS_ENHANCE_CUTOFF_HPF_SHIFT

#define SGTL5000_DAP_BASS_ENHANCE_CUTOFF_HPF_SHIFT   0x9U

◆ SGTL5000_DAP_BASS_ENHANCE_CUTOFF_SHIFT

#define SGTL5000_DAP_BASS_ENHANCE_CUTOFF_SHIFT   0x4U

◆ SGTL5000_DAP_BASS_ENHANCE_EN_CLR_MASK

#define SGTL5000_DAP_BASS_ENHANCE_EN_CLR_MASK   0xFFFEU

◆ SGTL5000_DAP_BASS_ENHANCE_EN_GET_MASK

#define SGTL5000_DAP_BASS_ENHANCE_EN_GET_MASK   0x0001U

◆ SGTL5000_DAP_BASS_ENHANCE_EN_SHIFT

#define SGTL5000_DAP_BASS_ENHANCE_EN_SHIFT   0x0U

◆ SGTL5000_DAP_BASS_ENHANCE_MULT_CLR_MASK

#define SGTL5000_DAP_BASS_ENHANCE_MULT_CLR_MASK   0x3FFFU

◆ SGTL5000_DAP_BASS_ENHANCE_MULT_GET_MASK

#define SGTL5000_DAP_BASS_ENHANCE_MULT_GET_MASK   0xC000U

◆ SGTL5000_DAP_BASS_ENHANCE_MULT_SHIFT

#define SGTL5000_DAP_BASS_ENHANCE_MULT_SHIFT   0xEU

◆ SGTL5000_DAP_COEF_WR_A1_LSB

#define SGTL5000_DAP_COEF_WR_A1_LSB   0x0136U

◆ SGTL5000_DAP_COEF_WR_A1_LSB_LSB_CLR_MASK

#define SGTL5000_DAP_COEF_WR_A1_LSB_LSB_CLR_MASK   0xFFF0U

◆ SGTL5000_DAP_COEF_WR_A1_LSB_LSB_GET_MASK

#define SGTL5000_DAP_COEF_WR_A1_LSB_LSB_GET_MASK   0x000FU

◆ SGTL5000_DAP_COEF_WR_A1_LSB_LSB_SHIFT

#define SGTL5000_DAP_COEF_WR_A1_LSB_LSB_SHIFT   0x0U

◆ SGTL5000_DAP_COEF_WR_A1_MSB

#define SGTL5000_DAP_COEF_WR_A1_MSB   0x0134U

◆ SGTL5000_DAP_COEF_WR_A2_LSB

#define SGTL5000_DAP_COEF_WR_A2_LSB   0x013AU

◆ SGTL5000_DAP_COEF_WR_A2_LSB_LSB_CLR_MASK

#define SGTL5000_DAP_COEF_WR_A2_LSB_LSB_CLR_MASK   0xFFF0U

◆ SGTL5000_DAP_COEF_WR_A2_LSB_LSB_GET_MASK

#define SGTL5000_DAP_COEF_WR_A2_LSB_LSB_GET_MASK   0x000FU

◆ SGTL5000_DAP_COEF_WR_A2_LSB_LSB_SHIFT

#define SGTL5000_DAP_COEF_WR_A2_LSB_LSB_SHIFT   0x0U

◆ SGTL5000_DAP_COEF_WR_A2_MSB

#define SGTL5000_DAP_COEF_WR_A2_MSB   0x0138U

◆ SGTL5000_DAP_COEF_WR_B0_LSB

#define SGTL5000_DAP_COEF_WR_B0_LSB   0x0110U

◆ SGTL5000_DAP_COEF_WR_B0_LSB_BIT_0_CLR_MASK

#define SGTL5000_DAP_COEF_WR_B0_LSB_BIT_0_CLR_MASK   0xFFFEU

◆ SGTL5000_DAP_COEF_WR_B0_LSB_BIT_0_GET_MASK

#define SGTL5000_DAP_COEF_WR_B0_LSB_BIT_0_GET_MASK   0x0001U

◆ SGTL5000_DAP_COEF_WR_B0_LSB_BIT_0_SHIFT

#define SGTL5000_DAP_COEF_WR_B0_LSB_BIT_0_SHIFT   0x0U

◆ SGTL5000_DAP_COEF_WR_B0_LSB_BIT_1_CLR_MASK

#define SGTL5000_DAP_COEF_WR_B0_LSB_BIT_1_CLR_MASK   0xFFFDU

◆ SGTL5000_DAP_COEF_WR_B0_LSB_BIT_1_GET_MASK

#define SGTL5000_DAP_COEF_WR_B0_LSB_BIT_1_GET_MASK   0x0002U

◆ SGTL5000_DAP_COEF_WR_B0_LSB_BIT_1_SHIFT

#define SGTL5000_DAP_COEF_WR_B0_LSB_BIT_1_SHIFT   0x1U

◆ SGTL5000_DAP_COEF_WR_B0_LSB_BIT_2_CLR_MASK

#define SGTL5000_DAP_COEF_WR_B0_LSB_BIT_2_CLR_MASK   0xFFFBU

◆ SGTL5000_DAP_COEF_WR_B0_LSB_BIT_2_GET_MASK

#define SGTL5000_DAP_COEF_WR_B0_LSB_BIT_2_GET_MASK   0x0004U

◆ SGTL5000_DAP_COEF_WR_B0_LSB_BIT_2_SHIFT

#define SGTL5000_DAP_COEF_WR_B0_LSB_BIT_2_SHIFT   0x2U

◆ SGTL5000_DAP_COEF_WR_B0_LSB_BIT_3_CLR_MASK

#define SGTL5000_DAP_COEF_WR_B0_LSB_BIT_3_CLR_MASK   0xFFF7U

◆ SGTL5000_DAP_COEF_WR_B0_LSB_BIT_3_GET_MASK

#define SGTL5000_DAP_COEF_WR_B0_LSB_BIT_3_GET_MASK   0x0008U

◆ SGTL5000_DAP_COEF_WR_B0_LSB_BIT_3_SHIFT

#define SGTL5000_DAP_COEF_WR_B0_LSB_BIT_3_SHIFT   0x3U

◆ SGTL5000_DAP_COEF_WR_B0_MSB

#define SGTL5000_DAP_COEF_WR_B0_MSB   0x010EU

◆ SGTL5000_DAP_COEF_WR_B0_MSB_BIT_10_CLR_MASK

#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_10_CLR_MASK   0xFFBFU

◆ SGTL5000_DAP_COEF_WR_B0_MSB_BIT_10_GET_MASK

#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_10_GET_MASK   0x0040U

◆ SGTL5000_DAP_COEF_WR_B0_MSB_BIT_10_SHIFT

#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_10_SHIFT   0x6U

◆ SGTL5000_DAP_COEF_WR_B0_MSB_BIT_11_CLR_MASK

#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_11_CLR_MASK   0xFF7FU

◆ SGTL5000_DAP_COEF_WR_B0_MSB_BIT_11_GET_MASK

#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_11_GET_MASK   0x0080U

◆ SGTL5000_DAP_COEF_WR_B0_MSB_BIT_11_SHIFT

#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_11_SHIFT   0x7U

◆ SGTL5000_DAP_COEF_WR_B0_MSB_BIT_12_CLR_MASK

#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_12_CLR_MASK   0xFEFFU

◆ SGTL5000_DAP_COEF_WR_B0_MSB_BIT_12_GET_MASK

#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_12_GET_MASK   0x0100U

◆ SGTL5000_DAP_COEF_WR_B0_MSB_BIT_12_SHIFT

#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_12_SHIFT   0x8U

◆ SGTL5000_DAP_COEF_WR_B0_MSB_BIT_13_CLR_MASK

#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_13_CLR_MASK   0xFDFFU

◆ SGTL5000_DAP_COEF_WR_B0_MSB_BIT_13_GET_MASK

#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_13_GET_MASK   0x0200U

◆ SGTL5000_DAP_COEF_WR_B0_MSB_BIT_13_SHIFT

#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_13_SHIFT   0x9U

◆ SGTL5000_DAP_COEF_WR_B0_MSB_BIT_14_CLR_MASK

#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_14_CLR_MASK   0xFBFFU

◆ SGTL5000_DAP_COEF_WR_B0_MSB_BIT_14_GET_MASK

#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_14_GET_MASK   0x0400U

◆ SGTL5000_DAP_COEF_WR_B0_MSB_BIT_14_SHIFT

#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_14_SHIFT   0xAU

◆ SGTL5000_DAP_COEF_WR_B0_MSB_BIT_15_CLR_MASK

#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_15_CLR_MASK   0xF7FFU

◆ SGTL5000_DAP_COEF_WR_B0_MSB_BIT_15_GET_MASK

#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_15_GET_MASK   0x0800U

◆ SGTL5000_DAP_COEF_WR_B0_MSB_BIT_15_SHIFT

#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_15_SHIFT   0xBU

◆ SGTL5000_DAP_COEF_WR_B0_MSB_BIT_16_CLR_MASK

#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_16_CLR_MASK   0xEFFFU

◆ SGTL5000_DAP_COEF_WR_B0_MSB_BIT_16_GET_MASK

#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_16_GET_MASK   0x1000U

◆ SGTL5000_DAP_COEF_WR_B0_MSB_BIT_16_SHIFT

#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_16_SHIFT   0xCU

◆ SGTL5000_DAP_COEF_WR_B0_MSB_BIT_17_CLR_MASK

#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_17_CLR_MASK   0xDFFFU

◆ SGTL5000_DAP_COEF_WR_B0_MSB_BIT_17_GET_MASK

#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_17_GET_MASK   0x2000U

◆ SGTL5000_DAP_COEF_WR_B0_MSB_BIT_17_SHIFT

#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_17_SHIFT   0xDU

◆ SGTL5000_DAP_COEF_WR_B0_MSB_BIT_18_CLR_MASK

#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_18_CLR_MASK   0xBFFFU

◆ SGTL5000_DAP_COEF_WR_B0_MSB_BIT_18_GET_MASK

#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_18_GET_MASK   0x4000U

◆ SGTL5000_DAP_COEF_WR_B0_MSB_BIT_18_SHIFT

#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_18_SHIFT   0xEU

◆ SGTL5000_DAP_COEF_WR_B0_MSB_BIT_19_CLR_MASK

#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_19_CLR_MASK   0x7FFFU

◆ SGTL5000_DAP_COEF_WR_B0_MSB_BIT_19_GET_MASK

#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_19_GET_MASK   0x8000U

◆ SGTL5000_DAP_COEF_WR_B0_MSB_BIT_19_SHIFT

#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_19_SHIFT   0xFU

◆ SGTL5000_DAP_COEF_WR_B0_MSB_BIT_4_CLR_MASK

#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_4_CLR_MASK   0xFFFEU

◆ SGTL5000_DAP_COEF_WR_B0_MSB_BIT_4_GET_MASK

#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_4_GET_MASK   0x0001U

◆ SGTL5000_DAP_COEF_WR_B0_MSB_BIT_4_SHIFT

#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_4_SHIFT   0x0U

◆ SGTL5000_DAP_COEF_WR_B0_MSB_BIT_5_CLR_MASK

#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_5_CLR_MASK   0xFFFDU

◆ SGTL5000_DAP_COEF_WR_B0_MSB_BIT_5_GET_MASK

#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_5_GET_MASK   0x0002U

◆ SGTL5000_DAP_COEF_WR_B0_MSB_BIT_5_SHIFT

#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_5_SHIFT   0x1U

◆ SGTL5000_DAP_COEF_WR_B0_MSB_BIT_6_CLR_MASK

#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_6_CLR_MASK   0xFFFBU

◆ SGTL5000_DAP_COEF_WR_B0_MSB_BIT_6_GET_MASK

#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_6_GET_MASK   0x0004U

◆ SGTL5000_DAP_COEF_WR_B0_MSB_BIT_6_SHIFT

#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_6_SHIFT   0x2U

◆ SGTL5000_DAP_COEF_WR_B0_MSB_BIT_7_CLR_MASK

#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_7_CLR_MASK   0xFFF7U

◆ SGTL5000_DAP_COEF_WR_B0_MSB_BIT_7_GET_MASK

#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_7_GET_MASK   0x0008U

◆ SGTL5000_DAP_COEF_WR_B0_MSB_BIT_7_SHIFT

#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_7_SHIFT   0x3U

◆ SGTL5000_DAP_COEF_WR_B0_MSB_BIT_8_CLR_MASK

#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_8_CLR_MASK   0xFFEFU

◆ SGTL5000_DAP_COEF_WR_B0_MSB_BIT_8_GET_MASK

#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_8_GET_MASK   0x0010U

◆ SGTL5000_DAP_COEF_WR_B0_MSB_BIT_8_SHIFT

#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_8_SHIFT   0x4U

◆ SGTL5000_DAP_COEF_WR_B0_MSB_BIT_9_CLR_MASK

#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_9_CLR_MASK   0xFFDFU

◆ SGTL5000_DAP_COEF_WR_B0_MSB_BIT_9_GET_MASK

#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_9_GET_MASK   0x0020U

◆ SGTL5000_DAP_COEF_WR_B0_MSB_BIT_9_SHIFT

#define SGTL5000_DAP_COEF_WR_B0_MSB_BIT_9_SHIFT   0x5U

◆ SGTL5000_DAP_COEF_WR_B1_LSB

#define SGTL5000_DAP_COEF_WR_B1_LSB   0x012EU

◆ SGTL5000_DAP_COEF_WR_B1_LSB_LSB_CLR_MASK

#define SGTL5000_DAP_COEF_WR_B1_LSB_LSB_CLR_MASK   0xFFF0U

◆ SGTL5000_DAP_COEF_WR_B1_LSB_LSB_GET_MASK

#define SGTL5000_DAP_COEF_WR_B1_LSB_LSB_GET_MASK   0x000FU

◆ SGTL5000_DAP_COEF_WR_B1_LSB_LSB_SHIFT

#define SGTL5000_DAP_COEF_WR_B1_LSB_LSB_SHIFT   0x0U

◆ SGTL5000_DAP_COEF_WR_B1_MSB

#define SGTL5000_DAP_COEF_WR_B1_MSB   0x012CU

◆ SGTL5000_DAP_COEF_WR_B2_LSB

#define SGTL5000_DAP_COEF_WR_B2_LSB   0x0132U

◆ SGTL5000_DAP_COEF_WR_B2_LSB_LSB_CLR_MASK

#define SGTL5000_DAP_COEF_WR_B2_LSB_LSB_CLR_MASK   0xFFF0U

◆ SGTL5000_DAP_COEF_WR_B2_LSB_LSB_GET_MASK

#define SGTL5000_DAP_COEF_WR_B2_LSB_LSB_GET_MASK   0x000FU

◆ SGTL5000_DAP_COEF_WR_B2_LSB_LSB_SHIFT

#define SGTL5000_DAP_COEF_WR_B2_LSB_LSB_SHIFT   0x0U

◆ SGTL5000_DAP_COEF_WR_B2_MSB

#define SGTL5000_DAP_COEF_WR_B2_MSB   0x0130U

◆ SGTL5000_DAP_CONTROL

#define SGTL5000_DAP_CONTROL   0x0100U

◆ SGTL5000_DAP_CONTROL_DAP_EN_CLR_MASK

#define SGTL5000_DAP_CONTROL_DAP_EN_CLR_MASK   0xFFFEU

◆ SGTL5000_DAP_CONTROL_DAP_EN_GET_MASK

#define SGTL5000_DAP_CONTROL_DAP_EN_GET_MASK   0x0001U

◆ SGTL5000_DAP_CONTROL_DAP_EN_SHIFT

#define SGTL5000_DAP_CONTROL_DAP_EN_SHIFT   0x0U

◆ SGTL5000_DAP_CONTROL_MIX_EN_CLR_MASK

#define SGTL5000_DAP_CONTROL_MIX_EN_CLR_MASK   0xFFEFU

◆ SGTL5000_DAP_CONTROL_MIX_EN_GET_MASK

#define SGTL5000_DAP_CONTROL_MIX_EN_GET_MASK   0x0010U

◆ SGTL5000_DAP_CONTROL_MIX_EN_SHIFT

#define SGTL5000_DAP_CONTROL_MIX_EN_SHIFT   0x4U

◆ SGTL5000_DAP_ENABLE_CLR_MASK

#define SGTL5000_DAP_ENABLE_CLR_MASK   0xFFEFU

◆ SGTL5000_DAP_ENABLE_GET_MASK

#define SGTL5000_DAP_ENABLE_GET_MASK   0x0010U

◆ SGTL5000_DAP_ENABLE_SHIFT

#define SGTL5000_DAP_ENABLE_SHIFT   0x4U

◆ SGTL5000_DAP_FILTER_COEF_ACCESS

#define SGTL5000_DAP_FILTER_COEF_ACCESS   0x010CU

◆ SGTL5000_DAP_FILTER_COEF_ACCESS_DEBUG_CLR_MASK

#define SGTL5000_DAP_FILTER_COEF_ACCESS_DEBUG_CLR_MASK   0xEFFFU

◆ SGTL5000_DAP_FILTER_COEF_ACCESS_DEBUG_GET_MASK

#define SGTL5000_DAP_FILTER_COEF_ACCESS_DEBUG_GET_MASK   0x1000U

◆ SGTL5000_DAP_FILTER_COEF_ACCESS_DEBUG_SHIFT

#define SGTL5000_DAP_FILTER_COEF_ACCESS_DEBUG_SHIFT   0xCU

◆ SGTL5000_DAP_FILTER_COEF_ACCESS_INDEX_CLR_MASK

#define SGTL5000_DAP_FILTER_COEF_ACCESS_INDEX_CLR_MASK   0xFF00U

◆ SGTL5000_DAP_FILTER_COEF_ACCESS_INDEX_GET_MASK

#define SGTL5000_DAP_FILTER_COEF_ACCESS_INDEX_GET_MASK   0x00FFU

◆ SGTL5000_DAP_FILTER_COEF_ACCESS_INDEX_SHIFT

#define SGTL5000_DAP_FILTER_COEF_ACCESS_INDEX_SHIFT   0x0U

◆ SGTL5000_DAP_FILTER_COEF_ACCESS_RD_CLR_MASK

#define SGTL5000_DAP_FILTER_COEF_ACCESS_RD_CLR_MASK   0xFDFFU

◆ SGTL5000_DAP_FILTER_COEF_ACCESS_RD_GET_MASK

#define SGTL5000_DAP_FILTER_COEF_ACCESS_RD_GET_MASK   0x0200U

◆ SGTL5000_DAP_FILTER_COEF_ACCESS_RD_SHIFT

#define SGTL5000_DAP_FILTER_COEF_ACCESS_RD_SHIFT   0x9U

◆ SGTL5000_DAP_FILTER_COEF_ACCESS_WR_CLR_MASK

#define SGTL5000_DAP_FILTER_COEF_ACCESS_WR_CLR_MASK   0xFEFFU

◆ SGTL5000_DAP_FILTER_COEF_ACCESS_WR_GET_MASK

#define SGTL5000_DAP_FILTER_COEF_ACCESS_WR_GET_MASK   0x0100U

◆ SGTL5000_DAP_FILTER_COEF_ACCESS_WR_SHIFT

#define SGTL5000_DAP_FILTER_COEF_ACCESS_WR_SHIFT   0x8U

◆ SGTL5000_DAP_LRSWAP_CLR_MASK

#define SGTL5000_DAP_LRSWAP_CLR_MASK   0xDFFFU

◆ SGTL5000_DAP_LRSWAP_GET_MASK

#define SGTL5000_DAP_LRSWAP_GET_MASK   0x2000U

◆ SGTL5000_DAP_LRSWAP_SHIFT

#define SGTL5000_DAP_LRSWAP_SHIFT   0xDU

◆ SGTL5000_DAP_MAIN_CHAN

#define SGTL5000_DAP_MAIN_CHAN   0x0120U

◆ SGTL5000_DAP_MAIN_CHAN_VOL_CLR_MASK

#define SGTL5000_DAP_MAIN_CHAN_VOL_CLR_MASK   0x0000U

◆ SGTL5000_DAP_MAIN_CHAN_VOL_GET_MASK

#define SGTL5000_DAP_MAIN_CHAN_VOL_GET_MASK   0xFFFFU

◆ SGTL5000_DAP_MAIN_CHAN_VOL_SHIFT

#define SGTL5000_DAP_MAIN_CHAN_VOL_SHIFT   0x0U

◆ SGTL5000_DAP_MIX_CHAN

#define SGTL5000_DAP_MIX_CHAN   0x0122U

◆ SGTL5000_DAP_MIX_CHAN_VOL_CLR_MASK

#define SGTL5000_DAP_MIX_CHAN_VOL_CLR_MASK   0x0000U

◆ SGTL5000_DAP_MIX_CHAN_VOL_GET_MASK

#define SGTL5000_DAP_MIX_CHAN_VOL_GET_MASK   0xFFFFU

◆ SGTL5000_DAP_MIX_CHAN_VOL_SHIFT

#define SGTL5000_DAP_MIX_CHAN_VOL_SHIFT   0x0U

◆ SGTL5000_DAP_MIX_LRSWAP_CLR_MASK

#define SGTL5000_DAP_MIX_LRSWAP_CLR_MASK   0xBFFFU

◆ SGTL5000_DAP_MIX_LRSWAP_GET_MASK

#define SGTL5000_DAP_MIX_LRSWAP_GET_MASK   0x4000U

◆ SGTL5000_DAP_MIX_LRSWAP_SHIFT

#define SGTL5000_DAP_MIX_LRSWAP_SHIFT   0xEU

◆ SGTL5000_DAP_MIX_SEL_ADC

#define SGTL5000_DAP_MIX_SEL_ADC   0x0000U

◆ SGTL5000_DAP_MIX_SEL_CLR_MASK

#define SGTL5000_DAP_MIX_SEL_CLR_MASK   0xFCFFU

◆ SGTL5000_DAP_MIX_SEL_GET_MASK

#define SGTL5000_DAP_MIX_SEL_GET_MASK   0x0300U

◆ SGTL5000_DAP_MIX_SEL_I2S_IN

#define SGTL5000_DAP_MIX_SEL_I2S_IN   0x0100U

◆ SGTL5000_DAP_MIX_SEL_SHIFT

#define SGTL5000_DAP_MIX_SEL_SHIFT   0x8U

◆ SGTL5000_DAP_PEQ

#define SGTL5000_DAP_PEQ   0x0102U

◆ SGTL5000_DAP_PEQ_EN_CLR_MASK

#define SGTL5000_DAP_PEQ_EN_CLR_MASK   0xFFF8U

◆ SGTL5000_DAP_PEQ_EN_GET_MASK

#define SGTL5000_DAP_PEQ_EN_GET_MASK   0x0007U

◆ SGTL5000_DAP_PEQ_EN_SHIFT

#define SGTL5000_DAP_PEQ_EN_SHIFT   0x0U

◆ SGTL5000_DAP_SEL_ADC

#define SGTL5000_DAP_SEL_ADC   0x0000U

◆ SGTL5000_DAP_SEL_CLR_MASK

#define SGTL5000_DAP_SEL_CLR_MASK   0xFF3FU

◆ SGTL5000_DAP_SEL_GET_MASK

#define SGTL5000_DAP_SEL_GET_MASK   0x00C0U

◆ SGTL5000_DAP_SEL_I2S_IN

#define SGTL5000_DAP_SEL_I2S_IN   0x0040U

◆ SGTL5000_DAP_SEL_SHIFT

#define SGTL5000_DAP_SEL_SHIFT   0x6U

◆ SGTL5000_DAP_SGTL_SURROUND

#define SGTL5000_DAP_SGTL_SURROUND   0x010AU

◆ SGTL5000_DAP_SGTL_SURROUND_SEL_CLR_MASK

#define SGTL5000_DAP_SGTL_SURROUND_SEL_CLR_MASK   0xFFFCU

◆ SGTL5000_DAP_SGTL_SURROUND_SEL_GET_MASK

#define SGTL5000_DAP_SGTL_SURROUND_SEL_GET_MASK   0x0003U

◆ SGTL5000_DAP_SGTL_SURROUND_SEL_SHIFT

#define SGTL5000_DAP_SGTL_SURROUND_SEL_SHIFT   0x0U

◆ SGTL5000_DAP_SGTL_SURROUND_WIDTH_CONTROL_CLR_MASK

#define SGTL5000_DAP_SGTL_SURROUND_WIDTH_CONTROL_CLR_MASK   0xFF8FU

◆ SGTL5000_DAP_SGTL_SURROUND_WIDTH_CONTROL_GET_MASK

#define SGTL5000_DAP_SGTL_SURROUND_WIDTH_CONTROL_GET_MASK   0x0070U

◆ SGTL5000_DAP_SGTL_SURROUND_WIDTH_CONTROL_SHIFT

#define SGTL5000_DAP_SGTL_SURROUND_WIDTH_CONTROL_SHIFT   0x4U

◆ SGTL5000_EN_ZCD_ADC_CLR_MASK

#define SGTL5000_EN_ZCD_ADC_CLR_MASK   0xFFFDU

◆ SGTL5000_EN_ZCD_ADC_GET_MASK

#define SGTL5000_EN_ZCD_ADC_GET_MASK   0x0002U

◆ SGTL5000_EN_ZCD_ADC_SHIFT

#define SGTL5000_EN_ZCD_ADC_SHIFT   0x1U

◆ SGTL5000_EN_ZCD_HP_CLR_MASK

#define SGTL5000_EN_ZCD_HP_CLR_MASK   0xFFDFU

◆ SGTL5000_EN_ZCD_HP_GET_MASK

#define SGTL5000_EN_ZCD_HP_GET_MASK   0x0020U

◆ SGTL5000_EN_ZCD_HP_SHIFT

#define SGTL5000_EN_ZCD_HP_SHIFT   0x5U

◆ SGTL5000_ENABLE_INT_OSC_CLR_MASK

#define SGTL5000_ENABLE_INT_OSC_CLR_MASK   0xF7FFU

◆ SGTL5000_ENABLE_INT_OSC_GET_MASK

#define SGTL5000_ENABLE_INT_OSC_GET_MASK   0x0800U

◆ SGTL5000_ENABLE_INT_OSC_SHIFT

#define SGTL5000_ENABLE_INT_OSC_SHIFT   0xBU

◆ SGTL5000_HEADPHONE_MAX_VOLUME_VALUE

#define SGTL5000_HEADPHONE_MAX_VOLUME_VALUE   0x7FU

#include <components/codec/sgtl5000/hpm_sgtl5000.h>

SGTL5000 volume setting range.

◆ SGTL5000_HEADPHONE_MIN_VOLUME_VALUE

#define SGTL5000_HEADPHONE_MIN_VOLUME_VALUE   0U

◆ SGTL5000_HEADPHONE_POWERUP_CLR_MASK

#define SGTL5000_HEADPHONE_POWERUP_CLR_MASK   0xFFEFU

◆ SGTL5000_HEADPHONE_POWERUP_GET_MASK

#define SGTL5000_HEADPHONE_POWERUP_GET_MASK   0x0010U

◆ SGTL5000_HEADPHONE_POWERUP_SHIFT

#define SGTL5000_HEADPHONE_POWERUP_SHIFT   0x4U

◆ SGTL5000_HP_LRSHORT

#define SGTL5000_HP_LRSHORT   0x0200U

◆ SGTL5000_HP_VOL_LEFT_CLR_MASK

#define SGTL5000_HP_VOL_LEFT_CLR_MASK   0xFF80U

◆ SGTL5000_HP_VOL_LEFT_GET_MASK

#define SGTL5000_HP_VOL_LEFT_GET_MASK   0x007FU

◆ SGTL5000_HP_VOL_LEFT_SHIFT

#define SGTL5000_HP_VOL_LEFT_SHIFT   0x0U

◆ SGTL5000_HP_VOL_RIGHT_CLR_MASK

#define SGTL5000_HP_VOL_RIGHT_CLR_MASK   0x80FFU

◆ SGTL5000_HP_VOL_RIGHT_GET_MASK

#define SGTL5000_HP_VOL_RIGHT_GET_MASK   0x7F00U

◆ SGTL5000_HP_VOL_RIGHT_SHIFT

#define SGTL5000_HP_VOL_RIGHT_SHIFT   0x8U

◆ SGTL5000_I2C_ADDR

#define SGTL5000_I2C_ADDR   0x0A

#include <components/codec/sgtl5000/hpm_sgtl5000.h>

SGTL5000 I2C address.

◆ SGTL5000_I2S_DLEN_16

#define SGTL5000_I2S_DLEN_16   0x0030U

◆ SGTL5000_I2S_DLEN_20

#define SGTL5000_I2S_DLEN_20   0x0020U

◆ SGTL5000_I2S_DLEN_24

#define SGTL5000_I2S_DLEN_24   0x0010U

◆ SGTL5000_I2S_DLEN_32

#define SGTL5000_I2S_DLEN_32   0x0000U

◆ SGTL5000_I2S_DLEN_CLR_MASK

#define SGTL5000_I2S_DLEN_CLR_MASK   0xFFCFU

◆ SGTL5000_I2S_DLEN_GET_MASK

#define SGTL5000_I2S_DLEN_GET_MASK   0x0030U

◆ SGTL5000_I2S_DLEN_SHIFT

#define SGTL5000_I2S_DLEN_SHIFT   0x4U

◆ SGTL5000_I2S_IN_ENABLE_CLR_MASK

#define SGTL5000_I2S_IN_ENABLE_CLR_MASK   0xFFFEU

◆ SGTL5000_I2S_IN_ENABLE_GET_MASK

#define SGTL5000_I2S_IN_ENABLE_GET_MASK   0x0001U

◆ SGTL5000_I2S_IN_ENABLE_SHIFT

#define SGTL5000_I2S_IN_ENABLE_SHIFT   0x0U

◆ SGTL5000_I2S_LEFT_FIRST

#define SGTL5000_I2S_LEFT_FIRST   0x0000U

◆ SGTL5000_I2S_LRALIGN_CLR_MASK

#define SGTL5000_I2S_LRALIGN_CLR_MASK   0xFFFDU

◆ SGTL5000_I2S_LRALIGN_GET_MASK

#define SGTL5000_I2S_LRALIGN_GET_MASK   0x0002U

◆ SGTL5000_I2S_LRALIGN_SHIFT

#define SGTL5000_I2S_LRALIGN_SHIFT   0x1U

◆ SGTL5000_I2S_LRPOL_CLR_MASK

#define SGTL5000_I2S_LRPOL_CLR_MASK   0xFFFEU

◆ SGTL5000_I2S_LRPOL_GET_MASK

#define SGTL5000_I2S_LRPOL_GET_MASK   0x0001U

◆ SGTL5000_I2S_LRPOL_SHIFT

#define SGTL5000_I2S_LRPOL_SHIFT   0x0U

◆ SGTL5000_I2S_LRSWAP_CLR_MASK

#define SGTL5000_I2S_LRSWAP_CLR_MASK   0xFBFFU

◆ SGTL5000_I2S_LRSWAP_GET_MASK

#define SGTL5000_I2S_LRSWAP_GET_MASK   0x0400U

◆ SGTL5000_I2S_LRSWAP_SHIFT

#define SGTL5000_I2S_LRSWAP_SHIFT   0xAU

◆ SGTL5000_I2S_MASTER

#define SGTL5000_I2S_MASTER   0x0080U

◆ SGTL5000_I2S_MODE_CLR_MASK

#define SGTL5000_I2S_MODE_CLR_MASK   0xFFF3U

◆ SGTL5000_I2S_MODE_GET_MASK

#define SGTL5000_I2S_MODE_GET_MASK   0x000CU

◆ SGTL5000_I2S_MODE_I2S_LJ

#define SGTL5000_I2S_MODE_I2S_LJ   0x0000U

◆ SGTL5000_I2S_MODE_PCM

#define SGTL5000_I2S_MODE_PCM   0x0008U

◆ SGTL5000_I2S_MODE_RJ

#define SGTL5000_I2S_MODE_RJ   0x0004U

◆ SGTL5000_I2S_MODE_SHIFT

#define SGTL5000_I2S_MODE_SHIFT   0x2U

◆ SGTL5000_I2S_MS_CLR_MASK

#define SGTL5000_I2S_MS_CLR_MASK   0xFF7FU

◆ SGTL5000_I2S_MS_GET_MASK

#define SGTL5000_I2S_MS_GET_MASK   0x0080U

◆ SGTL5000_I2S_MS_SHIFT

#define SGTL5000_I2S_MS_SHIFT   0x7U

◆ SGTL5000_I2S_NO_DELAY

#define SGTL5000_I2S_NO_DELAY   0x0002U

◆ SGTL5000_I2S_ONE_BIT_DELAY

#define SGTL5000_I2S_ONE_BIT_DELAY   0x0000U

◆ SGTL5000_I2S_OUT_ENABLE_CLR_MASK

#define SGTL5000_I2S_OUT_ENABLE_CLR_MASK   0xFFFDU

◆ SGTL5000_I2S_OUT_ENABLE_GET_MASK

#define SGTL5000_I2S_OUT_ENABLE_GET_MASK   0x0002U

◆ SGTL5000_I2S_OUT_ENABLE_SHIFT

#define SGTL5000_I2S_OUT_ENABLE_SHIFT   0x1U

◆ SGTL5000_I2S_OUT_SEL_ADC

#define SGTL5000_I2S_OUT_SEL_ADC   0x0000U

◆ SGTL5000_I2S_OUT_SEL_CLR_MASK

#define SGTL5000_I2S_OUT_SEL_CLR_MASK   0xFFFCU

◆ SGTL5000_I2S_OUT_SEL_DAP

#define SGTL5000_I2S_OUT_SEL_DAP   0x0003U

◆ SGTL5000_I2S_OUT_SEL_GET_MASK

#define SGTL5000_I2S_OUT_SEL_GET_MASK   0x0003U

◆ SGTL5000_I2S_OUT_SEL_I2S_IN

#define SGTL5000_I2S_OUT_SEL_I2S_IN   0x0001U

◆ SGTL5000_I2S_OUT_SEL_SHIFT

#define SGTL5000_I2S_OUT_SEL_SHIFT   0x0U

◆ SGTL5000_I2S_RIGHT_FIRST

#define SGTL5000_I2S_RIGHT_FIRST   0x0001U

◆ SGTL5000_I2S_SCLK_INV_CLR_MASK

#define SGTL5000_I2S_SCLK_INV_CLR_MASK   0xFFBFU

◆ SGTL5000_I2S_SCLK_INV_GET_MASK

#define SGTL5000_I2S_SCLK_INV_GET_MASK   0x0040U

◆ SGTL5000_I2S_SCLK_INV_SHIFT

#define SGTL5000_I2S_SCLK_INV_SHIFT   0x6U

◆ SGTL5000_I2S_SCLKFREQ_32FS

#define SGTL5000_I2S_SCLKFREQ_32FS   0x0100U /* Not for RJ mode */

◆ SGTL5000_I2S_SCLKFREQ_64FS

#define SGTL5000_I2S_SCLKFREQ_64FS   0x0000U

◆ SGTL5000_I2S_SCLKFREQ_GET_MASK

#define SGTL5000_I2S_SCLKFREQ_GET_MASK   0x0100U

◆ SGTL5000_I2S_SCLKFREQ_SHIFT

#define SGTL5000_I2S_SCLKFREQ_SHIFT   0x8U

◆ SGTL5000_I2S_SLAVE

#define SGTL5000_I2S_SLAVE   0x0000U

◆ SGTL5000_I2S_SLCKFREQ_CLR_MASK

#define SGTL5000_I2S_SLCKFREQ_CLR_MASK   0xFEFFU

◆ SGTL5000_I2S_VAILD_FALLING_EDGE

#define SGTL5000_I2S_VAILD_FALLING_EDGE   0x0040U

◆ SGTL5000_I2S_VAILD_RISING_EDGE

#define SGTL5000_I2S_VAILD_RISING_EDGE   0x0000U

◆ SGTL5000_INPUT_FREQ_DIV2_CLR_MASK

#define SGTL5000_INPUT_FREQ_DIV2_CLR_MASK   0xFFF7U

◆ SGTL5000_INPUT_FREQ_DIV2_GET_MASK

#define SGTL5000_INPUT_FREQ_DIV2_GET_MASK   0x0008U

◆ SGTL5000_INPUT_FREQ_DIV2_SHIFT

#define SGTL5000_INPUT_FREQ_DIV2_SHIFT   0x3U

◆ SGTL5000_LINE_OUT_CURRENT_180u

#define SGTL5000_LINE_OUT_CURRENT_180u   0x0000U

◆ SGTL5000_LINE_OUT_CURRENT_270u

#define SGTL5000_LINE_OUT_CURRENT_270u   0x0100U

◆ SGTL5000_LINE_OUT_CURRENT_360u

#define SGTL5000_LINE_OUT_CURRENT_360u   0x0300U

◆ SGTL5000_LINE_OUT_CURRENT_450u

#define SGTL5000_LINE_OUT_CURRENT_450u   0x0700U

◆ SGTL5000_LINE_OUT_CURRENT_540u

#define SGTL5000_LINE_OUT_CURRENT_540u   0x0F00U

◆ SGTL5000_LINE_OUT_CURRENT_CLR_MASK

#define SGTL5000_LINE_OUT_CURRENT_CLR_MASK   0xF0FFU

◆ SGTL5000_LINE_OUT_CURRENT_GET_MASK

#define SGTL5000_LINE_OUT_CURRENT_GET_MASK   0x0F00U

◆ SGTL5000_LINE_OUT_CURRENT_SHIFT

#define SGTL5000_LINE_OUT_CURRENT_SHIFT   0x8U

◆ SGTL5000_LINE_OUT_GND_BASE

#define SGTL5000_LINE_OUT_GND_BASE   0x320U /* mv */

◆ SGTL5000_LINE_OUT_GND_CLR_MASK

#define SGTL5000_LINE_OUT_GND_CLR_MASK   0xFFC0U

◆ SGTL5000_LINE_OUT_GND_GET_MASK

#define SGTL5000_LINE_OUT_GND_GET_MASK   0x003FU

◆ SGTL5000_LINE_OUT_GND_MAX

#define SGTL5000_LINE_OUT_GND_MAX   0x23U

◆ SGTL5000_LINE_OUT_GND_SHIFT

#define SGTL5000_LINE_OUT_GND_SHIFT   0x0U

◆ SGTL5000_LINE_OUT_GND_STP

#define SGTL5000_LINE_OUT_GND_STP   0x19U

◆ SGTL5000_LINE_OUT_MAX_VOLUME_VALUE

#define SGTL5000_LINE_OUT_MAX_VOLUME_VALUE   0x1FU

◆ SGTL5000_LINE_OUT_MIN_VOLUME_VALUE

#define SGTL5000_LINE_OUT_MIN_VOLUME_VALUE   0U

◆ SGTL5000_LINE_OUT_VOL_LEFT_CLR_MASK

#define SGTL5000_LINE_OUT_VOL_LEFT_CLR_MASK   0xFFE0U

◆ SGTL5000_LINE_OUT_VOL_LEFT_GET_MASK

#define SGTL5000_LINE_OUT_VOL_LEFT_GET_MASK   0x001FU

◆ SGTL5000_LINE_OUT_VOL_LEFT_SHIFT

#define SGTL5000_LINE_OUT_VOL_LEFT_SHIFT   0x0U

◆ SGTL5000_LINE_OUT_VOL_RIGHT_CLR_MASK

#define SGTL5000_LINE_OUT_VOL_RIGHT_CLR_MASK   0xE0FFU

◆ SGTL5000_LINE_OUT_VOL_RIGHT_GET_MASK

#define SGTL5000_LINE_OUT_VOL_RIGHT_GET_MASK   0x1F00U

◆ SGTL5000_LINE_OUT_VOL_RIGHT_SHIFT

#define SGTL5000_LINE_OUT_VOL_RIGHT_SHIFT   0x8U

◆ SGTL5000_LINEOUT_POWERUP_CLR_MASK

#define SGTL5000_LINEOUT_POWERUP_CLR_MASK   0xFFFEU

◆ SGTL5000_LINEOUT_POWERUP_GET_MASK

#define SGTL5000_LINEOUT_POWERUP_GET_MASK   0x0001U

◆ SGTL5000_LINEOUT_POWERUP_SHIFT

#define SGTL5000_LINEOUT_POWERUP_SHIFT   0x0U

◆ SGTL5000_LINREG_D_POWERUP_CLR_MASK

#define SGTL5000_LINREG_D_POWERUP_CLR_MASK   0xFDFFU

◆ SGTL5000_LINREG_D_POWERUP_GET_MASK

#define SGTL5000_LINREG_D_POWERUP_GET_MASK   0x0200U

◆ SGTL5000_LINREG_D_POWERUP_SHIFT

#define SGTL5000_LINREG_D_POWERUP_SHIFT   0x9U

◆ SGTL5000_LINREG_SIMPLE_POWERUP_CLR_MASK

#define SGTL5000_LINREG_SIMPLE_POWERUP_CLR_MASK   0xDFFFU

◆ SGTL5000_LINREG_SIMPLE_POWERUP_GET_MASK

#define SGTL5000_LINREG_SIMPLE_POWERUP_GET_MASK   0x2000U

◆ SGTL5000_LINREG_SIMPLE_POWERUP_SHIFT

#define SGTL5000_LINREG_SIMPLE_POWERUP_SHIFT   0xDU

◆ SGTL5000_LINREG_VDDD_CLR_MASK

#define SGTL5000_LINREG_VDDD_CLR_MASK   0xFFF0U

◆ SGTL5000_LINREG_VDDD_GET_MASK

#define SGTL5000_LINREG_VDDD_GET_MASK   0x000FU

◆ SGTL5000_LINREG_VDDD_SHIFT

#define SGTL5000_LINREG_VDDD_SHIFT   0x0U

◆ SGTL5000_LR_SHORT_MOD_CLR_MASK

#define SGTL5000_LR_SHORT_MOD_CLR_MASK   0xFFF3U

◆ SGTL5000_LR_SHORT_MOD_GET_MASK

#define SGTL5000_LR_SHORT_MOD_GET_MASK   0x000CU

◆ SGTL5000_LR_SHORT_MOD_SHIFT

#define SGTL5000_LR_SHORT_MOD_SHIFT   0x2U

◆ SGTL5000_LVLADJC_CLR_MASK

#define SGTL5000_LVLADJC_CLR_MASK   0xFF8FU

◆ SGTL5000_LVLADJC_GET_MASK

#define SGTL5000_LVLADJC_GET_MASK   0x0070U

◆ SGTL5000_LVLADJC_SHIFT

#define SGTL5000_LVLADJC_SHIFT   0x4U

◆ SGTL5000_LVLADJL_CLR_MASK

#define SGTL5000_LVLADJL_CLR_MASK   0xF8FFU

◆ SGTL5000_LVLADJL_GET_MASK

#define SGTL5000_LVLADJL_GET_MASK   0x0700U

◆ SGTL5000_LVLADJL_SHIFT

#define SGTL5000_LVLADJL_SHIFT   0x8U

◆ SGTL5000_LVLADJR_CLR_MASK

#define SGTL5000_LVLADJR_CLR_MASK   0x8FFFU

◆ SGTL5000_LVLADJR_GET_MASK

#define SGTL5000_LVLADJR_GET_MASK   0x7000U

◆ SGTL5000_LVLADJR_SHIFT

#define SGTL5000_LVLADJR_SHIFT   0xCU

◆ SGTL5000_MCLK_FREQ_256FS

#define SGTL5000_MCLK_FREQ_256FS   0x0000U

◆ SGTL5000_MCLK_FREQ_384FS

#define SGTL5000_MCLK_FREQ_384FS   0x0001U

◆ SGTL5000_MCLK_FREQ_512FS

#define SGTL5000_MCLK_FREQ_512FS   0x0002U

◆ SGTL5000_MCLK_FREQ_CLR_MASK

#define SGTL5000_MCLK_FREQ_CLR_MASK   0xFFFCU

◆ SGTL5000_MCLK_FREQ_GET_MASK

#define SGTL5000_MCLK_FREQ_GET_MASK   0x0003U

◆ SGTL5000_MCLK_FREQ_PLL

#define SGTL5000_MCLK_FREQ_PLL   0x0003U

◆ SGTL5000_MCLK_FREQ_SHIFT

#define SGTL5000_MCLK_FREQ_SHIFT   0x0U

◆ SGTL5000_MIC_GAIN_CLR_MASK

#define SGTL5000_MIC_GAIN_CLR_MASK   0xFFFCU

◆ SGTL5000_MIC_GAIN_GET_MASK

#define SGTL5000_MIC_GAIN_GET_MASK   0x0003U

◆ SGTL5000_MIC_GAIN_SHIFT

#define SGTL5000_MIC_GAIN_SHIFT   0x0U

◆ SGTL5000_MUTE_ADC_CLR_MASK

#define SGTL5000_MUTE_ADC_CLR_MASK   0xFFFEU

◆ SGTL5000_MUTE_ADC_GET_MASK

#define SGTL5000_MUTE_ADC_GET_MASK   0x0001U

◆ SGTL5000_MUTE_ADC_SHIFT

#define SGTL5000_MUTE_ADC_SHIFT   0x0U

◆ SGTL5000_MUTE_HP_CLR_MASK

#define SGTL5000_MUTE_HP_CLR_MASK   0xFFEFU

◆ SGTL5000_MUTE_HP_GET_MASK

#define SGTL5000_MUTE_HP_GET_MASK   0x0010U

◆ SGTL5000_MUTE_HP_SHIFT

#define SGTL5000_MUTE_HP_SHIFT   0x4U

◆ SGTL5000_MUTE_LO_CLR_MASK

#define SGTL5000_MUTE_LO_CLR_MASK   0xFEFFU

◆ SGTL5000_MUTE_LO_GET_MASK

#define SGTL5000_MUTE_LO_GET_MASK   0x0100U

◆ SGTL5000_MUTE_LO_SHIFT

#define SGTL5000_MUTE_LO_SHIFT   0x8U

◆ SGTL5000_PAD_I2C_SCL_CLR_MASK

#define SGTL5000_PAD_I2C_SCL_CLR_MASK   0xFFFCU

◆ SGTL5000_PAD_I2C_SCL_GET_MASK

#define SGTL5000_PAD_I2C_SCL_GET_MASK   0x0003U

◆ SGTL5000_PAD_I2C_SCL_SHIFT

#define SGTL5000_PAD_I2C_SCL_SHIFT   0x0U

◆ SGTL5000_PAD_I2C_SDA_CLR_MASK

#define SGTL5000_PAD_I2C_SDA_CLR_MASK   0xFFF3U

◆ SGTL5000_PAD_I2C_SDA_GET_MASK

#define SGTL5000_PAD_I2C_SDA_GET_MASK   0x000CU

◆ SGTL5000_PAD_I2C_SDA_SHIFT

#define SGTL5000_PAD_I2C_SDA_SHIFT   0x2U

◆ SGTL5000_PAD_I2S_DOUT_CLR_MASK

#define SGTL5000_PAD_I2S_DOUT_CLR_MASK   0xFFCFU

◆ SGTL5000_PAD_I2S_DOUT_GET_MASK

#define SGTL5000_PAD_I2S_DOUT_GET_MASK   0x0030U

◆ SGTL5000_PAD_I2S_DOUT_SHIFT

#define SGTL5000_PAD_I2S_DOUT_SHIFT   0x4U

◆ SGTL5000_PAD_I2S_LRCLK_CLR_MASK

#define SGTL5000_PAD_I2S_LRCLK_CLR_MASK   0xFCFFU

◆ SGTL5000_PAD_I2S_LRCLK_GET_MASK

#define SGTL5000_PAD_I2S_LRCLK_GET_MASK   0x0300U

◆ SGTL5000_PAD_I2S_LRCLK_SHIFT

#define SGTL5000_PAD_I2S_LRCLK_SHIFT   0x8U

◆ SGTL5000_PAD_I2S_SCLK_CLR_MASK

#define SGTL5000_PAD_I2S_SCLK_CLR_MASK   0xFF3FU

◆ SGTL5000_PAD_I2S_SCLK_GET_MASK

#define SGTL5000_PAD_I2S_SCLK_GET_MASK   0x00C0U

◆ SGTL5000_PAD_I2S_SCLK_SHIFT

#define SGTL5000_PAD_I2S_SCLK_SHIFT   0x6U

◆ SGTL5000_PLL_FRAC_DIV_CLR_MASK

#define SGTL5000_PLL_FRAC_DIV_CLR_MASK   0xF8FFU

◆ SGTL5000_PLL_FRAC_DIV_GET_MASK

#define SGTL5000_PLL_FRAC_DIV_GET_MASK   0x0700U

◆ SGTL5000_PLL_FRAC_DIV_SHIFT

#define SGTL5000_PLL_FRAC_DIV_SHIFT   0x0U

◆ SGTL5000_PLL_INT_DIV_CLR_MASK

#define SGTL5000_PLL_INT_DIV_CLR_MASK   0x07FFU

◆ SGTL5000_PLL_INT_DIV_GET_MASK

#define SGTL5000_PLL_INT_DIV_GET_MASK   0xF800U

◆ SGTL5000_PLL_INT_DIV_SHIFT

#define SGTL5000_PLL_INT_DIV_SHIFT   0xBU

◆ SGTL5000_PLL_LOCKED

#define SGTL5000_PLL_LOCKED   0x0010U

◆ SGTL5000_PLL_POWERUP_CLR_MASK

#define SGTL5000_PLL_POWERUP_CLR_MASK   0xFBFFU

◆ SGTL5000_PLL_POWERUP_GET_MASK

#define SGTL5000_PLL_POWERUP_GET_MASK   0x0400U

◆ SGTL5000_PLL_POWERUP_SHIFT

#define SGTL5000_PLL_POWERUP_SHIFT   0xAU

◆ SGTL5000_RATE_MODE_CLR_MASK

#define SGTL5000_RATE_MODE_CLR_MASK   0xFFCFU

◆ SGTL5000_RATE_MODE_DIV_1

#define SGTL5000_RATE_MODE_DIV_1   0x0000U

◆ SGTL5000_RATE_MODE_DIV_2

#define SGTL5000_RATE_MODE_DIV_2   0x0010U

◆ SGTL5000_RATE_MODE_DIV_4

#define SGTL5000_RATE_MODE_DIV_4   0x0020U

◆ SGTL5000_RATE_MODE_DIV_6

#define SGTL5000_RATE_MODE_DIV_6   0x0030U

◆ SGTL5000_RATE_MODE_GET_MASK

#define SGTL5000_RATE_MODE_GET_MASK   0x0030U

◆ SGTL5000_RATE_MODE_SHIFT

#define SGTL5000_RATE_MODE_SHIFT   0x4U

◆ SGTL5000_REFTOP_POWERUP_CLR_MASK

#define SGTL5000_REFTOP_POWERUP_CLR_MASK   0xFFDFU

◆ SGTL5000_REFTOP_POWERUP_GET_MASK

#define SGTL5000_REFTOP_POWERUP_GET_MASK   0x0020U

◆ SGTL5000_REFTOP_POWERUP_SHIFT

#define SGTL5000_REFTOP_POWERUP_SHIFT   0x5U

◆ SGTL5000_RIGHT_ADC_POWERUP_CLR_MASK

#define SGTL5000_RIGHT_ADC_POWERUP_CLR_MASK   0xFFBFU

◆ SGTL5000_RIGHT_ADC_POWERUP_GET_MASK

#define SGTL5000_RIGHT_ADC_POWERUP_GET_MASK   0x0040U

◆ SGTL5000_RIGHT_ADC_POWERUP_SHIFT

#define SGTL5000_RIGHT_ADC_POWERUP_SHIFT   0x6U

◆ SGTL5000_RIGHT_DAC_POWERUP_CLR_MASK

#define SGTL5000_RIGHT_DAC_POWERUP_CLR_MASK   0xBFFFU

◆ SGTL5000_RIGHT_DAC_POWERUP_GET_MASK

#define SGTL5000_RIGHT_DAC_POWERUP_GET_MASK   0x4000U

◆ SGTL5000_RIGHT_DAC_POWERUP_SHIFT

#define SGTL5000_RIGHT_DAC_POWERUP_SHIFT   0xEU

◆ SGTL5000_SEL_ADC_CLR_MASK

#define SGTL5000_SEL_ADC_CLR_MASK   0xFFFBU

◆ SGTL5000_SEL_ADC_GET_MASK

#define SGTL5000_SEL_ADC_GET_MASK   0x0004U

◆ SGTL5000_SEL_ADC_LINEIN

#define SGTL5000_SEL_ADC_LINEIN   0x0004U

◆ SGTL5000_SEL_ADC_MIC

#define SGTL5000_SEL_ADC_MIC   0x0000U

◆ SGTL5000_SEL_ADC_SHIFT

#define SGTL5000_SEL_ADC_SHIFT   0x2U

◆ SGTL5000_SEL_HP_CLR_MASK

#define SGTL5000_SEL_HP_CLR_MASK   0xFFBFU

◆ SGTL5000_SEL_HP_DAC

#define SGTL5000_SEL_HP_DAC   0x0000U

◆ SGTL5000_SEL_HP_GET_MASK

#define SGTL5000_SEL_HP_GET_MASK   0x0040U

◆ SGTL5000_SEL_HP_LINEIN

#define SGTL5000_SEL_HP_LINEIN   0x0040U

◆ SGTL5000_SEL_HP_SHIFT

#define SGTL5000_SEL_HP_SHIFT   0x6U

◆ SGTL5000_SMALL_POP

#define SGTL5000_SMALL_POP   0x0001U

◆ SGTL5000_STARTUP_POWERUP_CLR_MASK

#define SGTL5000_STARTUP_POWERUP_CLR_MASK   0xEFFFU

◆ SGTL5000_STARTUP_POWERUP_GET_MASK

#define SGTL5000_STARTUP_POWERUP_GET_MASK   0x1000U

◆ SGTL5000_STARTUP_POWERUP_SHIFT

#define SGTL5000_STARTUP_POWERUP_SHIFT   0xCU

◆ SGTL5000_SYS_FS_32k

#define SGTL5000_SYS_FS_32k   0x0000U

◆ SGTL5000_SYS_FS_44_1k

#define SGTL5000_SYS_FS_44_1k   0x0004U

◆ SGTL5000_SYS_FS_48k

#define SGTL5000_SYS_FS_48k   0x0008U

◆ SGTL5000_SYS_FS_96k

#define SGTL5000_SYS_FS_96k   0x000CU

◆ SGTL5000_SYS_FS_CLR_MASK

#define SGTL5000_SYS_FS_CLR_MASK   0xFFF3U

◆ SGTL5000_SYS_FS_GET_MASK

#define SGTL5000_SYS_FS_GET_MASK   0x000CU

◆ SGTL5000_SYS_FS_SHIFT

#define SGTL5000_SYS_FS_SHIFT   0x2U

◆ SGTL5000_VAG_POWERUP_CLR_MASK

#define SGTL5000_VAG_POWERUP_CLR_MASK   0xFF7FU

◆ SGTL5000_VAG_POWERUP_GET_MASK

#define SGTL5000_VAG_POWERUP_GET_MASK   0x0080U

◆ SGTL5000_VAG_POWERUP_SHIFT

#define SGTL5000_VAG_POWERUP_SHIFT   0x7U

◆ SGTL5000_VCOAMP_POWERUP_CLR_MASK

#define SGTL5000_VCOAMP_POWERUP_CLR_MASK   0xFEFFU

◆ SGTL5000_VCOAMP_POWERUP_GET_MASK

#define SGTL5000_VCOAMP_POWERUP_GET_MASK   0x0100U

◆ SGTL5000_VCOAMP_POWERUP_SHIFT

#define SGTL5000_VCOAMP_POWERUP_SHIFT   0x8U

◆ SGTL5000_VDDC_ASSN_OVRD

#define SGTL5000_VDDC_ASSN_OVRD   0x0020U

◆ SGTL5000_VDDC_CHRGPMP_POWERUP_CLR_MASK

#define SGTL5000_VDDC_CHRGPMP_POWERUP_CLR_MASK   0xF7FFU

◆ SGTL5000_VDDC_CHRGPMP_POWERUP_GET_MASK

#define SGTL5000_VDDC_CHRGPMP_POWERUP_GET_MASK   0x0800U

◆ SGTL5000_VDDC_CHRGPMP_POWERUP_SHIFT

#define SGTL5000_VDDC_CHRGPMP_POWERUP_SHIFT   0xBU

◆ SGTL5000_VDDC_MAN_ASSN_CLR_MASK

#define SGTL5000_VDDC_MAN_ASSN_CLR_MASK   0xFFBFU

◆ SGTL5000_VDDC_MAN_ASSN_GET_MASK

#define SGTL5000_VDDC_MAN_ASSN_GET_MASK   0x0040U

◆ SGTL5000_VDDC_MAN_ASSN_SHIFT

#define SGTL5000_VDDC_MAN_ASSN_SHIFT   0x6U

◆ SGTL5000_VDDC_MAN_ASSN_VDDA

#define SGTL5000_VDDC_MAN_ASSN_VDDA   0x0000U

◆ SGTL5000_VDDC_MAN_ASSN_VDDIO

#define SGTL5000_VDDC_MAN_ASSN_VDDIO   0x0040U

◆ SGTL5000_VOL_BUSY_DAC_LEFT

#define SGTL5000_VOL_BUSY_DAC_LEFT   0x1000U

◆ SGTL5000_VOL_BUSY_DAC_RIGHT

#define SGTL5000_VOL_BUSY_DAC_RIGHT   0x2000U

◆ SGTL_I2C_BITRATE

#define SGTL_I2C_BITRATE   100000U

#include <components/codec/sgtl5000/hpm_sgtl5000.h>

sgtl i2c baudrate

Typedef Documentation

◆ sgtl_audio_format_t

typedef struct _sgtl_audio_format sgtl_audio_format_t

#include <components/codec/sgtl5000/hpm_sgtl5000.h>

Audio format configuration.

◆ sgtl_config_t

typedef struct _sgtl_config sgtl_config_t

#include <components/codec/sgtl5000/hpm_sgtl5000.h>

Initailize structure of sgtl5000.

◆ sgtl_module_t

typedef enum _sgtl5000_module sgtl_module_t

#include <components/codec/sgtl5000/hpm_sgtl5000.h>

Modules in Sgtl5000 board.

◆ sgtl_protocol_t

typedef enum _sgtl_protocol sgtl_protocol_t

#include <components/codec/sgtl5000/hpm_sgtl5000.h>

The audio data transfer protocol choice. Sgtl5000 only supports I2S format and PCM format.

◆ sgtl_route_t

typedef enum _sgtl_route sgtl_route_t

#include <components/codec/sgtl5000/hpm_sgtl5000.h>

Sgtl5000 data route.

Note
Only provide some typical data route, not all route listed. Users cannot combine any routes, once a new route is set, the precios one would be replaced.

◆ sgtl_sclk_edge_t

typedef enum _sgtl_sclk_edge sgtl_sclk_edge_t

#include <components/codec/sgtl5000/hpm_sgtl5000.h>

SGTL SCLK valid edge.

Enumeration Type Documentation

◆ anonymous enum

anonymous enum

#include <components/codec/sgtl5000/hpm_sgtl5000.h>

sgtl play channel

Enumerator
sgtl_headphone_left 

headphone left channel

sgtl_headphone_right 

headphone right channel

sgtl_lineout_left 

lineout left channel

sgtl_lineout_right 

lineout right channel

◆ anonymous enum

anonymous enum

#include <components/codec/sgtl5000/hpm_sgtl5000.h>

sgtl record source _sgtl_record_source

Enumerator
sgtl_record_source_linein 

record source line in

sgtl_record_source_mic 

record source single end

◆ anonymous enum

anonymous enum

#include <components/codec/sgtl5000/hpm_sgtl5000.h>

sgtl play source _stgl_play_source

Enumerator
sgtl_play_source_linein 

play source line in

sgtl_play_source_dac 

play source line in

Function Documentation

◆ sgtl_config_data_format()

hpm_stat_t sgtl_config_data_format ( sgtl_context_t context,
uint32_t  mclk,
uint32_t  sample_rate,
uint32_t  bits 
)

#include <components/codec/sgtl5000/hpm_sgtl5000.h>

Configure the data format of audio data.

This function would configure the registers about the sample rate, bit depths.

Parameters
contextSgtl5000 context structure pointer.
mclkMaster clock frequency of I2S.
sample_rateSample rate of audio file running in sgtl5000. Sgtl5000 now supports 8k, 11.025k, 12k, 16k, 22.05k, 24k, 32k, 44.1k, 48k and 96k sample rate.
bitsBit depth of audio file (Sgtl5000 only supports 16bit, 20bit, 24bit and 32 bit in HW).

◆ sgtl_deint()

hpm_stat_t sgtl_deint ( sgtl_context_t context)

#include <components/codec/sgtl5000/hpm_sgtl5000.h>

Deinit the sgtl5000 codec. Shut down Sgtl5000 modules.

Parameters
contextSgtl5000 context structure pointer.

◆ sgtl_disable_module()

hpm_stat_t sgtl_disable_module ( sgtl_context_t context,
sgtl_module_t  module 
)

#include <components/codec/sgtl5000/hpm_sgtl5000.h>

Disable expected devices.

Parameters
contextSgtl5000 context structure.
moduleModule expected to enable.

◆ sgtl_enable_module()

hpm_stat_t sgtl_enable_module ( sgtl_context_t context,
sgtl_module_t  module 
)

#include <components/codec/sgtl5000/hpm_sgtl5000.h>

Enable expected devices.

Parameters
contextSgtl5000 context structure.
moduleModule expected to enable.

◆ sgtl_get_volume()

uint32_t sgtl_get_volume ( sgtl_context_t context,
sgtl_module_t  module 
)

#include <components/codec/sgtl5000/hpm_sgtl5000.h>

Get the volume of different modules in sgtl5000.

This function gets the volume of sgtl5000 modules. This interface get DAC module volume. The function assume that left channel and right channel has the same volume.

Parameters
contextSgtl5000 context structure.
moduleSgtl5000 module, such as DAC, ADC and etc.
Returns
Module value, the value is exact value in register.

◆ sgtl_init()

hpm_stat_t sgtl_init ( sgtl_context_t context,
sgtl_config_t config 
)

#include <components/codec/sgtl5000/hpm_sgtl5000.h>

sgtl5000 initialize function.

In this function, some configurations are fixed. The second parameter can be NULL. If users want to change the SGTL5000 settings, a configure structure should be prepared.

Note
If the codec_config is NULL, it would initialize sgtl5000 using default settings. The default setting:
sgtl_init_t codec_config
codec_config.route = sgtl_route_playback_record
codec_config.bus = sgtl_bus_i2s
codec_config.master = slave
@ sgtl_bus_i2s
Definition: hpm_sgtl5000.h:783
@ sgtl_route_playback_record
Definition: hpm_sgtl5000.h:772
Parameters
contextSgtl5000 context structure.
configsgtl5000 configuration structure. If this pointer equals to NULL, it means using the default configuration.
Returns
Initialization status

◆ sgtl_modify_reg()

hpm_stat_t sgtl_modify_reg ( sgtl_context_t context,
uint16_t  reg,
uint16_t  clr_mask,
uint16_t  val 
)

#include <components/codec/sgtl5000/hpm_sgtl5000.h>

Modify some bits in the register using I2C.

Parameters
contextSgtl5000 context structure.
regThe register address in sgtl.
clr_maskThe mask code for the bits want to write. The bit you want to write should be 0.
valValue needs to write into the register.

◆ sgtl_read_reg()

hpm_stat_t sgtl_read_reg ( sgtl_context_t context,
uint16_t  reg,
uint16_t *  val 
)

#include <components/codec/sgtl5000/hpm_sgtl5000.h>

Read register from sgtl using I2C.

Parameters
contextSgtl5000 context structure.
regThe register address in sgtl.
valValue written to.

◆ sgtl_set_data_route()

hpm_stat_t sgtl_set_data_route ( sgtl_context_t context,
sgtl_route_t  route 
)

#include <components/codec/sgtl5000/hpm_sgtl5000.h>

Set audio data route in sgtl5000.

This function would set the data route according to route. The route cannot be combined, as all route would enable different modules.

Note
If a new route is set, the previous route would not work.
Parameters
contextSgtl5000 context structure.
routeAudio data route in sgtl5000.

◆ sgtl_set_master_mode()

void sgtl_set_master_mode ( sgtl_context_t context,
bool  master 
)

#include <components/codec/sgtl5000/hpm_sgtl5000.h>

Set sgtl5000 as master or slave.

Parameters
contextSgtl5000 context structure.
master1 represent master, 0 represent slave.

◆ sgtl_set_mute()

hpm_stat_t sgtl_set_mute ( sgtl_context_t context,
sgtl_module_t  module,
bool  mute 
)

#include <components/codec/sgtl5000/hpm_sgtl5000.h>

Mute/unmute modules in sgtl5000.

Parameters
contextSgtl5000 context structure.
moduleSgtl5000 module, such as DAC, ADC and etc.
muteTrue means mute, and false means unmute.

◆ sgtl_set_play()

hpm_stat_t sgtl_set_play ( sgtl_context_t context,
uint32_t  playSource 
)

#include <components/codec/sgtl5000/hpm_sgtl5000.h>

select SGTL codec play source.

Parameters
contextSgtl5000 context structure pointer.
playSourceplay source value, reference _sgtl_play_source.
Returns
kStatus_Success, else failed.

◆ sgtl_set_protocol()

hpm_stat_t sgtl_set_protocol ( sgtl_context_t context,
sgtl_protocol_t  protocol 
)

#include <components/codec/sgtl5000/hpm_sgtl5000.h>

Set the audio transfer protocol.

Sgtl5000 only supports I2S, I2S left, I2S right, PCM A, PCM B format.

Parameters
contextSgtl5000 context structure.
protocolAudio data transfer protocol.

◆ sgtl_set_record()

hpm_stat_t sgtl_set_record ( sgtl_context_t context,
uint32_t  recordSource 
)

#include <components/codec/sgtl5000/hpm_sgtl5000.h>

select SGTL codec record source.

Parameters
contextSgtl5000 context structure pointer.
recordSourcerecord source value, reference _sgtl_record_source.
Returns
kStatus_Success, else failed.

◆ sgtl_set_volume()

hpm_stat_t sgtl_set_volume ( sgtl_context_t context,
sgtl_module_t  module,
uint32_t  volume 
)

#include <components/codec/sgtl5000/hpm_sgtl5000.h>

Set the volume of different modules in sgtl5000.

This function would set the volume of sgtl5000 modules. This interface set module volume. The function assume that left channel and right channel has the same volume.

sgtl_module_adc volume range: 0 - 0xF, 0dB - 22.5dB sgtl_module_dac volume range: 0x3C - 0xF0, 0dB - -90dB sgtl_module_hp volume range: 0 - 0x7F, 12dB - -51.5dB sgtl_module_lineout volume range: 0 - 0x1F, 0.5dB steps

Parameters
contextSgtl5000 context structure.
moduleSgtl5000 module, such as DAC, ADC and etc.
volumeVolume value need to be set. The value is the exact value in register.

◆ sgtl_write_reg()

hpm_stat_t sgtl_write_reg ( sgtl_context_t context,
uint16_t  reg,
uint16_t  val 
)

#include <components/codec/sgtl5000/hpm_sgtl5000.h>

Write register to sgtl using I2C.

Parameters
contextSgtl5000 context structure.
regThe register address in sgtl.
valValue needs to write into the register.